1 /* $NetBSD: smc91cxx.c,v 1.102 2019/05/30 02:32:18 msaitoh Exp $ */ 2 3 /*- 4 * Copyright (c) 1997 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * Copyright (c) 1996 Gardner Buchanan <gbuchanan@shl.com> 35 * All rights reserved. 36 * 37 * Redistribution and use in source and binary forms, with or without 38 * modification, are permitted provided that the following conditions 39 * are met: 40 * 1. Redistributions of source code must retain the above copyright 41 * notice, this list of conditions and the following disclaimer. 42 * 2. Redistributions in binary form must reproduce the above copyright 43 * notice, this list of conditions and the following disclaimer in the 44 * documentation and/or other materials provided with the distribution. 45 * 3. All advertising materials mentioning features or use of this software 46 * must display the following acknowledgement: 47 * This product includes software developed by Gardner Buchanan. 48 * 4. The name of Gardner Buchanan may not be used to endorse or promote 49 * products derived from this software without specific prior written 50 * permission. 51 * 52 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 53 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 54 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 55 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 56 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 57 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 58 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 59 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 60 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 61 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 62 * 63 * from FreeBSD Id: if_sn.c,v 1.4 1996/03/18 15:47:16 gardner Exp 64 */ 65 66 /* 67 * Core driver for the SMC 91Cxx family of Ethernet chips. 68 * 69 * Memory allocation interrupt logic is drived from an SMC 91C90 driver 70 * written for NetBSD/amiga by Michael Hitch. 71 */ 72 73 #include <sys/cdefs.h> 74 __KERNEL_RCSID(0, "$NetBSD: smc91cxx.c,v 1.102 2019/05/30 02:32:18 msaitoh Exp $"); 75 76 #include "opt_inet.h" 77 78 #include <sys/param.h> 79 #include <sys/systm.h> 80 #include <sys/mbuf.h> 81 #include <sys/syslog.h> 82 #include <sys/socket.h> 83 #include <sys/device.h> 84 #include <sys/kernel.h> 85 #include <sys/malloc.h> 86 #include <sys/ioctl.h> 87 #include <sys/errno.h> 88 #include <sys/rndsource.h> 89 90 #include <sys/bus.h> 91 #include <sys/intr.h> 92 93 #include <net/if.h> 94 #include <net/if_dl.h> 95 #include <net/if_ether.h> 96 #include <net/if_media.h> 97 #include <net/bpf.h> 98 99 #ifdef INET 100 #include <netinet/in.h> 101 #include <netinet/if_inarp.h> 102 #include <netinet/in_systm.h> 103 #include <netinet/in_var.h> 104 #include <netinet/ip.h> 105 #endif 106 107 #include <dev/mii/mii.h> 108 #include <dev/mii/miivar.h> 109 #include <dev/mii/mii_bitbang.h> 110 111 #include <dev/ic/smc91cxxreg.h> 112 #include <dev/ic/smc91cxxvar.h> 113 114 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 115 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 116 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 117 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 118 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 119 120 #define bus_space_write_stream_4 bus_space_write_4 121 #define bus_space_read_stream_4 bus_space_read_4 122 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 123 124 /* XXX Hardware padding doesn't work yet(?) */ 125 #define SMC91CXX_SW_PAD 126 127 const char *smc91cxx_idstrs[] = { 128 NULL, /* 0 */ 129 NULL, /* 1 */ 130 NULL, /* 2 */ 131 "SMC91C90/91C92", /* 3 */ 132 "SMC91C94/91C96", /* 4 */ 133 "SMC91C95", /* 5 */ 134 NULL, /* 6 */ 135 "SMC91C100", /* 7 */ 136 "SMC91C100FD", /* 8 */ 137 "SMC91C111", /* 9 */ 138 NULL, /* 10 */ 139 NULL, /* 11 */ 140 NULL, /* 12 */ 141 NULL, /* 13 */ 142 NULL, /* 14 */ 143 NULL, /* 15 */ 144 }; 145 146 /* Supported media types. */ 147 static const int smc91cxx_media[] = { 148 IFM_ETHER | IFM_10_T, 149 IFM_ETHER | IFM_10_5, 150 }; 151 #define NSMC91CxxMEDIA __arraycount(smc91cxx_media) 152 153 /* 154 * MII bit-bang glue. 155 */ 156 uint32_t smc91cxx_mii_bitbang_read(device_t); 157 void smc91cxx_mii_bitbang_write(device_t, uint32_t); 158 159 static const struct mii_bitbang_ops smc91cxx_mii_bitbang_ops = { 160 smc91cxx_mii_bitbang_read, 161 smc91cxx_mii_bitbang_write, 162 { 163 MR_MDO, /* MII_BIT_MDO */ 164 MR_MDI, /* MII_BIT_MDI */ 165 MR_MCLK, /* MII_BIT_MDC */ 166 MR_MDOE, /* MII_BIT_DIR_HOST_PHY */ 167 0, /* MII_BIT_DIR_PHY_HOST */ 168 } 169 }; 170 171 /* MII callbacks */ 172 int smc91cxx_mii_readreg(device_t, int, int, uint16_t *); 173 int smc91cxx_mii_writereg(device_t, int, int, uint16_t); 174 void smc91cxx_statchg(struct ifnet *); 175 void smc91cxx_tick(void *); 176 177 int smc91cxx_mediachange(struct ifnet *); 178 void smc91cxx_mediastatus(struct ifnet *, struct ifmediareq *); 179 180 int smc91cxx_set_media(struct smc91cxx_softc *, int); 181 182 void smc91cxx_init(struct smc91cxx_softc *); 183 void smc91cxx_read(struct smc91cxx_softc *); 184 void smc91cxx_reset(struct smc91cxx_softc *); 185 void smc91cxx_start(struct ifnet *); 186 uint8_t smc91cxx_copy_tx_frame(struct smc91cxx_softc *, struct mbuf *); 187 void smc91cxx_resume(struct smc91cxx_softc *); 188 void smc91cxx_stop(struct smc91cxx_softc *); 189 void smc91cxx_watchdog(struct ifnet *); 190 int smc91cxx_ioctl(struct ifnet *, u_long, void *); 191 192 static inline int ether_cmp(const void *, const void *); 193 static inline int 194 ether_cmp(const void *va, const void *vb) 195 { 196 const uint8_t *a = va; 197 const uint8_t *b = vb; 198 199 return ((a[5] != b[5]) || (a[4] != b[4]) || (a[3] != b[3]) || 200 (a[2] != b[2]) || (a[1] != b[1]) || (a[0] != b[0])); 201 } 202 203 static inline void 204 smc91cxx_intr_mask_write(bus_space_tag_t bst, bus_space_handle_t bsh, 205 uint8_t mask) 206 { 207 KDASSERT((mask & IM_ERCV_INT) == 0); 208 #ifdef SMC91CXX_NO_BYTE_WRITE 209 bus_space_write_2(bst, bsh, INTR_STAT_REG_B, mask << 8); 210 #else 211 bus_space_write_1(bst, bsh, INTR_MASK_REG_B, mask); 212 #endif 213 KDASSERT(!(bus_space_read_1(bst, bsh, INTR_MASK_REG_B) & IM_ERCV_INT)); 214 } 215 216 static inline void 217 smc91cxx_intr_ack_write(bus_space_tag_t bst, bus_space_handle_t bsh, 218 uint8_t ack, uint8_t mask) 219 { 220 #ifdef SMC91CXX_NO_BYTE_WRITE 221 bus_space_write_2(bst, bsh, INTR_ACK_REG_B, ack | (mask << 8)); 222 #else 223 bus_space_write_1(bst, bsh, INTR_ACK_REG_B, ack); 224 #endif 225 KDASSERT(!(bus_space_read_1(bst, bsh, INTR_MASK_REG_B) & IM_ERCV_INT)); 226 } 227 228 void 229 smc91cxx_attach(struct smc91cxx_softc *sc, uint8_t *myea) 230 { 231 struct ifnet *ifp = &sc->sc_ec.ec_if; 232 bus_space_tag_t bst = sc->sc_bst; 233 bus_space_handle_t bsh = sc->sc_bsh; 234 struct mii_data *mii = &sc->sc_mii; 235 struct ifmedia *ifm = &mii->mii_media; 236 const char *idstr; 237 uint32_t miicapabilities; 238 uint16_t tmp; 239 uint8_t enaddr[ETHER_ADDR_LEN]; 240 int i, aui, mult, scale, memsize; 241 char pbuf[9]; 242 243 tmp = bus_space_read_2(bst, bsh, BANK_SELECT_REG_W); 244 /* check magic number */ 245 if ((tmp & BSR_DETECT_MASK) != BSR_DETECT_VALUE) { 246 aprint_error_dev(sc->sc_dev, 247 "failed to detect chip, bsr=%04x\n", tmp); 248 return; 249 } 250 251 /* Make sure the chip is stopped. */ 252 smc91cxx_stop(sc); 253 254 SMC_SELECT_BANK(sc, 3); 255 tmp = bus_space_read_2(bst, bsh, REVISION_REG_W); 256 sc->sc_chipid = RR_ID(tmp); 257 idstr = smc91cxx_idstrs[sc->sc_chipid]; 258 259 aprint_normal_dev(sc->sc_dev, ""); 260 if (idstr != NULL) 261 aprint_normal("%s, ", idstr); 262 else 263 aprint_normal("unknown chip id %d, ", sc->sc_chipid); 264 aprint_normal("revision %d, ", RR_REV(tmp)); 265 266 SMC_SELECT_BANK(sc, 0); 267 switch (sc->sc_chipid) { 268 default: 269 mult = MCR_MEM_MULT(bus_space_read_2(bst, bsh, MEM_CFG_REG_W)); 270 scale = MIR_SCALE_91C9x; 271 break; 272 273 case CHIP_91C111: 274 mult = MIR_MULT_91C111; 275 scale = MIR_SCALE_91C111; 276 } 277 memsize = bus_space_read_2(bst, bsh, MEM_INFO_REG_W) & MIR_TOTAL_MASK; 278 if (memsize == 255) 279 memsize++; 280 memsize *= scale * mult; 281 282 format_bytes(pbuf, sizeof(pbuf), memsize); 283 aprint_normal("buffer size: %s\n", pbuf); 284 285 /* Read the station address from the chip. */ 286 SMC_SELECT_BANK(sc, 1); 287 if (myea == NULL) { 288 myea = enaddr; 289 for (i = 0; i < ETHER_ADDR_LEN; i += 2) { 290 tmp = bus_space_read_2(bst, bsh, IAR_ADDR0_REG_W + i); 291 myea[i + 1] = (tmp >> 8) & 0xff; 292 myea[i] = tmp & 0xff; 293 } 294 } 295 aprint_normal_dev(sc->sc_dev, "MAC address %s, ", 296 ether_sprintf(myea)); 297 298 /* Initialize the ifnet structure. */ 299 strlcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 300 ifp->if_softc = sc; 301 ifp->if_start = smc91cxx_start; 302 ifp->if_ioctl = smc91cxx_ioctl; 303 ifp->if_watchdog = smc91cxx_watchdog; 304 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 305 IFQ_SET_READY(&ifp->if_snd); 306 307 /* Attach the interface. */ 308 if_attach(ifp); 309 if_deferred_start_init(ifp, NULL); 310 ether_ifattach(ifp, myea); 311 312 /* 313 * Initialize our media structures and MII info. We will 314 * probe the MII if we are on the SMC91Cxx 315 */ 316 mii->mii_ifp = ifp; 317 mii->mii_readreg = smc91cxx_mii_readreg; 318 mii->mii_writereg = smc91cxx_mii_writereg; 319 mii->mii_statchg = smc91cxx_statchg; 320 sc->sc_ec.ec_mii = mii; 321 ifmedia_init(ifm, IFM_IMASK, smc91cxx_mediachange, 322 smc91cxx_mediastatus); 323 324 SMC_SELECT_BANK(sc, 1); 325 tmp = bus_space_read_2(bst, bsh, CONFIG_REG_W); 326 327 miicapabilities = BMSR_MEDIAMASK|BMSR_ANEG; 328 switch (sc->sc_chipid) { 329 case CHIP_91100: 330 /* 331 * The 91100 does not have full-duplex capabilities, 332 * even if the PHY does. 333 */ 334 miicapabilities &= ~(BMSR_100TXFDX | BMSR_10TFDX); 335 /*FALLTHROUGH*/ 336 case CHIP_91100FD: 337 case CHIP_91C111: 338 if (tmp & CR_MII_SELECT) { 339 aprint_normal("default media MII"); 340 if (sc->sc_chipid == CHIP_91C111) { 341 aprint_normal(" (%s PHY)\n", 342 (tmp & CR_AUI_SELECT) ? 343 "external" : "internal"); 344 sc->sc_internal_phy = !(tmp & CR_AUI_SELECT); 345 } else 346 aprint_normal("\n"); 347 mii_attach(sc->sc_dev, mii, miicapabilities, 348 MII_PHY_ANY, MII_OFFSET_ANY, 0); 349 if (LIST_FIRST(&mii->mii_phys) == NULL) { 350 ifmedia_add(&mii->mii_media, 351 IFM_ETHER | IFM_NONE, 0, NULL); 352 ifmedia_set(&mii->mii_media, 353 IFM_ETHER | IFM_NONE); 354 } else { 355 ifmedia_set(&mii->mii_media, 356 IFM_ETHER | IFM_AUTO); 357 } 358 sc->sc_flags |= SMC_FLAGS_HAS_MII; 359 break; 360 } else 361 if (sc->sc_chipid == CHIP_91C111) { 362 /* XXX: Should bring it out of low-power mode */ 363 aprint_normal("EPH interface in low power mode\n"); 364 sc->sc_internal_phy = 0; 365 return; 366 } 367 /*FALLTHROUGH*/ 368 default: 369 aprint_normal("default media %s\n", 370 (aui = (tmp & CR_AUI_SELECT)) ? 371 "AUI" : "UTP"); 372 for (i = 0; i < NSMC91CxxMEDIA; i++) 373 ifmedia_add(ifm, smc91cxx_media[i], 0, NULL); 374 ifmedia_set(ifm, IFM_ETHER | (aui ? IFM_10_5 : IFM_10_T)); 375 break; 376 } 377 378 rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev), 379 RND_TYPE_NET, RND_FLAG_DEFAULT); 380 381 callout_init(&sc->sc_mii_callout, 0); 382 383 /* The attach is successful. */ 384 sc->sc_flags |= SMC_FLAGS_ATTACHED; 385 } 386 387 /* 388 * Change media according to request. 389 */ 390 int 391 smc91cxx_mediachange(struct ifnet *ifp) 392 { 393 struct smc91cxx_softc *sc = ifp->if_softc; 394 395 return smc91cxx_set_media(sc, sc->sc_mii.mii_media.ifm_media); 396 } 397 398 int 399 smc91cxx_set_media(struct smc91cxx_softc *sc, int media) 400 { 401 bus_space_tag_t bst = sc->sc_bst; 402 bus_space_handle_t bsh = sc->sc_bsh; 403 uint16_t tmp; 404 int rc; 405 406 /* 407 * If the interface is not currently powered on, just return. 408 * When it is enabled later, smc91cxx_init() will properly set 409 * up the media for us. 410 */ 411 if ((sc->sc_flags & SMC_FLAGS_ENABLED) == 0) 412 return 0; 413 414 if (IFM_TYPE(media) != IFM_ETHER) 415 return EINVAL; 416 417 if ((sc->sc_flags & SMC_FLAGS_HAS_MII) == 0 || 418 (rc = mii_mediachg(&sc->sc_mii)) == ENXIO) 419 rc = 0; 420 421 switch (IFM_SUBTYPE(media)) { 422 case IFM_10_T: 423 case IFM_10_5: 424 SMC_SELECT_BANK(sc, 1); 425 tmp = bus_space_read_2(bst, bsh, CONFIG_REG_W); 426 if (IFM_SUBTYPE(media) == IFM_10_5) 427 tmp |= CR_AUI_SELECT; 428 else 429 tmp &= ~CR_AUI_SELECT; 430 bus_space_write_2(bst, bsh, CONFIG_REG_W, tmp); 431 delay(20000); /* XXX is this needed? */ 432 break; 433 434 default: 435 return EINVAL; 436 } 437 438 return rc; 439 } 440 441 /* 442 * Notify the world which media we're using. 443 */ 444 void 445 smc91cxx_mediastatus(struct ifnet *ifp, struct ifmediareq *ifmr) 446 { 447 struct smc91cxx_softc *sc = ifp->if_softc; 448 bus_space_tag_t bst = sc->sc_bst; 449 bus_space_handle_t bsh = sc->sc_bsh; 450 uint16_t tmp; 451 452 if ((sc->sc_flags & SMC_FLAGS_ENABLED) == 0) { 453 ifmr->ifm_active = IFM_ETHER | IFM_NONE; 454 ifmr->ifm_status = 0; 455 return; 456 } 457 458 /* If we have MII, go ask the PHY what's going on. */ 459 if (sc->sc_flags & SMC_FLAGS_HAS_MII) { 460 mii_pollstat(&sc->sc_mii); 461 ifmr->ifm_active = sc->sc_mii.mii_media_active; 462 ifmr->ifm_status = sc->sc_mii.mii_media_status; 463 return; 464 } 465 466 SMC_SELECT_BANK(sc, 1); 467 tmp = bus_space_read_2(bst, bsh, CONFIG_REG_W); 468 ifmr->ifm_active = 469 IFM_ETHER | ((tmp & CR_AUI_SELECT) ? IFM_10_5 : IFM_10_T); 470 } 471 472 /* 473 * Reset and initialize the chip. 474 */ 475 void 476 smc91cxx_init(struct smc91cxx_softc *sc) 477 { 478 struct ifnet *ifp = &sc->sc_ec.ec_if; 479 bus_space_tag_t bst = sc->sc_bst; 480 bus_space_handle_t bsh = sc->sc_bsh; 481 uint16_t tmp; 482 const uint8_t *enaddr; 483 int s, i; 484 485 s = splnet(); 486 487 /* 488 * This resets the registers mostly to defaults, but doesn't 489 * affect the EEPROM. The longest reset recovery time of those devices 490 * supported is the 91C111. Section 7.8 of its datasheet asks for 50ms. 491 */ 492 SMC_SELECT_BANK(sc, 0); 493 bus_space_write_2(bst, bsh, RECV_CONTROL_REG_W, RCR_SOFTRESET); 494 delay(5); 495 bus_space_write_2(bst, bsh, RECV_CONTROL_REG_W, 0); 496 delay(50000); 497 498 bus_space_write_2(bst, bsh, TXMIT_CONTROL_REG_W, 0); 499 500 /* Set the Ethernet address. */ 501 SMC_SELECT_BANK(sc, 1); 502 enaddr = (const uint8_t *)CLLADDR(ifp->if_sadl); 503 for (i = 0; i < ETHER_ADDR_LEN; i += 2) { 504 tmp = enaddr[i + 1] << 8 | enaddr[i]; 505 bus_space_write_2(bst, bsh, IAR_ADDR0_REG_W + i, tmp); 506 } 507 508 /* 509 * Set the control register to automatically release successfully 510 * transmitted packets (making the best use of our limited memory) 511 * and enable the EPH interrupt on certain TX errors. 512 */ 513 bus_space_write_2(bst, bsh, CONTROL_REG_W, (CTR_AUTO_RELEASE | 514 CTR_TE_ENABLE | CTR_CR_ENABLE | CTR_LE_ENABLE)); 515 516 /* Reset the MMU and wait for it to be un-busy. */ 517 SMC_SELECT_BANK(sc, 2); 518 bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_RESET); 519 sc->sc_txpacketno = ARR_FAILED; 520 for (;;) { 521 tmp = bus_space_read_2(bst, bsh, MMU_CMD_REG_W); 522 if (tmp == 0xffff) { 523 /* Card went away! */ 524 splx(s); 525 return; 526 } 527 if ((tmp & MMUCR_BUSY) == 0) 528 break; 529 } 530 531 /* Disable all interrupts. */ 532 smc91cxx_intr_mask_write(bst, bsh, 0); 533 534 /* 535 * On the 91c111, enable auto-negotiation, and set the LED 536 * status pins to something sane. 537 * XXX: Should be some way for MD code to decide the latter. 538 */ 539 SMC_SELECT_BANK(sc, 0); 540 if (sc->sc_chipid == CHIP_91C111) { 541 bus_space_write_2(bst, bsh, RX_PHY_CONTROL_REG_W, 542 RPC_ANEG | 543 (RPC_LS_LINK_DETECT << RPC_LSA_SHIFT) | 544 (RPC_LS_TXRX << RPC_LSB_SHIFT)); 545 } 546 547 /* Set current media. */ 548 smc91cxx_set_media(sc, sc->sc_mii.mii_media.ifm_cur->ifm_media); 549 550 /* 551 * Set the receive filter. We want receive enable and auto 552 * strip of CRC from received packet. If we are in promisc. mode, 553 * then set that bit as well. 554 * 555 * XXX Initialize multicast filter. For now, we just accept 556 * XXX all multicast. 557 */ 558 SMC_SELECT_BANK(sc, 0); 559 560 tmp = RCR_ENABLE | RCR_STRIP_CRC | RCR_ALMUL; 561 if (ifp->if_flags & IFF_PROMISC) 562 tmp |= RCR_PROMISC; 563 564 bus_space_write_2(bst, bsh, RECV_CONTROL_REG_W, tmp); 565 566 /* Set transmitter control to "enabled". */ 567 tmp = TCR_ENABLE; 568 569 #ifndef SMC91CXX_SW_PAD 570 /* 571 * Enable hardware padding of transmitted packets. 572 * XXX doesn't work? 573 */ 574 tmp |= TCR_PAD_ENABLE; 575 #endif 576 577 bus_space_write_2(bst, bsh, TXMIT_CONTROL_REG_W, tmp); 578 579 /* Now, enable interrupts. */ 580 SMC_SELECT_BANK(sc, 2); 581 582 sc->sc_intmask = IM_EPH_INT | IM_RX_OVRN_INT | IM_RCV_INT; 583 if (sc->sc_chipid == CHIP_91C111 && sc->sc_internal_phy) { 584 sc->sc_intmask |= IM_MD_INT; 585 } 586 smc91cxx_intr_mask_write(bst, bsh, sc->sc_intmask); 587 588 /* Interface is now running, with no output active. */ 589 ifp->if_flags |= IFF_RUNNING; 590 ifp->if_flags &= ~IFF_OACTIVE; 591 592 if (sc->sc_flags & SMC_FLAGS_HAS_MII) { 593 /* Start the one second clock. */ 594 callout_reset(&sc->sc_mii_callout, hz, smc91cxx_tick, sc); 595 } 596 597 /* Attempt to start any pending transmission. */ 598 smc91cxx_start(ifp); 599 600 splx(s); 601 } 602 603 /* 604 * Start output on an interface. 605 * Must be called at splnet or interrupt level. 606 */ 607 void 608 smc91cxx_start(struct ifnet *ifp) 609 { 610 struct smc91cxx_softc *sc = ifp->if_softc; 611 bus_space_tag_t bst = sc->sc_bst; 612 bus_space_handle_t bsh = sc->sc_bsh; 613 u_int len; 614 struct mbuf *m; 615 uint16_t length, npages; 616 uint16_t oddbyte; 617 uint8_t packetno; 618 int timo, pad; 619 620 if ((ifp->if_flags & (IFF_RUNNING|IFF_OACTIVE)) != IFF_RUNNING) 621 return; 622 623 again: 624 /* Peek at the next packet. */ 625 IFQ_POLL(&ifp->if_snd, m); 626 if (m == NULL) 627 return; 628 629 /* 630 * Compute the frame length and set pad to give an overall even 631 * number of bytes. Below, we assume that the packet length 632 * is even. 633 */ 634 for (len = 0; m != NULL; m = m->m_next) 635 len += m->m_len; 636 637 /* 638 * We drop packets that are too large. Perhaps we should 639 * truncate them instead? 640 */ 641 if (len > (ETHER_MAX_LEN - ETHER_CRC_LEN)) { 642 printf("%s: large packet discarded\n", 643 device_xname(sc->sc_dev)); 644 ifp->if_oerrors++; 645 IFQ_DEQUEUE(&ifp->if_snd, m); 646 m_freem(m); 647 goto readcheck; 648 } 649 650 pad = 0; 651 #ifdef SMC91CXX_SW_PAD 652 /* Not using hardware padding; pad to ETHER_MIN_LEN. */ 653 if (len < (ETHER_MIN_LEN - ETHER_CRC_LEN)) 654 pad = ETHER_MIN_LEN - ETHER_CRC_LEN - len; 655 #endif 656 657 length = pad + len; 658 659 /* 660 * The MMU has a 256 byte page size. The MMU expects us to 661 * ask for "npages - 1". We include space for the status word, 662 * byte count, and control bytes in the allocation request. 663 */ 664 npages = ((length & ~1) + 6) >> 8; 665 666 /* Now allocate the memory. */ 667 SMC_SELECT_BANK(sc, 2); 668 bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_ALLOC | npages); 669 670 timo = MEMORY_WAIT_TIME; 671 if (__predict_false((sc->sc_txpacketno & ARR_FAILED) == 0)) { 672 packetno = sc->sc_txpacketno; 673 sc->sc_txpacketno = ARR_FAILED; 674 } else { 675 do { 676 if (bus_space_read_1(bst, bsh, 677 INTR_STAT_REG_B) & IM_ALLOC_INT) 678 break; 679 delay(1); 680 } while (--timo); 681 } 682 683 packetno = bus_space_read_1(bst, bsh, ALLOC_RESULT_REG_B); 684 685 if (packetno & ARR_FAILED || timo == 0) { 686 /* 687 * No transmit memory is available. Record the number 688 * of requested pages and enable the allocation completion 689 * interrupt. Set up the watchdog timer in case we miss 690 * the interrupt. Mark the interface as active so that 691 * no one else attempts to transmit while we're allocating 692 * memory. 693 */ 694 sc->sc_intmask |= IM_ALLOC_INT; 695 smc91cxx_intr_mask_write(bst, bsh, sc->sc_intmask); 696 ifp->if_timer = 5; 697 ifp->if_flags |= IFF_OACTIVE; 698 699 return; 700 } 701 702 /* We have a packet number - set the data window. */ 703 bus_space_write_2(bst, bsh, PACKET_NUM_REG_B, packetno); 704 705 /* Point to the beginning of the packet. */ 706 bus_space_write_2(bst, bsh, POINTER_REG_W, PTR_AUTOINC /* | 0x0000 */); 707 708 /* 709 * Send the packet length (+6 for stats, length, and control bytes) 710 * and the status word (set to zeros). 711 */ 712 bus_space_write_2(bst, bsh, DATA_REG_W, 0); 713 bus_space_write_2(bst, bsh, DATA_REG_W, (length + 6) & 0x7ff); 714 715 /* 716 * Get the packet from the kernel. This will include the Ethernet 717 * frame header, MAC address, etc. 718 */ 719 IFQ_DEQUEUE(&ifp->if_snd, m); 720 721 /* 722 * Push the packet out to the card. The copying function only does 723 * whole words and returns the straggling byte (if any). 724 */ 725 oddbyte = smc91cxx_copy_tx_frame(sc, m); 726 727 #ifdef SMC91CXX_SW_PAD 728 if (pad > 1 && (pad & 1)) { 729 bus_space_write_2(bst, bsh, DATA_REG_W, oddbyte); 730 oddbyte = 0; 731 pad -= 1; 732 } 733 734 /* Push out padding. */ 735 while (pad > 1) { 736 bus_space_write_2(bst, bsh, DATA_REG_W, 0); 737 pad -= 2; 738 } 739 #endif 740 741 /* 742 * Push out control byte and unused packet byte. The control byte 743 * denotes whether this is an odd or even length packet, and that 744 * no special CRC handling is necessary. 745 */ 746 bus_space_write_2(bst, bsh, DATA_REG_W, 747 oddbyte | ((length & 1) ? (CTLB_ODD << 8) : 0)); 748 749 /* 750 * Enable transmit interrupts and let the chip go. Set a watchdog 751 * in case we miss the interrupt. 752 */ 753 sc->sc_intmask |= IM_TX_INT | IM_TX_EMPTY_INT; 754 smc91cxx_intr_mask_write(bst, bsh, sc->sc_intmask); 755 756 bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_ENQUEUE); 757 758 ifp->if_timer = 5; 759 760 /* Hand off a copy to the bpf. */ 761 bpf_mtap(ifp, m, BPF_D_OUT); 762 763 ifp->if_opackets++; 764 m_freem(m); 765 766 readcheck: 767 /* 768 * Check for incoming packets. We don't want to overflow the small 769 * RX FIFO. If nothing has arrived, attempt to queue another 770 * transmit packet. 771 */ 772 if (bus_space_read_2(bst, bsh, FIFO_PORTS_REG_W) & FIFO_REMPTY) 773 goto again; 774 } 775 776 /* 777 * Squirt a (possibly misaligned) mbuf to the device 778 */ 779 uint8_t 780 smc91cxx_copy_tx_frame(struct smc91cxx_softc *sc, struct mbuf *m0) 781 { 782 bus_space_tag_t bst = sc->sc_bst; 783 bus_space_handle_t bsh = sc->sc_bsh; 784 struct mbuf *m; 785 int len, leftover; 786 uint16_t dbuf; 787 uint8_t *p; 788 #ifdef DIAGNOSTIC 789 uint8_t *lim; 790 #endif 791 792 /* Start out with no leftover data */ 793 leftover = 0; 794 dbuf = 0; 795 796 /* Process the chain of mbufs */ 797 for (m = m0; m != NULL; m = m->m_next) { 798 /* Process all of the data in a single mbuf. */ 799 p = mtod(m, uint8_t *); 800 len = m->m_len; 801 #ifdef DIAGNOSTIC 802 lim = p + len; 803 #endif 804 805 while (len > 0) { 806 if (leftover) { 807 /* 808 * Data left over (from mbuf or realignment). 809 * Buffer the next byte, and write it and 810 * the leftover data out. 811 */ 812 dbuf |= *p++ << 8; 813 len--; 814 bus_space_write_2(bst, bsh, DATA_REG_W, dbuf); 815 leftover = 0; 816 } else if ((long) p & 1) { 817 /* Misaligned data. Buffer the next byte. */ 818 dbuf = *p++; 819 len--; 820 leftover = 1; 821 } else { 822 /* 823 * Aligned data. This is the case we like. 824 * 825 * Write-region out as much as we can, then 826 * buffer the remaining byte (if any). 827 */ 828 leftover = len & 1; 829 len &= ~1; 830 bus_space_write_multi_stream_2(bst, bsh, 831 DATA_REG_W, (uint16_t *)p, len >> 1); 832 p += len; 833 834 if (leftover) 835 dbuf = *p++; 836 len = 0; 837 } 838 } 839 if (len < 0) 840 panic("smc91cxx_copy_tx_frame: negative len"); 841 #ifdef DIAGNOSTIC 842 if (p != lim) 843 panic("smc91cxx_copy_tx_frame: p != lim"); 844 #endif 845 } 846 847 return dbuf; 848 } 849 850 /* 851 * Interrupt service routine. 852 */ 853 int 854 smc91cxx_intr(void *arg) 855 { 856 struct smc91cxx_softc *sc = arg; 857 struct ifnet *ifp = &sc->sc_ec.ec_if; 858 bus_space_tag_t bst = sc->sc_bst; 859 bus_space_handle_t bsh = sc->sc_bsh; 860 uint8_t mask, interrupts, status; 861 uint16_t packetno, tx_status, card_stats; 862 uint16_t v; 863 864 if ((sc->sc_flags & SMC_FLAGS_ENABLED) == 0 || 865 !device_is_active(sc->sc_dev)) 866 return 0; 867 868 SMC_SELECT_BANK(sc, 2); 869 870 /* Obtain the current interrupt status and mask. */ 871 v = bus_space_read_2(bst, bsh, INTR_STAT_REG_B); 872 873 /* 874 * Get the set of interrupt which occurred and eliminate any 875 * which are not enabled. 876 */ 877 mask = v >> 8; 878 interrupts = v & 0xff; 879 KDASSERT(mask == sc->sc_intmask); 880 status = interrupts & mask; 881 882 /* Ours? */ 883 if (status == 0) 884 return 0; 885 886 /* It's ours; disable all interrupts while we process them. */ 887 smc91cxx_intr_mask_write(bst, bsh, 0); 888 889 /* Receive overrun interrupts. */ 890 if (status & IM_RX_OVRN_INT) { 891 smc91cxx_intr_ack_write(bst, bsh, IM_RX_OVRN_INT, 0); 892 ifp->if_ierrors++; 893 } 894 895 /* Receive interrupts. */ 896 if (status & IM_RCV_INT) { 897 smc91cxx_read(sc); 898 } 899 900 /* Memory allocation interrupts. */ 901 if (status & IM_ALLOC_INT) { 902 /* Disable this interrupt. */ 903 mask &= ~IM_ALLOC_INT; 904 sc->sc_intmask &= ~IM_ALLOC_INT; 905 906 /* Save allocated packet number for use in start */ 907 packetno = bus_space_read_1(bst, bsh, ALLOC_RESULT_REG_B); 908 KASSERT(sc->sc_txpacketno & ARR_FAILED); 909 sc->sc_txpacketno = packetno; 910 911 /* We can transmit again! */ 912 ifp->if_flags &= ~IFF_OACTIVE; 913 ifp->if_timer = 0; 914 } 915 916 /* 917 * Transmit complete interrupt. Handle transmission error messages. 918 * This will only be called on error condition because of AUTO RELEASE 919 * mode. 920 */ 921 if (status & IM_TX_INT) { 922 smc91cxx_intr_ack_write(bst, bsh, IM_TX_INT, 0); 923 924 packetno = bus_space_read_2(bst, bsh, FIFO_PORTS_REG_W) & 925 FIFO_TX_MASK; 926 927 /* Select this as the packet to read from. */ 928 bus_space_write_2(bst, bsh, PACKET_NUM_REG_B, packetno); 929 930 /* 931 * Position the pointer to the beginning of the packet, wait 932 * for preload. 933 */ 934 bus_space_write_2(bst, bsh, POINTER_REG_W, 935 PTR_AUTOINC | PTR_READ /* | 0x0000 */); 936 delay(1); 937 938 /* 939 * Fetch the TX status word. This will be a copy of 940 * the EPH_STATUS_REG_W at the time of the transmission 941 * failure. 942 */ 943 tx_status = bus_space_read_2(bst, bsh, DATA_REG_W); 944 945 if (tx_status & EPHSR_TX_SUC) { 946 static struct timeval txsuc_last; 947 static int txsuc_count; 948 if (ppsratecheck(&txsuc_last, &txsuc_count, 1)) 949 printf("%s: successful packet caused TX" 950 " interrupt?!\n", device_xname(sc->sc_dev)); 951 } else 952 ifp->if_oerrors++; 953 954 if (tx_status & EPHSR_LATCOL) 955 ifp->if_collisions++; 956 957 /* Disable this interrupt (start will reenable if needed). */ 958 mask &= ~IM_TX_INT; 959 sc->sc_intmask &= ~IM_TX_INT; 960 961 /* 962 * Some of these errors disable the transmitter; reenable it. 963 */ 964 SMC_SELECT_BANK(sc, 0); 965 #ifdef SMC91CXX_SW_PAD 966 bus_space_write_2(bst, bsh, TXMIT_CONTROL_REG_W, TCR_ENABLE); 967 #else 968 bus_space_write_2(bst, bsh, TXMIT_CONTROL_REG_W, 969 TCR_ENABLE | TCR_PAD_ENABLE); 970 #endif 971 972 /* Kill the failed packet and wait for the MMU to unbusy. */ 973 SMC_SELECT_BANK(sc, 2); 974 while (bus_space_read_2(bst, bsh, MMU_CMD_REG_W) & MMUCR_BUSY) 975 /* XXX bound this loop! */ ; 976 bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_FREEPKT); 977 978 ifp->if_timer = 0; 979 } 980 981 /* 982 * Transmit underrun interrupts. We use this opportunity to 983 * update transmit statistics from the card. 984 */ 985 if (status & IM_TX_EMPTY_INT) { 986 smc91cxx_intr_ack_write(bst, bsh, IM_TX_EMPTY_INT, 0); 987 988 /* Disable this interrupt. */ 989 mask &= ~IM_TX_EMPTY_INT; 990 sc->sc_intmask &= ~IM_TX_EMPTY_INT; 991 992 SMC_SELECT_BANK(sc, 0); 993 card_stats = bus_space_read_2(bst, bsh, COUNTER_REG_W); 994 995 /* Single collisions. */ 996 ifp->if_collisions += card_stats & ECR_COLN_MASK; 997 998 /* Multiple collisions. */ 999 ifp->if_collisions += (card_stats & ECR_MCOLN_MASK) >> 4; 1000 1001 SMC_SELECT_BANK(sc, 2); 1002 1003 ifp->if_timer = 0; 1004 } 1005 1006 /* Internal PHY status change */ 1007 if (sc->sc_chipid == CHIP_91C111 && sc->sc_internal_phy && 1008 (status & IM_MD_INT)) { 1009 1010 /* Internal PHY status change */ 1011 smc91cxx_intr_ack_write(bst, bsh, IM_MD_INT, 0); 1012 mii_pollstat(&sc->sc_mii); 1013 } 1014 1015 /* Other errors. Reset the interface. */ 1016 if (status & IM_EPH_INT) { 1017 smc91cxx_stop(sc); 1018 smc91cxx_init(sc); 1019 } 1020 1021 /* Attempt to queue more packets for transmission. */ 1022 if_schedule_deferred_start(ifp); 1023 1024 /* 1025 * Reenable the interrupts we wish to receive now that processing 1026 * is complete. 1027 */ 1028 mask |= sc->sc_intmask; 1029 smc91cxx_intr_mask_write(bst, bsh, mask); 1030 1031 if (status) 1032 rnd_add_uint32(&sc->rnd_source, status); 1033 1034 return 1; 1035 } 1036 1037 /* 1038 * Read a packet from the card and pass it up to the kernel. 1039 * NOTE! WE EXPECT TO BE IN REGISTER WINDOW 2! 1040 */ 1041 void 1042 smc91cxx_read(struct smc91cxx_softc *sc) 1043 { 1044 struct ifnet *ifp = &sc->sc_ec.ec_if; 1045 bus_space_tag_t bst = sc->sc_bst; 1046 bus_space_handle_t bsh = sc->sc_bsh; 1047 struct ether_header *eh; 1048 struct mbuf *m; 1049 uint16_t status, packetno, packetlen; 1050 uint8_t *data; 1051 uint32_t dr; 1052 bool first = true; 1053 1054 again: 1055 /* 1056 * Set data pointer to the beginning of the packet. Since 1057 * PTR_RCV is set, the packet number will be found automatically 1058 * in FIFO_PORTS_REG_W, FIFO_RX_MASK. 1059 */ 1060 packetno = bus_space_read_2(bst, bsh, FIFO_PORTS_REG_W); 1061 if (packetno & FIFO_REMPTY) { 1062 if (first) { 1063 aprint_error_dev(sc->sc_dev, 1064 "receive interrupt on empty fifo\n"); 1065 } 1066 return; 1067 } 1068 first = false; 1069 1070 bus_space_write_2(bst, bsh, POINTER_REG_W, 1071 PTR_READ | PTR_RCV | PTR_AUTOINC /* | 0x0000 */); 1072 delay(1); 1073 1074 /* First two words are status and packet length. */ 1075 dr = bus_space_read_4(bst, bsh, DATA_REG_W); 1076 status = (uint16_t)dr; 1077 packetlen = (uint16_t)(dr >> 16); 1078 1079 packetlen &= RLEN_MASK; 1080 if (packetlen < ETHER_MIN_LEN - ETHER_CRC_LEN + 6 || packetlen > 1534) { 1081 ifp->if_ierrors++; 1082 goto out; 1083 } 1084 1085 /* 1086 * The packet length includes 3 extra words: status, length, 1087 * and an extra word that includes the control byte. 1088 */ 1089 packetlen -= 6; 1090 1091 /* Account for receive errors and discard. */ 1092 if (status & RS_ERRORS) { 1093 ifp->if_ierrors++; 1094 goto out; 1095 } 1096 1097 /* Adjust for odd-length packet. */ 1098 if (status & RS_ODDFRAME) 1099 packetlen++; 1100 1101 /* Allocate a header mbuf. */ 1102 MGETHDR(m, M_DONTWAIT, MT_DATA); 1103 if (m == NULL) 1104 goto out; 1105 m_set_rcvif(m, ifp); 1106 m->m_pkthdr.len = packetlen; 1107 1108 /* 1109 * Always put the packet in a cluster. 1110 * XXX should chain small mbufs if less than threshold. 1111 */ 1112 MCLGET(m, M_DONTWAIT); 1113 if ((m->m_flags & M_EXT) == 0) { 1114 m_freem(m); 1115 ifp->if_ierrors++; 1116 aprint_error_dev(sc->sc_dev, 1117 "can't allocate cluster for incoming packet\n"); 1118 goto out; 1119 } 1120 1121 /* 1122 * Pull the packet off the interface. Make sure the payload 1123 * is aligned. 1124 */ 1125 if ((sc->sc_flags & SMC_FLAGS_32BIT_READ) == 0) { 1126 m->m_data = (char *)ALIGN(mtod(m, char *) + 1127 sizeof(struct ether_header)) - sizeof(struct ether_header); 1128 1129 eh = mtod(m, struct ether_header *); 1130 data = mtod(m, uint8_t *); 1131 KASSERT(trunc_page((uintptr_t)data) == 1132 trunc_page((uintptr_t)data + packetlen - 1)); 1133 if (packetlen > 1) 1134 bus_space_read_multi_stream_2(bst, bsh, DATA_REG_W, 1135 (uint16_t *)data, packetlen >> 1); 1136 if (packetlen & 1) { 1137 data += packetlen & ~1; 1138 *data = bus_space_read_1(bst, bsh, DATA_REG_B); 1139 } 1140 } else { 1141 m->m_data = (void *)ALIGN(mtod(m, void *)); 1142 eh = mtod(m, struct ether_header *); 1143 data = mtod(m, uint8_t *); 1144 KASSERT(trunc_page((uintptr_t)data) == 1145 trunc_page((uintptr_t)data + packetlen - 1)); 1146 if (packetlen > 3) 1147 bus_space_read_multi_stream_4(bst, bsh, DATA_REG_W, 1148 (uint32_t *)data, packetlen >> 2); 1149 if (packetlen & 3) { 1150 data += packetlen & ~3; 1151 *((uint32_t *)data) = 1152 bus_space_read_stream_4(bst, bsh, DATA_REG_W); 1153 } 1154 } 1155 1156 /* 1157 * Make sure to behave as IFF_SIMPLEX in all cases. 1158 * This is to cope with SMC91C92 (Megahertz XJ10BT), which 1159 * loops back packets to itself on promiscuous mode. 1160 * (should be ensured by chipset configuration) 1161 */ 1162 if ((ifp->if_flags & IFF_PROMISC) != 0) { 1163 /* Drop packet looped back from myself. */ 1164 if (ether_cmp(eh->ether_shost, CLLADDR(ifp->if_sadl)) == 0) { 1165 m_freem(m); 1166 goto out; 1167 } 1168 } 1169 1170 m->m_pkthdr.len = m->m_len = packetlen; 1171 1172 if_percpuq_enqueue(ifp->if_percpuq, m); 1173 1174 out: 1175 /* Tell the card to free the memory occupied by this packet. */ 1176 while (bus_space_read_2(bst, bsh, MMU_CMD_REG_W) & MMUCR_BUSY) 1177 /* XXX bound this loop! */ ; 1178 bus_space_write_2(bst, bsh, MMU_CMD_REG_W, MMUCR_RELEASE); 1179 1180 /* Check for another packet. */ 1181 goto again; 1182 } 1183 1184 /* 1185 * Process an ioctl request. 1186 */ 1187 int 1188 smc91cxx_ioctl(struct ifnet *ifp, u_long cmd, void *data) 1189 { 1190 struct smc91cxx_softc *sc = ifp->if_softc; 1191 struct ifaddr *ifa = (struct ifaddr *)data; 1192 int s, error = 0; 1193 1194 s = splnet(); 1195 1196 switch (cmd) { 1197 case SIOCINITIFADDR: 1198 if ((error = smc91cxx_enable(sc)) != 0) 1199 break; 1200 ifp->if_flags |= IFF_UP; 1201 smc91cxx_init(sc); 1202 switch (ifa->ifa_addr->sa_family) { 1203 #ifdef INET 1204 case AF_INET: 1205 arp_ifinit(ifp, ifa); 1206 break; 1207 #endif 1208 default: 1209 break; 1210 } 1211 break; 1212 1213 1214 case SIOCSIFFLAGS: 1215 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 1216 break; 1217 /* XXX re-use ether_ioctl() */ 1218 switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) { 1219 case IFF_RUNNING: 1220 /* 1221 * If interface is marked down and it is running, 1222 * stop it. 1223 */ 1224 smc91cxx_stop(sc); 1225 ifp->if_flags &= ~IFF_RUNNING; 1226 smc91cxx_disable(sc); 1227 break; 1228 case IFF_UP: 1229 /* 1230 * If interface is marked up and it is stopped, 1231 * start it. 1232 */ 1233 if ((error = smc91cxx_enable(sc)) != 0) 1234 break; 1235 smc91cxx_init(sc); 1236 break; 1237 case IFF_UP|IFF_RUNNING: 1238 /* 1239 * Reset the interface to pick up changes in any 1240 * other flags that affect hardware registers. 1241 */ 1242 smc91cxx_reset(sc); 1243 break; 1244 case 0: 1245 break; 1246 } 1247 break; 1248 1249 case SIOCADDMULTI: 1250 case SIOCDELMULTI: 1251 if ((sc->sc_flags & SMC_FLAGS_ENABLED) == 0) { 1252 error = EIO; 1253 break; 1254 } 1255 1256 /* FALLTHROUGH */ 1257 default: 1258 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 1259 /* 1260 * Multicast list has changed; set the hardware 1261 * filter accordingly. 1262 */ 1263 if (ifp->if_flags & IFF_RUNNING) 1264 smc91cxx_reset(sc); 1265 error = 0; 1266 } 1267 break; 1268 } 1269 1270 splx(s); 1271 return error; 1272 } 1273 1274 /* 1275 * Reset the interface. 1276 */ 1277 void 1278 smc91cxx_reset(struct smc91cxx_softc *sc) 1279 { 1280 int s; 1281 1282 s = splnet(); 1283 smc91cxx_stop(sc); 1284 smc91cxx_init(sc); 1285 splx(s); 1286 } 1287 1288 /* 1289 * Watchdog timer. 1290 */ 1291 void 1292 smc91cxx_watchdog(struct ifnet *ifp) 1293 { 1294 struct smc91cxx_softc *sc = ifp->if_softc; 1295 1296 log(LOG_ERR, "%s: device timeout\n", device_xname(sc->sc_dev)); 1297 ifp->if_oerrors++; 1298 smc91cxx_reset(sc); 1299 } 1300 1301 /* 1302 * Stop output on the interface. 1303 */ 1304 void 1305 smc91cxx_stop(struct smc91cxx_softc *sc) 1306 { 1307 bus_space_tag_t bst = sc->sc_bst; 1308 bus_space_handle_t bsh = sc->sc_bsh; 1309 1310 /* Clear interrupt mask; disable all interrupts. */ 1311 SMC_SELECT_BANK(sc, 2); 1312 smc91cxx_intr_mask_write(bst, bsh, 0); 1313 1314 /* Disable transmitter and receiver. */ 1315 SMC_SELECT_BANK(sc, 0); 1316 bus_space_write_2(bst, bsh, RECV_CONTROL_REG_W, 0); 1317 bus_space_write_2(bst, bsh, TXMIT_CONTROL_REG_W, 0); 1318 1319 /* Cancel watchdog timer. */ 1320 sc->sc_ec.ec_if.if_timer = 0; 1321 } 1322 1323 /* 1324 * Enable power on the interface. 1325 */ 1326 int 1327 smc91cxx_enable(struct smc91cxx_softc *sc) 1328 { 1329 1330 if ((sc->sc_flags & SMC_FLAGS_ENABLED) == 0 && sc->sc_enable != NULL) { 1331 if ((*sc->sc_enable)(sc) != 0) { 1332 aprint_error_dev(sc->sc_dev, "device enable failed\n"); 1333 return EIO; 1334 } 1335 } 1336 1337 sc->sc_flags |= SMC_FLAGS_ENABLED; 1338 return 0; 1339 } 1340 1341 /* 1342 * Disable power on the interface. 1343 */ 1344 void 1345 smc91cxx_disable(struct smc91cxx_softc *sc) 1346 { 1347 1348 if ((sc->sc_flags & SMC_FLAGS_ENABLED) != 0 && sc->sc_disable != NULL) { 1349 (*sc->sc_disable)(sc); 1350 sc->sc_flags &= ~SMC_FLAGS_ENABLED; 1351 } 1352 } 1353 1354 int 1355 smc91cxx_activate(device_t self, enum devact act) 1356 { 1357 struct smc91cxx_softc *sc = device_private(self); 1358 1359 switch (act) { 1360 case DVACT_DEACTIVATE: 1361 if_deactivate(&sc->sc_ec.ec_if); 1362 return 0; 1363 default: 1364 return EOPNOTSUPP; 1365 } 1366 } 1367 1368 int 1369 smc91cxx_detach(device_t self, int flags) 1370 { 1371 struct smc91cxx_softc *sc = device_private(self); 1372 struct ifnet *ifp = &sc->sc_ec.ec_if; 1373 1374 /* Succeed now if there's no work to do. */ 1375 if ((sc->sc_flags & SMC_FLAGS_ATTACHED) == 0) 1376 return 0; 1377 1378 /* smc91cxx_disable() checks SMC_FLAGS_ENABLED */ 1379 smc91cxx_disable(sc); 1380 1381 /* smc91cxx_attach() never fails */ 1382 1383 /* Delete all media. */ 1384 ifmedia_delete_instance(&sc->sc_mii.mii_media, IFM_INST_ANY); 1385 1386 rnd_detach_source(&sc->rnd_source); 1387 1388 ether_ifdetach(ifp); 1389 if_detach(ifp); 1390 1391 return 0; 1392 } 1393 1394 uint32_t 1395 smc91cxx_mii_bitbang_read(device_t self) 1396 { 1397 struct smc91cxx_softc *sc = device_private(self); 1398 1399 /* We're already in bank 3. */ 1400 return bus_space_read_2(sc->sc_bst, sc->sc_bsh, MGMT_REG_W); 1401 } 1402 1403 void 1404 smc91cxx_mii_bitbang_write(device_t self, uint32_t val) 1405 { 1406 struct smc91cxx_softc *sc = device_private(self); 1407 1408 /* We're already in bank 3. */ 1409 bus_space_write_2(sc->sc_bst, sc->sc_bsh, MGMT_REG_W, val); 1410 } 1411 1412 int 1413 smc91cxx_mii_readreg(device_t self, int phy, int reg, uint16_t *val) 1414 { 1415 struct smc91cxx_softc *sc = device_private(self); 1416 int rv; 1417 1418 SMC_SELECT_BANK(sc, 3); 1419 1420 rv = mii_bitbang_readreg(self, &smc91cxx_mii_bitbang_ops, phy, reg, 1421 val); 1422 1423 SMC_SELECT_BANK(sc, 2); 1424 1425 return rv; 1426 } 1427 1428 int 1429 smc91cxx_mii_writereg(device_t self, int phy, int reg, uint16_t val) 1430 { 1431 struct smc91cxx_softc *sc = device_private(self); 1432 int rv; 1433 1434 SMC_SELECT_BANK(sc, 3); 1435 1436 rv = mii_bitbang_writereg(self, &smc91cxx_mii_bitbang_ops, phy, reg, 1437 val); 1438 1439 SMC_SELECT_BANK(sc, 2); 1440 1441 return rv; 1442 } 1443 1444 void 1445 smc91cxx_statchg(struct ifnet *ifp) 1446 { 1447 struct smc91cxx_softc *sc = ifp->if_softc; 1448 bus_space_tag_t bst = sc->sc_bst; 1449 bus_space_handle_t bsh = sc->sc_bsh; 1450 int mctl; 1451 1452 SMC_SELECT_BANK(sc, 0); 1453 mctl = bus_space_read_2(bst, bsh, TXMIT_CONTROL_REG_W); 1454 if (sc->sc_mii.mii_media_active & IFM_FDX) 1455 mctl |= TCR_SWFDUP; 1456 else 1457 mctl &= ~TCR_SWFDUP; 1458 bus_space_write_2(bst, bsh, TXMIT_CONTROL_REG_W, mctl); 1459 SMC_SELECT_BANK(sc, 2); /* Back to operating window */ 1460 } 1461 1462 /* 1463 * One second timer, used to tick the MII. 1464 */ 1465 void 1466 smc91cxx_tick(void *arg) 1467 { 1468 struct smc91cxx_softc *sc = arg; 1469 int s; 1470 1471 #ifdef DIAGNOSTIC 1472 if ((sc->sc_flags & SMC_FLAGS_HAS_MII) == 0) 1473 panic("smc91cxx_tick"); 1474 #endif 1475 1476 if (!device_is_active(sc->sc_dev)) 1477 return; 1478 1479 s = splnet(); 1480 mii_tick(&sc->sc_mii); 1481 splx(s); 1482 1483 callout_reset(&sc->sc_mii_callout, hz, smc91cxx_tick, sc); 1484 } 1485