xref: /netbsd-src/sys/dev/ic/siisatavar.h (revision 500db002748d9818288e46e10f026a2b09548086)
1 /* $NetBSD: siisatavar.h,v 1.2 2008/09/14 21:53:49 jakllsch Exp $ */
2 /* Id: siisatavar.h,v 1.15 2008/05/22 13:48:54 jakllsch Exp  */
3 
4 /* from ahcisatavar.h */
5 
6 /*
7  * Copyright (c) 2006 Manuel Bouyer.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *	This product includes software developed by Manuel Bouyer.
20  * 4. The name of the author may not be used to endorse or promote products
21  *    derived from this software without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
24  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
25  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
26  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
27  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
28  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
29  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
30  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
31  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
32  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33  *
34  */
35 
36 /*-
37  * Copyright (c) 2007, 2008 Jonathan A. Kollasch.
38  * All rights reserved.
39  *
40  * Redistribution and use in source and binary forms, with or without
41  * modification, are permitted provided that the following conditions
42  * are met:
43  * 1. Redistributions of source code must retain the above copyright
44  *    notice, this list of conditions and the following disclaimer.
45  * 2. Redistributions in binary form must reproduce the above copyright
46  *    notice, this list of conditions and the following disclaimer in the
47  *    documentation and/or other materials provided with the distribution.
48  *
49  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
50  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
51  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
52  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
53  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
54  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
55  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
56  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
57  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
58  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
59  *
60  */
61 
62 #ifndef _IC_SIISATAVAR_H_
63 #define _IC_SIISATAVAR_H_
64 
65 #include <dev/ic/siisatareg.h>
66 #include <dev/ata/atavar.h>
67 
68 #define DEBUG_INTR   0x01
69 #define DEBUG_XFERS  0x02
70 #define DEBUG_FUNCS  0x08
71 #define DEBUG_PROBE  0x10
72 #define DEBUG_DETACH 0x20
73 #define DEBUG_DEBUG 0x80000000
74 #ifdef SIISATA_DEBUG
75 extern int siisata_debug_mask;
76 #define SIISATA_DEBUG_PRINT(args, level) \
77 	if (siisata_debug_mask & (level)) \
78 		printf args
79 #else
80 #define SIISATA_DEBUG_PRINT(args, level)
81 #endif
82 
83 struct siisata_softc {
84 	struct atac_softc sc_atac;
85 	bus_space_tag_t sc_grt;
86 	bus_space_handle_t sc_grh;
87 	bus_space_tag_t sc_prt;
88 	bus_space_handle_t sc_prh;
89 	bus_dma_tag_t sc_dmat;
90 
91 	struct ata_channel *sc_chanarray[SIISATA_MAX_PORTS];
92 	struct siisata_channel {
93 		struct ata_channel ata_channel;
94 		bus_space_handle_t sch_scontrol;
95 		bus_space_handle_t sch_sstatus;
96 		bus_space_handle_t sch_serror;
97 
98 		/* command activation PRBs */
99 		bus_dmamap_t sch_prbd;
100 		struct siisata_prb *sch_prb[SIISATA_MAX_SLOTS];
101 		bus_addr_t sch_bus_prb[SIISATA_MAX_SLOTS];
102 
103 		bus_dmamap_t sch_datad[SIISATA_MAX_SLOTS];
104 
105 		uint32_t sch_active_slots;
106 	} sc_channels[SIISATA_MAX_PORTS];
107 
108 	int sc_have_dma64;	/* 64-bit DMA available */
109 	int sc_chip;		/* chip number */
110 };
111 
112 #define SIISATANAME(sc) (device_xname((sc)->sc_atac.atac_dev))
113 
114 #define GRREAD(sc, reg) bus_space_read_4((sc)->sc_grt, (sc)->sc_grh, (reg))
115 #define GRWRITE(sc, reg, val) bus_space_write_4((sc)->sc_grt, (sc)->sc_grh, (reg), (val))
116 #define PRREAD(sc, reg) bus_space_read_4((sc)->sc_prt, (sc)->sc_prh, (reg))
117 #define PRWRITE(sc, reg, val) bus_space_write_4((sc)->sc_prt, (sc)->sc_prh, (reg), (val))
118 
119 #define SIISATA_PRB_SYNC(sc, schp, slot, op) bus_dmamap_sync((sc)->sc_dmat, \
120     (schp)->sch_prbd, slot * SIISATA_CMD_SIZE, SIISATA_CMD_SIZE, (op))
121 
122 #define SIISATA_NON_NCQ_SLOT 27
123 
124 void siisata_attach(struct siisata_softc *);
125 int siisata_intr(void *);
126 
127 void siisata_resume(struct siisata_softc *);
128 
129 #endif  /* !_IC_SIISATAVAR_H_ */
130