1 /* $NetBSD: siisata.c,v 1.12 2010/07/26 15:41:33 jakllsch Exp $ */ 2 3 /* from ahcisata_core.c */ 4 5 /* 6 * Copyright (c) 2006 Manuel Bouyer. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 22 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 26 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 */ 29 30 /* from atapi_wdc.c */ 31 32 /* 33 * Copyright (c) 1998, 2001 Manuel Bouyer. 34 * 35 * Redistribution and use in source and binary forms, with or without 36 * modification, are permitted provided that the following conditions 37 * are met: 38 * 1. Redistributions of source code must retain the above copyright 39 * notice, this list of conditions and the following disclaimer. 40 * 2. Redistributions in binary form must reproduce the above copyright 41 * notice, this list of conditions and the following disclaimer in the 42 * documentation and/or other materials provided with the distribution. 43 * 44 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 45 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 46 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 47 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 48 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 49 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 50 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 51 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 52 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 53 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 54 */ 55 56 /* 57 * Copyright (c) 2007, 2008, 2009, 2010 Jonathan A. Kollasch. 58 * All rights reserved. 59 * 60 * Redistribution and use in source and binary forms, with or without 61 * modification, are permitted provided that the following conditions 62 * are met: 63 * 1. Redistributions of source code must retain the above copyright 64 * notice, this list of conditions and the following disclaimer. 65 * 2. Redistributions in binary form must reproduce the above copyright 66 * notice, this list of conditions and the following disclaimer in the 67 * documentation and/or other materials provided with the distribution. 68 * 69 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 70 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 71 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 72 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 73 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 74 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 75 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 76 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 77 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 78 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 79 */ 80 81 #include <sys/cdefs.h> 82 __KERNEL_RCSID(0, "$NetBSD: siisata.c,v 1.12 2010/07/26 15:41:33 jakllsch Exp $"); 83 84 #include <sys/types.h> 85 #include <sys/malloc.h> 86 #include <sys/param.h> 87 #include <sys/kernel.h> 88 #include <sys/systm.h> 89 #include <sys/syslog.h> 90 #include <sys/disklabel.h> 91 #include <sys/buf.h> 92 93 #include <uvm/uvm_extern.h> 94 95 #include <dev/ata/atareg.h> 96 #include <dev/ata/satavar.h> 97 #include <dev/ata/satareg.h> 98 #include <dev/ata/satafisvar.h> 99 #include <dev/ata/satafisreg.h> 100 #include <dev/ic/siisatavar.h> 101 #include <dev/ic/siisatareg.h> 102 103 #include <dev/scsipi/scsi_all.h> /* for SCSI status */ 104 105 #include "atapibus.h" 106 107 #ifdef SIISATA_DEBUG 108 int siisata_debug_mask = 0; 109 #endif 110 111 #define ATA_DELAY 10000 /* 10s for a drive I/O */ 112 113 static void siisata_attach_port(struct siisata_softc *, int); 114 static void siisata_intr_port(struct siisata_channel *); 115 116 void siisata_probe_drive(struct ata_channel *); 117 void siisata_setup_channel(struct ata_channel *); 118 119 int siisata_ata_bio(struct ata_drive_datas *, struct ata_bio *); 120 void siisata_reset_drive(struct ata_drive_datas *, int); 121 void siisata_reset_channel(struct ata_channel *, int); 122 int siisata_ata_addref(struct ata_drive_datas *); 123 void siisata_ata_delref(struct ata_drive_datas *); 124 void siisata_killpending(struct ata_drive_datas *); 125 126 void siisata_cmd_start(struct ata_channel *, struct ata_xfer *); 127 int siisata_cmd_complete(struct ata_channel *, struct ata_xfer *, int); 128 void siisata_cmd_done(struct ata_channel *, struct ata_xfer *, int); 129 void siisata_cmd_kill_xfer(struct ata_channel *, struct ata_xfer *, int); 130 131 void siisata_bio_start(struct ata_channel *, struct ata_xfer *); 132 int siisata_bio_complete(struct ata_channel *, struct ata_xfer *, int); 133 void siisata_bio_kill_xfer(struct ata_channel *, struct ata_xfer *, int); 134 int siisata_exec_command(struct ata_drive_datas *, struct ata_command *); 135 136 void siisata_timeout(void *); 137 138 static void siisata_reinit_port(struct ata_channel *); 139 static void siisata_device_reset(struct ata_channel *); 140 static void siisata_activate_prb(struct siisata_channel *, int); 141 static void siisata_deactivate_prb(struct siisata_channel *, int); 142 static int siisata_dma_setup(struct ata_channel *chp, int slot, 143 void *data, size_t, int); 144 145 #if NATAPIBUS > 0 146 void siisata_atapibus_attach(struct atabus_softc *); 147 void siisata_atapi_probe_device(struct atapibus_softc *, int); 148 void siisata_atapi_minphys(struct buf *); 149 void siisata_atapi_start(struct ata_channel *,struct ata_xfer *); 150 int siisata_atapi_complete(struct ata_channel *, struct ata_xfer *, int); 151 void siisata_atapi_kill_xfer(struct ata_channel *, struct ata_xfer *, int); 152 void siisata_atapi_done(struct ata_channel *, struct ata_xfer *, int); 153 void siisata_atapi_scsipi_request(struct scsipi_channel *, 154 scsipi_adapter_req_t, void *); 155 void siisata_atapi_kill_pending(struct scsipi_periph *); 156 #endif /* NATAPIBUS */ 157 158 const struct ata_bustype siisata_ata_bustype = { 159 SCSIPI_BUSTYPE_ATA, 160 siisata_ata_bio, 161 siisata_reset_drive, 162 siisata_reset_channel, 163 siisata_exec_command, 164 ata_get_params, 165 siisata_ata_addref, 166 siisata_ata_delref, 167 siisata_killpending 168 }; 169 170 #if NATAPIBUS > 0 171 static const struct scsipi_bustype siisata_atapi_bustype = { 172 SCSIPI_BUSTYPE_ATAPI, 173 atapi_scsipi_cmd, 174 atapi_interpret_sense, 175 atapi_print_addr, 176 siisata_atapi_kill_pending 177 }; 178 #endif /* NATAPIBUS */ 179 180 181 void 182 siisata_attach(struct siisata_softc *sc) 183 { 184 int i; 185 186 SIISATA_DEBUG_PRINT(("%s: %s: GR_GC: 0x%08x\n", 187 SIISATANAME(sc), __func__, GRREAD(sc, GR_GC)), DEBUG_FUNCS); 188 189 sc->sc_atac.atac_cap = ATAC_CAP_DMA | ATAC_CAP_UDMA; 190 sc->sc_atac.atac_pio_cap = 4; 191 sc->sc_atac.atac_dma_cap = 2; 192 sc->sc_atac.atac_udma_cap = 6; 193 sc->sc_atac.atac_channels = sc->sc_chanarray; 194 sc->sc_atac.atac_probe = siisata_probe_drive; 195 sc->sc_atac.atac_bustype_ata = &siisata_ata_bustype; 196 sc->sc_atac.atac_set_modes = siisata_setup_channel; 197 #if NATAPIBUS > 0 198 sc->sc_atac.atac_atapibus_attach = siisata_atapibus_attach; 199 #endif 200 201 /* come out of reset state */ 202 GRWRITE(sc, GR_GC, 0); 203 204 for (i = 0; i < sc->sc_atac.atac_nchannels; i++) { 205 siisata_attach_port(sc, i); 206 } 207 208 SIISATA_DEBUG_PRINT(("%s: %s: GR_GC: 0x%08x\n", 209 SIISATANAME(sc), __func__, GRREAD(sc, GR_GC)), 210 DEBUG_FUNCS); 211 return; 212 } 213 214 static void 215 siisata_init_port(struct siisata_softc *sc, int port) 216 { 217 struct siisata_channel *schp; 218 struct ata_channel *chp; 219 220 schp = &sc->sc_channels[port]; 221 chp = (struct ata_channel *)schp; 222 223 /* come out of reset, 64-bit activation */ 224 PRWRITE(sc, PRX(chp->ch_channel, PRO_PCC), 225 PR_PC_32BA | PR_PC_PORT_RESET); 226 /* initialize port */ 227 siisata_reinit_port(chp); 228 /* clear any interrupts */ 229 PRWRITE(sc, PRX(chp->ch_channel, PRO_PIS), 0xffffffff); 230 /* enable CmdErrr+CmdCmpl interrupting */ 231 PRWRITE(sc, PRX(chp->ch_channel, PRO_PIES), 232 PR_PIS_CMDERRR | PR_PIS_CMDCMPL); 233 /* enable port interrupt */ 234 GRWRITE(sc, GR_GC, GRREAD(sc, GR_GC) | GR_GC_PXIE(chp->ch_channel)); 235 } 236 237 static void 238 siisata_attach_port(struct siisata_softc *sc, int port) 239 { 240 int j; 241 int dmasize; 242 int error; 243 void *prbp; 244 struct siisata_channel *schp; 245 struct ata_channel *chp; 246 247 schp = &sc->sc_channels[port]; 248 chp = (struct ata_channel *)schp; 249 sc->sc_chanarray[port] = chp; 250 chp->ch_channel = port; 251 chp->ch_atac = &sc->sc_atac; 252 chp->ch_queue = malloc(sizeof(struct ata_queue), 253 M_DEVBUF, M_NOWAIT); 254 if (chp->ch_queue == NULL) { 255 aprint_error_dev(sc->sc_atac.atac_dev, 256 "port %d: can't allocate memory " 257 "for command queue\n", chp->ch_channel); 258 return; 259 } 260 261 dmasize = SIISATA_CMD_SIZE * SIISATA_MAX_SLOTS; 262 263 SIISATA_DEBUG_PRINT(("%s: %s: dmasize: %d\n", SIISATANAME(sc), 264 __func__, dmasize), DEBUG_FUNCS); 265 266 error = bus_dmamem_alloc(sc->sc_dmat, dmasize, PAGE_SIZE, 0, 267 &schp->sch_prb_seg, 1, &schp->sch_prb_nseg, BUS_DMA_NOWAIT); 268 if (error) { 269 aprint_error_dev(sc->sc_atac.atac_dev, 270 "unable to allocate PRB table memory, " 271 "error=%d\n", error); 272 return; 273 } 274 275 error = bus_dmamem_map(sc->sc_dmat, 276 &schp->sch_prb_seg, schp->sch_prb_nseg, 277 dmasize, &prbp, BUS_DMA_NOWAIT | BUS_DMA_COHERENT); 278 if (error) { 279 aprint_error_dev(sc->sc_atac.atac_dev, 280 "unable to map PRB table memory, " 281 "error=%d\n", error); 282 bus_dmamem_free(sc->sc_dmat, 283 &schp->sch_prb_seg, schp->sch_prb_nseg); 284 return; 285 } 286 287 error = bus_dmamap_create(sc->sc_dmat, dmasize, 1, dmasize, 0, 288 BUS_DMA_NOWAIT, &schp->sch_prbd); 289 if (error) { 290 aprint_error_dev(sc->sc_atac.atac_dev, 291 "unable to create PRB table map, " 292 "error=%d\n", error); 293 bus_dmamem_unmap(sc->sc_dmat, prbp, dmasize); 294 bus_dmamem_free(sc->sc_dmat, 295 &schp->sch_prb_seg, schp->sch_prb_nseg); 296 return; 297 } 298 299 error = bus_dmamap_load(sc->sc_dmat, schp->sch_prbd, 300 prbp, dmasize, NULL, BUS_DMA_NOWAIT); 301 if (error) { 302 aprint_error_dev(sc->sc_atac.atac_dev, 303 "unable to load PRB table map, " 304 "error=%d\n", error); 305 bus_dmamap_destroy(sc->sc_dmat, schp->sch_prbd); 306 bus_dmamem_unmap(sc->sc_dmat, prbp, dmasize); 307 bus_dmamem_free(sc->sc_dmat, 308 &schp->sch_prb_seg, schp->sch_prb_nseg); 309 return; 310 } 311 312 for (j = 0; j < SIISATA_MAX_SLOTS; j++) { 313 schp->sch_prb[j] = (struct siisata_prb *) 314 ((char *)prbp + SIISATA_CMD_SIZE * j); 315 schp->sch_bus_prb[j] = 316 schp->sch_prbd->dm_segs[0].ds_addr + 317 SIISATA_CMD_SIZE * j; 318 error = bus_dmamap_create(sc->sc_dmat, MAXPHYS, 319 SIISATA_NSGE, MAXPHYS, 0, 320 BUS_DMA_NOWAIT | BUS_DMA_ALLOCNOW, 321 &schp->sch_datad[j]); 322 if (error) { 323 aprint_error_dev(sc->sc_atac.atac_dev, 324 "couldn't create xfer DMA map, error=%d\n", 325 error); 326 return; 327 } 328 } 329 330 chp->ch_ndrive = 1; 331 if (bus_space_subregion(sc->sc_prt, sc->sc_prh, 332 PRX(chp->ch_channel, PRO_SSTATUS), 4, &schp->sch_sstatus) != 0) { 333 aprint_error_dev(sc->sc_atac.atac_dev, 334 "couldn't map port %d SStatus regs\n", 335 chp->ch_channel); 336 return; 337 } 338 if (bus_space_subregion(sc->sc_prt, sc->sc_prh, 339 PRX(chp->ch_channel, PRO_SCONTROL), 4, &schp->sch_scontrol) != 0) { 340 aprint_error_dev(sc->sc_atac.atac_dev, 341 "couldn't map port %d SControl regs\n", 342 chp->ch_channel); 343 return; 344 } 345 if (bus_space_subregion(sc->sc_prt, sc->sc_prh, 346 PRX(chp->ch_channel, PRO_SERROR), 4, &schp->sch_serror) != 0) { 347 aprint_error_dev(sc->sc_atac.atac_dev, 348 "couldn't map port %d SError regs\n", 349 chp->ch_channel); 350 return; 351 } 352 353 siisata_init_port(sc, port); 354 355 ata_channel_attach(chp); 356 357 return; 358 } 359 360 int 361 siisata_detach(struct siisata_softc *sc, int flags) 362 { 363 struct atac_softc *atac = &sc->sc_atac; 364 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 365 struct siisata_channel *schp; 366 struct ata_channel *chp; 367 int i, j, error; 368 369 for (i = 0; i < sc->sc_atac.atac_nchannels; i++) { 370 schp = &sc->sc_channels[i]; 371 chp = sc->sc_chanarray[i]; 372 373 if (chp->atabus == NULL) 374 continue; 375 if ((error = config_detach(chp->atabus, flags)) != 0) 376 return error; 377 378 for (j = 0; j < SIISATA_MAX_SLOTS; j++) 379 bus_dmamap_destroy(sc->sc_dmat, schp->sch_datad[j]); 380 381 bus_dmamap_unload(sc->sc_dmat, schp->sch_prbd); 382 bus_dmamap_destroy(sc->sc_dmat, schp->sch_prbd); 383 bus_dmamem_unmap(sc->sc_dmat, schp->sch_prb[0], 384 SIISATA_CMD_SIZE * SIISATA_MAX_SLOTS); 385 bus_dmamem_free(sc->sc_dmat, 386 &schp->sch_prb_seg, schp->sch_prb_nseg); 387 388 free(chp->ch_queue, M_DEVBUF); 389 chp->atabus = NULL; 390 } 391 392 if (adapt->adapt_refcnt != 0) 393 return EBUSY; 394 395 /* leave the chip in reset */ 396 GRWRITE(sc, GR_GC, GR_GC_GLBLRST); 397 398 return 0; 399 } 400 401 void 402 siisata_resume(struct siisata_softc *sc) 403 { 404 int i; 405 406 /* come out of reset state */ 407 GRWRITE(sc, GR_GC, 0); 408 409 for (i = 0; i < sc->sc_atac.atac_nchannels; i++) { 410 siisata_init_port(sc, i); 411 } 412 413 } 414 415 int 416 siisata_intr(void *v) 417 { 418 struct siisata_softc *sc = v; 419 uint32_t is; 420 int i, r = 0; 421 while ((is = GRREAD(sc, GR_GIS))) { 422 SIISATA_DEBUG_PRINT(("%s: %s: GR_GIS: 0x%08x\n", 423 SIISATANAME(sc), __func__, is), DEBUG_INTR); 424 r = 1; 425 for (i = 0; i < sc->sc_atac.atac_nchannels; i++) 426 if (is & GR_GIS_PXIS(i)) 427 siisata_intr_port(&sc->sc_channels[i]); 428 } 429 return r; 430 } 431 432 static void 433 siisata_intr_port(struct siisata_channel *schp) 434 { 435 struct siisata_softc *sc; 436 struct ata_channel *chp; 437 struct ata_xfer *xfer; 438 int slot; 439 uint32_t pss, pis; 440 uint32_t prbfis; 441 442 sc = (struct siisata_softc *)schp->ata_channel.ch_atac; 443 chp = &schp->ata_channel; 444 xfer = chp->ch_queue->active_xfer; 445 slot = SIISATA_NON_NCQ_SLOT; 446 447 SIISATA_DEBUG_PRINT(("%s: %s port %d\n", 448 SIISATANAME(sc), __func__, chp->ch_channel), DEBUG_INTR); 449 450 pis = PRREAD(sc, PRX(chp->ch_channel, PRO_PIS)); 451 452 if (pis & PR_PIS_CMDCMPL) { 453 /* get slot status, clearing completion interrupt */ 454 pss = PRREAD(sc, PRX(chp->ch_channel, PRO_PSS)); 455 /* is this expected? */ 456 /* XXX improve */ 457 if ((schp->sch_active_slots & __BIT(slot)) == 0) { 458 log(LOG_WARNING, "%s: unexpected command " 459 "completion on port %d\n", 460 SIISATANAME(sc), chp->ch_channel); 461 return; 462 } 463 } else if (pis & PR_PIS_CMDERRR) { 464 uint32_t ec; 465 466 /* emulate a CRC error by default */ 467 chp->ch_status = WDCS_ERR; 468 chp->ch_error = WDCE_CRC; 469 470 ec = PRREAD(sc, PRX(chp->ch_channel, PRO_PCE)); 471 if (ec <= PR_PCE_DATAFISERROR) { 472 if (ec == PR_PCE_DEVICEERROR) { 473 /* read in specific information about error */ 474 prbfis = bus_space_read_stream_4( 475 sc->sc_prt, sc->sc_prh, 476 PRSX(chp->ch_channel, slot, PRSO_FIS)); 477 /* set ch_status and ch_error */ 478 satafis_rdh_parse(chp, (uint8_t *)&prbfis); 479 } 480 siisata_reinit_port(chp); 481 } else { 482 /* okay, we have a "Fatal Error" */ 483 siisata_device_reset(chp); 484 } 485 } 486 487 /* clear some (ok, all) ints */ 488 PRWRITE(sc, PRX(chp->ch_channel, PRO_PIS), 0xffffffff); 489 490 KASSERT(xfer != NULL); 491 KASSERT(xfer->c_intr != NULL); 492 xfer->c_intr(chp, xfer, slot); 493 494 return; 495 } 496 497 void 498 siisata_reset_drive(struct ata_drive_datas *drvp, int flags) 499 { 500 struct ata_channel *chp = drvp->chnl_softc; 501 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 502 struct siisata_channel *schp = (struct siisata_channel *)chp; 503 struct siisata_prb *prb; 504 int slot = SIISATA_NON_NCQ_SLOT; 505 int i; 506 507 /* wait for ready */ 508 while (!(PRREAD(sc, PRX(chp->ch_channel, PRO_PS)) & PR_PS_PORT_READY)) 509 DELAY(10); 510 511 prb = schp->sch_prb[slot]; 512 memset(prb, 0, sizeof(struct siisata_prb)); 513 prb->prb_control = 514 htole16(PRB_CF_SOFT_RESET | PRB_CF_INTERRUPT_MASK); 515 516 siisata_activate_prb(schp, slot); 517 518 for(i = 0; i < 31000; i++) { 519 if (PRREAD(sc, PRX(chp->ch_channel, PRO_PSS)) & 520 PR_PXSS(slot)) 521 DELAY(1000); 522 else 523 break; 524 } 525 526 siisata_deactivate_prb(schp, slot); 527 528 log(LOG_DEBUG, "%s: port %d: ch_status %x ch_error %x\n", 529 __func__, chp->ch_channel, chp->ch_status, chp->ch_error); 530 531 #if 1 532 /* attempt to downgrade signaling in event of CRC error */ 533 /* XXX should be part of the MI (S)ATA subsystem */ 534 if (chp->ch_status == 0x51 && chp->ch_error == 0x84) { 535 bus_space_write_4(sc->sc_prt, schp->sch_scontrol, 0, 536 SControl_IPM_NONE | SControl_SPD_G1 | SControl_DET_INIT); 537 DELAY(10); 538 bus_space_write_4(sc->sc_prt, schp->sch_scontrol, 0, 539 SControl_IPM_NONE | SControl_SPD_G1); 540 DELAY(10); 541 for (;;) { 542 if ((bus_space_read_4(sc->sc_prt, schp->sch_sstatus, 0) 543 & SStatus_DET_mask) == SStatus_DET_DEV) 544 break; 545 DELAY(10); 546 } 547 } 548 #endif 549 550 #if 1 551 chp->ch_status = 0; 552 chp->ch_error = 0; 553 #endif 554 555 return; 556 } 557 558 void 559 siisata_reset_channel(struct ata_channel *chp, int flags) 560 { 561 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 562 struct siisata_channel *schp = (struct siisata_channel *)chp; 563 564 SIISATA_DEBUG_PRINT(("%s: %s\n", SIISATANAME(sc), __func__), 565 DEBUG_FUNCS); 566 567 if (sata_reset_interface(chp, sc->sc_prt, schp->sch_scontrol, 568 schp->sch_sstatus) != SStatus_DET_DEV) { 569 log(LOG_CRIT, "%s port %d: reset failed\n", 570 SIISATANAME(sc), chp->ch_channel); 571 /* XXX and then ? */ 572 } 573 /* wait for ready */ 574 while (!(PRREAD(sc, PRX(chp->ch_channel, PRO_PS)) & PR_PS_PORT_READY)) 575 DELAY(10); 576 PRWRITE(sc, PRX(chp->ch_channel, PRO_SERROR), 577 PRREAD(sc, PRX(chp->ch_channel, PRO_SERROR))); 578 if (chp->ch_queue->active_xfer) { 579 chp->ch_queue->active_xfer->c_kill_xfer(chp, 580 chp->ch_queue->active_xfer, KILL_RESET); 581 } 582 583 return; 584 } 585 586 int 587 siisata_ata_addref(struct ata_drive_datas *drvp) 588 { 589 return 0; 590 } 591 592 void 593 siisata_ata_delref(struct ata_drive_datas *drvp) 594 { 595 return; 596 } 597 598 void 599 siisata_killpending(struct ata_drive_datas *drvp) 600 { 601 return; 602 } 603 604 void 605 siisata_probe_drive(struct ata_channel *chp) 606 { 607 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 608 struct siisata_channel *schp = (struct siisata_channel *)chp; 609 int i; 610 int s; 611 uint32_t sig; 612 int slot = SIISATA_NON_NCQ_SLOT; 613 struct siisata_prb *prb; 614 615 SIISATA_DEBUG_PRINT(("%s: %s: port %d start\n", SIISATANAME(sc), 616 __func__, chp->ch_channel), DEBUG_FUNCS); 617 618 /* XXX This should be done by other code. */ 619 for (i = 0; i < chp->ch_ndrive; i++) { 620 chp->ch_drive[i].chnl_softc = chp; 621 chp->ch_drive[i].drive = i; 622 } 623 624 switch (sata_reset_interface(chp, sc->sc_prt, schp->sch_scontrol, 625 schp->sch_sstatus)) { 626 case SStatus_DET_DEV: 627 /* wait for ready */ 628 while (!(PRREAD(sc, PRX(chp->ch_channel, PRO_PS)) 629 & PR_PS_PORT_READY)) 630 DELAY(10); 631 632 prb = schp->sch_prb[slot]; 633 memset(prb, 0, sizeof(struct siisata_prb)); 634 prb->prb_control = 635 htole16(PRB_CF_SOFT_RESET | PRB_CF_INTERRUPT_MASK); 636 637 siisata_activate_prb(schp, slot); 638 639 for(i = 0; i < 31000; i++) { 640 if (PRREAD(sc, PRX(chp->ch_channel, PRO_PSS)) & 641 PR_PXSS(slot)) 642 DELAY(1000); 643 else 644 break; 645 } 646 647 siisata_deactivate_prb(schp, slot); 648 649 /* read the signature out of the FIS */ 650 sig = 0; 651 sig |= (PRREAD(sc, PRSX(chp->ch_channel, slot, 652 PRSO_FIS+0x4)) & 0x00ffffff) << 8; 653 sig |= PRREAD(sc, PRSX(chp->ch_channel, slot, 654 PRSO_FIS+0xc)) & 0xff; 655 656 SIISATA_DEBUG_PRINT(("%s: %s: sig=0x%08x\n", SIISATANAME(sc), 657 __func__, sig), DEBUG_PROBE); 658 659 /* some ATAPI devices have bogus lower two bytes, sigh */ 660 if ((sig & 0xffff0000) == 0xeb140000) { 661 sig &= 0xffff0000; 662 sig |= 0x00000101; 663 } 664 665 s = splbio(); 666 switch (sig) { 667 case 0xeb140101: 668 chp->ch_drive[0].drive_flags |= DRIVE_ATAPI; 669 break; 670 case 0x00000101: 671 chp->ch_drive[0].drive_flags |= DRIVE_ATA; 672 break; 673 default: 674 chp->ch_drive[0].drive_flags |= DRIVE_ATA; 675 aprint_verbose_dev(sc->sc_atac.atac_dev, 676 "Unrecognized signature 0x%08x on port %d. " 677 "Assuming it's a disk.\n", sig, chp->ch_channel); 678 break; 679 } 680 splx(s); 681 break; 682 default: 683 break; 684 } 685 686 SIISATA_DEBUG_PRINT(("%s: %s: port %d done\n", SIISATANAME(sc), 687 __func__, chp->ch_channel), DEBUG_PROBE); 688 return; 689 } 690 691 void 692 siisata_setup_channel(struct ata_channel *chp) 693 { 694 return; 695 } 696 697 int 698 siisata_exec_command(struct ata_drive_datas *drvp, struct ata_command *ata_c) 699 { 700 struct ata_channel *chp = drvp->chnl_softc; 701 struct ata_xfer *xfer; 702 int ret; 703 int s; 704 705 SIISATA_DEBUG_PRINT(("%s: %s begins\n", 706 SIISATANAME((struct siisata_softc *)chp->ch_atac), __func__), 707 DEBUG_FUNCS); 708 709 xfer = ata_get_xfer(ata_c->flags & AT_WAIT ? 710 ATAXF_CANSLEEP : ATAXF_NOSLEEP); 711 if (xfer == NULL) 712 return ATACMD_TRY_AGAIN; 713 if (ata_c->flags & AT_POLL) 714 xfer->c_flags |= C_POLL; 715 if (ata_c->flags & AT_WAIT) 716 xfer->c_flags |= C_WAIT; 717 xfer->c_drive = drvp->drive; 718 xfer->c_databuf = ata_c->data; 719 xfer->c_bcount = ata_c->bcount; 720 xfer->c_cmd = ata_c; 721 xfer->c_start = siisata_cmd_start; 722 xfer->c_intr = siisata_cmd_complete; 723 xfer->c_kill_xfer = siisata_cmd_kill_xfer; 724 s = splbio(); 725 ata_exec_xfer(chp, xfer); 726 #ifdef DIAGNOSTIC 727 if ((ata_c->flags & AT_POLL) != 0 && 728 (ata_c->flags & AT_DONE) == 0) 729 panic("%s: polled command not done", __func__); 730 #endif 731 if (ata_c->flags & AT_DONE) { 732 ret = ATACMD_COMPLETE; 733 } else { 734 if (ata_c->flags & AT_WAIT) { 735 while ((ata_c->flags & AT_DONE) == 0) { 736 SIISATA_DEBUG_PRINT(("%s: %s: sleeping\n", 737 SIISATANAME( 738 (struct siisata_softc *)chp->ch_atac), 739 __func__), DEBUG_FUNCS); 740 tsleep(ata_c, PRIBIO, "siicmd", 0); 741 } 742 ret = ATACMD_COMPLETE; 743 } else { 744 ret = ATACMD_QUEUED; 745 } 746 } 747 splx(s); 748 SIISATA_DEBUG_PRINT( ("%s: %s ends\n", 749 SIISATANAME((struct siisata_softc *)chp->ch_atac), __func__), 750 DEBUG_FUNCS); 751 return ret; 752 } 753 754 void 755 siisata_cmd_start(struct ata_channel *chp, struct ata_xfer *xfer) 756 { 757 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 758 struct siisata_channel *schp = (struct siisata_channel *)chp; 759 struct ata_command *ata_c = xfer->c_cmd; 760 int slot = SIISATA_NON_NCQ_SLOT; 761 struct siisata_prb *prb; 762 int i; 763 764 SIISATA_DEBUG_PRINT(("%s: %s port %d, slot %d\n", 765 SIISATANAME(sc), __func__, chp->ch_channel, slot), DEBUG_FUNCS); 766 767 chp->ch_status = 0; 768 chp->ch_error = 0; 769 770 prb = schp->sch_prb[slot]; 771 memset(prb, 0, sizeof(struct siisata_prb)); 772 773 satafis_rhd_construct_cmd(ata_c, prb->prb_fis); 774 775 memset(prb->prb_atapi, 0, sizeof(prb->prb_atapi)); 776 777 if (siisata_dma_setup(chp, slot, 778 (ata_c->flags & (AT_READ | AT_WRITE)) ? ata_c->data : NULL, 779 ata_c->bcount, 780 (ata_c->flags & AT_READ) ? BUS_DMA_READ : BUS_DMA_WRITE)) { 781 ata_c->flags |= AT_DF; 782 siisata_cmd_complete(chp, xfer, slot); 783 return; 784 } 785 786 if (xfer->c_flags & C_POLL) { 787 /* polled command, disable interrupts */ 788 prb->prb_control = htole16(PRB_CF_INTERRUPT_MASK); 789 } 790 791 /* go for it */ 792 siisata_activate_prb(schp, slot); 793 794 if ((ata_c->flags & AT_POLL) == 0) { 795 chp->ch_flags |= ATACH_IRQ_WAIT; /* wait for interrupt */ 796 callout_reset(&chp->ch_callout, mstohz(ata_c->timeout), 797 siisata_timeout, chp); 798 goto out; 799 } 800 801 /* 802 * polled command 803 */ 804 for (i = 0; i < ata_c->timeout / 10; i++) { 805 if (ata_c->flags & AT_DONE) 806 break; 807 siisata_intr_port(schp); 808 DELAY(1000); 809 } 810 811 if ((ata_c->flags & AT_DONE) == 0) { 812 ata_c->flags |= AT_TIMEOU; 813 siisata_cmd_complete(chp, xfer, slot); 814 } 815 816 /* reenable interrupts */ 817 GRWRITE(sc, GR_GC, GRREAD(sc, GR_GC) | GR_GC_PXIE(chp->ch_channel)); 818 out: 819 SIISATA_DEBUG_PRINT( 820 ("%s: %s: done\n", SIISATANAME(sc), __func__), DEBUG_FUNCS); 821 return; 822 } 823 824 void 825 siisata_cmd_kill_xfer(struct ata_channel *chp, struct ata_xfer *xfer, 826 int reason) 827 { 828 int slot = SIISATA_NON_NCQ_SLOT; 829 830 struct ata_command *ata_c = xfer->c_cmd; 831 switch (reason) { 832 case KILL_GONE: 833 ata_c->flags |= AT_GONE; 834 break; 835 case KILL_RESET: 836 ata_c->flags |= AT_RESET; 837 break; 838 default: 839 panic("%s: port %d: unknown reason %d", 840 __func__, chp->ch_channel, reason); 841 } 842 siisata_cmd_done(chp, xfer, slot); 843 } 844 845 int 846 siisata_cmd_complete(struct ata_channel *chp, struct ata_xfer *xfer, int slot) 847 { 848 struct ata_command *ata_c = xfer->c_cmd; 849 #ifdef SIISATA_DEBUG 850 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 851 #endif 852 853 SIISATA_DEBUG_PRINT( 854 ("%s: %s\n", SIISATANAME(sc), __func__), DEBUG_FUNCS); 855 856 chp->ch_flags &= ~ATACH_IRQ_WAIT; 857 if (xfer->c_flags & C_TIMEOU) 858 ata_c->flags |= AT_TIMEOU; 859 else 860 callout_stop(&chp->ch_callout); 861 862 if (chp->ch_status & WDCS_BSY) { 863 ata_c->flags |= AT_TIMEOU; 864 } else if (chp->ch_status & WDCS_ERR) { 865 ata_c->r_error = chp->ch_error; 866 ata_c->flags |= AT_ERROR; 867 } 868 869 if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_WAITDRAIN) { 870 siisata_cmd_kill_xfer(chp, xfer, KILL_GONE); 871 chp->ch_drive[xfer->c_drive].drive_flags &= ~DRIVE_WAITDRAIN; 872 wakeup(&chp->ch_queue->active_xfer); 873 return 0; 874 } else 875 siisata_cmd_done(chp, xfer, slot); 876 877 return 0; 878 } 879 880 void 881 siisata_cmd_done(struct ata_channel *chp, struct ata_xfer *xfer, int slot) 882 { 883 uint32_t fis[howmany(RDH_FISLEN,sizeof(uint32_t))]; 884 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 885 struct siisata_channel *schp = (struct siisata_channel *)chp; 886 struct ata_command *ata_c = xfer->c_cmd; 887 uint16_t *idwordbuf; 888 int i; 889 890 SIISATA_DEBUG_PRINT( 891 ("%s: %s.\n", SIISATANAME(sc), __func__), DEBUG_FUNCS); 892 893 siisata_deactivate_prb(schp, slot); 894 895 if (ata_c->flags & (AT_READ | AT_WRITE)) { 896 bus_dmamap_sync(sc->sc_dmat, schp->sch_datad[slot], 0, 897 schp->sch_datad[slot]->dm_mapsize, 898 (ata_c->flags & AT_READ) ? BUS_DMASYNC_POSTREAD : 899 BUS_DMASYNC_POSTWRITE); 900 bus_dmamap_unload(sc->sc_dmat, schp->sch_datad[slot]); 901 } 902 903 if (ata_c->flags & AT_READREG) { 904 bus_space_read_region_stream_4(sc->sc_prt, sc->sc_prh, 905 PRSX(chp->ch_channel, slot, PRSO_FIS), 906 fis, __arraycount(fis)); 907 satafis_rdh_cmd_readreg(ata_c, (uint8_t *)fis); 908 } 909 910 /* correct the endianess of IDENTIFY data */ 911 if (ata_c->r_command == WDCC_IDENTIFY || 912 ata_c->r_command == ATAPI_IDENTIFY_DEVICE) { 913 idwordbuf = xfer->c_databuf; 914 for (i = 0; i < (xfer->c_bcount / sizeof(*idwordbuf)); i++) { 915 idwordbuf[i] = le16toh(idwordbuf[i]); 916 } 917 } 918 919 ata_c->flags |= AT_DONE; 920 if (PRREAD(sc, PRSX(chp->ch_channel, slot, PRSO_RTC))) 921 ata_c->flags |= AT_XFDONE; 922 923 chp->ch_queue->active_xfer = NULL; 924 ata_free_xfer(chp, xfer); 925 if (ata_c->flags & AT_WAIT) 926 wakeup(ata_c); 927 else if (ata_c->callback) 928 ata_c->callback(ata_c->callback_arg); 929 atastart(chp); 930 return; 931 } 932 933 int 934 siisata_ata_bio(struct ata_drive_datas *drvp, struct ata_bio *ata_bio) 935 { 936 struct ata_channel *chp = drvp->chnl_softc; 937 struct ata_xfer *xfer; 938 939 SIISATA_DEBUG_PRINT( ("%s: %s.\n", 940 SIISATANAME((struct siisata_softc *)chp->ch_atac), 941 __func__), DEBUG_FUNCS); 942 943 xfer = ata_get_xfer(ATAXF_NOSLEEP); 944 if (xfer == NULL) 945 return ATACMD_TRY_AGAIN; 946 if (ata_bio->flags & ATA_POLL) 947 xfer->c_flags |= C_POLL; 948 xfer->c_drive = drvp->drive; 949 xfer->c_cmd = ata_bio; 950 xfer->c_databuf = ata_bio->databuf; 951 xfer->c_bcount = ata_bio->bcount; 952 xfer->c_start = siisata_bio_start; 953 xfer->c_intr = siisata_bio_complete; 954 xfer->c_kill_xfer = siisata_bio_kill_xfer; 955 ata_exec_xfer(chp, xfer); 956 return (ata_bio->flags & ATA_ITSDONE) ? 957 ATACMD_COMPLETE : ATACMD_QUEUED; 958 } 959 960 void 961 siisata_bio_start(struct ata_channel *chp, struct ata_xfer *xfer) 962 { 963 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 964 struct siisata_channel *schp = (struct siisata_channel *)chp; 965 struct siisata_prb *prb; 966 struct ata_bio *ata_bio = xfer->c_cmd; 967 int slot = SIISATA_NON_NCQ_SLOT; 968 int i; 969 970 SIISATA_DEBUG_PRINT( 971 ("%s: %s port %d, slot %d\n", 972 SIISATANAME(sc), __func__, chp->ch_channel, slot), 973 DEBUG_FUNCS); 974 975 chp->ch_status = 0; 976 chp->ch_error = 0; 977 978 prb = schp->sch_prb[slot]; 979 memset(prb, 0, sizeof(struct siisata_prb)); 980 981 satafis_rhd_construct_bio(xfer, prb->prb_fis); 982 983 memset(prb->prb_atapi, 0, sizeof(prb->prb_atapi)); 984 985 if (siisata_dma_setup(chp, slot, ata_bio->databuf, ata_bio->bcount, 986 (ata_bio->flags & ATA_READ) ? BUS_DMA_READ : BUS_DMA_WRITE)) { 987 ata_bio->error = ERR_DMA; 988 ata_bio->r_error = 0; 989 siisata_bio_complete(chp, xfer, slot); 990 return; 991 } 992 993 if (xfer->c_flags & C_POLL) { 994 /* polled command, disable interrupts */ 995 prb->prb_control = htole16(PRB_CF_INTERRUPT_MASK); 996 } 997 998 siisata_activate_prb(schp, slot); 999 1000 if ((ata_bio->flags & ATA_POLL) == 0) { 1001 chp->ch_flags |= ATACH_IRQ_WAIT; /* wait for interrupt */ 1002 callout_reset(&chp->ch_callout, mstohz(ATA_DELAY), 1003 siisata_timeout, chp); 1004 goto out; 1005 } 1006 1007 /* 1008 * polled command 1009 */ 1010 for (i = 0; i < ATA_DELAY / 10; i++) { 1011 if (ata_bio->flags & ATA_ITSDONE) 1012 break; 1013 siisata_intr_port(schp); 1014 DELAY(1000); 1015 } 1016 1017 GRWRITE(sc, GR_GC, GRREAD(sc, GR_GC) | GR_GC_PXIE(chp->ch_channel)); 1018 out: 1019 SIISATA_DEBUG_PRINT( 1020 ("%s: %s: done\n", SIISATANAME(sc), __func__), DEBUG_FUNCS); 1021 return; 1022 } 1023 1024 void 1025 siisata_bio_kill_xfer(struct ata_channel *chp, struct ata_xfer *xfer, 1026 int reason) 1027 { 1028 struct siisata_channel *schp = (struct siisata_channel *)chp; 1029 struct ata_bio *ata_bio = xfer->c_cmd; 1030 int drive = xfer->c_drive; 1031 int slot = SIISATA_NON_NCQ_SLOT; 1032 1033 SIISATA_DEBUG_PRINT(("%s: %s: port %d\n", 1034 SIISATANAME((struct siisata_softc *)chp->ch_atac), 1035 __func__, chp->ch_channel), DEBUG_FUNCS); 1036 1037 siisata_deactivate_prb(schp, slot); 1038 1039 ata_free_xfer(chp, xfer); 1040 ata_bio->flags |= ATA_ITSDONE; 1041 switch (reason) { 1042 case KILL_GONE: 1043 ata_bio->error = ERR_NODEV; 1044 break; 1045 case KILL_RESET: 1046 ata_bio->error = ERR_RESET; 1047 break; 1048 default: 1049 panic("%s: port %d: unknown reason %d", 1050 __func__, chp->ch_channel, reason); 1051 } 1052 ata_bio->r_error = WDCE_ABRT; 1053 (*chp->ch_drive[drive].drv_done)(chp->ch_drive[drive].drv_softc); 1054 } 1055 1056 int 1057 siisata_bio_complete(struct ata_channel *chp, struct ata_xfer *xfer, int slot) 1058 { 1059 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 1060 struct siisata_channel *schp = (struct siisata_channel *)chp; 1061 struct ata_bio *ata_bio = xfer->c_cmd; 1062 int drive = xfer->c_drive; 1063 1064 schp->sch_active_slots &= ~__BIT(slot); 1065 chp->ch_flags &= ~ATACH_IRQ_WAIT; 1066 if (xfer->c_flags & C_TIMEOU) { 1067 ata_bio->error = TIMEOUT; 1068 } else { 1069 callout_stop(&chp->ch_callout); 1070 ata_bio->error = NOERROR; 1071 } 1072 1073 bus_dmamap_sync(sc->sc_dmat, schp->sch_datad[slot], 0, 1074 schp->sch_datad[slot]->dm_mapsize, 1075 (ata_bio->flags & ATA_READ) ? BUS_DMASYNC_POSTREAD : 1076 BUS_DMASYNC_POSTWRITE); 1077 bus_dmamap_unload(sc->sc_dmat, schp->sch_datad[slot]); 1078 1079 if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_WAITDRAIN) { 1080 siisata_bio_kill_xfer(chp, xfer, KILL_GONE); 1081 chp->ch_drive[xfer->c_drive].drive_flags &= ~DRIVE_WAITDRAIN; 1082 wakeup(&chp->ch_queue->active_xfer); 1083 return 0; 1084 } 1085 1086 chp->ch_queue->active_xfer = NULL; 1087 ata_free_xfer(chp, xfer); 1088 ata_bio->flags |= ATA_ITSDONE; 1089 if (chp->ch_status & WDCS_DWF) { 1090 ata_bio->error = ERR_DF; 1091 } else if (chp->ch_status & WDCS_ERR) { 1092 ata_bio->error = ERROR; 1093 ata_bio->r_error = chp->ch_error; 1094 } else if (chp->ch_status & WDCS_CORR) 1095 ata_bio->flags |= ATA_CORR; 1096 1097 SIISATA_DEBUG_PRINT(("%s: %s bcount: %ld", SIISATANAME(sc), 1098 __func__, ata_bio->bcount), DEBUG_XFERS); 1099 if (ata_bio->error == NOERROR) { 1100 if (ata_bio->flags & ATA_READ) 1101 ata_bio->bcount -= 1102 PRREAD(sc, PRSX(chp->ch_channel, slot, PRSO_RTC)); 1103 else 1104 ata_bio->bcount = 0; 1105 } 1106 SIISATA_DEBUG_PRINT((" now %ld\n", ata_bio->bcount), DEBUG_XFERS); 1107 if (ata_bio->flags & ATA_POLL) 1108 return 1; 1109 (*chp->ch_drive[drive].drv_done)(chp->ch_drive[drive].drv_softc); 1110 atastart(chp); 1111 return 0; 1112 } 1113 1114 void 1115 siisata_timeout(void *v) 1116 { 1117 struct ata_channel *chp = (struct ata_channel *)v; 1118 struct ata_xfer *xfer = chp->ch_queue->active_xfer; 1119 int slot = SIISATA_NON_NCQ_SLOT; 1120 int s = splbio(); 1121 SIISATA_DEBUG_PRINT(("%s: %p\n", __func__, xfer), DEBUG_INTR); 1122 if ((chp->ch_flags & ATACH_IRQ_WAIT) != 0) { 1123 xfer->c_flags |= C_TIMEOU; 1124 xfer->c_intr(chp, xfer, slot); 1125 } 1126 splx(s); 1127 } 1128 1129 static int 1130 siisata_dma_setup(struct ata_channel *chp, int slot, void *data, 1131 size_t count, int op) 1132 { 1133 1134 int error, seg; 1135 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 1136 struct siisata_channel *schp = (struct siisata_channel *)chp; 1137 1138 struct siisata_prb *prbp; 1139 1140 prbp = schp->sch_prb[slot]; 1141 1142 if (data == NULL) { 1143 goto end; 1144 } 1145 1146 error = bus_dmamap_load(sc->sc_dmat, schp->sch_datad[slot], 1147 data, count, NULL, BUS_DMA_NOWAIT | BUS_DMA_STREAMING | op); 1148 if (error) { 1149 log(LOG_ERR, "%s port %d: " 1150 "failed to load xfer in slot %d: error %d\n", 1151 SIISATANAME(sc), chp->ch_channel, slot, error); 1152 return error; 1153 } 1154 1155 bus_dmamap_sync(sc->sc_dmat, schp->sch_datad[slot], 0, 1156 schp->sch_datad[slot]->dm_mapsize, 1157 (op == BUS_DMA_READ) ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 1158 1159 /* make sure it's clean */ 1160 memset(prbp->prb_sge, 0, SIISATA_NSGE * sizeof(struct siisata_prb)); 1161 1162 SIISATA_DEBUG_PRINT(("%s: %d segs, %ld count\n", __func__, 1163 schp->sch_datad[slot]->dm_nsegs, (long unsigned int) count), 1164 DEBUG_FUNCS | DEBUG_DEBUG); 1165 1166 for (seg = 0; seg < schp->sch_datad[slot]->dm_nsegs; seg++) { 1167 prbp->prb_sge[seg].sge_da = 1168 htole64(schp->sch_datad[slot]->dm_segs[seg].ds_addr); 1169 prbp->prb_sge[seg].sge_dc = 1170 htole32(schp->sch_datad[slot]->dm_segs[seg].ds_len); 1171 prbp->prb_sge[seg].sge_flags = htole32(0); 1172 } 1173 prbp->prb_sge[seg - 1].sge_flags |= htole32(SGE_FLAG_TRM); 1174 end: 1175 return 0; 1176 } 1177 1178 static void 1179 siisata_activate_prb(struct siisata_channel *schp, int slot) 1180 { 1181 struct siisata_softc *sc; 1182 bus_size_t offset; 1183 uint64_t pprb; 1184 1185 sc = (struct siisata_softc *)schp->ata_channel.ch_atac; 1186 1187 KASSERTMSG((schp->sch_active_slots & __BIT(slot)) != __BIT(slot), 1188 ("%s: trying to activate active slot %d", SIISATANAME(sc), slot)); 1189 1190 SIISATA_PRB_SYNC(sc, schp, slot, BUS_DMASYNC_PREWRITE); 1191 /* keep track of what's going on */ 1192 schp->sch_active_slots |= __BIT(slot); 1193 1194 offset = PRO_CARX(schp->ata_channel.ch_channel, slot); 1195 1196 pprb = schp->sch_bus_prb[slot]; 1197 1198 PRWRITE(sc, offset + 0, pprb >> 0); 1199 PRWRITE(sc, offset + 4, pprb >> 32); 1200 } 1201 1202 static void 1203 siisata_deactivate_prb(struct siisata_channel *schp, int slot) 1204 { 1205 struct siisata_softc *sc; 1206 1207 sc = (struct siisata_softc *)schp->ata_channel.ch_atac; 1208 1209 KASSERTMSG((schp->sch_active_slots & __BIT(slot)) != 0, 1210 ("%s: trying to deactivate inactive slot %d", SIISATANAME(sc), 1211 slot)); 1212 1213 schp->sch_active_slots &= ~__BIT(slot); /* mark free */ 1214 SIISATA_PRB_SYNC(sc, schp, slot, BUS_DMASYNC_POSTWRITE); 1215 } 1216 1217 static void 1218 siisata_reinit_port(struct ata_channel *chp) 1219 { 1220 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 1221 1222 PRWRITE(sc, PRX(chp->ch_channel, PRO_PCS), PR_PC_PORT_INITIALIZE); 1223 while (!(PRREAD(sc, PRX(chp->ch_channel, PRO_PS)) & PR_PS_PORT_READY)) 1224 DELAY(10); 1225 } 1226 1227 static void 1228 siisata_device_reset(struct ata_channel *chp) 1229 { 1230 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 1231 1232 PRWRITE(sc, PRX(chp->ch_channel, PRO_PCS), PR_PC_DEVICE_RESET); 1233 while (!(PRREAD(sc, PRX(chp->ch_channel, PRO_PS)) & PR_PS_PORT_READY)) 1234 DELAY(10); 1235 } 1236 1237 1238 #if NATAPIBUS > 0 1239 void 1240 siisata_atapibus_attach(struct atabus_softc *ata_sc) 1241 { 1242 struct ata_channel *chp = ata_sc->sc_chan; 1243 struct atac_softc *atac = chp->ch_atac; 1244 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 1245 struct scsipi_channel *chan = &chp->ch_atapi_channel; 1246 1247 /* 1248 * Fill in the scsipi_adapter. 1249 */ 1250 adapt->adapt_dev = atac->atac_dev; 1251 adapt->adapt_nchannels = atac->atac_nchannels; 1252 adapt->adapt_request = siisata_atapi_scsipi_request; 1253 adapt->adapt_minphys = siisata_atapi_minphys; 1254 atac->atac_atapi_adapter.atapi_probe_device = 1255 siisata_atapi_probe_device; 1256 1257 /* 1258 * Fill in the scsipi_channel. 1259 */ 1260 memset(chan, 0, sizeof(*chan)); 1261 chan->chan_adapter = adapt; 1262 chan->chan_bustype = &siisata_atapi_bustype; 1263 chan->chan_channel = chp->ch_channel; 1264 chan->chan_flags = SCSIPI_CHAN_OPENINGS; 1265 chan->chan_openings = 1; 1266 chan->chan_max_periph = 1; 1267 chan->chan_ntargets = 1; 1268 chan->chan_nluns = 1; 1269 1270 chp->atapibus = config_found_ia(ata_sc->sc_dev, "atapi", chan, 1271 atapiprint); 1272 } 1273 1274 void 1275 siisata_atapi_minphys(struct buf *bp) 1276 { 1277 if (bp->b_bcount > MAXPHYS) 1278 bp->b_bcount = MAXPHYS; 1279 minphys(bp); 1280 } 1281 1282 /* 1283 * Kill off all pending xfers for a periph. 1284 * 1285 * Must be called at splbio(). 1286 */ 1287 void 1288 siisata_atapi_kill_pending(struct scsipi_periph *periph) 1289 { 1290 struct atac_softc *atac = 1291 device_private(periph->periph_channel->chan_adapter->adapt_dev); 1292 struct ata_channel *chp = 1293 atac->atac_channels[periph->periph_channel->chan_channel]; 1294 1295 ata_kill_pending(&chp->ch_drive[periph->periph_target]); 1296 } 1297 1298 void 1299 siisata_atapi_kill_xfer(struct ata_channel *chp, struct ata_xfer *xfer, 1300 int reason) 1301 { 1302 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 1303 1304 /* remove this command from xfer queue */ 1305 switch (reason) { 1306 case KILL_GONE: 1307 sc_xfer->error = XS_DRIVER_STUFFUP; 1308 break; 1309 case KILL_RESET: 1310 sc_xfer->error = XS_RESET; 1311 break; 1312 default: 1313 panic("%s: port %d: unknown reason %d", 1314 __func__, chp->ch_channel, reason); 1315 } 1316 ata_free_xfer(chp, xfer); 1317 scsipi_done(sc_xfer); 1318 } 1319 1320 void 1321 siisata_atapi_probe_device(struct atapibus_softc *sc, int target) 1322 { 1323 struct scsipi_channel *chan = sc->sc_channel; 1324 struct scsipi_periph *periph; 1325 struct ataparams ids; 1326 struct ataparams *id = &ids; 1327 struct siisata_softc *siic = 1328 device_private(chan->chan_adapter->adapt_dev); 1329 struct atac_softc *atac = &siic->sc_atac; 1330 struct ata_channel *chp = atac->atac_channels[chan->chan_channel]; 1331 struct ata_drive_datas *drvp = &chp->ch_drive[target]; 1332 struct scsipibus_attach_args sa; 1333 char serial_number[21], model[41], firmware_revision[9]; 1334 int s; 1335 1336 /* skip if already attached */ 1337 if (scsipi_lookup_periph(chan, target, 0) != NULL) 1338 return; 1339 1340 /* if no ATAPI device detected at attach time, skip */ 1341 if ((drvp->drive_flags & DRIVE_ATAPI) == 0) { 1342 SIISATA_DEBUG_PRINT(("%s: drive %d " 1343 "not present\n", __func__, target), DEBUG_PROBE); 1344 return; 1345 } 1346 1347 /* Some ATAPI devices need a bit more time after software reset. */ 1348 DELAY(5000); 1349 if (ata_get_params(drvp, AT_WAIT, id) == 0) { 1350 #ifdef ATAPI_DEBUG_PROBE 1351 log(LOG_DEBUG, "%s drive %d: cmdsz 0x%x drqtype 0x%x\n", 1352 device_xname(sc->sc_dev), target, 1353 id->atap_config & ATAPI_CFG_CMD_MASK, 1354 id->atap_config & ATAPI_CFG_DRQ_MASK); 1355 #endif 1356 periph = scsipi_alloc_periph(M_NOWAIT); 1357 if (periph == NULL) { 1358 aprint_error_dev(sc->sc_dev, 1359 "%s: unable to allocate periph for " 1360 "channel %d drive %d\n", __func__, 1361 chp->ch_channel, target); 1362 return; 1363 } 1364 periph->periph_dev = NULL; 1365 periph->periph_channel = chan; 1366 periph->periph_switch = &atapi_probe_periphsw; 1367 periph->periph_target = target; 1368 periph->periph_lun = 0; 1369 periph->periph_quirks = PQUIRK_ONLYBIG; 1370 1371 #ifdef SCSIPI_DEBUG 1372 if (SCSIPI_DEBUG_TYPE == SCSIPI_BUSTYPE_ATAPI && 1373 SCSIPI_DEBUG_TARGET == target) 1374 periph->periph_dbflags |= SCSIPI_DEBUG_FLAGS; 1375 #endif 1376 periph->periph_type = ATAPI_CFG_TYPE(id->atap_config); 1377 if (id->atap_config & ATAPI_CFG_REMOV) 1378 periph->periph_flags |= PERIPH_REMOVABLE; 1379 if (periph->periph_type == T_SEQUENTIAL) { 1380 s = splbio(); 1381 drvp->drive_flags |= DRIVE_ATAPIST; 1382 splx(s); 1383 } 1384 1385 sa.sa_periph = periph; 1386 sa.sa_inqbuf.type = ATAPI_CFG_TYPE(id->atap_config); 1387 sa.sa_inqbuf.removable = id->atap_config & ATAPI_CFG_REMOV ? 1388 T_REMOV : T_FIXED; 1389 scsipi_strvis((u_char *)model, 40, id->atap_model, 40); 1390 scsipi_strvis((u_char *)serial_number, 20, 1391 id->atap_serial, 20); 1392 scsipi_strvis((u_char *)firmware_revision, 8, 1393 id->atap_revision, 8); 1394 sa.sa_inqbuf.vendor = model; 1395 sa.sa_inqbuf.product = serial_number; 1396 sa.sa_inqbuf.revision = firmware_revision; 1397 1398 /* 1399 * Determine the operating mode capabilities of the device. 1400 */ 1401 if ((id->atap_config & ATAPI_CFG_CMD_MASK) 1402 == ATAPI_CFG_CMD_16) { 1403 periph->periph_cap |= PERIPH_CAP_CMD16; 1404 1405 /* configure port for packet length */ 1406 PRWRITE(siic, PRX(chp->ch_channel, PRO_PCS), 1407 PR_PC_PACKET_LENGTH); 1408 } else { 1409 PRWRITE(siic, PRX(chp->ch_channel, PRO_PCC), 1410 PR_PC_PACKET_LENGTH); 1411 } 1412 1413 /* XXX This is gross. */ 1414 periph->periph_cap |= (id->atap_config & ATAPI_CFG_DRQ_MASK); 1415 1416 drvp->drv_softc = atapi_probe_device(sc, target, periph, &sa); 1417 1418 if (drvp->drv_softc) 1419 ata_probe_caps(drvp); 1420 else { 1421 s = splbio(); 1422 drvp->drive_flags &= ~DRIVE_ATAPI; 1423 splx(s); 1424 } 1425 } else { 1426 SIISATA_DEBUG_PRINT(("%s: ATAPI_IDENTIFY_DEVICE " 1427 "failed for drive %s:%d:%d: error 0x%x\n", 1428 __func__, SIISATANAME(siic), chp->ch_channel, target, 1429 chp->ch_error), DEBUG_PROBE); 1430 s = splbio(); 1431 drvp->drive_flags &= ~DRIVE_ATAPI; 1432 splx(s); 1433 } 1434 } 1435 1436 void 1437 siisata_atapi_scsipi_request(struct scsipi_channel *chan, 1438 scsipi_adapter_req_t req, void *arg) 1439 { 1440 struct scsipi_adapter *adapt = chan->chan_adapter; 1441 struct scsipi_periph *periph; 1442 struct scsipi_xfer *sc_xfer; 1443 struct siisata_softc *sc = device_private(adapt->adapt_dev); 1444 struct atac_softc *atac = &sc->sc_atac; 1445 struct ata_xfer *xfer; 1446 int channel = chan->chan_channel; 1447 int drive, s; 1448 1449 switch (req) { 1450 case ADAPTER_REQ_RUN_XFER: 1451 sc_xfer = arg; 1452 periph = sc_xfer->xs_periph; 1453 drive = periph->periph_target; 1454 1455 SIISATA_DEBUG_PRINT(("%s: %s:%d:%d\n", __func__, 1456 device_xname(atac->atac_dev), channel, drive), 1457 DEBUG_XFERS); 1458 1459 if (!device_is_active(atac->atac_dev)) { 1460 sc_xfer->error = XS_DRIVER_STUFFUP; 1461 scsipi_done(sc_xfer); 1462 return; 1463 } 1464 xfer = ata_get_xfer(ATAXF_NOSLEEP); 1465 if (xfer == NULL) { 1466 sc_xfer->error = XS_RESOURCE_SHORTAGE; 1467 scsipi_done(sc_xfer); 1468 return; 1469 } 1470 1471 if (sc_xfer->xs_control & XS_CTL_POLL) 1472 xfer->c_flags |= C_POLL; 1473 xfer->c_drive = drive; 1474 xfer->c_flags |= C_ATAPI; 1475 xfer->c_cmd = sc_xfer; 1476 xfer->c_databuf = sc_xfer->data; 1477 xfer->c_bcount = sc_xfer->datalen; 1478 xfer->c_start = siisata_atapi_start; 1479 xfer->c_intr = siisata_atapi_complete; 1480 xfer->c_kill_xfer = siisata_atapi_kill_xfer; 1481 xfer->c_dscpoll = 0; 1482 s = splbio(); 1483 ata_exec_xfer(atac->atac_channels[channel], xfer); 1484 #ifdef DIAGNOSTIC 1485 if ((sc_xfer->xs_control & XS_CTL_POLL) != 0 && 1486 (sc_xfer->xs_status & XS_STS_DONE) == 0) 1487 panic("%s: polled command not done", __func__); 1488 #endif 1489 splx(s); 1490 return; 1491 1492 default: 1493 /* Not supported, nothing to do. */ 1494 ; 1495 } 1496 } 1497 1498 void 1499 siisata_atapi_start(struct ata_channel *chp, struct ata_xfer *xfer) 1500 { 1501 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 1502 struct siisata_channel *schp = (struct siisata_channel *)chp; 1503 struct siisata_prb *prbp; 1504 1505 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 1506 1507 int slot = SIISATA_NON_NCQ_SLOT; 1508 int i; 1509 1510 SIISATA_DEBUG_PRINT( ("%s: %s:%d:%d, scsi flags 0x%x\n", __func__, 1511 SIISATANAME(sc), chp->ch_channel, 1512 chp->ch_drive[xfer->c_drive].drive, sc_xfer->xs_control), 1513 DEBUG_XFERS); 1514 1515 chp->ch_status = 0; 1516 chp->ch_error = 0; 1517 1518 prbp = schp->sch_prb[slot]; 1519 memset(prbp, 0, sizeof(struct siisata_prb)); 1520 1521 1522 /* fill in direction for ATAPI command */ 1523 if ((sc_xfer->xs_control & XS_CTL_DATA_IN)) 1524 prbp->prb_control |= htole16(PRB_CF_PACKET_READ); 1525 if ((sc_xfer->xs_control & XS_CTL_DATA_OUT)) 1526 prbp->prb_control |= htole16(PRB_CF_PACKET_WRITE); 1527 1528 satafis_rhd_construct_atapi(xfer, prbp->prb_fis); 1529 1530 /* copy over ATAPI command */ 1531 memcpy(prbp->prb_atapi, sc_xfer->cmd, sc_xfer->cmdlen); 1532 1533 if (siisata_dma_setup(chp, slot, 1534 (sc_xfer->xs_control & (XS_CTL_DATA_IN | XS_CTL_DATA_OUT)) ? 1535 xfer->c_databuf : NULL, 1536 xfer->c_bcount, 1537 (sc_xfer->xs_control & XS_CTL_DATA_IN) ? 1538 BUS_DMA_READ : BUS_DMA_WRITE) 1539 ) 1540 panic("%s", __func__); 1541 1542 if (xfer->c_flags & C_POLL) { 1543 /* polled command, disable interrupts */ 1544 prbp->prb_control = htole16(PRB_CF_INTERRUPT_MASK); 1545 } 1546 1547 siisata_activate_prb(schp, slot); 1548 1549 if ((xfer->c_flags & C_POLL) == 0) { 1550 chp->ch_flags |= ATACH_IRQ_WAIT; /* wait for interrupt */ 1551 callout_reset(&chp->ch_callout, mstohz(sc_xfer->timeout), 1552 siisata_timeout, chp); 1553 goto out; 1554 } 1555 1556 /* 1557 * polled command 1558 */ 1559 for (i = 0; i < ATA_DELAY / 10; i++) { 1560 if (sc_xfer->xs_status & XS_STS_DONE) 1561 break; 1562 siisata_intr_port(schp); 1563 DELAY(1000); 1564 } 1565 if ((sc_xfer->xs_status & XS_STS_DONE) == 0) { 1566 sc_xfer->error = XS_TIMEOUT; 1567 siisata_atapi_complete(chp, xfer, slot); 1568 } 1569 /* reenable interrupts */ 1570 GRWRITE(sc, GR_GC, GRREAD(sc, GR_GC) | GR_GC_PXIE(chp->ch_channel)); 1571 out: 1572 SIISATA_DEBUG_PRINT( 1573 ("%s: %s: done\n", SIISATANAME(sc), __func__), DEBUG_FUNCS); 1574 return; 1575 } 1576 1577 int 1578 siisata_atapi_complete(struct ata_channel *chp, struct ata_xfer *xfer, 1579 int slot) 1580 { 1581 struct siisata_softc *sc = (struct siisata_softc *)chp->ch_atac; 1582 struct siisata_channel *schp = (struct siisata_channel *)chp; 1583 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 1584 1585 SIISATA_DEBUG_PRINT( 1586 ("%s: %s()\n", SIISATANAME(sc), __func__), DEBUG_INTR); 1587 1588 /* this comamnd is not active any more */ 1589 schp->sch_active_slots &= ~__BIT(slot); 1590 chp->ch_flags &= ~ATACH_IRQ_WAIT; 1591 if (xfer->c_flags & C_TIMEOU) { 1592 sc_xfer->error = XS_TIMEOUT; 1593 } else { 1594 callout_stop(&chp->ch_callout); 1595 sc_xfer->error = XS_NOERROR; 1596 } 1597 1598 bus_dmamap_sync(sc->sc_dmat, schp->sch_datad[slot], 0, 1599 schp->sch_datad[slot]->dm_mapsize, 1600 (sc_xfer->xs_control & XS_CTL_DATA_IN) ? 1601 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1602 bus_dmamap_unload(sc->sc_dmat, schp->sch_datad[slot]); 1603 1604 if (chp->ch_drive[xfer->c_drive].drive_flags & DRIVE_WAITDRAIN) { 1605 siisata_atapi_kill_xfer(chp, xfer, KILL_GONE); 1606 chp->ch_drive[xfer->c_drive].drive_flags &= ~DRIVE_WAITDRAIN; 1607 wakeup(&chp->ch_queue->active_xfer); 1608 return 0; /* XXX verify */ 1609 } 1610 1611 chp->ch_queue->active_xfer = NULL; 1612 ata_free_xfer(chp, xfer); 1613 sc_xfer->resid = sc_xfer->datalen; 1614 sc_xfer->resid -= PRREAD(sc, PRSX(chp->ch_channel, slot, PRSO_RTC)); 1615 SIISATA_DEBUG_PRINT(("%s: %s datalen %d resid %d\n", SIISATANAME(sc), 1616 __func__, sc_xfer->datalen, sc_xfer->resid), DEBUG_XFERS); 1617 if ((chp->ch_status & WDCS_ERR) && 1618 ((sc_xfer->xs_control & XS_CTL_REQSENSE) == 0 || 1619 sc_xfer->resid == sc_xfer->datalen)) { 1620 sc_xfer->error = XS_SHORTSENSE; 1621 sc_xfer->sense.atapi_sense = chp->ch_error; 1622 if ((sc_xfer->xs_periph->periph_quirks & 1623 PQUIRK_NOSENSE) == 0) { 1624 /* request sense */ 1625 sc_xfer->error = XS_BUSY; 1626 sc_xfer->status = SCSI_CHECK; 1627 } 1628 } 1629 scsipi_done(sc_xfer); 1630 atastart(chp); 1631 return 0; /* XXX verify */ 1632 } 1633 1634 #endif /* NATAPIBUS */ 1635