1 /* $NetBSD: si4136reg.h,v 1.1 2004/02/17 21:20:55 dyoung Exp $ */ 2 3 /* 4 * Copyright (c) 2005 David Young. All rights reserved. 5 * 6 * This code was written by David Young. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. Neither the name of the author nor the names of any co-contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY 21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 23 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David 24 * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 26 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 31 * OF SUCH DAMAGE. 32 */ 33 34 #ifndef _DEV_IC_SI4136REG_H_ 35 #define _DEV_IC_SI4136REG_H_ 36 37 /* 38 * Serial bus format for Silicon Laboratories Si4126/Si4136 RF synthesizer. 39 */ 40 #define SI4126_TWI_DATA_MASK BITS(21, 4) 41 #define SI4126_TWI_ADDR_MASK BITS(3, 0) 42 43 /* 44 * Registers for Silicon Laboratories Si4126/Si4136 RF synthesizer. 45 */ 46 #define SI4126_MAIN 0 /* main configuration */ 47 #define SI4126_MAIN_AUXSEL_MASK BITS(13, 12) /* aux. output pin function */ 48 /* reserved */ 49 #define SI4126_MAIN_AUXSEL_RSVD LSHIFT(0x0, SI4126_MAIN_AUXSEL_MASK) 50 /* force low */ 51 #define SI4126_MAIN_AUXSEL_FRCLOW LSHIFT(0x1, SI4126_MAIN_AUXSEL_MASK) 52 /* Lock Detect (LDETB) */ 53 #define SI4126_MAIN_AUXSEL_LDETB LSHIFT(0x3, SI4126_MAIN_AUXSEL_MASK) 54 55 #define SI4126_MAIN_IFDIV_MASK BITS(11, 10) /* IFOUT = IFVCO 56 * frequency / 2**IFDIV. 57 */ 58 59 #define SI4126_MAIN_XINDIV2 BIT(6) /* 1: divide crystal input (XIN) by 2 */ 60 #define SI4126_MAIN_LPWR BIT(5) /* 1: low-power mode */ 61 #define SI4126_MAIN_AUTOPDB BIT(3) /* 1: equivalent to 62 * reg[SI4126_POWER] <- 63 * SI4126_POWER_PDIB | 64 * SI4126_POWER_PDRB. 65 * 66 * 0: power-down under control of 67 * reg[SI4126_POWER]. 68 */ 69 70 #define SI4126_GAIN 1 /* phase detector gain */ 71 #define SI4126_GAIN_KPI_MASK BITS(5, 4) /* IF phase detector gain */ 72 #define SI4126_GAIN_KP2_MASK BITS(3, 2) /* RF2 phase detector gain */ 73 #define SI4126_GAIN_KP1_MASK BITS(1, 0) /* RF1 phase detector gain */ 74 75 #define SI4126_POWER 2 /* powerdown */ 76 #define SI4126_POWER_PDIB BIT(1) /* 1: IF synthesizer on */ 77 #define SI4126_POWER_PDRB BIT(0) /* 1: RF synthesizer on */ 78 79 #define SI4126_RF1N 3 /* RF1 N divider */ 80 #define SI4126_RF2N 4 /* RF2 N divider */ 81 #define SI4126_IFN 5 /* IF N divider */ 82 #define SI4126_RF1R 6 /* RF1 R divider */ 83 #define SI4126_RF2R 7 /* RF2 R divider */ 84 #define SI4126_IFR 8 /* IF R divider */ 85 86 #endif /* _DEV_IC_SI4136REG_H_ */ 87