1 /* $NetBSD: sgec.c,v 1.48 2018/06/26 06:48:00 msaitoh Exp $ */ 2 /* 3 * Copyright (c) 1999 Ludd, University of Lule}, Sweden. All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 18 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 19 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 20 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 21 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 22 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 23 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 */ 25 26 /* 27 * Driver for the SGEC (Second Generation Ethernet Controller), sitting 28 * on for example the VAX 4000/300 (KA670). 29 * 30 * The SGEC looks like a mixture of the DEQNA and the TULIP. Fun toy. 31 * 32 * Even though the chip is capable to use virtual addresses (read the 33 * System Page Table directly) this driver doesn't do so, and there 34 * is no benefit in doing it either in NetBSD of today. 35 * 36 * Things that is still to do: 37 * Collect statistics. 38 * Use imperfect filtering when many multicast addresses. 39 */ 40 41 #include <sys/cdefs.h> 42 __KERNEL_RCSID(0, "$NetBSD: sgec.c,v 1.48 2018/06/26 06:48:00 msaitoh Exp $"); 43 44 #include "opt_inet.h" 45 46 #include <sys/param.h> 47 #include <sys/mbuf.h> 48 #include <sys/socket.h> 49 #include <sys/device.h> 50 #include <sys/systm.h> 51 #include <sys/sockio.h> 52 53 #include <net/if.h> 54 #include <net/if_ether.h> 55 #include <net/if_dl.h> 56 #include <net/bpf.h> 57 58 #include <netinet/in.h> 59 #include <netinet/if_inarp.h> 60 61 #include <sys/bus.h> 62 63 #include <dev/ic/sgecreg.h> 64 #include <dev/ic/sgecvar.h> 65 66 static void zeinit(struct ze_softc *); 67 static void zestart(struct ifnet *); 68 static int zeioctl(struct ifnet *, u_long, void *); 69 static int ze_add_rxbuf(struct ze_softc *, int); 70 static void ze_setup(struct ze_softc *); 71 static void zetimeout(struct ifnet *); 72 static bool zereset(struct ze_softc *); 73 74 #define ZE_WCSR(csr, val) \ 75 bus_space_write_4(sc->sc_iot, sc->sc_ioh, csr, val) 76 #define ZE_RCSR(csr) \ 77 bus_space_read_4(sc->sc_iot, sc->sc_ioh, csr) 78 79 /* 80 * Interface exists: make available by filling in network interface 81 * record. System will initialize the interface when it is ready 82 * to accept packets. 83 */ 84 void 85 sgec_attach(struct ze_softc *sc) 86 { 87 struct ifnet *ifp = &sc->sc_if; 88 struct ze_tdes *tp; 89 struct ze_rdes *rp; 90 bus_dma_segment_t seg; 91 int i, rseg, error; 92 93 /* 94 * Allocate DMA safe memory for descriptors and setup memory. 95 */ 96 error = bus_dmamem_alloc(sc->sc_dmat, sizeof(struct ze_cdata), 97 PAGE_SIZE, 0, &seg, 1, &rseg, BUS_DMA_NOWAIT); 98 if (error) { 99 aprint_error(": unable to allocate control data, error = %d\n", 100 error); 101 goto fail_0; 102 } 103 104 error = bus_dmamem_map(sc->sc_dmat, &seg, rseg, sizeof(struct ze_cdata), 105 (void **)&sc->sc_zedata, BUS_DMA_NOWAIT|BUS_DMA_COHERENT); 106 if (error) { 107 aprint_error( 108 ": unable to map control data, error = %d\n", error); 109 goto fail_1; 110 } 111 112 error = bus_dmamap_create(sc->sc_dmat, sizeof(struct ze_cdata), 1, 113 sizeof(struct ze_cdata), 0, BUS_DMA_NOWAIT, &sc->sc_cmap); 114 if (error) { 115 aprint_error( 116 ": unable to create control data DMA map, error = %d\n", 117 error); 118 goto fail_2; 119 } 120 121 error = bus_dmamap_load(sc->sc_dmat, sc->sc_cmap, sc->sc_zedata, 122 sizeof(struct ze_cdata), NULL, BUS_DMA_NOWAIT); 123 if (error) { 124 aprint_error( 125 ": unable to load control data DMA map, error = %d\n", 126 error); 127 goto fail_3; 128 } 129 130 /* 131 * Zero the newly allocated memory. 132 */ 133 memset(sc->sc_zedata, 0, sizeof(struct ze_cdata)); 134 135 /* 136 * Create the transmit descriptor DMA maps. 137 */ 138 for (i = 0; error == 0 && i < TXDESCS; i++) { 139 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 140 TXDESCS - 1, MCLBYTES, 0, BUS_DMA_NOWAIT|BUS_DMA_ALLOCNOW, 141 &sc->sc_xmtmap[i]); 142 } 143 if (error) { 144 aprint_error(": unable to create tx DMA map %d, error = %d\n", 145 i, error); 146 goto fail_4; 147 } 148 149 /* 150 * Create receive buffer DMA maps. 151 */ 152 for (i = 0; error == 0 && i < RXDESCS; i++) { 153 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, 154 MCLBYTES, 0, BUS_DMA_NOWAIT, &sc->sc_rcvmap[i]); 155 } 156 if (error) { 157 aprint_error(": unable to create rx DMA map %d, error = %d\n", 158 i, error); 159 goto fail_5; 160 } 161 162 /* 163 * Pre-allocate the receive buffers. 164 */ 165 for (i = 0; error == 0 && i < RXDESCS; i++) { 166 error = ze_add_rxbuf(sc, i); 167 } 168 169 if (error) { 170 aprint_error( 171 ": unable to allocate or map rx buffer %d, error = %d\n", 172 i, error); 173 goto fail_6; 174 } 175 176 /* For vmstat -i 177 */ 178 evcnt_attach_dynamic(&sc->sc_intrcnt, EVCNT_TYPE_INTR, NULL, 179 device_xname(sc->sc_dev), "intr"); 180 evcnt_attach_dynamic(&sc->sc_rxintrcnt, EVCNT_TYPE_INTR, 181 &sc->sc_intrcnt, device_xname(sc->sc_dev), "rx intr"); 182 evcnt_attach_dynamic(&sc->sc_txintrcnt, EVCNT_TYPE_INTR, 183 &sc->sc_intrcnt, device_xname(sc->sc_dev), "tx intr"); 184 evcnt_attach_dynamic(&sc->sc_txdraincnt, EVCNT_TYPE_INTR, 185 &sc->sc_intrcnt, device_xname(sc->sc_dev), "tx drain"); 186 evcnt_attach_dynamic(&sc->sc_nobufintrcnt, EVCNT_TYPE_INTR, 187 &sc->sc_intrcnt, device_xname(sc->sc_dev), "nobuf intr"); 188 evcnt_attach_dynamic(&sc->sc_nointrcnt, EVCNT_TYPE_INTR, 189 &sc->sc_intrcnt, device_xname(sc->sc_dev), "no intr"); 190 191 /* 192 * Create ring loops of the buffer chains. 193 * This is only done once. 194 */ 195 sc->sc_pzedata = (struct ze_cdata *)sc->sc_cmap->dm_segs[0].ds_addr; 196 197 rp = sc->sc_zedata->zc_recv; 198 rp[RXDESCS].ze_framelen = ZE_FRAMELEN_OW; 199 rp[RXDESCS].ze_rdes1 = ZE_RDES1_CA; 200 rp[RXDESCS].ze_bufaddr = (char *)sc->sc_pzedata->zc_recv; 201 202 tp = sc->sc_zedata->zc_xmit; 203 tp[TXDESCS].ze_tdr = ZE_TDR_OW; 204 tp[TXDESCS].ze_tdes1 = ZE_TDES1_CA; 205 tp[TXDESCS].ze_bufaddr = (char *)sc->sc_pzedata->zc_xmit; 206 207 if (zereset(sc)) 208 return; 209 210 strcpy(ifp->if_xname, device_xname(sc->sc_dev)); 211 ifp->if_softc = sc; 212 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 213 ifp->if_start = zestart; 214 ifp->if_ioctl = zeioctl; 215 ifp->if_watchdog = zetimeout; 216 IFQ_SET_READY(&ifp->if_snd); 217 218 /* 219 * Attach the interface. 220 */ 221 if_attach(ifp); 222 ether_ifattach(ifp, sc->sc_enaddr); 223 224 aprint_normal("\n"); 225 aprint_normal_dev(sc->sc_dev, "hardware address %s\n", 226 ether_sprintf(sc->sc_enaddr)); 227 return; 228 229 /* 230 * Free any resources we've allocated during the failed attach 231 * attempt. Do this in reverse order and fall through. 232 */ 233 fail_6: 234 for (i = 0; i < RXDESCS; i++) { 235 if (sc->sc_rxmbuf[i] != NULL) { 236 bus_dmamap_unload(sc->sc_dmat, sc->sc_rcvmap[i]); 237 m_freem(sc->sc_rxmbuf[i]); 238 } 239 } 240 fail_5: 241 for (i = 0; i < TXDESCS; i++) { 242 if (sc->sc_xmtmap[i] != NULL) 243 bus_dmamap_destroy(sc->sc_dmat, sc->sc_xmtmap[i]); 244 } 245 fail_4: 246 for (i = 0; i < RXDESCS; i++) { 247 if (sc->sc_rcvmap[i] != NULL) 248 bus_dmamap_destroy(sc->sc_dmat, sc->sc_rcvmap[i]); 249 } 250 bus_dmamap_unload(sc->sc_dmat, sc->sc_cmap); 251 fail_3: 252 bus_dmamap_destroy(sc->sc_dmat, sc->sc_cmap); 253 fail_2: 254 bus_dmamem_unmap(sc->sc_dmat, (void *)sc->sc_zedata, 255 sizeof(struct ze_cdata)); 256 fail_1: 257 bus_dmamem_free(sc->sc_dmat, &seg, rseg); 258 fail_0: 259 return; 260 } 261 262 /* 263 * Initialization of interface. 264 */ 265 void 266 zeinit(struct ze_softc *sc) 267 { 268 struct ifnet *ifp = &sc->sc_if; 269 struct ze_cdata *zc = sc->sc_zedata; 270 int i; 271 272 /* 273 * Reset the interface. 274 */ 275 if (zereset(sc)) 276 return; 277 278 sc->sc_nexttx = sc->sc_inq = sc->sc_lastack = sc->sc_txcnt = 0; 279 /* 280 * Release and init transmit descriptors. 281 */ 282 for (i = 0; i < TXDESCS; i++) { 283 if (sc->sc_xmtmap[i]->dm_nsegs > 0) 284 bus_dmamap_unload(sc->sc_dmat, sc->sc_xmtmap[i]); 285 if (sc->sc_txmbuf[i]) { 286 m_freem(sc->sc_txmbuf[i]); 287 sc->sc_txmbuf[i] = 0; 288 } 289 zc->zc_xmit[i].ze_tdr = 0; /* Clear valid bit */ 290 } 291 292 293 /* 294 * Init receive descriptors. 295 */ 296 for (i = 0; i < RXDESCS; i++) 297 zc->zc_recv[i].ze_framelen = ZE_FRAMELEN_OW; 298 sc->sc_nextrx = 0; 299 300 ZE_WCSR(ZE_CSR6, ZE_NICSR6_IE|ZE_NICSR6_BL_8|ZE_NICSR6_ST| 301 ZE_NICSR6_SR|ZE_NICSR6_DC); 302 303 ifp->if_flags |= IFF_RUNNING; 304 ifp->if_flags &= ~IFF_OACTIVE; 305 306 /* 307 * Send a setup frame. 308 * This will start the transmit machinery as well. 309 */ 310 ze_setup(sc); 311 312 } 313 314 /* 315 * Start output on interface. 316 */ 317 void 318 zestart(struct ifnet *ifp) 319 { 320 struct ze_softc *sc = ifp->if_softc; 321 struct ze_cdata *zc = sc->sc_zedata; 322 paddr_t buffer; 323 struct mbuf *m; 324 int nexttx, starttx; 325 int len, i, totlen, error; 326 int old_inq = sc->sc_inq; 327 uint16_t orword, tdr = 0; 328 bus_dmamap_t map; 329 330 while (sc->sc_inq < (TXDESCS - 1)) { 331 332 if (sc->sc_setup) { 333 ze_setup(sc); 334 continue; 335 } 336 nexttx = sc->sc_nexttx; 337 IFQ_POLL(&sc->sc_if.if_snd, m); 338 if (m == 0) 339 goto out; 340 /* 341 * Count number of mbufs in chain. 342 * Always do DMA directly from mbufs, therefore the transmit 343 * ring is really big. 344 */ 345 map = sc->sc_xmtmap[nexttx]; 346 error = bus_dmamap_load_mbuf(sc->sc_dmat, map, m, 347 BUS_DMA_WRITE); 348 if (error) { 349 aprint_error_dev(sc->sc_dev, 350 "zestart: load_mbuf failed: %d", error); 351 goto out; 352 } 353 354 if (map->dm_nsegs >= TXDESCS) 355 panic("zestart"); /* XXX */ 356 357 if ((map->dm_nsegs + sc->sc_inq) >= (TXDESCS - 1)) { 358 bus_dmamap_unload(sc->sc_dmat, map); 359 ifp->if_flags |= IFF_OACTIVE; 360 goto out; 361 } 362 363 /* 364 * m now points to a mbuf chain that can be loaded. 365 * Loop around and set it. 366 */ 367 totlen = 0; 368 orword = ZE_TDES1_FS; 369 starttx = nexttx; 370 for (i = 0; i < map->dm_nsegs; i++) { 371 buffer = map->dm_segs[i].ds_addr; 372 len = map->dm_segs[i].ds_len; 373 374 KASSERT(len > 0); 375 376 totlen += len; 377 /* Word alignment calc */ 378 if (totlen == m->m_pkthdr.len) { 379 sc->sc_txcnt += map->dm_nsegs; 380 if (sc->sc_txcnt >= TXDESCS * 3 / 4) { 381 orword |= ZE_TDES1_IC; 382 sc->sc_txcnt = 0; 383 } 384 orword |= ZE_TDES1_LS; 385 sc->sc_txmbuf[nexttx] = m; 386 } 387 zc->zc_xmit[nexttx].ze_bufsize = len; 388 zc->zc_xmit[nexttx].ze_bufaddr = (char *)buffer; 389 zc->zc_xmit[nexttx].ze_tdes1 = orword; 390 zc->zc_xmit[nexttx].ze_tdr = tdr; 391 392 if (++nexttx == TXDESCS) 393 nexttx = 0; 394 orword = 0; 395 tdr = ZE_TDR_OW; 396 } 397 398 sc->sc_inq += map->dm_nsegs; 399 400 IFQ_DEQUEUE(&ifp->if_snd, m); 401 #ifdef DIAGNOSTIC 402 if (totlen != m->m_pkthdr.len) 403 panic("zestart: len fault"); 404 #endif 405 /* 406 * Turn ownership of the packet over to the device. 407 */ 408 zc->zc_xmit[starttx].ze_tdr = ZE_TDR_OW; 409 410 /* 411 * Kick off the transmit logic, if it is stopped. 412 */ 413 if ((ZE_RCSR(ZE_CSR5) & ZE_NICSR5_TS) != ZE_NICSR5_TS_RUN) 414 ZE_WCSR(ZE_CSR1, -1); 415 sc->sc_nexttx = nexttx; 416 417 bpf_mtap(ifp, m, BPF_D_OUT); 418 } 419 if (sc->sc_inq == (TXDESCS - 1)) 420 ifp->if_flags |= IFF_OACTIVE; 421 422 out: if (old_inq < sc->sc_inq) 423 ifp->if_timer = 5; /* If transmit logic dies */ 424 } 425 426 int 427 sgec_intr(struct ze_softc *sc) 428 { 429 struct ze_cdata *zc = sc->sc_zedata; 430 struct ifnet *ifp = &sc->sc_if; 431 struct mbuf *m; 432 int csr, len; 433 434 csr = ZE_RCSR(ZE_CSR5); 435 if ((csr & ZE_NICSR5_IS) == 0) { /* Wasn't we */ 436 sc->sc_nointrcnt.ev_count++; 437 return 0; 438 } 439 ZE_WCSR(ZE_CSR5, csr); 440 441 if (csr & ZE_NICSR5_RU) 442 sc->sc_nobufintrcnt.ev_count++; 443 444 if (csr & ZE_NICSR5_RI) { 445 sc->sc_rxintrcnt.ev_count++; 446 while ((zc->zc_recv[sc->sc_nextrx].ze_framelen & 447 ZE_FRAMELEN_OW) == 0) { 448 449 m = sc->sc_rxmbuf[sc->sc_nextrx]; 450 len = zc->zc_recv[sc->sc_nextrx].ze_framelen; 451 ze_add_rxbuf(sc, sc->sc_nextrx); 452 if (++sc->sc_nextrx == RXDESCS) 453 sc->sc_nextrx = 0; 454 if (len < ETHER_MIN_LEN) { 455 ifp->if_ierrors++; 456 m_freem(m); 457 } else { 458 m_set_rcvif(m, ifp); 459 m->m_pkthdr.len = m->m_len = 460 len - ETHER_CRC_LEN; 461 if_percpuq_enqueue(ifp->if_percpuq, m); 462 } 463 } 464 } 465 466 if (csr & ZE_NICSR5_TI) 467 sc->sc_txintrcnt.ev_count++; 468 if (sc->sc_lastack != sc->sc_nexttx) { 469 int lastack; 470 for (lastack = sc->sc_lastack; lastack != sc->sc_nexttx; ) { 471 bus_dmamap_t map; 472 int nlastack; 473 474 if ((zc->zc_xmit[lastack].ze_tdr & ZE_TDR_OW) != 0) 475 break; 476 477 if ((zc->zc_xmit[lastack].ze_tdes1 & ZE_TDES1_DT) == 478 ZE_TDES1_DT_SETUP) { 479 if (++lastack == TXDESCS) 480 lastack = 0; 481 sc->sc_inq--; 482 continue; 483 } 484 485 KASSERT(zc->zc_xmit[lastack].ze_tdes1 & ZE_TDES1_FS); 486 map = sc->sc_xmtmap[lastack]; 487 KASSERT(map->dm_nsegs > 0); 488 nlastack = (lastack + map->dm_nsegs - 1) % TXDESCS; 489 if (zc->zc_xmit[nlastack].ze_tdr & ZE_TDR_OW) 490 break; 491 lastack = nlastack; 492 if (sc->sc_txcnt > map->dm_nsegs) 493 sc->sc_txcnt -= map->dm_nsegs; 494 else 495 sc->sc_txcnt = 0; 496 sc->sc_inq -= map->dm_nsegs; 497 KASSERT(zc->zc_xmit[lastack].ze_tdes1 & ZE_TDES1_LS); 498 ifp->if_opackets++; 499 bus_dmamap_unload(sc->sc_dmat, map); 500 KASSERT(sc->sc_txmbuf[lastack]); 501 m_freem(sc->sc_txmbuf[lastack]); 502 sc->sc_txmbuf[lastack] = 0; 503 if (++lastack == TXDESCS) 504 lastack = 0; 505 } 506 if (lastack != sc->sc_lastack) { 507 sc->sc_txdraincnt.ev_count++; 508 sc->sc_lastack = lastack; 509 if (sc->sc_inq == 0) 510 ifp->if_timer = 0; 511 ifp->if_flags &= ~IFF_OACTIVE; 512 zestart(ifp); /* Put in more in queue */ 513 } 514 } 515 return 1; 516 } 517 518 /* 519 * Process an ioctl request. 520 */ 521 int 522 zeioctl(struct ifnet *ifp, u_long cmd, void *data) 523 { 524 struct ze_softc *sc = ifp->if_softc; 525 struct ifaddr *ifa = data; 526 int s = splnet(), error = 0; 527 528 switch (cmd) { 529 530 case SIOCINITIFADDR: 531 ifp->if_flags |= IFF_UP; 532 switch(ifa->ifa_addr->sa_family) { 533 #ifdef INET 534 case AF_INET: 535 zeinit(sc); 536 arp_ifinit(ifp, ifa); 537 break; 538 #endif 539 } 540 break; 541 542 case SIOCSIFFLAGS: 543 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 544 break; 545 /* XXX re-use ether_ioctl() */ 546 switch (ifp->if_flags & (IFF_UP|IFF_RUNNING)) { 547 case IFF_RUNNING: 548 /* 549 * If interface is marked down and it is running, 550 * stop it. (by disabling receive mechanism). 551 */ 552 ZE_WCSR(ZE_CSR6, ZE_RCSR(ZE_CSR6) & 553 ~(ZE_NICSR6_ST|ZE_NICSR6_SR)); 554 ifp->if_flags &= ~IFF_RUNNING; 555 break; 556 case IFF_UP: 557 /* 558 * If interface it marked up and it is stopped, then 559 * start it. 560 */ 561 zeinit(sc); 562 break; 563 case IFF_UP|IFF_RUNNING: 564 /* 565 * Send a new setup packet to match any new changes. 566 * (Like IFF_PROMISC etc) 567 */ 568 ze_setup(sc); 569 break; 570 case 0: 571 break; 572 } 573 break; 574 575 case SIOCADDMULTI: 576 case SIOCDELMULTI: 577 /* 578 * Update our multicast list. 579 */ 580 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) { 581 /* 582 * Multicast list has changed; set the hardware filter 583 * accordingly. 584 */ 585 if (ifp->if_flags & IFF_RUNNING) 586 ze_setup(sc); 587 error = 0; 588 } 589 break; 590 591 default: 592 error = ether_ioctl(ifp, cmd, data); 593 594 } 595 splx(s); 596 return (error); 597 } 598 599 /* 600 * Add a receive buffer to the indicated descriptor. 601 */ 602 int 603 ze_add_rxbuf(struct ze_softc *sc, int i) 604 { 605 struct mbuf *m; 606 struct ze_rdes *rp; 607 int error; 608 609 MGETHDR(m, M_DONTWAIT, MT_DATA); 610 if (m == NULL) 611 return (ENOBUFS); 612 613 MCLAIM(m, &sc->sc_ec.ec_rx_mowner); 614 MCLGET(m, M_DONTWAIT); 615 if ((m->m_flags & M_EXT) == 0) { 616 m_freem(m); 617 return (ENOBUFS); 618 } 619 620 if (sc->sc_rxmbuf[i] != NULL) 621 bus_dmamap_unload(sc->sc_dmat, sc->sc_rcvmap[i]); 622 623 error = bus_dmamap_load(sc->sc_dmat, sc->sc_rcvmap[i], 624 m->m_ext.ext_buf, m->m_ext.ext_size, NULL, 625 BUS_DMA_READ|BUS_DMA_NOWAIT); 626 if (error) 627 panic("%s: can't load rx DMA map %d, error = %d", 628 device_xname(sc->sc_dev), i, error); 629 sc->sc_rxmbuf[i] = m; 630 631 bus_dmamap_sync(sc->sc_dmat, sc->sc_rcvmap[i], 0, 632 sc->sc_rcvmap[i]->dm_mapsize, BUS_DMASYNC_PREREAD); 633 634 /* 635 * We know that the mbuf cluster is page aligned. Also, be sure 636 * that the IP header will be longword aligned. 637 */ 638 m->m_data += 2; 639 rp = &sc->sc_zedata->zc_recv[i]; 640 rp->ze_bufsize = (m->m_ext.ext_size - 2); 641 rp->ze_bufaddr = (char *)sc->sc_rcvmap[i]->dm_segs[0].ds_addr + 2; 642 rp->ze_framelen = ZE_FRAMELEN_OW; 643 644 return (0); 645 } 646 647 /* 648 * Create a setup packet and put in queue for sending. 649 */ 650 void 651 ze_setup(struct ze_softc *sc) 652 { 653 struct ether_multi *enm; 654 struct ether_multistep step; 655 struct ze_cdata *zc = sc->sc_zedata; 656 struct ifnet *ifp = &sc->sc_if; 657 const u_int8_t *enaddr = CLLADDR(ifp->if_sadl); 658 int j, idx, reg; 659 660 if (sc->sc_inq == (TXDESCS - 1)) { 661 sc->sc_setup = 1; 662 return; 663 } 664 sc->sc_setup = 0; 665 /* 666 * Init the setup packet with valid info. 667 */ 668 memset(zc->zc_setup, 0xff, sizeof(zc->zc_setup)); /* Broadcast */ 669 memcpy(zc->zc_setup, enaddr, ETHER_ADDR_LEN); 670 671 /* 672 * Multicast handling. The SGEC can handle up to 16 direct 673 * ethernet addresses. 674 */ 675 j = 16; 676 ifp->if_flags &= ~IFF_ALLMULTI; 677 ETHER_FIRST_MULTI(step, &sc->sc_ec, enm); 678 while (enm != NULL) { 679 if (memcmp(enm->enm_addrlo, enm->enm_addrhi, 6)) { 680 ifp->if_flags |= IFF_ALLMULTI; 681 break; 682 } 683 memcpy(&zc->zc_setup[j], enm->enm_addrlo, ETHER_ADDR_LEN); 684 j += 8; 685 ETHER_NEXT_MULTI(step, enm); 686 if ((enm != NULL)&& (j == 128)) { 687 ifp->if_flags |= IFF_ALLMULTI; 688 break; 689 } 690 } 691 692 /* 693 * ALLMULTI implies PROMISC in this driver. 694 */ 695 if (ifp->if_flags & IFF_ALLMULTI) 696 ifp->if_flags |= IFF_PROMISC; 697 else if (ifp->if_pcount == 0) 698 ifp->if_flags &= ~IFF_PROMISC; 699 700 /* 701 * Fiddle with the receive logic. 702 */ 703 reg = ZE_RCSR(ZE_CSR6); 704 DELAY(10); 705 ZE_WCSR(ZE_CSR6, reg & ~ZE_NICSR6_SR); /* Stop rx */ 706 reg &= ~ZE_NICSR6_AF; 707 if (ifp->if_flags & IFF_PROMISC) 708 reg |= ZE_NICSR6_AF_PROM; 709 else if (ifp->if_flags & IFF_ALLMULTI) 710 reg |= ZE_NICSR6_AF_ALLM; 711 DELAY(10); 712 ZE_WCSR(ZE_CSR6, reg); 713 /* 714 * Only send a setup packet if needed. 715 */ 716 if ((ifp->if_flags & (IFF_PROMISC|IFF_ALLMULTI)) == 0) { 717 idx = sc->sc_nexttx; 718 zc->zc_xmit[idx].ze_tdes1 = ZE_TDES1_DT_SETUP; 719 zc->zc_xmit[idx].ze_bufsize = 128; 720 zc->zc_xmit[idx].ze_bufaddr = sc->sc_pzedata->zc_setup; 721 zc->zc_xmit[idx].ze_tdr = ZE_TDR_OW; 722 723 if ((ZE_RCSR(ZE_CSR5) & ZE_NICSR5_TS) != ZE_NICSR5_TS_RUN) 724 ZE_WCSR(ZE_CSR1, -1); 725 726 sc->sc_inq++; 727 if (++sc->sc_nexttx == TXDESCS) 728 sc->sc_nexttx = 0; 729 } 730 } 731 732 /* 733 * Check for dead transmit logic. 734 */ 735 void 736 zetimeout(struct ifnet *ifp) 737 { 738 struct ze_softc *sc = ifp->if_softc; 739 740 if (sc->sc_inq == 0) 741 return; 742 743 aprint_error_dev(sc->sc_dev, "xmit logic died, resetting...\n"); 744 /* 745 * Do a reset of interface, to get it going again. 746 * Will it work by just restart the transmit logic? 747 */ 748 zeinit(sc); 749 } 750 751 /* 752 * Reset chip: 753 * Set/reset the reset flag. 754 * Write interrupt vector. 755 * Write ring buffer addresses. 756 * Write SBR. 757 */ 758 bool 759 zereset(struct ze_softc *sc) 760 { 761 int reg, i; 762 763 ZE_WCSR(ZE_CSR6, ZE_NICSR6_RE); 764 DELAY(50000); 765 if (ZE_RCSR(ZE_CSR6) & ZE_NICSR5_SF) { 766 aprint_error_dev(sc->sc_dev, "selftest failed\n"); 767 return true; 768 } 769 770 /* 771 * Get the vector that were set at match time, and remember it. 772 * WHICH VECTOR TO USE? Take one unused. XXX 773 * Funny way to set vector described in the programmers manual. 774 */ 775 reg = ZE_NICSR0_IPL14 | sc->sc_intvec | 0x1fff0003; /* SYNC/ASYNC??? */ 776 i = 10; 777 do { 778 if (i-- == 0) { 779 aprint_error_dev(sc->sc_dev, 780 "failing SGEC CSR0 init\n"); 781 return true; 782 } 783 ZE_WCSR(ZE_CSR0, reg); 784 } while (ZE_RCSR(ZE_CSR0) != reg); 785 786 ZE_WCSR(ZE_CSR3, (vaddr_t)sc->sc_pzedata->zc_recv); 787 ZE_WCSR(ZE_CSR4, (vaddr_t)sc->sc_pzedata->zc_xmit); 788 return false; 789 } 790