1 /* $NetBSD: rt2560.c,v 1.3 2006/06/18 15:44:49 rpaulo Exp $ */ 2 /* $OpenBSD: rt2560.c,v 1.15 2006/04/20 20:31:12 miod Exp $ */ 3 /* $FreeBSD: rt2560.c,v 1.3 2006/03/21 21:15:43 damien Exp $*/ 4 5 /*- 6 * Copyright (c) 2005, 2006 7 * Damien Bergamini <damien.bergamini@free.fr> 8 * 9 * Permission to use, copy, modify, and distribute this software for any 10 * purpose with or without fee is hereby granted, provided that the above 11 * copyright notice and this permission notice appear in all copies. 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 14 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 15 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 16 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 17 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 18 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 19 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 20 */ 21 22 /*- 23 * Ralink Technology RT2560 chipset driver 24 * http://www.ralinktech.com/ 25 */ 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: rt2560.c,v 1.3 2006/06/18 15:44:49 rpaulo Exp $"); 28 29 #include "bpfilter.h" 30 31 #include <sys/param.h> 32 #include <sys/sockio.h> 33 #include <sys/mbuf.h> 34 #include <sys/kernel.h> 35 #include <sys/socket.h> 36 #include <sys/systm.h> 37 #include <sys/malloc.h> 38 #include <sys/callout.h> 39 #include <sys/conf.h> 40 #include <sys/device.h> 41 42 #include <machine/bus.h> 43 #include <machine/endian.h> 44 #include <machine/intr.h> 45 46 #if NBPFILTER > 0 47 #include <net/bpf.h> 48 #endif 49 #include <net/if.h> 50 #include <net/if_arp.h> 51 #include <net/if_dl.h> 52 #include <net/if_media.h> 53 #include <net/if_types.h> 54 #include <net/if_ether.h> 55 56 #include <netinet/in.h> 57 #include <netinet/in_systm.h> 58 #include <netinet/in_var.h> 59 #include <netinet/ip.h> 60 61 #include <net80211/ieee80211_var.h> 62 #include <net80211/ieee80211_rssadapt.h> 63 #include <net80211/ieee80211_radiotap.h> 64 65 #include <dev/ic/rt2560reg.h> 66 #include <dev/ic/rt2560var.h> 67 68 #include <dev/pci/pcireg.h> 69 #include <dev/pci/pcivar.h> 70 #include <dev/pci/pcidevs.h> 71 72 #ifdef RAL_DEBUG 73 #define DPRINTF(x) do { if (rt2560_debug > 0) printf x; } while (0) 74 #define DPRINTFN(n, x) do { if (rt2560_debug >= (n)) printf x; } while (0) 75 int rt2560_debug = 0; 76 #else 77 #define DPRINTF(x) 78 #define DPRINTFN(n, x) 79 #endif 80 81 static int rt2560_alloc_tx_ring(struct rt2560_softc *, 82 struct rt2560_tx_ring *, int); 83 static void rt2560_reset_tx_ring(struct rt2560_softc *, 84 struct rt2560_tx_ring *); 85 static void rt2560_free_tx_ring(struct rt2560_softc *, 86 struct rt2560_tx_ring *); 87 static int rt2560_alloc_rx_ring(struct rt2560_softc *, 88 struct rt2560_rx_ring *, int); 89 static void rt2560_reset_rx_ring(struct rt2560_softc *, 90 struct rt2560_rx_ring *); 91 static void rt2560_free_rx_ring(struct rt2560_softc *, 92 struct rt2560_rx_ring *); 93 static struct ieee80211_node * 94 rt2560_node_alloc(struct ieee80211_node_table *); 95 static int rt2560_media_change(struct ifnet *); 96 static void rt2560_next_scan(void *); 97 static void rt2560_iter_func(void *, struct ieee80211_node *); 98 static void rt2560_update_rssadapt(void *); 99 static int rt2560_newstate(struct ieee80211com *, enum ieee80211_state, 100 int); 101 static uint16_t rt2560_eeprom_read(struct rt2560_softc *, uint8_t); 102 static void rt2560_encryption_intr(struct rt2560_softc *); 103 static void rt2560_tx_intr(struct rt2560_softc *); 104 static void rt2560_prio_intr(struct rt2560_softc *); 105 static void rt2560_decryption_intr(struct rt2560_softc *); 106 static void rt2560_rx_intr(struct rt2560_softc *); 107 static void rt2560_beacon_expire(struct rt2560_softc *); 108 static void rt2560_wakeup_expire(struct rt2560_softc *); 109 #if NBPFILTER > 0 110 static uint8_t rt2560_rxrate(struct rt2560_rx_desc *); 111 #endif 112 static int rt2560_ack_rate(struct ieee80211com *, int); 113 static uint16_t rt2560_txtime(int, int, uint32_t); 114 static uint8_t rt2560_plcp_signal(int); 115 static void rt2560_setup_tx_desc(struct rt2560_softc *, 116 struct rt2560_tx_desc *, uint32_t, int, int, int, 117 bus_addr_t); 118 static int rt2560_tx_bcn(struct rt2560_softc *, struct mbuf *, 119 struct ieee80211_node *); 120 static int rt2560_tx_mgt(struct rt2560_softc *, struct mbuf *, 121 struct ieee80211_node *); 122 static struct mbuf *rt2560_get_rts(struct rt2560_softc *, 123 struct ieee80211_frame *, uint16_t); 124 static int rt2560_tx_data(struct rt2560_softc *, struct mbuf *, 125 struct ieee80211_node *); 126 static void rt2560_start(struct ifnet *); 127 static void rt2560_watchdog(struct ifnet *); 128 static int rt2560_reset(struct ifnet *); 129 static int rt2560_ioctl(struct ifnet *, u_long, caddr_t); 130 static void rt2560_bbp_write(struct rt2560_softc *, uint8_t, uint8_t); 131 static uint8_t rt2560_bbp_read(struct rt2560_softc *, uint8_t); 132 static void rt2560_rf_write(struct rt2560_softc *, uint8_t, uint32_t); 133 static void rt2560_set_chan(struct rt2560_softc *, 134 struct ieee80211_channel *); 135 static void rt2560_disable_rf_tune(struct rt2560_softc *); 136 static void rt2560_enable_tsf_sync(struct rt2560_softc *); 137 static void rt2560_update_plcp(struct rt2560_softc *); 138 static void rt2560_update_slot(struct ifnet *); 139 static void rt2560_set_basicrates(struct rt2560_softc *); 140 static void rt2560_update_led(struct rt2560_softc *, int, int); 141 static void rt2560_set_bssid(struct rt2560_softc *, uint8_t *); 142 static void rt2560_set_macaddr(struct rt2560_softc *, uint8_t *); 143 static void rt2560_get_macaddr(struct rt2560_softc *, uint8_t *); 144 static void rt2560_update_promisc(struct rt2560_softc *); 145 static void rt2560_set_txantenna(struct rt2560_softc *, int); 146 static void rt2560_set_rxantenna(struct rt2560_softc *, int); 147 static const char *rt2560_get_rf(int); 148 static void rt2560_read_eeprom(struct rt2560_softc *); 149 static int rt2560_bbp_init(struct rt2560_softc *); 150 static int rt2560_init(struct ifnet *); 151 static void rt2560_stop(void *); 152 153 /* 154 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 155 */ 156 static const struct ieee80211_rateset rt2560_rateset_11a = 157 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } }; 158 159 static const struct ieee80211_rateset rt2560_rateset_11b = 160 { 4, { 2, 4, 11, 22 } }; 161 162 static const struct ieee80211_rateset rt2560_rateset_11g = 163 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 164 165 /* 166 * Default values for MAC registers; values taken from the reference driver. 167 */ 168 static const struct { 169 uint32_t reg; 170 uint32_t val; 171 } rt2560_def_mac[] = { 172 { RT2560_PSCSR0, 0x00020002 }, 173 { RT2560_PSCSR1, 0x00000002 }, 174 { RT2560_PSCSR2, 0x00020002 }, 175 { RT2560_PSCSR3, 0x00000002 }, 176 { RT2560_TIMECSR, 0x00003f21 }, 177 { RT2560_CSR9, 0x00000780 }, 178 { RT2560_CSR11, 0x07041483 }, 179 { RT2560_CNT3, 0x00000000 }, 180 { RT2560_TXCSR1, 0x07614562 }, 181 { RT2560_ARSP_PLCP_0, 0x8c8d8b8a }, 182 { RT2560_ACKPCTCSR, 0x7038140a }, 183 { RT2560_ARTCSR1, 0x1d21252d }, 184 { RT2560_ARTCSR2, 0x1919191d }, 185 { RT2560_RXCSR0, 0xffffffff }, 186 { RT2560_RXCSR3, 0xb3aab3af }, 187 { RT2560_PCICSR, 0x000003b8 }, 188 { RT2560_PWRCSR0, 0x3f3b3100 }, 189 { RT2560_GPIOCSR, 0x0000ff00 }, 190 { RT2560_TESTCSR, 0x000000f0 }, 191 { RT2560_PWRCSR1, 0x000001ff }, 192 { RT2560_MACCSR0, 0x00213223 }, 193 { RT2560_MACCSR1, 0x00235518 }, 194 { RT2560_RLPWCSR, 0x00000040 }, 195 { RT2560_RALINKCSR, 0x9a009a11 }, 196 { RT2560_CSR7, 0xffffffff }, 197 { RT2560_BBPCSR1, 0x82188200 }, 198 { RT2560_TXACKCSR0, 0x00000020 }, 199 { RT2560_SECCSR3, 0x0000e78f } 200 }; 201 202 /* 203 * Default values for BBP registers; values taken from the reference driver. 204 */ 205 static const struct { 206 uint8_t reg; 207 uint8_t val; 208 } rt2560_def_bbp[] = { 209 { 3, 0x02 }, 210 { 4, 0x19 }, 211 { 14, 0x1c }, 212 { 15, 0x30 }, 213 { 16, 0xac }, 214 { 17, 0x48 }, 215 { 18, 0x18 }, 216 { 19, 0xff }, 217 { 20, 0x1e }, 218 { 21, 0x08 }, 219 { 22, 0x08 }, 220 { 23, 0x08 }, 221 { 24, 0x80 }, 222 { 25, 0x50 }, 223 { 26, 0x08 }, 224 { 27, 0x23 }, 225 { 30, 0x10 }, 226 { 31, 0x2b }, 227 { 32, 0xb9 }, 228 { 34, 0x12 }, 229 { 35, 0x50 }, 230 { 39, 0xc4 }, 231 { 40, 0x02 }, 232 { 41, 0x60 }, 233 { 53, 0x10 }, 234 { 54, 0x18 }, 235 { 56, 0x08 }, 236 { 57, 0x10 }, 237 { 58, 0x08 }, 238 { 61, 0x60 }, 239 { 62, 0x10 }, 240 { 75, 0xff } 241 }; 242 243 /* 244 * Default values for RF register R2 indexed by channel numbers; values taken 245 * from the reference driver. 246 */ 247 static const uint32_t rt2560_rf2522_r2[] = { 248 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 249 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 250 }; 251 252 static const uint32_t rt2560_rf2523_r2[] = { 253 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 254 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 255 }; 256 257 static const uint32_t rt2560_rf2524_r2[] = { 258 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 259 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 260 }; 261 262 static const uint32_t rt2560_rf2525_r2[] = { 263 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 264 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 265 }; 266 267 static const uint32_t rt2560_rf2525_hi_r2[] = { 268 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 269 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 270 }; 271 272 static const uint32_t rt2560_rf2525e_r2[] = { 273 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 274 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 275 }; 276 277 static const uint32_t rt2560_rf2526_hi_r2[] = { 278 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 279 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 280 }; 281 282 static const uint32_t rt2560_rf2526_r2[] = { 283 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 284 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 285 }; 286 287 /* 288 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 289 * values taken from the reference driver. 290 */ 291 static const struct { 292 uint8_t chan; 293 uint32_t r1; 294 uint32_t r2; 295 uint32_t r4; 296 } rt2560_rf5222[] = { 297 { 1, 0x08808, 0x0044d, 0x00282 }, 298 { 2, 0x08808, 0x0044e, 0x00282 }, 299 { 3, 0x08808, 0x0044f, 0x00282 }, 300 { 4, 0x08808, 0x00460, 0x00282 }, 301 { 5, 0x08808, 0x00461, 0x00282 }, 302 { 6, 0x08808, 0x00462, 0x00282 }, 303 { 7, 0x08808, 0x00463, 0x00282 }, 304 { 8, 0x08808, 0x00464, 0x00282 }, 305 { 9, 0x08808, 0x00465, 0x00282 }, 306 { 10, 0x08808, 0x00466, 0x00282 }, 307 { 11, 0x08808, 0x00467, 0x00282 }, 308 { 12, 0x08808, 0x00468, 0x00282 }, 309 { 13, 0x08808, 0x00469, 0x00282 }, 310 { 14, 0x08808, 0x0046b, 0x00286 }, 311 312 { 36, 0x08804, 0x06225, 0x00287 }, 313 { 40, 0x08804, 0x06226, 0x00287 }, 314 { 44, 0x08804, 0x06227, 0x00287 }, 315 { 48, 0x08804, 0x06228, 0x00287 }, 316 { 52, 0x08804, 0x06229, 0x00287 }, 317 { 56, 0x08804, 0x0622a, 0x00287 }, 318 { 60, 0x08804, 0x0622b, 0x00287 }, 319 { 64, 0x08804, 0x0622c, 0x00287 }, 320 321 { 100, 0x08804, 0x02200, 0x00283 }, 322 { 104, 0x08804, 0x02201, 0x00283 }, 323 { 108, 0x08804, 0x02202, 0x00283 }, 324 { 112, 0x08804, 0x02203, 0x00283 }, 325 { 116, 0x08804, 0x02204, 0x00283 }, 326 { 120, 0x08804, 0x02205, 0x00283 }, 327 { 124, 0x08804, 0x02206, 0x00283 }, 328 { 128, 0x08804, 0x02207, 0x00283 }, 329 { 132, 0x08804, 0x02208, 0x00283 }, 330 { 136, 0x08804, 0x02209, 0x00283 }, 331 { 140, 0x08804, 0x0220a, 0x00283 }, 332 333 { 149, 0x08808, 0x02429, 0x00281 }, 334 { 153, 0x08808, 0x0242b, 0x00281 }, 335 { 157, 0x08808, 0x0242d, 0x00281 }, 336 { 161, 0x08808, 0x0242f, 0x00281 } 337 }; 338 339 int 340 rt2560_attach(void *xsc, int id) 341 { 342 struct rt2560_softc *sc = xsc; 343 struct ieee80211com *ic = &sc->sc_ic; 344 struct ifnet *ifp = &sc->sc_if; 345 int error, i; 346 347 callout_init(&sc->scan_ch); 348 callout_init(&sc->rssadapt_ch); 349 350 /* retrieve RT2560 rev. no */ 351 sc->asic_rev = RAL_READ(sc, RT2560_CSR0); 352 353 /* retrieve MAC address */ 354 rt2560_get_macaddr(sc, ic->ic_myaddr); 355 356 aprint_normal("%s: 802.11 address %s\n", sc->sc_dev.dv_xname, 357 ether_sprintf(ic->ic_myaddr)); 358 359 /* retrieve RF rev. no and various other things from EEPROM */ 360 rt2560_read_eeprom(sc); 361 362 aprint_normal("%s: MAC/BBP RT2560 (rev 0x%02x), RF %s\n", 363 sc->sc_dev.dv_xname, sc->asic_rev, rt2560_get_rf(sc->rf_rev)); 364 365 /* 366 * Allocate Tx and Rx rings. 367 */ 368 error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT); 369 if (error != 0) { 370 aprint_error("%s: could not allocate Tx ring\n)", 371 sc->sc_dev.dv_xname); 372 goto fail1; 373 } 374 375 error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT); 376 if (error != 0) { 377 aprint_error("%s: could not allocate ATIM ring\n", 378 sc->sc_dev.dv_xname); 379 goto fail2; 380 } 381 382 error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT); 383 if (error != 0) { 384 aprint_error("%s: could not allocate Prio ring\n", 385 sc->sc_dev.dv_xname); 386 goto fail3; 387 } 388 389 error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT); 390 if (error != 0) { 391 aprint_error("%s: could not allocate Beacon ring\n", 392 sc->sc_dev.dv_xname); 393 goto fail4; 394 } 395 396 error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT); 397 if (error != 0) { 398 aprint_error("%s: could not allocate Rx ring\n", 399 sc->sc_dev.dv_xname); 400 goto fail5; 401 } 402 403 ifp->if_softc = sc; 404 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 405 ifp->if_init = rt2560_init; 406 ifp->if_ioctl = rt2560_ioctl; 407 ifp->if_start = rt2560_start; 408 ifp->if_watchdog = rt2560_watchdog; 409 IFQ_SET_READY(&ifp->if_snd); 410 memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ); 411 412 ic->ic_ifp = ifp; 413 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 414 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 415 ic->ic_state = IEEE80211_S_INIT; 416 417 /* set device capabilities */ 418 ic->ic_caps = 419 IEEE80211_C_IBSS | /* IBSS mode supported */ 420 IEEE80211_C_MONITOR | /* monitor mode supported */ 421 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 422 IEEE80211_C_TXPMGT | /* tx power management */ 423 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 424 IEEE80211_C_SHSLOT | /* short slot time supported */ 425 IEEE80211_C_WPA; /* 802.11i */ 426 427 if (sc->rf_rev == RT2560_RF_5222) { 428 /* set supported .11a rates */ 429 ic->ic_sup_rates[IEEE80211_MODE_11A] = rt2560_rateset_11a; 430 431 /* set supported .11a channels */ 432 for (i = 36; i <= 64; i += 4) { 433 ic->ic_channels[i].ic_freq = 434 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 435 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 436 } 437 for (i = 100; i <= 140; i += 4) { 438 ic->ic_channels[i].ic_freq = 439 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 440 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 441 } 442 for (i = 149; i <= 161; i += 4) { 443 ic->ic_channels[i].ic_freq = 444 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 445 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 446 } 447 } 448 449 /* set supported .11b and .11g rates */ 450 ic->ic_sup_rates[IEEE80211_MODE_11B] = rt2560_rateset_11b; 451 ic->ic_sup_rates[IEEE80211_MODE_11G] = rt2560_rateset_11g; 452 453 /* set supported .11b and .11g channels (1 through 14) */ 454 for (i = 1; i <= 14; i++) { 455 ic->ic_channels[i].ic_freq = 456 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 457 ic->ic_channels[i].ic_flags = 458 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 459 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 460 } 461 462 if_attach(ifp); 463 ieee80211_ifattach(ic); 464 ic->ic_node_alloc = rt2560_node_alloc; 465 ic->ic_updateslot = rt2560_update_slot; 466 ic->ic_reset = rt2560_reset; 467 468 /* override state transition machine */ 469 sc->sc_newstate = ic->ic_newstate; 470 ic->ic_newstate = rt2560_newstate; 471 ieee80211_media_init(ic, rt2560_media_change, ieee80211_media_status); 472 473 #if NBPFILTER > 0 474 bpfattach2(ifp, DLT_IEEE802_11_RADIO, 475 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf); 476 #endif 477 478 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 479 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 480 sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2560_RX_RADIOTAP_PRESENT); 481 482 sc->sc_txtap_len = sizeof sc->sc_txtapu; 483 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 484 sc->sc_txtap.wt_ihdr.it_present = htole32(RT2560_TX_RADIOTAP_PRESENT); 485 486 487 sc->dwelltime = 200; 488 489 ieee80211_announce(ic); 490 491 return 0; 492 493 fail5: rt2560_free_tx_ring(sc, &sc->bcnq); 494 fail4: rt2560_free_tx_ring(sc, &sc->prioq); 495 fail3: rt2560_free_tx_ring(sc, &sc->atimq); 496 fail2: rt2560_free_tx_ring(sc, &sc->txq); 497 fail1: 498 return ENXIO; 499 } 500 501 502 int 503 rt2560_detach(void *xsc) 504 { 505 struct rt2560_softc *sc = xsc; 506 struct ifnet *ifp = &sc->sc_if; 507 508 callout_stop(&sc->scan_ch); 509 callout_stop(&sc->rssadapt_ch); 510 511 ieee80211_ifdetach(&sc->sc_ic); /* free all nodes */ 512 if_detach(ifp); 513 514 rt2560_free_tx_ring(sc, &sc->txq); 515 rt2560_free_tx_ring(sc, &sc->atimq); 516 rt2560_free_tx_ring(sc, &sc->prioq); 517 rt2560_free_tx_ring(sc, &sc->bcnq); 518 rt2560_free_rx_ring(sc, &sc->rxq); 519 520 return 0; 521 } 522 523 int 524 rt2560_alloc_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring, 525 int count) 526 { 527 int i, nsegs, error; 528 529 ring->count = count; 530 ring->queued = 0; 531 ring->cur = ring->next = 0; 532 ring->cur_encrypt = ring->next_encrypt = 0; 533 534 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 1, 535 count * RT2560_TX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 536 if (error != 0) { 537 printf("%s: could not create desc DMA map\n", 538 sc->sc_dev.dv_xname); 539 goto fail; 540 } 541 542 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 543 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 544 if (error != 0) { 545 printf("%s: could not allocate DMA memory\n", 546 sc->sc_dev.dv_xname); 547 goto fail; 548 } 549 550 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 551 count * RT2560_TX_DESC_SIZE, (caddr_t *)&ring->desc, 552 BUS_DMA_NOWAIT); 553 if (error != 0) { 554 printf("%s: could not map desc DMA memory\n", 555 sc->sc_dev.dv_xname); 556 goto fail; 557 } 558 559 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 560 count * RT2560_TX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 561 if (error != 0) { 562 printf("%s: could not load desc DMA map\n", 563 sc->sc_dev.dv_xname); 564 goto fail; 565 } 566 567 memset(ring->desc, 0, count * RT2560_TX_DESC_SIZE); 568 ring->physaddr = ring->map->dm_segs->ds_addr; 569 570 ring->data = malloc(count * sizeof (struct rt2560_tx_data), M_DEVBUF, 571 M_NOWAIT); 572 if (ring->data == NULL) { 573 printf("%s: could not allocate soft data\n", 574 sc->sc_dev.dv_xname); 575 error = ENOMEM; 576 goto fail; 577 } 578 579 memset(ring->data, 0, count * sizeof (struct rt2560_tx_data)); 580 for (i = 0; i < count; i++) { 581 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 582 RT2560_MAX_SCATTER, MCLBYTES, 0, BUS_DMA_NOWAIT, 583 &ring->data[i].map); 584 if (error != 0) { 585 printf("%s: could not create DMA map\n", 586 sc->sc_dev.dv_xname); 587 goto fail; 588 } 589 } 590 591 return 0; 592 593 fail: rt2560_free_tx_ring(sc, ring); 594 return error; 595 } 596 597 void 598 rt2560_reset_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 599 { 600 struct rt2560_tx_desc *desc; 601 struct rt2560_tx_data *data; 602 int i; 603 604 for (i = 0; i < ring->count; i++) { 605 desc = &ring->desc[i]; 606 data = &ring->data[i]; 607 608 if (data->m != NULL) { 609 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 610 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 611 bus_dmamap_unload(sc->sc_dmat, data->map); 612 m_freem(data->m); 613 data->m = NULL; 614 } 615 616 if (data->ni != NULL) { 617 ieee80211_free_node(data->ni); 618 data->ni = NULL; 619 } 620 621 desc->flags = 0; 622 } 623 624 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 625 BUS_DMASYNC_PREWRITE); 626 627 ring->queued = 0; 628 ring->cur = ring->next = 0; 629 ring->cur_encrypt = ring->next_encrypt = 0; 630 } 631 632 void 633 rt2560_free_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 634 { 635 struct rt2560_tx_data *data; 636 int i; 637 638 if (ring->desc != NULL) { 639 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 640 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 641 bus_dmamap_unload(sc->sc_dmat, ring->map); 642 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc, 643 ring->count * RT2560_TX_DESC_SIZE); 644 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 645 } 646 647 if (ring->data != NULL) { 648 for (i = 0; i < ring->count; i++) { 649 data = &ring->data[i]; 650 651 if (data->m != NULL) { 652 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 653 data->map->dm_mapsize, 654 BUS_DMASYNC_POSTWRITE); 655 bus_dmamap_unload(sc->sc_dmat, data->map); 656 m_freem(data->m); 657 } 658 659 if (data->ni != NULL) 660 ieee80211_free_node(data->ni); 661 662 663 if (data->map != NULL) 664 bus_dmamap_destroy(sc->sc_dmat, data->map); 665 } 666 free(ring->data, M_DEVBUF); 667 } 668 } 669 670 int 671 rt2560_alloc_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring, 672 int count) 673 { 674 struct rt2560_rx_desc *desc; 675 struct rt2560_rx_data *data; 676 int i, nsegs, error; 677 678 ring->count = count; 679 ring->cur = ring->next = 0; 680 ring->cur_decrypt = 0; 681 682 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 1, 683 count * RT2560_RX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 684 if (error != 0) { 685 printf("%s: could not create desc DMA map\n", 686 sc->sc_dev.dv_xname); 687 goto fail; 688 } 689 690 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 691 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 692 if (error != 0) { 693 printf("%s: could not allocate DMA memory\n", 694 sc->sc_dev.dv_xname); 695 goto fail; 696 } 697 698 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 699 count * RT2560_RX_DESC_SIZE, (caddr_t *)&ring->desc, 700 BUS_DMA_NOWAIT); 701 if (error != 0) { 702 printf("%s: could not map desc DMA memory\n", 703 sc->sc_dev.dv_xname); 704 goto fail; 705 } 706 707 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 708 count * RT2560_RX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 709 if (error != 0) { 710 printf("%s: could not load desc DMA map\n", 711 sc->sc_dev.dv_xname); 712 goto fail; 713 } 714 715 memset(ring->desc, 0, count * RT2560_RX_DESC_SIZE); 716 ring->physaddr = ring->map->dm_segs->ds_addr; 717 718 ring->data = malloc(count * sizeof (struct rt2560_rx_data), M_DEVBUF, 719 M_NOWAIT); 720 if (ring->data == NULL) { 721 printf("%s: could not allocate soft data\n", 722 sc->sc_dev.dv_xname); 723 error = ENOMEM; 724 goto fail; 725 } 726 727 /* 728 * Pre-allocate Rx buffers and populate Rx ring. 729 */ 730 memset(ring->data, 0, count * sizeof (struct rt2560_rx_data)); 731 for (i = 0; i < count; i++) { 732 desc = &sc->rxq.desc[i]; 733 data = &sc->rxq.data[i]; 734 735 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 736 0, BUS_DMA_NOWAIT, &data->map); 737 if (error != 0) { 738 printf("%s: could not create DMA map\n", 739 sc->sc_dev.dv_xname); 740 goto fail; 741 } 742 743 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 744 if (data->m == NULL) { 745 printf("%s: could not allocate rx mbuf\n", 746 sc->sc_dev.dv_xname); 747 error = ENOMEM; 748 goto fail; 749 } 750 751 MCLGET(data->m, M_DONTWAIT); 752 if (!(data->m->m_flags & M_EXT)) { 753 printf("%s: could not allocate rx mbuf cluster\n", 754 sc->sc_dev.dv_xname); 755 error = ENOMEM; 756 goto fail; 757 } 758 759 error = bus_dmamap_load(sc->sc_dmat, data->map, 760 mtod(data->m, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 761 if (error != 0) { 762 printf("%s: could not load rx buf DMA map", 763 sc->sc_dev.dv_xname); 764 goto fail; 765 } 766 767 desc->flags = htole32(RT2560_RX_BUSY); 768 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 769 } 770 771 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 772 BUS_DMASYNC_PREWRITE); 773 774 return 0; 775 776 fail: rt2560_free_rx_ring(sc, ring); 777 return error; 778 } 779 780 void 781 rt2560_reset_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 782 { 783 int i; 784 785 for (i = 0; i < ring->count; i++) { 786 ring->desc[i].flags = htole32(RT2560_RX_BUSY); 787 ring->data[i].drop = 0; 788 } 789 790 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 791 BUS_DMASYNC_PREWRITE); 792 793 ring->cur = ring->next = 0; 794 ring->cur_decrypt = 0; 795 } 796 797 void 798 rt2560_free_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 799 { 800 struct rt2560_rx_data *data; 801 int i; 802 803 if (ring->desc != NULL) { 804 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 805 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 806 bus_dmamap_unload(sc->sc_dmat, ring->map); 807 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc, 808 ring->count * RT2560_RX_DESC_SIZE); 809 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 810 } 811 812 if (ring->data != NULL) { 813 for (i = 0; i < ring->count; i++) { 814 data = &ring->data[i]; 815 816 if (data->m != NULL) { 817 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 818 data->map->dm_mapsize, 819 BUS_DMASYNC_POSTREAD); 820 bus_dmamap_unload(sc->sc_dmat, data->map); 821 m_freem(data->m); 822 } 823 824 if (data->map != NULL) 825 bus_dmamap_destroy(sc->sc_dmat, data->map); 826 } 827 free(ring->data, M_DEVBUF); 828 } 829 } 830 831 struct ieee80211_node * 832 rt2560_node_alloc(struct ieee80211_node_table *nt) 833 { 834 struct rt2560_node *rn; 835 836 rn = malloc(sizeof (struct rt2560_node), M_80211_NODE, 837 M_NOWAIT | M_ZERO); 838 839 return (rn != NULL) ? &rn->ni : NULL; 840 } 841 842 int 843 rt2560_media_change(struct ifnet *ifp) 844 { 845 int error; 846 847 error = ieee80211_media_change(ifp); 848 if (error != ENETRESET) 849 return error; 850 851 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 852 rt2560_init(ifp); 853 854 return 0; 855 } 856 857 /* 858 * This function is called periodically (every 200ms) during scanning to 859 * switch from one channel to another. 860 */ 861 void 862 rt2560_next_scan(void *arg) 863 { 864 struct rt2560_softc *sc = arg; 865 struct ieee80211com *ic = &sc->sc_ic; 866 867 if (ic->ic_state == IEEE80211_S_SCAN) 868 ieee80211_next_scan(ic); 869 } 870 871 /* 872 * This function is called for each neighbor node. 873 */ 874 void 875 rt2560_iter_func(void *arg, struct ieee80211_node *ni) 876 { 877 struct rt2560_node *rn = (struct rt2560_node *)ni; 878 879 ieee80211_rssadapt_updatestats(&rn->rssadapt); 880 } 881 882 /* 883 * This function is called periodically (every 100ms) in RUN state to update 884 * the rate adaptation statistics. 885 */ 886 void 887 rt2560_update_rssadapt(void *arg) 888 { 889 struct rt2560_softc *sc = arg; 890 struct ieee80211com *ic = &sc->sc_ic; 891 892 ieee80211_iterate_nodes(&ic->ic_sta, rt2560_iter_func, arg); 893 894 callout_reset(&sc->rssadapt_ch, hz / 10, rt2560_update_rssadapt, sc); 895 } 896 897 int 898 rt2560_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 899 { 900 struct rt2560_softc *sc = ic->ic_ifp->if_softc; 901 enum ieee80211_state ostate; 902 struct ieee80211_node *ni; 903 struct mbuf *m; 904 int error = 0; 905 906 ostate = ic->ic_state; 907 callout_stop(&sc->scan_ch); 908 909 switch (nstate) { 910 case IEEE80211_S_INIT: 911 callout_stop(&sc->rssadapt_ch); 912 913 if (ostate == IEEE80211_S_RUN) { 914 /* abort TSF synchronization */ 915 RAL_WRITE(sc, RT2560_CSR14, 0); 916 917 /* turn association led off */ 918 rt2560_update_led(sc, 0, 0); 919 } 920 break; 921 922 case IEEE80211_S_SCAN: 923 rt2560_set_chan(sc, ic->ic_curchan); 924 callout_reset(&sc->scan_ch, (sc->dwelltime * hz) / 1000, 925 rt2560_next_scan, sc); 926 break; 927 928 case IEEE80211_S_AUTH: 929 rt2560_set_chan(sc, ic->ic_curchan); 930 break; 931 932 case IEEE80211_S_ASSOC: 933 rt2560_set_chan(sc, ic->ic_curchan); 934 break; 935 936 case IEEE80211_S_RUN: 937 rt2560_set_chan(sc, ic->ic_curchan); 938 939 ni = ic->ic_bss; 940 941 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 942 rt2560_update_plcp(sc); 943 rt2560_set_basicrates(sc); 944 rt2560_set_bssid(sc, ni->ni_bssid); 945 } 946 947 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 948 ic->ic_opmode == IEEE80211_M_IBSS) { 949 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 950 if (m == NULL) { 951 printf("%s: could not allocate beacon\n", 952 sc->sc_dev.dv_xname); 953 error = ENOBUFS; 954 break; 955 } 956 957 ieee80211_ref_node(ni); 958 error = rt2560_tx_bcn(sc, m, ni); 959 if (error != 0) 960 break; 961 } 962 963 /* turn assocation led on */ 964 rt2560_update_led(sc, 1, 0); 965 966 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 967 callout_reset(&sc->rssadapt_ch, hz / 10, 968 rt2560_update_rssadapt, sc); 969 rt2560_enable_tsf_sync(sc); 970 } 971 break; 972 } 973 974 return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg); 975 } 976 977 /* 978 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or 979 * 93C66). 980 */ 981 uint16_t 982 rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr) 983 { 984 uint32_t tmp; 985 uint16_t val; 986 int n; 987 988 /* clock C once before the first command */ 989 RT2560_EEPROM_CTL(sc, 0); 990 991 RT2560_EEPROM_CTL(sc, RT2560_S); 992 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 993 RT2560_EEPROM_CTL(sc, RT2560_S); 994 995 /* write start bit (1) */ 996 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 997 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 998 999 /* write READ opcode (10) */ 1000 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 1001 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 1002 RT2560_EEPROM_CTL(sc, RT2560_S); 1003 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 1004 1005 /* write address (A5-A0 or A7-A0) */ 1006 n = (RAL_READ(sc, RT2560_CSR21) & RT2560_93C46) ? 5 : 7; 1007 for (; n >= 0; n--) { 1008 RT2560_EEPROM_CTL(sc, RT2560_S | 1009 (((addr >> n) & 1) << RT2560_SHIFT_D)); 1010 RT2560_EEPROM_CTL(sc, RT2560_S | 1011 (((addr >> n) & 1) << RT2560_SHIFT_D) | RT2560_C); 1012 } 1013 1014 RT2560_EEPROM_CTL(sc, RT2560_S); 1015 1016 /* read data Q15-Q0 */ 1017 val = 0; 1018 for (n = 15; n >= 0; n--) { 1019 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 1020 tmp = RAL_READ(sc, RT2560_CSR21); 1021 val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n; 1022 RT2560_EEPROM_CTL(sc, RT2560_S); 1023 } 1024 1025 RT2560_EEPROM_CTL(sc, 0); 1026 1027 /* clear Chip Select and clock C */ 1028 RT2560_EEPROM_CTL(sc, RT2560_S); 1029 RT2560_EEPROM_CTL(sc, 0); 1030 RT2560_EEPROM_CTL(sc, RT2560_C); 1031 1032 return val; 1033 } 1034 1035 /* 1036 * Some frames were processed by the hardware cipher engine and are ready for 1037 * transmission. 1038 */ 1039 void 1040 rt2560_encryption_intr(struct rt2560_softc *sc) 1041 { 1042 struct rt2560_tx_desc *desc; 1043 int hw; 1044 1045 /* retrieve last descriptor index processed by cipher engine */ 1046 hw = (RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr) / 1047 RT2560_TX_DESC_SIZE; 1048 1049 for (; sc->txq.next_encrypt != hw;) { 1050 desc = &sc->txq.desc[sc->txq.next_encrypt]; 1051 1052 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1053 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 1054 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 1055 1056 if (le32toh(desc->flags) & 1057 (RT2560_TX_BUSY | RT2560_TX_CIPHER_BUSY)) 1058 break; 1059 1060 /* for TKIP, swap eiv field to fix a bug in ASIC */ 1061 if ((le32toh(desc->flags) & RT2560_TX_CIPHER_MASK) == 1062 RT2560_TX_CIPHER_TKIP) 1063 desc->eiv = bswap32(desc->eiv); 1064 1065 /* mark the frame ready for transmission */ 1066 desc->flags |= htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 1067 1068 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1069 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 1070 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1071 1072 DPRINTFN(15, ("encryption done idx=%u\n", 1073 sc->txq.next_encrypt)); 1074 1075 sc->txq.next_encrypt = 1076 (sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT; 1077 } 1078 1079 /* kick Tx */ 1080 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX); 1081 } 1082 1083 void 1084 rt2560_tx_intr(struct rt2560_softc *sc) 1085 { 1086 struct ieee80211com *ic = &sc->sc_ic; 1087 struct ifnet *ifp = ic->ic_ifp; 1088 struct rt2560_tx_desc *desc; 1089 struct rt2560_tx_data *data; 1090 struct rt2560_node *rn; 1091 1092 for (;;) { 1093 desc = &sc->txq.desc[sc->txq.next]; 1094 data = &sc->txq.data[sc->txq.next]; 1095 1096 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1097 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1098 BUS_DMASYNC_POSTREAD); 1099 1100 if ((le32toh(desc->flags) & RT2560_TX_BUSY) || 1101 (le32toh(desc->flags) & RT2560_TX_CIPHER_BUSY) || 1102 !(le32toh(desc->flags) & RT2560_TX_VALID)) 1103 break; 1104 1105 rn = (struct rt2560_node *)data->ni; 1106 1107 switch (le32toh(desc->flags) & RT2560_TX_RESULT_MASK) { 1108 case RT2560_TX_SUCCESS: 1109 DPRINTFN(10, ("data frame sent successfully\n")); 1110 if (data->id.id_node != NULL) { 1111 ieee80211_rssadapt_raise_rate(ic, 1112 &rn->rssadapt, &data->id); 1113 } 1114 ifp->if_opackets++; 1115 break; 1116 1117 case RT2560_TX_SUCCESS_RETRY: 1118 DPRINTFN(9, ("data frame sent after %u retries\n", 1119 (le32toh(desc->flags) >> 5) & 0x7)); 1120 ifp->if_opackets++; 1121 break; 1122 1123 case RT2560_TX_FAIL_RETRY: 1124 DPRINTFN(9, ("sending data frame failed (too much " 1125 "retries)\n")); 1126 if (data->id.id_node != NULL) { 1127 ieee80211_rssadapt_lower_rate(ic, data->ni, 1128 &rn->rssadapt, &data->id); 1129 } 1130 ifp->if_oerrors++; 1131 break; 1132 1133 case RT2560_TX_FAIL_INVALID: 1134 case RT2560_TX_FAIL_OTHER: 1135 default: 1136 printf("%s: sending data frame failed 0x%08x\n", 1137 sc->sc_dev.dv_xname, le32toh(desc->flags)); 1138 ifp->if_oerrors++; 1139 } 1140 1141 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1142 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1143 bus_dmamap_unload(sc->sc_dmat, data->map); 1144 m_freem(data->m); 1145 data->m = NULL; 1146 ieee80211_free_node(data->ni); 1147 data->ni = NULL; 1148 1149 /* descriptor is no longer valid */ 1150 desc->flags &= ~htole32(RT2560_TX_VALID); 1151 1152 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1153 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1154 BUS_DMASYNC_PREWRITE); 1155 1156 DPRINTFN(15, ("tx done idx=%u\n", sc->txq.next)); 1157 1158 sc->txq.queued--; 1159 sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT; 1160 } 1161 1162 sc->sc_tx_timer = 0; 1163 ifp->if_flags &= ~IFF_OACTIVE; 1164 rt2560_start(ifp); 1165 } 1166 1167 void 1168 rt2560_prio_intr(struct rt2560_softc *sc) 1169 { 1170 struct ieee80211com *ic = &sc->sc_ic; 1171 struct ifnet *ifp = ic->ic_ifp; 1172 struct rt2560_tx_desc *desc; 1173 struct rt2560_tx_data *data; 1174 1175 for (;;) { 1176 desc = &sc->prioq.desc[sc->prioq.next]; 1177 data = &sc->prioq.data[sc->prioq.next]; 1178 1179 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1180 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1181 BUS_DMASYNC_POSTREAD); 1182 1183 if ((le32toh(desc->flags) & RT2560_TX_BUSY) || 1184 !(le32toh(desc->flags) & RT2560_TX_VALID)) 1185 break; 1186 1187 switch (le32toh(desc->flags) & RT2560_TX_RESULT_MASK) { 1188 case RT2560_TX_SUCCESS: 1189 DPRINTFN(10, ("mgt frame sent successfully\n")); 1190 break; 1191 1192 case RT2560_TX_SUCCESS_RETRY: 1193 DPRINTFN(9, ("mgt frame sent after %u retries\n", 1194 (le32toh(desc->flags) >> 5) & 0x7)); 1195 break; 1196 1197 case RT2560_TX_FAIL_RETRY: 1198 DPRINTFN(9, ("sending mgt frame failed (too much " 1199 "retries)\n")); 1200 break; 1201 1202 case RT2560_TX_FAIL_INVALID: 1203 case RT2560_TX_FAIL_OTHER: 1204 default: 1205 printf("%s: sending mgt frame failed 0x%08x\n", 1206 sc->sc_dev.dv_xname, le32toh(desc->flags)); 1207 } 1208 1209 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1210 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1211 bus_dmamap_unload(sc->sc_dmat, data->map); 1212 m_freem(data->m); 1213 data->m = NULL; 1214 ieee80211_free_node(data->ni); 1215 data->ni = NULL; 1216 1217 /* descriptor is no longer valid */ 1218 desc->flags &= ~htole32(RT2560_TX_VALID); 1219 1220 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1221 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1222 BUS_DMASYNC_PREWRITE); 1223 1224 DPRINTFN(15, ("prio done idx=%u\n", sc->prioq.next)); 1225 1226 sc->prioq.queued--; 1227 sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT; 1228 } 1229 1230 sc->sc_tx_timer = 0; 1231 ifp->if_flags &= ~IFF_OACTIVE; 1232 rt2560_start(ifp); 1233 } 1234 1235 /* 1236 * Some frames were processed by the hardware cipher engine and are ready for 1237 * transmission to the IEEE802.11 layer. 1238 */ 1239 void 1240 rt2560_decryption_intr(struct rt2560_softc *sc) 1241 { 1242 struct ieee80211com *ic = &sc->sc_ic; 1243 struct ifnet *ifp = ic->ic_ifp; 1244 struct rt2560_rx_desc *desc; 1245 struct rt2560_rx_data *data; 1246 struct rt2560_node *rn; 1247 struct ieee80211_frame *wh; 1248 struct ieee80211_node *ni; 1249 struct mbuf *mnew, *m; 1250 int hw, error; 1251 1252 /* retrieve last decriptor index processed by cipher engine */ 1253 hw = (RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr) / 1254 RT2560_RX_DESC_SIZE; 1255 1256 for (; sc->rxq.cur_decrypt != hw;) { 1257 desc = &sc->rxq.desc[sc->rxq.cur_decrypt]; 1258 data = &sc->rxq.data[sc->rxq.cur_decrypt]; 1259 1260 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1261 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1262 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 1263 1264 if (le32toh(desc->flags) & 1265 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1266 break; 1267 1268 if (data->drop) { 1269 ifp->if_ierrors++; 1270 goto skip; 1271 } 1272 1273 if ((le32toh(desc->flags) & RT2560_RX_CIPHER_MASK) != 0 && 1274 (le32toh(desc->flags) & RT2560_RX_ICV_ERROR)) { 1275 ifp->if_ierrors++; 1276 goto skip; 1277 } 1278 1279 /* 1280 * Try to allocate a new mbuf for this ring element and load it 1281 * before processing the current mbuf. If the ring element 1282 * cannot be loaded, drop the received packet and reuse the old 1283 * mbuf. In the unlikely case that the old mbuf can't be 1284 * reloaded either, explicitly panic. 1285 */ 1286 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1287 if (mnew == NULL) { 1288 ifp->if_ierrors++; 1289 goto skip; 1290 } 1291 1292 MCLGET(mnew, M_DONTWAIT); 1293 if (!(mnew->m_flags & M_EXT)) { 1294 m_freem(mnew); 1295 ifp->if_ierrors++; 1296 goto skip; 1297 } 1298 1299 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1300 data->map->dm_mapsize, BUS_DMASYNC_POSTREAD); 1301 bus_dmamap_unload(sc->sc_dmat, data->map); 1302 1303 error = bus_dmamap_load(sc->sc_dmat, data->map, 1304 mtod(mnew, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 1305 if (error != 0) { 1306 m_freem(mnew); 1307 1308 /* try to reload the old mbuf */ 1309 error = bus_dmamap_load(sc->sc_dmat, data->map, 1310 mtod(data->m, void *), MCLBYTES, NULL, 1311 BUS_DMA_NOWAIT); 1312 if (error != 0) { 1313 /* very unlikely that it will fail... */ 1314 panic("%s: could not load old rx mbuf", 1315 sc->sc_dev.dv_xname); 1316 } 1317 ifp->if_ierrors++; 1318 goto skip; 1319 } 1320 1321 /* 1322 * New mbuf successfully loaded, update Rx ring and continue 1323 * processing. 1324 */ 1325 m = data->m; 1326 data->m = mnew; 1327 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1328 1329 /* finalize mbuf */ 1330 m->m_pkthdr.rcvif = ifp; 1331 m->m_pkthdr.len = m->m_len = 1332 (le32toh(desc->flags) >> 16) & 0xfff; 1333 1334 #if NBPFILTER > 0 1335 if (sc->sc_drvbpf != NULL) { 1336 struct mbuf mb; 1337 struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtap; 1338 uint32_t tsf_lo, tsf_hi; 1339 1340 /* get timestamp (low and high 32 bits) */ 1341 tsf_hi = RAL_READ(sc, RT2560_CSR17); 1342 tsf_lo = RAL_READ(sc, RT2560_CSR16); 1343 1344 tap->wr_tsf = 1345 htole64(((uint64_t)tsf_hi << 32) | tsf_lo); 1346 tap->wr_flags = 0; 1347 tap->wr_rate = rt2560_rxrate(desc); 1348 tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1349 tap->wr_chan_flags = 1350 htole16(ic->ic_ibss_chan->ic_flags); 1351 tap->wr_antenna = sc->rx_ant; 1352 tap->wr_antsignal = desc->rssi; 1353 1354 M_COPY_PKTHDR(&mb, m); 1355 mb.m_data = (caddr_t)tap; 1356 mb.m_len = sc->sc_txtap_len; 1357 mb.m_next = m; 1358 mb.m_pkthdr.len += mb.m_len; 1359 bpf_mtap(sc->sc_drvbpf, &mb); 1360 } 1361 #endif 1362 1363 wh = mtod(m, struct ieee80211_frame *); 1364 ni = ieee80211_find_rxnode(ic, 1365 (struct ieee80211_frame_min *)wh); 1366 1367 /* send the frame to the 802.11 layer */ 1368 ieee80211_input(ic, m, ni, desc->rssi, 0); 1369 1370 /* give rssi to the rate adatation algorithm */ 1371 rn = (struct rt2560_node *)ni; 1372 ieee80211_rssadapt_input(ic, ni, &rn->rssadapt, desc->rssi); 1373 1374 /* node is no longer needed */ 1375 ieee80211_free_node(ni); 1376 1377 skip: desc->flags = htole32(RT2560_RX_BUSY); 1378 1379 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1380 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1381 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1382 1383 DPRINTFN(15, ("decryption done idx=%u\n", sc->rxq.cur_decrypt)); 1384 1385 sc->rxq.cur_decrypt = 1386 (sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT; 1387 } 1388 1389 /* 1390 * In HostAP mode, ieee80211_input() will enqueue packets in if_snd 1391 * without calling if_start(). 1392 */ 1393 if (!IFQ_IS_EMPTY(&ifp->if_snd) && !(ifp->if_flags & IFF_OACTIVE)) 1394 rt2560_start(ifp); 1395 } 1396 1397 /* 1398 * Some frames were received. Pass them to the hardware cipher engine before 1399 * sending them to the 802.11 layer. 1400 */ 1401 void 1402 rt2560_rx_intr(struct rt2560_softc *sc) 1403 { 1404 struct rt2560_rx_desc *desc; 1405 struct rt2560_rx_data *data; 1406 1407 for (;;) { 1408 desc = &sc->rxq.desc[sc->rxq.cur]; 1409 data = &sc->rxq.data[sc->rxq.cur]; 1410 1411 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1412 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1413 BUS_DMASYNC_POSTREAD); 1414 1415 if (le32toh(desc->flags) & 1416 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1417 break; 1418 1419 data->drop = 0; 1420 1421 if (le32toh(desc->flags) & 1422 (RT2560_RX_PHY_ERROR | RT2560_RX_CRC_ERROR)) { 1423 /* 1424 * This should not happen since we did not request 1425 * to receive those frames when we filled RXCSR0. 1426 */ 1427 DPRINTFN(5, ("PHY or CRC error flags 0x%08x\n", 1428 le32toh(desc->flags))); 1429 data->drop = 1; 1430 } 1431 1432 if (((le32toh(desc->flags) >> 16) & 0xfff) > MCLBYTES) { 1433 DPRINTFN(5, ("bad length\n")); 1434 data->drop = 1; 1435 } 1436 1437 /* mark the frame for decryption */ 1438 desc->flags |= htole32(RT2560_RX_CIPHER_BUSY); 1439 1440 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1441 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1442 BUS_DMASYNC_PREWRITE); 1443 1444 DPRINTFN(15, ("rx done idx=%u\n", sc->rxq.cur)); 1445 1446 sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT; 1447 } 1448 1449 /* kick decrypt */ 1450 RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT); 1451 } 1452 1453 #if 0 1454 void 1455 rt2560_shutdown(void *xsc) 1456 { 1457 struct rt2560_softc *sc = xsc; 1458 1459 rt2560_stop(sc); 1460 } 1461 1462 void 1463 rt2560_suspend(void *xsc) 1464 { 1465 struct rt2560_softc *sc = xsc; 1466 1467 rt2560_stop(sc); 1468 } 1469 1470 void 1471 rt2560_resume(void *xsc) 1472 { 1473 struct rt2560_softc *sc = xsc; 1474 struct ifnet *ifp = sc->sc_ic.ic_ifp; 1475 1476 if (ifp->if_flags & IFF_UP) { 1477 ifp->if_init(ifp->if_softc); 1478 if (ifp->if_flags & IFF_RUNNING) 1479 ifp->if_start(ifp); 1480 } 1481 } 1482 1483 #endif 1484 /* 1485 * This function is called periodically in IBSS mode when a new beacon must be 1486 * sent out. 1487 */ 1488 static void 1489 rt2560_beacon_expire(struct rt2560_softc *sc) 1490 { 1491 struct ieee80211com *ic = &sc->sc_ic; 1492 struct rt2560_tx_data *data; 1493 1494 if (ic->ic_opmode != IEEE80211_M_IBSS && 1495 ic->ic_opmode != IEEE80211_M_HOSTAP) 1496 return; 1497 1498 data = &sc->bcnq.data[sc->bcnq.next]; 1499 1500 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1501 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1502 bus_dmamap_unload(sc->sc_dmat, data->map); 1503 1504 ieee80211_beacon_update(ic, data->ni, &sc->sc_bo, data->m, 1); 1505 1506 #if NBPFILTER > 0 1507 if (ic->ic_rawbpf != NULL) 1508 bpf_mtap(ic->ic_rawbpf, data->m); 1509 #endif 1510 rt2560_tx_bcn(sc, data->m, data->ni); 1511 1512 DPRINTFN(15, ("beacon expired\n")); 1513 1514 sc->bcnq.next = (sc->bcnq.next + 1) % RT2560_BEACON_RING_COUNT; 1515 } 1516 1517 static void 1518 rt2560_wakeup_expire(struct rt2560_softc *sc) 1519 { 1520 DPRINTFN(15, ("wakeup expired\n")); 1521 } 1522 1523 int 1524 rt2560_intr(void *arg) 1525 { 1526 struct rt2560_softc *sc = arg; 1527 struct ifnet *ifp = &sc->sc_if; 1528 uint32_t r; 1529 1530 /* disable interrupts */ 1531 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 1532 1533 /* don't re-enable interrupts if we're shutting down */ 1534 if (!(ifp->if_flags & IFF_RUNNING)) 1535 return 0; 1536 1537 r = RAL_READ(sc, RT2560_CSR7); 1538 RAL_WRITE(sc, RT2560_CSR7, r); 1539 1540 if (r & RT2560_BEACON_EXPIRE) 1541 rt2560_beacon_expire(sc); 1542 1543 if (r & RT2560_WAKEUP_EXPIRE) 1544 rt2560_wakeup_expire(sc); 1545 1546 if (r & RT2560_ENCRYPTION_DONE) 1547 rt2560_encryption_intr(sc); 1548 1549 if (r & RT2560_TX_DONE) 1550 rt2560_tx_intr(sc); 1551 1552 if (r & RT2560_PRIO_DONE) 1553 rt2560_prio_intr(sc); 1554 1555 if (r & RT2560_DECRYPTION_DONE) 1556 rt2560_decryption_intr(sc); 1557 1558 if (r & RT2560_RX_DONE) 1559 rt2560_rx_intr(sc); 1560 1561 /* re-enable interrupts */ 1562 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 1563 1564 return 1; 1565 } 1566 1567 /* quickly determine if a given rate is CCK or OFDM */ 1568 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 1569 1570 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 1571 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 1572 1573 #define RAL_SIFS 10 /* us */ 1574 1575 #define RT2560_RXTX_TURNAROUND 10 /* us */ 1576 1577 /* 1578 * This function is only used by the Rx radiotap code. It returns the rate at 1579 * which a given frame was received. 1580 */ 1581 #if NBPFILTER > 0 1582 static uint8_t 1583 rt2560_rxrate(struct rt2560_rx_desc *desc) 1584 { 1585 if (le32toh(desc->flags) & RT2560_RX_OFDM) { 1586 /* reverse function of rt2560_plcp_signal */ 1587 switch (desc->rate) { 1588 case 0xb: return 12; 1589 case 0xf: return 18; 1590 case 0xa: return 24; 1591 case 0xe: return 36; 1592 case 0x9: return 48; 1593 case 0xd: return 72; 1594 case 0x8: return 96; 1595 case 0xc: return 108; 1596 } 1597 } else { 1598 if (desc->rate == 10) 1599 return 2; 1600 if (desc->rate == 20) 1601 return 4; 1602 if (desc->rate == 55) 1603 return 11; 1604 if (desc->rate == 110) 1605 return 22; 1606 } 1607 return 2; /* should not get there */ 1608 } 1609 #endif 1610 1611 /* 1612 * Return the expected ack rate for a frame transmitted at rate `rate'. 1613 * XXX: this should depend on the destination node basic rate set. 1614 */ 1615 static int 1616 rt2560_ack_rate(struct ieee80211com *ic, int rate) 1617 { 1618 switch (rate) { 1619 /* CCK rates */ 1620 case 2: 1621 return 2; 1622 case 4: 1623 case 11: 1624 case 22: 1625 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1626 1627 /* OFDM rates */ 1628 case 12: 1629 case 18: 1630 return 12; 1631 case 24: 1632 case 36: 1633 return 24; 1634 case 48: 1635 case 72: 1636 case 96: 1637 case 108: 1638 return 48; 1639 } 1640 1641 /* default to 1Mbps */ 1642 return 2; 1643 } 1644 1645 /* 1646 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1647 * The function automatically determines the operating mode depending on the 1648 * given rate. `flags' indicates whether short preamble is in use or not. 1649 */ 1650 static uint16_t 1651 rt2560_txtime(int len, int rate, uint32_t flags) 1652 { 1653 uint16_t txtime; 1654 1655 if (RAL_RATE_IS_OFDM(rate)) { 1656 /* IEEE Std 802.11a-1999, pp. 37 */ 1657 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1658 txtime = 16 + 4 + 4 * txtime + 6; 1659 } else { 1660 /* IEEE Std 802.11b-1999, pp. 28 */ 1661 txtime = (16 * len + rate - 1) / rate; 1662 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1663 txtime += 72 + 24; 1664 else 1665 txtime += 144 + 48; 1666 } 1667 return txtime; 1668 } 1669 1670 static uint8_t 1671 rt2560_plcp_signal(int rate) 1672 { 1673 switch (rate) { 1674 /* CCK rates (returned values are device-dependent) */ 1675 case 2: return 0x0; 1676 case 4: return 0x1; 1677 case 11: return 0x2; 1678 case 22: return 0x3; 1679 1680 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1681 case 12: return 0xb; 1682 case 18: return 0xf; 1683 case 24: return 0xa; 1684 case 36: return 0xe; 1685 case 48: return 0x9; 1686 case 72: return 0xd; 1687 case 96: return 0x8; 1688 case 108: return 0xc; 1689 1690 /* unsupported rates (should not get there) */ 1691 default: return 0xff; 1692 } 1693 } 1694 1695 static void 1696 rt2560_setup_tx_desc(struct rt2560_softc *sc, struct rt2560_tx_desc *desc, 1697 uint32_t flags, int len, int rate, int encrypt, bus_addr_t physaddr) 1698 { 1699 struct ieee80211com *ic = &sc->sc_ic; 1700 uint16_t plcp_length; 1701 int remainder; 1702 1703 desc->flags = htole32(flags); 1704 desc->flags |= htole32(len << 16); 1705 desc->flags |= encrypt ? htole32(RT2560_TX_CIPHER_BUSY) : 1706 htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 1707 1708 desc->physaddr = htole32(physaddr); 1709 desc->wme = htole16( 1710 RT2560_AIFSN(2) | 1711 RT2560_LOGCWMIN(3) | 1712 RT2560_LOGCWMAX(8)); 1713 1714 /* setup PLCP fields */ 1715 desc->plcp_signal = rt2560_plcp_signal(rate); 1716 desc->plcp_service = 4; 1717 1718 len += IEEE80211_CRC_LEN; 1719 if (RAL_RATE_IS_OFDM(rate)) { 1720 desc->flags |= htole32(RT2560_TX_OFDM); 1721 1722 plcp_length = len & 0xfff; 1723 desc->plcp_length_hi = plcp_length >> 6; 1724 desc->plcp_length_lo = plcp_length & 0x3f; 1725 } else { 1726 plcp_length = (16 * len + rate - 1) / rate; 1727 if (rate == 22) { 1728 remainder = (16 * len) % 22; 1729 if (remainder != 0 && remainder < 7) 1730 desc->plcp_service |= RT2560_PLCP_LENGEXT; 1731 } 1732 desc->plcp_length_hi = plcp_length >> 8; 1733 desc->plcp_length_lo = plcp_length & 0xff; 1734 1735 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1736 desc->plcp_signal |= 0x08; 1737 } 1738 } 1739 1740 static int 1741 rt2560_tx_bcn(struct rt2560_softc *sc, struct mbuf *m0, 1742 struct ieee80211_node *ni) 1743 { 1744 struct rt2560_tx_desc *desc; 1745 struct rt2560_tx_data *data; 1746 int rate, error; 1747 1748 desc = &sc->bcnq.desc[sc->bcnq.cur]; 1749 data = &sc->bcnq.data[sc->bcnq.cur]; 1750 1751 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1752 1753 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1754 BUS_DMA_NOWAIT); 1755 if (error != 0) { 1756 printf("%s: could not map mbuf (error %d)\n", 1757 sc->sc_dev.dv_xname, error); 1758 m_freem(m0); 1759 return error; 1760 } 1761 1762 data->m = m0; 1763 data->ni = ni; 1764 1765 rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF | 1766 RT2560_TX_TIMESTAMP, m0->m_pkthdr.len, rate, 0, 1767 data->map->dm_segs->ds_addr); 1768 1769 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1770 BUS_DMASYNC_PREWRITE); 1771 bus_dmamap_sync(sc->sc_dmat, sc->bcnq.map, 1772 sc->bcnq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1773 BUS_DMASYNC_PREWRITE); 1774 1775 return 0; 1776 } 1777 1778 static int 1779 rt2560_tx_mgt(struct rt2560_softc *sc, struct mbuf *m0, 1780 struct ieee80211_node *ni) 1781 { 1782 struct ieee80211com *ic = &sc->sc_ic; 1783 struct rt2560_tx_desc *desc; 1784 struct rt2560_tx_data *data; 1785 struct ieee80211_frame *wh; 1786 uint16_t dur; 1787 uint32_t flags = 0; 1788 int rate, error; 1789 1790 desc = &sc->prioq.desc[sc->prioq.cur]; 1791 data = &sc->prioq.data[sc->prioq.cur]; 1792 1793 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1794 1795 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1796 BUS_DMA_NOWAIT); 1797 if (error != 0) { 1798 printf("%s: could not map mbuf (error %d)\n", 1799 sc->sc_dev.dv_xname, error); 1800 m_freem(m0); 1801 return error; 1802 } 1803 1804 #if NBPFILTER > 0 1805 if (sc->sc_drvbpf != NULL) { 1806 struct mbuf mb; 1807 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1808 1809 tap->wt_flags = 0; 1810 tap->wt_rate = rate; 1811 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1812 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1813 tap->wt_antenna = sc->tx_ant; 1814 1815 M_COPY_PKTHDR(&mb, m0); 1816 mb.m_data = (caddr_t)tap; 1817 mb.m_len = sc->sc_txtap_len; 1818 mb.m_next = m0; 1819 mb.m_pkthdr.len += mb.m_len; 1820 bpf_mtap(sc->sc_drvbpf, &mb); 1821 } 1822 #endif 1823 1824 data->m = m0; 1825 data->ni = ni; 1826 1827 wh = mtod(m0, struct ieee80211_frame *); 1828 1829 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1830 flags |= RT2560_TX_ACK; 1831 1832 dur = rt2560_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + 1833 RAL_SIFS; 1834 *(uint16_t *)wh->i_dur = htole16(dur); 1835 1836 /* tell hardware to add timestamp for probe responses */ 1837 if ((wh->i_fc[0] & 1838 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 1839 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 1840 flags |= RT2560_TX_TIMESTAMP; 1841 } 1842 1843 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 0, 1844 data->map->dm_segs->ds_addr); 1845 1846 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1847 BUS_DMASYNC_PREWRITE); 1848 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1849 sc->prioq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1850 BUS_DMASYNC_PREWRITE); 1851 1852 DPRINTFN(10, ("sending mgt frame len=%u idx=%u rate=%u\n", 1853 m0->m_pkthdr.len, sc->prioq.cur, rate)); 1854 1855 /* kick prio */ 1856 sc->prioq.queued++; 1857 sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT; 1858 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO); 1859 1860 return 0; 1861 } 1862 1863 /* 1864 * Build a RTS control frame. 1865 */ 1866 static struct mbuf * 1867 rt2560_get_rts(struct rt2560_softc *sc, struct ieee80211_frame *wh, 1868 uint16_t dur) 1869 { 1870 struct ieee80211_frame_rts *rts; 1871 struct mbuf *m; 1872 1873 MGETHDR(m, M_DONTWAIT, MT_DATA); 1874 if (m == NULL) { 1875 sc->sc_ic.ic_stats.is_tx_nobuf++; 1876 printf("%s: could not allocate RTS frame\n", 1877 sc->sc_dev.dv_xname); 1878 return NULL; 1879 } 1880 1881 rts = mtod(m, struct ieee80211_frame_rts *); 1882 1883 rts->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_CTL | 1884 IEEE80211_FC0_SUBTYPE_RTS; 1885 rts->i_fc[1] = IEEE80211_FC1_DIR_NODS; 1886 *(uint16_t *)rts->i_dur = htole16(dur); 1887 IEEE80211_ADDR_COPY(rts->i_ra, wh->i_addr1); 1888 IEEE80211_ADDR_COPY(rts->i_ta, wh->i_addr2); 1889 1890 m->m_pkthdr.len = m->m_len = sizeof (struct ieee80211_frame_rts); 1891 1892 return m; 1893 } 1894 1895 static int 1896 rt2560_tx_data(struct rt2560_softc *sc, struct mbuf *m0, 1897 struct ieee80211_node *ni) 1898 { 1899 struct ieee80211com *ic = &sc->sc_ic; 1900 struct rt2560_tx_desc *desc; 1901 struct rt2560_tx_data *data; 1902 struct rt2560_node *rn; 1903 struct ieee80211_rateset *rs; 1904 struct ieee80211_frame *wh; 1905 struct ieee80211_key *k; 1906 struct mbuf *mnew; 1907 uint16_t dur; 1908 uint32_t flags = 0; 1909 int rate, error; 1910 1911 wh = mtod(m0, struct ieee80211_frame *); 1912 1913 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) { 1914 rs = &ic->ic_sup_rates[ic->ic_curmode]; 1915 rate = rs->rs_rates[ic->ic_fixed_rate]; 1916 } else { 1917 rs = &ni->ni_rates; 1918 rn = (struct rt2560_node *)ni; 1919 ni->ni_txrate = ieee80211_rssadapt_choose(&rn->rssadapt, rs, 1920 wh, m0->m_pkthdr.len, -1, NULL, 0); 1921 rate = rs->rs_rates[ni->ni_txrate]; 1922 } 1923 rate &= IEEE80211_RATE_VAL; 1924 1925 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1926 k = ieee80211_crypto_encap(ic, ni, m0); 1927 if (k == NULL) { 1928 m_freem(m0); 1929 return ENOBUFS; 1930 } 1931 1932 /* packet header may have moved, reset our local pointer */ 1933 wh = mtod(m0, struct ieee80211_frame *); 1934 } 1935 1936 /* 1937 * IEEE Std 802.11-1999, pp 82: "A STA shall use an RTS/CTS exchange 1938 * for directed frames only when the length of the MPDU is greater 1939 * than the length threshold indicated by [...]" ic_rtsthreshold. 1940 */ 1941 if (!IEEE80211_IS_MULTICAST(wh->i_addr1) && 1942 m0->m_pkthdr.len > ic->ic_rtsthreshold) { 1943 struct mbuf *m; 1944 int rtsrate, ackrate; 1945 1946 rtsrate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1947 ackrate = rt2560_ack_rate(ic, rate); 1948 1949 dur = rt2560_txtime(m0->m_pkthdr.len + 4, rate, ic->ic_flags) + 1950 rt2560_txtime(RAL_CTS_SIZE, rtsrate, ic->ic_flags) + 1951 rt2560_txtime(RAL_ACK_SIZE, ackrate, ic->ic_flags) + 1952 3 * RAL_SIFS; 1953 1954 m = rt2560_get_rts(sc, wh, dur); 1955 1956 desc = &sc->txq.desc[sc->txq.cur_encrypt]; 1957 data = &sc->txq.data[sc->txq.cur_encrypt]; 1958 1959 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m, 1960 BUS_DMA_NOWAIT); 1961 if (error != 0) { 1962 printf("%s: could not map mbuf (error %d)\n", 1963 sc->sc_dev.dv_xname, error); 1964 m_freem(m); 1965 m_freem(m0); 1966 return error; 1967 } 1968 1969 /* avoid multiple free() of the same node for each fragment */ 1970 ieee80211_ref_node(ni); 1971 1972 data->m = m; 1973 data->ni = ni; 1974 1975 /* RTS frames are not taken into account for rssadapt */ 1976 data->id.id_node = NULL; 1977 1978 rt2560_setup_tx_desc(sc, desc, RT2560_TX_ACK | 1979 RT2560_TX_MORE_FRAG, m->m_pkthdr.len, rtsrate, 1, 1980 data->map->dm_segs->ds_addr); 1981 1982 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1983 data->map->dm_mapsize, BUS_DMASYNC_PREWRITE); 1984 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1985 sc->txq.cur_encrypt * RT2560_TX_DESC_SIZE, 1986 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1987 1988 sc->txq.queued++; 1989 sc->txq.cur_encrypt = 1990 (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT; 1991 1992 /* 1993 * IEEE Std 802.11-1999: when an RTS/CTS exchange is used, the 1994 * asynchronous data frame shall be transmitted after the CTS 1995 * frame and a SIFS period. 1996 */ 1997 flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS; 1998 } 1999 2000 data = &sc->txq.data[sc->txq.cur_encrypt]; 2001 desc = &sc->txq.desc[sc->txq.cur_encrypt]; 2002 2003 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 2004 BUS_DMA_NOWAIT); 2005 if (error != 0 && error != EFBIG) { 2006 printf("%s: could not map mbuf (error %d)\n", 2007 sc->sc_dev.dv_xname, error); 2008 m_freem(m0); 2009 return error; 2010 } 2011 if (error != 0) { 2012 /* too many fragments, linearize */ 2013 2014 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 2015 if (mnew == NULL) { 2016 m_freem(m0); 2017 return ENOMEM; 2018 } 2019 2020 M_COPY_PKTHDR(mnew, m0); 2021 if (m0->m_pkthdr.len > MHLEN) { 2022 MCLGET(mnew, M_DONTWAIT); 2023 if (!(mnew->m_flags & M_EXT)) { 2024 m_freem(m0); 2025 m_freem(mnew); 2026 return ENOMEM; 2027 } 2028 } 2029 2030 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(mnew, caddr_t)); 2031 m_freem(m0); 2032 mnew->m_len = mnew->m_pkthdr.len; 2033 m0 = mnew; 2034 2035 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 2036 BUS_DMA_NOWAIT); 2037 if (error != 0) { 2038 printf("%s: could not map mbuf (error %d)\n", 2039 sc->sc_dev.dv_xname, error); 2040 m_freem(m0); 2041 return error; 2042 } 2043 2044 /* packet header have moved, reset our local pointer */ 2045 wh = mtod(m0, struct ieee80211_frame *); 2046 } 2047 2048 #if NBPFILTER > 0 2049 if (sc->sc_drvbpf != NULL) { 2050 struct mbuf mb; 2051 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 2052 2053 tap->wt_flags = 0; 2054 tap->wt_rate = rate; 2055 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 2056 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 2057 tap->wt_antenna = sc->tx_ant; 2058 2059 M_COPY_PKTHDR(&mb, m0); 2060 mb.m_data = (caddr_t)tap; 2061 mb.m_len = sc->sc_txtap_len; 2062 mb.m_next = m0; 2063 mb.m_pkthdr.len += mb.m_len; 2064 bpf_mtap(sc->sc_drvbpf, &mb); 2065 2066 } 2067 #endif 2068 2069 data->m = m0; 2070 data->ni = ni; 2071 2072 /* remember link conditions for rate adaptation algorithm */ 2073 if (ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) { 2074 data->id.id_len = m0->m_pkthdr.len; 2075 data->id.id_rateidx = ni->ni_txrate; 2076 data->id.id_node = ni; 2077 data->id.id_rssi = ni->ni_rssi; 2078 } else 2079 data->id.id_node = NULL; 2080 2081 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 2082 flags |= RT2560_TX_ACK; 2083 2084 dur = rt2560_txtime(RAL_ACK_SIZE, rt2560_ack_rate(ic, rate), 2085 ic->ic_flags) + RAL_SIFS; 2086 *(uint16_t *)wh->i_dur = htole16(dur); 2087 } 2088 2089 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 1, 2090 data->map->dm_segs->ds_addr); 2091 2092 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 2093 BUS_DMASYNC_PREWRITE); 2094 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 2095 sc->txq.cur_encrypt * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 2096 BUS_DMASYNC_PREWRITE); 2097 2098 DPRINTFN(10, ("sending data frame len=%u idx=%u rate=%u\n", 2099 m0->m_pkthdr.len, sc->txq.cur_encrypt, rate)); 2100 2101 /* kick encrypt */ 2102 sc->txq.queued++; 2103 sc->txq.cur_encrypt = (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT; 2104 RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT); 2105 2106 return 0; 2107 } 2108 2109 static void 2110 rt2560_start(struct ifnet *ifp) 2111 { 2112 struct rt2560_softc *sc = ifp->if_softc; 2113 struct ieee80211com *ic = &sc->sc_ic; 2114 struct mbuf *m0; 2115 struct ieee80211_node *ni; 2116 struct ether_header *eh; 2117 2118 /* 2119 * net80211 may still try to send management frames even if the 2120 * IFF_RUNNING flag is not set... 2121 */ 2122 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 2123 return; 2124 2125 for (;;) { 2126 IF_POLL(&ic->ic_mgtq, m0); 2127 if (m0 != NULL) { 2128 if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT) { 2129 ifp->if_flags |= IFF_OACTIVE; 2130 break; 2131 } 2132 IF_DEQUEUE(&ic->ic_mgtq, m0); 2133 if (m0 == NULL) 2134 break; 2135 2136 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 2137 m0->m_pkthdr.rcvif = NULL; 2138 #if NBPFILTER > 0 2139 if (ic->ic_rawbpf != NULL) 2140 bpf_mtap(ic->ic_rawbpf, m0); 2141 #endif 2142 if (rt2560_tx_mgt(sc, m0, ni) != 0) 2143 break; 2144 2145 } else { 2146 if (ic->ic_state != IEEE80211_S_RUN) 2147 break; 2148 IFQ_DEQUEUE(&ifp->if_snd, m0); 2149 if (m0 == NULL) 2150 break; 2151 if (sc->txq.queued >= RT2560_TX_RING_COUNT - 1) { 2152 ifp->if_flags |= IFF_OACTIVE; 2153 break; 2154 } 2155 2156 if (m0->m_len < sizeof (struct ether_header) && 2157 !(m0 = m_pullup(m0, sizeof (struct ether_header)))) 2158 continue; 2159 2160 eh = mtod(m0, struct ether_header *); 2161 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 2162 if (ni == NULL) { 2163 m_freem(m0); 2164 continue; 2165 } 2166 #if NBPFILTER > 0 2167 if (ifp->if_bpf != NULL) 2168 bpf_mtap(ifp->if_bpf, m0); 2169 #endif 2170 2171 m0 = ieee80211_encap(ic, m0, ni); 2172 if (m0 == NULL) { 2173 ieee80211_free_node(ni); 2174 continue; 2175 } 2176 2177 #if NBPFILTER > 0 2178 if (ic->ic_rawbpf != NULL) 2179 bpf_mtap(ic->ic_rawbpf, m0); 2180 2181 #endif 2182 if (rt2560_tx_data(sc, m0, ni) != 0) { 2183 ieee80211_free_node(ni); 2184 ifp->if_oerrors++; 2185 break; 2186 } 2187 } 2188 2189 sc->sc_tx_timer = 5; 2190 ifp->if_timer = 1; 2191 } 2192 } 2193 2194 static void 2195 rt2560_watchdog(struct ifnet *ifp) 2196 { 2197 struct rt2560_softc *sc = ifp->if_softc; 2198 2199 ifp->if_timer = 0; 2200 2201 if (sc->sc_tx_timer > 0) { 2202 if (--sc->sc_tx_timer == 0) { 2203 printf("%s: device timeout\n", sc->sc_dev.dv_xname); 2204 rt2560_init(ifp); 2205 ifp->if_oerrors++; 2206 return; 2207 } 2208 ifp->if_timer = 1; 2209 } 2210 2211 ieee80211_watchdog(&sc->sc_ic); 2212 } 2213 2214 /* 2215 * This function allows for fast channel switching in monitor mode (used by 2216 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 2217 * generate a new beacon frame. 2218 */ 2219 static int 2220 rt2560_reset(struct ifnet *ifp) 2221 { 2222 struct rt2560_softc *sc = ifp->if_softc; 2223 struct ieee80211com *ic = &sc->sc_ic; 2224 2225 if (ic->ic_opmode != IEEE80211_M_MONITOR) 2226 return ENETRESET; 2227 2228 rt2560_set_chan(sc, ic->ic_curchan); 2229 2230 return 0; 2231 } 2232 2233 int 2234 rt2560_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 2235 { 2236 struct rt2560_softc *sc = ifp->if_softc; 2237 struct ieee80211com *ic = &sc->sc_ic; 2238 struct ifreq *ifr; 2239 int s, error = 0; 2240 2241 s = splnet(); 2242 2243 switch (cmd) { 2244 case SIOCSIFFLAGS: 2245 if (ifp->if_flags & IFF_UP) { 2246 if (ifp->if_flags & IFF_RUNNING) 2247 rt2560_update_promisc(sc); 2248 else 2249 rt2560_init(ifp); 2250 } else { 2251 if (ifp->if_flags & IFF_RUNNING) 2252 rt2560_stop(sc); 2253 } 2254 break; 2255 2256 case SIOCADDMULTI: 2257 case SIOCDELMULTI: 2258 ifr = (struct ifreq *)data; 2259 error = (cmd == SIOCADDMULTI) ? 2260 ether_addmulti(ifr, &sc->sc_ec) : 2261 ether_delmulti(ifr, &sc->sc_ec); 2262 2263 if (error == ENETRESET) 2264 error = 0; 2265 break; 2266 2267 case SIOCS80211CHANNEL: 2268 /* 2269 * This allows for fast channel switching in monitor mode 2270 * (used by kismet). In IBSS mode, we must explicitly reset 2271 * the interface to generate a new beacon frame. 2272 */ 2273 error = ieee80211_ioctl(ic, cmd, data); 2274 if (error == ENETRESET && 2275 ic->ic_opmode == IEEE80211_M_MONITOR) { 2276 rt2560_set_chan(sc, ic->ic_ibss_chan); 2277 error = 0; 2278 } 2279 break; 2280 2281 default: 2282 error = ieee80211_ioctl(ic, cmd, data); 2283 } 2284 2285 if (error == ENETRESET) { 2286 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2287 (IFF_UP | IFF_RUNNING)) 2288 rt2560_init(ifp); 2289 error = 0; 2290 } 2291 2292 splx(s); 2293 2294 return error; 2295 } 2296 2297 static void 2298 rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val) 2299 { 2300 uint32_t tmp; 2301 int ntries; 2302 2303 for (ntries = 0; ntries < 100; ntries++) { 2304 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY)) 2305 break; 2306 DELAY(1); 2307 } 2308 if (ntries == 100) { 2309 printf("%s: could not write to BBP\n", sc->sc_dev.dv_xname); 2310 return; 2311 } 2312 2313 tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val; 2314 RAL_WRITE(sc, RT2560_BBPCSR, tmp); 2315 2316 DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val)); 2317 } 2318 2319 static uint8_t 2320 rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg) 2321 { 2322 uint32_t val; 2323 int ntries; 2324 2325 val = RT2560_BBP_BUSY | reg << 8; 2326 RAL_WRITE(sc, RT2560_BBPCSR, val); 2327 2328 for (ntries = 0; ntries < 100; ntries++) { 2329 val = RAL_READ(sc, RT2560_BBPCSR); 2330 if (!(val & RT2560_BBP_BUSY)) 2331 return val & 0xff; 2332 DELAY(1); 2333 } 2334 2335 printf("%s: could not read from BBP\n", sc->sc_dev.dv_xname); 2336 return 0; 2337 } 2338 2339 static void 2340 rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val) 2341 { 2342 uint32_t tmp; 2343 int ntries; 2344 2345 for (ntries = 0; ntries < 100; ntries++) { 2346 if (!(RAL_READ(sc, RT2560_RFCSR) & RT2560_RF_BUSY)) 2347 break; 2348 DELAY(1); 2349 } 2350 if (ntries == 100) { 2351 printf("%s: could not write to RF\n", sc->sc_dev.dv_xname); 2352 return; 2353 } 2354 2355 tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 | 2356 (reg & 0x3); 2357 RAL_WRITE(sc, RT2560_RFCSR, tmp); 2358 2359 /* remember last written value in sc */ 2360 sc->rf_regs[reg] = val; 2361 2362 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 2363 } 2364 2365 static void 2366 rt2560_set_chan(struct rt2560_softc *sc, struct ieee80211_channel *c) 2367 { 2368 struct ieee80211com *ic = &sc->sc_ic; 2369 uint8_t power, tmp; 2370 u_int i, chan; 2371 2372 chan = ieee80211_chan2ieee(ic, c); 2373 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 2374 return; 2375 2376 if (IEEE80211_IS_CHAN_2GHZ(c)) 2377 power = min(sc->txpow[chan - 1], 31); 2378 else 2379 power = 31; 2380 2381 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 2382 2383 switch (sc->rf_rev) { 2384 case RT2560_RF_2522: 2385 rt2560_rf_write(sc, RT2560_RF1, 0x00814); 2386 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2522_r2[chan - 1]); 2387 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2388 break; 2389 2390 case RT2560_RF_2523: 2391 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2392 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2523_r2[chan - 1]); 2393 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x38044); 2394 rt2560_rf_write(sc, RT2560_RF4, 2395 (chan == 14) ? 0x00280 : 0x00286); 2396 break; 2397 2398 case RT2560_RF_2524: 2399 rt2560_rf_write(sc, RT2560_RF1, 0x0c808); 2400 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2524_r2[chan - 1]); 2401 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2402 rt2560_rf_write(sc, RT2560_RF4, 2403 (chan == 14) ? 0x00280 : 0x00286); 2404 break; 2405 2406 case RT2560_RF_2525: 2407 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2408 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_hi_r2[chan - 1]); 2409 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2410 rt2560_rf_write(sc, RT2560_RF4, 2411 (chan == 14) ? 0x00280 : 0x00286); 2412 2413 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2414 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_r2[chan - 1]); 2415 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2416 rt2560_rf_write(sc, RT2560_RF4, 2417 (chan == 14) ? 0x00280 : 0x00286); 2418 break; 2419 2420 case RT2560_RF_2525E: 2421 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2422 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525e_r2[chan - 1]); 2423 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2424 rt2560_rf_write(sc, RT2560_RF4, 2425 (chan == 14) ? 0x00286 : 0x00282); 2426 break; 2427 2428 case RT2560_RF_2526: 2429 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_hi_r2[chan - 1]); 2430 rt2560_rf_write(sc, RT2560_RF4, 2431 (chan & 1) ? 0x00386 : 0x00381); 2432 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2433 2434 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_r2[chan - 1]); 2435 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2436 rt2560_rf_write(sc, RT2560_RF4, 2437 (chan & 1) ? 0x00386 : 0x00381); 2438 break; 2439 2440 /* dual-band RF */ 2441 case RT2560_RF_5222: 2442 for (i = 0; rt2560_rf5222[i].chan != chan; i++); 2443 2444 rt2560_rf_write(sc, RT2560_RF1, rt2560_rf5222[i].r1); 2445 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf5222[i].r2); 2446 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2447 rt2560_rf_write(sc, RT2560_RF4, rt2560_rf5222[i].r4); 2448 break; 2449 } 2450 2451 if (ic->ic_opmode != IEEE80211_M_MONITOR && 2452 ic->ic_state != IEEE80211_S_SCAN) { 2453 /* set Japan filter bit for channel 14 */ 2454 tmp = rt2560_bbp_read(sc, 70); 2455 2456 tmp &= ~RT2560_JAPAN_FILTER; 2457 if (chan == 14) 2458 tmp |= RT2560_JAPAN_FILTER; 2459 2460 rt2560_bbp_write(sc, 70, tmp); 2461 2462 DELAY(1000); /* RF needs a 1ms delay here */ 2463 rt2560_disable_rf_tune(sc); 2464 2465 /* clear CRC errors */ 2466 RAL_READ(sc, RT2560_CNT0); 2467 } 2468 } 2469 2470 /* 2471 * Disable RF auto-tuning. 2472 */ 2473 static void 2474 rt2560_disable_rf_tune(struct rt2560_softc *sc) 2475 { 2476 uint32_t tmp; 2477 2478 if (sc->rf_rev != RT2560_RF_2523) { 2479 tmp = sc->rf_regs[RT2560_RF1] & ~RT2560_RF1_AUTOTUNE; 2480 rt2560_rf_write(sc, RT2560_RF1, tmp); 2481 } 2482 2483 tmp = sc->rf_regs[RT2560_RF3] & ~RT2560_RF3_AUTOTUNE; 2484 rt2560_rf_write(sc, RT2560_RF3, tmp); 2485 2486 DPRINTFN(2, ("disabling RF autotune\n")); 2487 } 2488 2489 /* 2490 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 2491 * synchronization. 2492 */ 2493 static void 2494 rt2560_enable_tsf_sync(struct rt2560_softc *sc) 2495 { 2496 struct ieee80211com *ic = &sc->sc_ic; 2497 uint16_t logcwmin, preload; 2498 uint32_t tmp; 2499 2500 /* first, disable TSF synchronization */ 2501 RAL_WRITE(sc, RT2560_CSR14, 0); 2502 2503 tmp = 16 * ic->ic_bss->ni_intval; 2504 RAL_WRITE(sc, RT2560_CSR12, tmp); 2505 2506 RAL_WRITE(sc, RT2560_CSR13, 0); 2507 2508 logcwmin = 5; 2509 preload = (ic->ic_opmode == IEEE80211_M_STA) ? 384 : 1024; 2510 tmp = logcwmin << 16 | preload; 2511 RAL_WRITE(sc, RT2560_BCNOCSR, tmp); 2512 2513 /* finally, enable TSF synchronization */ 2514 tmp = RT2560_ENABLE_TSF | RT2560_ENABLE_TBCN; 2515 if (ic->ic_opmode == IEEE80211_M_STA) 2516 tmp |= RT2560_ENABLE_TSF_SYNC(1); 2517 else 2518 tmp |= RT2560_ENABLE_TSF_SYNC(2) | 2519 RT2560_ENABLE_BEACON_GENERATOR; 2520 RAL_WRITE(sc, RT2560_CSR14, tmp); 2521 2522 DPRINTF(("enabling TSF synchronization\n")); 2523 } 2524 2525 static void 2526 rt2560_update_plcp(struct rt2560_softc *sc) 2527 { 2528 struct ieee80211com *ic = &sc->sc_ic; 2529 2530 /* no short preamble for 1Mbps */ 2531 RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400); 2532 2533 if (!(ic->ic_flags & IEEE80211_F_SHPREAMBLE)) { 2534 /* values taken from the reference driver */ 2535 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380401); 2536 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402); 2537 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b8403); 2538 } else { 2539 /* same values as above or'ed 0x8 */ 2540 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380409); 2541 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a); 2542 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b840b); 2543 } 2544 2545 DPRINTF(("updating PLCP for %s preamble\n", 2546 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "short" : "long")); 2547 } 2548 2549 /* 2550 * IEEE 802.11a uses short slot time. Refer to IEEE Std 802.11-1999 pp. 85 to 2551 * know how these values are computed. 2552 */ 2553 static void 2554 rt2560_update_slot(struct ifnet *ifp) 2555 { 2556 struct rt2560_softc *sc = ifp->if_softc; 2557 struct ieee80211com *ic = &sc->sc_ic; 2558 uint8_t slottime; 2559 uint16_t sifs, pifs, difs, eifs; 2560 uint32_t tmp; 2561 2562 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 2563 2564 /* define the MAC slot boundaries */ 2565 sifs = RAL_SIFS - RT2560_RXTX_TURNAROUND; 2566 pifs = sifs + slottime; 2567 difs = sifs + 2 * slottime; 2568 eifs = (ic->ic_curmode == IEEE80211_MODE_11B) ? 364 : 60; 2569 2570 tmp = RAL_READ(sc, RT2560_CSR11); 2571 tmp = (tmp & ~0x1f00) | slottime << 8; 2572 RAL_WRITE(sc, RT2560_CSR11, tmp); 2573 2574 tmp = pifs << 16 | sifs; 2575 RAL_WRITE(sc, RT2560_CSR18, tmp); 2576 2577 tmp = eifs << 16 | difs; 2578 RAL_WRITE(sc, RT2560_CSR19, tmp); 2579 2580 DPRINTF(("setting slottime to %uus\n", slottime)); 2581 } 2582 2583 static void 2584 rt2560_set_basicrates(struct rt2560_softc *sc) 2585 { 2586 struct ieee80211com *ic = &sc->sc_ic; 2587 2588 /* update basic rate set */ 2589 if (ic->ic_curmode == IEEE80211_MODE_11B) { 2590 /* 11b basic rates: 1, 2Mbps */ 2591 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x3); 2592 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 2593 /* 11a basic rates: 6, 12, 24Mbps */ 2594 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x150); 2595 } else { 2596 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 2597 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x15f); 2598 } 2599 } 2600 2601 static void 2602 rt2560_update_led(struct rt2560_softc *sc, int led1, int led2) 2603 { 2604 uint32_t tmp; 2605 2606 /* set ON period to 70ms and OFF period to 30ms */ 2607 tmp = led1 << 16 | led2 << 17 | 70 << 8 | 30; 2608 RAL_WRITE(sc, RT2560_LEDCSR, tmp); 2609 } 2610 2611 static void 2612 rt2560_set_bssid(struct rt2560_softc *sc, uint8_t *bssid) 2613 { 2614 uint32_t tmp; 2615 2616 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24; 2617 RAL_WRITE(sc, RT2560_CSR5, tmp); 2618 2619 tmp = bssid[4] | bssid[5] << 8; 2620 RAL_WRITE(sc, RT2560_CSR6, tmp); 2621 2622 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 2623 } 2624 2625 static void 2626 rt2560_set_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2627 { 2628 uint32_t tmp; 2629 2630 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24; 2631 RAL_WRITE(sc, RT2560_CSR3, tmp); 2632 2633 tmp = addr[4] | addr[5] << 8; 2634 RAL_WRITE(sc, RT2560_CSR4, tmp); 2635 2636 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 2637 } 2638 2639 static void 2640 rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2641 { 2642 uint32_t tmp; 2643 2644 tmp = RAL_READ(sc, RT2560_CSR3); 2645 addr[0] = tmp & 0xff; 2646 addr[1] = (tmp >> 8) & 0xff; 2647 addr[2] = (tmp >> 16) & 0xff; 2648 addr[3] = (tmp >> 24); 2649 2650 tmp = RAL_READ(sc, RT2560_CSR4); 2651 addr[4] = tmp & 0xff; 2652 addr[5] = (tmp >> 8) & 0xff; 2653 } 2654 2655 static void 2656 rt2560_update_promisc(struct rt2560_softc *sc) 2657 { 2658 struct ifnet *ifp = &sc->sc_if; 2659 uint32_t tmp; 2660 2661 tmp = RAL_READ(sc, RT2560_RXCSR0); 2662 2663 tmp &= ~RT2560_DROP_NOT_TO_ME; 2664 if (!(ifp->if_flags & IFF_PROMISC)) 2665 tmp |= RT2560_DROP_NOT_TO_ME; 2666 2667 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2668 2669 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 2670 "entering" : "leaving")); 2671 } 2672 2673 static void 2674 rt2560_set_txantenna(struct rt2560_softc *sc, int antenna) 2675 { 2676 uint32_t tmp; 2677 uint8_t tx; 2678 2679 tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK; 2680 if (antenna == 1) 2681 tx |= RT2560_BBP_ANTA; 2682 else if (antenna == 2) 2683 tx |= RT2560_BBP_ANTB; 2684 else 2685 tx |= RT2560_BBP_DIVERSITY; 2686 2687 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2688 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526 || 2689 sc->rf_rev == RT2560_RF_5222) 2690 tx |= RT2560_BBP_FLIPIQ; 2691 2692 rt2560_bbp_write(sc, RT2560_BBP_TX, tx); 2693 2694 /* update values for CCK and OFDM in BBPCSR1 */ 2695 tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007; 2696 tmp |= (tx & 0x7) << 16 | (tx & 0x7); 2697 RAL_WRITE(sc, RT2560_BBPCSR1, tmp); 2698 } 2699 2700 static void 2701 rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna) 2702 { 2703 uint8_t rx; 2704 2705 rx = rt2560_bbp_read(sc, RT2560_BBP_RX) & ~RT2560_BBP_ANTMASK; 2706 if (antenna == 1) 2707 rx |= RT2560_BBP_ANTA; 2708 else if (antenna == 2) 2709 rx |= RT2560_BBP_ANTB; 2710 else 2711 rx |= RT2560_BBP_DIVERSITY; 2712 2713 /* need to force no I/Q flip for RF 2525e and 2526 */ 2714 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526) 2715 rx &= ~RT2560_BBP_FLIPIQ; 2716 2717 rt2560_bbp_write(sc, RT2560_BBP_RX, rx); 2718 } 2719 2720 static const char * 2721 rt2560_get_rf(int rev) 2722 { 2723 switch (rev) { 2724 case RT2560_RF_2522: return "RT2522"; 2725 case RT2560_RF_2523: return "RT2523"; 2726 case RT2560_RF_2524: return "RT2524"; 2727 case RT2560_RF_2525: return "RT2525"; 2728 case RT2560_RF_2525E: return "RT2525e"; 2729 case RT2560_RF_2526: return "RT2526"; 2730 case RT2560_RF_5222: return "RT5222"; 2731 default: return "unknown"; 2732 } 2733 } 2734 2735 static void 2736 rt2560_read_eeprom(struct rt2560_softc *sc) 2737 { 2738 uint16_t val; 2739 int i; 2740 2741 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0); 2742 sc->rf_rev = (val >> 11) & 0x1f; 2743 sc->hw_radio = (val >> 10) & 0x1; 2744 sc->led_mode = (val >> 6) & 0x7; 2745 sc->rx_ant = (val >> 4) & 0x3; 2746 sc->tx_ant = (val >> 2) & 0x3; 2747 sc->nb_ant = val & 0x3; 2748 2749 /* read default values for BBP registers */ 2750 for (i = 0; i < 16; i++) { 2751 val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i); 2752 sc->bbp_prom[i].reg = val >> 8; 2753 sc->bbp_prom[i].val = val & 0xff; 2754 } 2755 2756 /* read Tx power for all b/g channels */ 2757 for (i = 0; i < 14 / 2; i++) { 2758 val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i); 2759 sc->txpow[i * 2] = val >> 8; 2760 sc->txpow[i * 2 + 1] = val & 0xff; 2761 } 2762 } 2763 2764 static int 2765 rt2560_bbp_init(struct rt2560_softc *sc) 2766 { 2767 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2768 int i, ntries; 2769 2770 /* wait for BBP to be ready */ 2771 for (ntries = 0; ntries < 100; ntries++) { 2772 if (rt2560_bbp_read(sc, RT2560_BBP_VERSION) != 0) 2773 break; 2774 DELAY(1); 2775 } 2776 if (ntries == 100) { 2777 printf("%s: timeout waiting for BBP\n", sc->sc_dev.dv_xname); 2778 return EIO; 2779 } 2780 2781 /* initialize BBP registers to default values */ 2782 for (i = 0; i < N(rt2560_def_bbp); i++) { 2783 rt2560_bbp_write(sc, rt2560_def_bbp[i].reg, 2784 rt2560_def_bbp[i].val); 2785 } 2786 #if 0 2787 /* initialize BBP registers to values stored in EEPROM */ 2788 for (i = 0; i < 16; i++) { 2789 if (sc->bbp_prom[i].reg == 0xff) 2790 continue; 2791 rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2792 } 2793 #endif 2794 2795 return 0; 2796 #undef N 2797 } 2798 2799 static int 2800 rt2560_init(struct ifnet *ifp) 2801 { 2802 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2803 struct rt2560_softc *sc = ifp->if_softc; 2804 struct ieee80211com *ic = &sc->sc_ic; 2805 uint32_t tmp; 2806 int i; 2807 2808 /* for CardBus, power on the socket */ 2809 if (!(sc->sc_flags & RT2560_ENABLED)) { 2810 if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) { 2811 printf("%s: could not enable device\n", 2812 sc->sc_dev.dv_xname); 2813 return EIO; 2814 } 2815 sc->sc_flags |= RT2560_ENABLED; 2816 } 2817 2818 rt2560_stop(sc); 2819 2820 /* setup tx rings */ 2821 tmp = RT2560_PRIO_RING_COUNT << 24 | 2822 RT2560_ATIM_RING_COUNT << 16 | 2823 RT2560_TX_RING_COUNT << 8 | 2824 RT2560_TX_DESC_SIZE; 2825 2826 /* rings _must_ be initialized in this _exact_ order! */ 2827 RAL_WRITE(sc, RT2560_TXCSR2, tmp); 2828 RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr); 2829 RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr); 2830 RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr); 2831 RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr); 2832 2833 /* setup rx ring */ 2834 tmp = RT2560_RX_RING_COUNT << 8 | RT2560_RX_DESC_SIZE; 2835 2836 RAL_WRITE(sc, RT2560_RXCSR1, tmp); 2837 RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr); 2838 2839 /* initialize MAC registers to default values */ 2840 for (i = 0; i < N(rt2560_def_mac); i++) 2841 RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val); 2842 2843 IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl)); 2844 rt2560_set_macaddr(sc, ic->ic_myaddr); 2845 2846 /* set basic rate set (will be updated later) */ 2847 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153); 2848 2849 rt2560_set_txantenna(sc, 1); 2850 rt2560_set_rxantenna(sc, 1); 2851 rt2560_update_slot(ifp); 2852 rt2560_update_plcp(sc); 2853 rt2560_update_led(sc, 0, 0); 2854 2855 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2856 RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY); 2857 2858 if (rt2560_bbp_init(sc) != 0) { 2859 rt2560_stop(sc); 2860 return EIO; 2861 } 2862 2863 /* set default BSS channel */ 2864 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 2865 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 2866 2867 /* kick Rx */ 2868 tmp = RT2560_DROP_PHY_ERROR | RT2560_DROP_CRC_ERROR; 2869 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2870 tmp |= RT2560_DROP_CTL | RT2560_DROP_VERSION_ERROR; 2871 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2872 tmp |= RT2560_DROP_TODS; 2873 if (!(ifp->if_flags & IFF_PROMISC)) 2874 tmp |= RT2560_DROP_NOT_TO_ME; 2875 } 2876 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2877 2878 /* clear old FCS and Rx FIFO errors */ 2879 RAL_READ(sc, RT2560_CNT0); 2880 RAL_READ(sc, RT2560_CNT4); 2881 2882 /* clear any pending interrupts */ 2883 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2884 2885 /* enable interrupts */ 2886 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 2887 2888 ifp->if_flags &= ~IFF_OACTIVE; 2889 ifp->if_flags |= IFF_RUNNING; 2890 2891 if (ic->ic_opmode == IEEE80211_M_MONITOR) 2892 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2893 else 2894 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2895 2896 return 0; 2897 #undef N 2898 } 2899 2900 static void 2901 rt2560_stop(void *priv) 2902 { 2903 struct rt2560_softc *sc = priv; 2904 struct ieee80211com *ic = &sc->sc_ic; 2905 struct ifnet *ifp = ic->ic_ifp; 2906 2907 sc->sc_tx_timer = 0; 2908 ifp->if_timer = 0; 2909 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2910 2911 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); /* free all nodes */ 2912 2913 /* abort Tx */ 2914 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX); 2915 2916 /* disable Rx */ 2917 RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX); 2918 2919 /* reset ASIC (and thus, BBP) */ 2920 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2921 RAL_WRITE(sc, RT2560_CSR1, 0); 2922 2923 /* disable interrupts */ 2924 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 2925 2926 /* clear any pending interrupt */ 2927 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2928 2929 /* reset Tx and Rx rings */ 2930 rt2560_reset_tx_ring(sc, &sc->txq); 2931 rt2560_reset_tx_ring(sc, &sc->atimq); 2932 rt2560_reset_tx_ring(sc, &sc->prioq); 2933 rt2560_reset_tx_ring(sc, &sc->bcnq); 2934 rt2560_reset_rx_ring(sc, &sc->rxq); 2935 2936 } 2937