xref: /netbsd-src/sys/dev/ic/rt2560.c (revision ce2c90c7c172d95d2402a5b3d96d8f8e6d138a21)
1 /*	$NetBSD: rt2560.c,v 1.6 2006/10/12 01:31:01 christos Exp $	*/
2 /*	$OpenBSD: rt2560.c,v 1.15 2006/04/20 20:31:12 miod Exp $  */
3 /*	$FreeBSD: rt2560.c,v 1.3 2006/03/21 21:15:43 damien Exp $*/
4 
5 /*-
6  * Copyright (c) 2005, 2006
7  *	Damien Bergamini <damien.bergamini@free.fr>
8  *
9  * Permission to use, copy, modify, and distribute this software for any
10  * purpose with or without fee is hereby granted, provided that the above
11  * copyright notice and this permission notice appear in all copies.
12  *
13  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
14  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
15  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
16  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
17  * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
18  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
19  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
20  */
21 
22 /*-
23  * Ralink Technology RT2560 chipset driver
24  * http://www.ralinktech.com/
25  */
26 #include <sys/cdefs.h>
27 __KERNEL_RCSID(0, "$NetBSD: rt2560.c,v 1.6 2006/10/12 01:31:01 christos Exp $");
28 
29 #include "bpfilter.h"
30 
31 #include <sys/param.h>
32 #include <sys/sockio.h>
33 #include <sys/mbuf.h>
34 #include <sys/kernel.h>
35 #include <sys/socket.h>
36 #include <sys/systm.h>
37 #include <sys/malloc.h>
38 #include <sys/callout.h>
39 #include <sys/conf.h>
40 #include <sys/device.h>
41 
42 #include <machine/bus.h>
43 #include <machine/endian.h>
44 #include <machine/intr.h>
45 
46 #if NBPFILTER > 0
47 #include <net/bpf.h>
48 #endif
49 #include <net/if.h>
50 #include <net/if_arp.h>
51 #include <net/if_dl.h>
52 #include <net/if_media.h>
53 #include <net/if_types.h>
54 #include <net/if_ether.h>
55 
56 #include <netinet/in.h>
57 #include <netinet/in_systm.h>
58 #include <netinet/in_var.h>
59 #include <netinet/ip.h>
60 
61 #include <net80211/ieee80211_var.h>
62 #include <net80211/ieee80211_rssadapt.h>
63 #include <net80211/ieee80211_radiotap.h>
64 
65 #include <dev/ic/rt2560reg.h>
66 #include <dev/ic/rt2560var.h>
67 
68 #include <dev/pci/pcireg.h>
69 #include <dev/pci/pcivar.h>
70 #include <dev/pci/pcidevs.h>
71 
72 #ifdef RAL_DEBUG
73 #define DPRINTF(x)	do { if (rt2560_debug > 0) printf x; } while (0)
74 #define DPRINTFN(n, x)	do { if (rt2560_debug >= (n)) printf x; } while (0)
75 int rt2560_debug = 0;
76 #else
77 #define DPRINTF(x)
78 #define DPRINTFN(n, x)
79 #endif
80 
81 static int	rt2560_alloc_tx_ring(struct rt2560_softc *,
82 		    struct rt2560_tx_ring *, int);
83 static void	rt2560_reset_tx_ring(struct rt2560_softc *,
84 		    struct rt2560_tx_ring *);
85 static void	rt2560_free_tx_ring(struct rt2560_softc *,
86 		    struct rt2560_tx_ring *);
87 static int	rt2560_alloc_rx_ring(struct rt2560_softc *,
88 		    struct rt2560_rx_ring *, int);
89 static void	rt2560_reset_rx_ring(struct rt2560_softc *,
90 		    struct rt2560_rx_ring *);
91 static void	rt2560_free_rx_ring(struct rt2560_softc *,
92 		    struct rt2560_rx_ring *);
93 static struct ieee80211_node *
94 		rt2560_node_alloc(struct ieee80211_node_table *);
95 static int	rt2560_media_change(struct ifnet *);
96 static void	rt2560_next_scan(void *);
97 static void	rt2560_iter_func(void *, struct ieee80211_node *);
98 static void	rt2560_update_rssadapt(void *);
99 static int	rt2560_newstate(struct ieee80211com *, enum ieee80211_state,
100     		    int);
101 static uint16_t	rt2560_eeprom_read(struct rt2560_softc *, uint8_t);
102 static void	rt2560_encryption_intr(struct rt2560_softc *);
103 static void	rt2560_tx_intr(struct rt2560_softc *);
104 static void	rt2560_prio_intr(struct rt2560_softc *);
105 static void	rt2560_decryption_intr(struct rt2560_softc *);
106 static void	rt2560_rx_intr(struct rt2560_softc *);
107 static void	rt2560_beacon_expire(struct rt2560_softc *);
108 static void	rt2560_wakeup_expire(struct rt2560_softc *);
109 #if NBPFILTER > 0
110 static uint8_t	rt2560_rxrate(struct rt2560_rx_desc *);
111 #endif
112 static int	rt2560_ack_rate(struct ieee80211com *, int);
113 static uint16_t	rt2560_txtime(int, int, uint32_t);
114 static uint8_t	rt2560_plcp_signal(int);
115 static void	rt2560_setup_tx_desc(struct rt2560_softc *,
116 		    struct rt2560_tx_desc *, uint32_t, int, int, int,
117 		    bus_addr_t);
118 static int	rt2560_tx_bcn(struct rt2560_softc *, struct mbuf *,
119 		    struct ieee80211_node *);
120 static int	rt2560_tx_mgt(struct rt2560_softc *, struct mbuf *,
121 		    struct ieee80211_node *);
122 static struct mbuf *rt2560_get_rts(struct rt2560_softc *,
123 		    struct ieee80211_frame *, uint16_t);
124 static int	rt2560_tx_data(struct rt2560_softc *, struct mbuf *,
125 		    struct ieee80211_node *);
126 static void	rt2560_start(struct ifnet *);
127 static void	rt2560_watchdog(struct ifnet *);
128 static int	rt2560_reset(struct ifnet *);
129 static int	rt2560_ioctl(struct ifnet *, u_long, caddr_t);
130 static void	rt2560_bbp_write(struct rt2560_softc *, uint8_t, uint8_t);
131 static uint8_t	rt2560_bbp_read(struct rt2560_softc *, uint8_t);
132 static void	rt2560_rf_write(struct rt2560_softc *, uint8_t, uint32_t);
133 static void	rt2560_set_chan(struct rt2560_softc *,
134 		    struct ieee80211_channel *);
135 static void	rt2560_disable_rf_tune(struct rt2560_softc *);
136 static void	rt2560_enable_tsf_sync(struct rt2560_softc *);
137 static void	rt2560_update_plcp(struct rt2560_softc *);
138 static void	rt2560_update_slot(struct ifnet *);
139 static void	rt2560_set_basicrates(struct rt2560_softc *);
140 static void	rt2560_update_led(struct rt2560_softc *, int, int);
141 static void	rt2560_set_bssid(struct rt2560_softc *, uint8_t *);
142 static void	rt2560_set_macaddr(struct rt2560_softc *, uint8_t *);
143 static void	rt2560_get_macaddr(struct rt2560_softc *, uint8_t *);
144 static void	rt2560_update_promisc(struct rt2560_softc *);
145 static void	rt2560_set_txantenna(struct rt2560_softc *, int);
146 static void	rt2560_set_rxantenna(struct rt2560_softc *, int);
147 static const char *rt2560_get_rf(int);
148 static void	rt2560_read_eeprom(struct rt2560_softc *);
149 static int	rt2560_bbp_init(struct rt2560_softc *);
150 static int	rt2560_init(struct ifnet *);
151 static void	rt2560_stop(void *);
152 static void	rt2560_powerhook(int, void *);
153 
154 /*
155  * Supported rates for 802.11a/b/g modes (in 500Kbps unit).
156  */
157 static const struct ieee80211_rateset rt2560_rateset_11a =
158 	{ 8, { 12, 18, 24, 36, 48, 72, 96, 108 } };
159 
160 static const struct ieee80211_rateset rt2560_rateset_11b =
161 	{ 4, { 2, 4, 11, 22 } };
162 
163 static const struct ieee80211_rateset rt2560_rateset_11g =
164 	{ 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } };
165 
166 /*
167  * Default values for MAC registers; values taken from the reference driver.
168  */
169 static const struct {
170 	uint32_t	reg;
171 	uint32_t	val;
172 } rt2560_def_mac[] = {
173 	{ RT2560_PSCSR0,      0x00020002 },
174 	{ RT2560_PSCSR1,      0x00000002 },
175 	{ RT2560_PSCSR2,      0x00020002 },
176 	{ RT2560_PSCSR3,      0x00000002 },
177 	{ RT2560_TIMECSR,     0x00003f21 },
178 	{ RT2560_CSR9,        0x00000780 },
179 	{ RT2560_CSR11,       0x07041483 },
180 	{ RT2560_CNT3,        0x00000000 },
181 	{ RT2560_TXCSR1,      0x07614562 },
182 	{ RT2560_ARSP_PLCP_0, 0x8c8d8b8a },
183 	{ RT2560_ACKPCTCSR,   0x7038140a },
184 	{ RT2560_ARTCSR1,     0x1d21252d },
185 	{ RT2560_ARTCSR2,     0x1919191d },
186 	{ RT2560_RXCSR0,      0xffffffff },
187 	{ RT2560_RXCSR3,      0xb3aab3af },
188 	{ RT2560_PCICSR,      0x000003b8 },
189 	{ RT2560_PWRCSR0,     0x3f3b3100 },
190 	{ RT2560_GPIOCSR,     0x0000ff00 },
191 	{ RT2560_TESTCSR,     0x000000f0 },
192 	{ RT2560_PWRCSR1,     0x000001ff },
193 	{ RT2560_MACCSR0,     0x00213223 },
194 	{ RT2560_MACCSR1,     0x00235518 },
195 	{ RT2560_RLPWCSR,     0x00000040 },
196 	{ RT2560_RALINKCSR,   0x9a009a11 },
197 	{ RT2560_CSR7,        0xffffffff },
198 	{ RT2560_BBPCSR1,     0x82188200 },
199 	{ RT2560_TXACKCSR0,   0x00000020 },
200 	{ RT2560_SECCSR3,     0x0000e78f }
201 };
202 
203 /*
204  * Default values for BBP registers; values taken from the reference driver.
205  */
206 static const struct {
207 	uint8_t	reg;
208 	uint8_t	val;
209 } rt2560_def_bbp[] = {
210 	{  3, 0x02 },
211 	{  4, 0x19 },
212 	{ 14, 0x1c },
213 	{ 15, 0x30 },
214 	{ 16, 0xac },
215 	{ 17, 0x48 },
216 	{ 18, 0x18 },
217 	{ 19, 0xff },
218 	{ 20, 0x1e },
219 	{ 21, 0x08 },
220 	{ 22, 0x08 },
221 	{ 23, 0x08 },
222 	{ 24, 0x80 },
223 	{ 25, 0x50 },
224 	{ 26, 0x08 },
225 	{ 27, 0x23 },
226 	{ 30, 0x10 },
227 	{ 31, 0x2b },
228 	{ 32, 0xb9 },
229 	{ 34, 0x12 },
230 	{ 35, 0x50 },
231 	{ 39, 0xc4 },
232 	{ 40, 0x02 },
233 	{ 41, 0x60 },
234 	{ 53, 0x10 },
235 	{ 54, 0x18 },
236 	{ 56, 0x08 },
237 	{ 57, 0x10 },
238 	{ 58, 0x08 },
239 	{ 61, 0x60 },
240 	{ 62, 0x10 },
241 	{ 75, 0xff }
242 };
243 
244 /*
245  * Default values for RF register R2 indexed by channel numbers; values taken
246  * from the reference driver.
247  */
248 static const uint32_t rt2560_rf2522_r2[] = {
249 	0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814,
250 	0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e
251 };
252 
253 static const uint32_t rt2560_rf2523_r2[] = {
254 	0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
255 	0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
256 };
257 
258 static const uint32_t rt2560_rf2524_r2[] = {
259 	0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d,
260 	0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346
261 };
262 
263 static const uint32_t rt2560_rf2525_r2[] = {
264 	0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d,
265 	0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346
266 };
267 
268 static const uint32_t rt2560_rf2525_hi_r2[] = {
269 	0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345,
270 	0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e
271 };
272 
273 static const uint32_t rt2560_rf2525e_r2[] = {
274 	0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463,
275 	0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b
276 };
277 
278 static const uint32_t rt2560_rf2526_hi_r2[] = {
279 	0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d,
280 	0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241
281 };
282 
283 static const uint32_t rt2560_rf2526_r2[] = {
284 	0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229,
285 	0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d
286 };
287 
288 /*
289  * For dual-band RF, RF registers R1 and R4 also depend on channel number;
290  * values taken from the reference driver.
291  */
292 static const struct {
293 	uint8_t		chan;
294 	uint32_t	r1;
295 	uint32_t	r2;
296 	uint32_t	r4;
297 } rt2560_rf5222[] = {
298 	{   1, 0x08808, 0x0044d, 0x00282 },
299 	{   2, 0x08808, 0x0044e, 0x00282 },
300 	{   3, 0x08808, 0x0044f, 0x00282 },
301 	{   4, 0x08808, 0x00460, 0x00282 },
302 	{   5, 0x08808, 0x00461, 0x00282 },
303 	{   6, 0x08808, 0x00462, 0x00282 },
304 	{   7, 0x08808, 0x00463, 0x00282 },
305 	{   8, 0x08808, 0x00464, 0x00282 },
306 	{   9, 0x08808, 0x00465, 0x00282 },
307 	{  10, 0x08808, 0x00466, 0x00282 },
308 	{  11, 0x08808, 0x00467, 0x00282 },
309 	{  12, 0x08808, 0x00468, 0x00282 },
310 	{  13, 0x08808, 0x00469, 0x00282 },
311 	{  14, 0x08808, 0x0046b, 0x00286 },
312 
313 	{  36, 0x08804, 0x06225, 0x00287 },
314 	{  40, 0x08804, 0x06226, 0x00287 },
315 	{  44, 0x08804, 0x06227, 0x00287 },
316 	{  48, 0x08804, 0x06228, 0x00287 },
317 	{  52, 0x08804, 0x06229, 0x00287 },
318 	{  56, 0x08804, 0x0622a, 0x00287 },
319 	{  60, 0x08804, 0x0622b, 0x00287 },
320 	{  64, 0x08804, 0x0622c, 0x00287 },
321 
322 	{ 100, 0x08804, 0x02200, 0x00283 },
323 	{ 104, 0x08804, 0x02201, 0x00283 },
324 	{ 108, 0x08804, 0x02202, 0x00283 },
325 	{ 112, 0x08804, 0x02203, 0x00283 },
326 	{ 116, 0x08804, 0x02204, 0x00283 },
327 	{ 120, 0x08804, 0x02205, 0x00283 },
328 	{ 124, 0x08804, 0x02206, 0x00283 },
329 	{ 128, 0x08804, 0x02207, 0x00283 },
330 	{ 132, 0x08804, 0x02208, 0x00283 },
331 	{ 136, 0x08804, 0x02209, 0x00283 },
332 	{ 140, 0x08804, 0x0220a, 0x00283 },
333 
334 	{ 149, 0x08808, 0x02429, 0x00281 },
335 	{ 153, 0x08808, 0x0242b, 0x00281 },
336 	{ 157, 0x08808, 0x0242d, 0x00281 },
337 	{ 161, 0x08808, 0x0242f, 0x00281 }
338 };
339 
340 int
341 rt2560_attach(void *xsc, int id __unused)
342 {
343 	struct rt2560_softc *sc = xsc;
344 	struct ieee80211com *ic = &sc->sc_ic;
345 	struct ifnet *ifp = &sc->sc_if;
346 	int error, i;
347 
348 	callout_init(&sc->scan_ch);
349 	callout_init(&sc->rssadapt_ch);
350 
351 	/* retrieve RT2560 rev. no */
352 	sc->asic_rev = RAL_READ(sc, RT2560_CSR0);
353 
354 	/* retrieve MAC address */
355 	rt2560_get_macaddr(sc, ic->ic_myaddr);
356 
357 	aprint_normal("%s: 802.11 address %s\n", sc->sc_dev.dv_xname,
358 	    ether_sprintf(ic->ic_myaddr));
359 
360 	/* retrieve RF rev. no and various other things from EEPROM */
361 	rt2560_read_eeprom(sc);
362 
363 	aprint_normal("%s: MAC/BBP RT2560 (rev 0x%02x), RF %s\n",
364 	    sc->sc_dev.dv_xname, sc->asic_rev, rt2560_get_rf(sc->rf_rev));
365 
366 	/*
367 	 * Allocate Tx and Rx rings.
368 	 */
369 	error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT);
370 	if (error != 0) {
371 		aprint_error("%s: could not allocate Tx ring\n)",
372 		    sc->sc_dev.dv_xname);
373 		goto fail1;
374 	}
375 
376 	error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT);
377 	if (error != 0) {
378 		aprint_error("%s: could not allocate ATIM ring\n",
379 		    sc->sc_dev.dv_xname);
380 		goto fail2;
381 	}
382 
383 	error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT);
384 	if (error != 0) {
385 		aprint_error("%s: could not allocate Prio ring\n",
386 		    sc->sc_dev.dv_xname);
387 		goto fail3;
388 	}
389 
390 	error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT);
391 	if (error != 0) {
392 		aprint_error("%s: could not allocate Beacon ring\n",
393 		    sc->sc_dev.dv_xname);
394 		goto fail4;
395 	}
396 
397 	error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT);
398 	if (error != 0) {
399 		aprint_error("%s: could not allocate Rx ring\n",
400 		    sc->sc_dev.dv_xname);
401 		goto fail5;
402 	}
403 
404 	sc->sc_powerhook = powerhook_establish(sc->sc_dev.dv_xname,
405 	    rt2560_powerhook, sc);
406 	if (sc->sc_powerhook == NULL)
407 		aprint_error("%s: can't establish powerhook\n",
408 		    sc->sc_dev.dv_xname);
409 	sc->sc_suspend = PWR_RESUME;
410 
411 	ifp->if_softc = sc;
412 	ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
413 	ifp->if_init = rt2560_init;
414 	ifp->if_ioctl = rt2560_ioctl;
415 	ifp->if_start = rt2560_start;
416 	ifp->if_watchdog = rt2560_watchdog;
417 	IFQ_SET_READY(&ifp->if_snd);
418 	memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
419 
420 	ic->ic_ifp = ifp;
421 	ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */
422 	ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */
423 	ic->ic_state = IEEE80211_S_INIT;
424 
425 	/* set device capabilities */
426 	ic->ic_caps =
427 	    IEEE80211_C_IBSS |		/* IBSS mode supported */
428 	    IEEE80211_C_MONITOR |	/* monitor mode supported */
429 	    IEEE80211_C_HOSTAP |	/* HostAp mode supported */
430 	    IEEE80211_C_TXPMGT |	/* tx power management */
431 	    IEEE80211_C_SHPREAMBLE |	/* short preamble supported */
432 	    IEEE80211_C_SHSLOT |	/* short slot time supported */
433 	    IEEE80211_C_WPA;		/* 802.11i */
434 
435 	if (sc->rf_rev == RT2560_RF_5222) {
436 		/* set supported .11a rates */
437 		ic->ic_sup_rates[IEEE80211_MODE_11A] = rt2560_rateset_11a;
438 
439 		/* set supported .11a channels */
440 		for (i = 36; i <= 64; i += 4) {
441 			ic->ic_channels[i].ic_freq =
442 			    ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
443 			ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
444 		}
445 		for (i = 100; i <= 140; i += 4) {
446 			ic->ic_channels[i].ic_freq =
447 			    ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
448 			ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
449 		}
450 		for (i = 149; i <= 161; i += 4) {
451 			ic->ic_channels[i].ic_freq =
452 			    ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
453 			ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
454 		}
455 	}
456 
457 	/* set supported .11b and .11g rates */
458 	ic->ic_sup_rates[IEEE80211_MODE_11B] = rt2560_rateset_11b;
459 	ic->ic_sup_rates[IEEE80211_MODE_11G] = rt2560_rateset_11g;
460 
461 	/* set supported .11b and .11g channels (1 through 14) */
462 	for (i = 1; i <= 14; i++) {
463 		ic->ic_channels[i].ic_freq =
464 		    ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ);
465 		ic->ic_channels[i].ic_flags =
466 		    IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM |
467 		    IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ;
468 	}
469 
470 	if_attach(ifp);
471 	ieee80211_ifattach(ic);
472 	ic->ic_node_alloc = rt2560_node_alloc;
473 	ic->ic_updateslot = rt2560_update_slot;
474 	ic->ic_reset = rt2560_reset;
475 
476 	/* override state transition machine */
477 	sc->sc_newstate = ic->ic_newstate;
478 	ic->ic_newstate = rt2560_newstate;
479 	ieee80211_media_init(ic, rt2560_media_change, ieee80211_media_status);
480 
481 #if NBPFILTER > 0
482 	bpfattach2(ifp, DLT_IEEE802_11_RADIO,
483 	    sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf);
484 #endif
485 
486 	sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
487 	sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
488 	sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2560_RX_RADIOTAP_PRESENT);
489 
490 	sc->sc_txtap_len = sizeof sc->sc_txtapu;
491 	sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
492 	sc->sc_txtap.wt_ihdr.it_present = htole32(RT2560_TX_RADIOTAP_PRESENT);
493 
494 
495 	sc->dwelltime = 200;
496 
497 	ieee80211_announce(ic);
498 
499 	return 0;
500 
501 fail5:	rt2560_free_tx_ring(sc, &sc->bcnq);
502 fail4:	rt2560_free_tx_ring(sc, &sc->prioq);
503 fail3:	rt2560_free_tx_ring(sc, &sc->atimq);
504 fail2:	rt2560_free_tx_ring(sc, &sc->txq);
505 fail1:
506 	return ENXIO;
507 }
508 
509 
510 int
511 rt2560_detach(void *xsc)
512 {
513 	struct rt2560_softc *sc = xsc;
514 	struct ifnet *ifp = &sc->sc_if;
515 
516 	callout_stop(&sc->scan_ch);
517 	callout_stop(&sc->rssadapt_ch);
518 
519 	if (sc->sc_powerhook != NULL)
520 		powerhook_disestablish(sc->sc_powerhook);
521 
522 	rt2560_stop(sc);
523 
524 	ieee80211_ifdetach(&sc->sc_ic);	/* free all nodes */
525 	if_detach(ifp);
526 
527 	rt2560_free_tx_ring(sc, &sc->txq);
528 	rt2560_free_tx_ring(sc, &sc->atimq);
529 	rt2560_free_tx_ring(sc, &sc->prioq);
530 	rt2560_free_tx_ring(sc, &sc->bcnq);
531 	rt2560_free_rx_ring(sc, &sc->rxq);
532 
533 	return 0;
534 }
535 
536 int
537 rt2560_alloc_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring,
538     int count)
539 {
540 	int i, nsegs, error;
541 
542 	ring->count = count;
543 	ring->queued = 0;
544 	ring->cur = ring->next = 0;
545 	ring->cur_encrypt = ring->next_encrypt = 0;
546 
547 	error = bus_dmamap_create(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 1,
548 	    count * RT2560_TX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map);
549 	if (error != 0) {
550 		printf("%s: could not create desc DMA map\n",
551 		    sc->sc_dev.dv_xname);
552 		goto fail;
553 	}
554 
555 	error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_TX_DESC_SIZE,
556 	    PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT);
557 	if (error != 0) {
558 		printf("%s: could not allocate DMA memory\n",
559 		    sc->sc_dev.dv_xname);
560 		goto fail;
561 	}
562 
563 	error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs,
564 	    count * RT2560_TX_DESC_SIZE, (caddr_t *)&ring->desc,
565 	    BUS_DMA_NOWAIT);
566 	if (error != 0) {
567 		printf("%s: could not map desc DMA memory\n",
568 		    sc->sc_dev.dv_xname);
569 		goto fail;
570 	}
571 
572 	error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc,
573 	    count * RT2560_TX_DESC_SIZE, NULL, BUS_DMA_NOWAIT);
574 	if (error != 0) {
575 		printf("%s: could not load desc DMA map\n",
576 		    sc->sc_dev.dv_xname);
577 		goto fail;
578 	}
579 
580 	memset(ring->desc, 0, count * RT2560_TX_DESC_SIZE);
581 	ring->physaddr = ring->map->dm_segs->ds_addr;
582 
583 	ring->data = malloc(count * sizeof (struct rt2560_tx_data), M_DEVBUF,
584 	    M_NOWAIT);
585 	if (ring->data == NULL) {
586 		printf("%s: could not allocate soft data\n",
587 		    sc->sc_dev.dv_xname);
588 		error = ENOMEM;
589 		goto fail;
590 	}
591 
592 	memset(ring->data, 0, count * sizeof (struct rt2560_tx_data));
593 	for (i = 0; i < count; i++) {
594 		error = bus_dmamap_create(sc->sc_dmat, MCLBYTES,
595 		    RT2560_MAX_SCATTER, MCLBYTES, 0, BUS_DMA_NOWAIT,
596 		    &ring->data[i].map);
597 		if (error != 0) {
598 			printf("%s: could not create DMA map\n",
599 			    sc->sc_dev.dv_xname);
600 			goto fail;
601 		}
602 	}
603 
604 	return 0;
605 
606 fail:	rt2560_free_tx_ring(sc, ring);
607 	return error;
608 }
609 
610 void
611 rt2560_reset_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring)
612 {
613 	struct rt2560_tx_desc *desc;
614 	struct rt2560_tx_data *data;
615 	int i;
616 
617 	for (i = 0; i < ring->count; i++) {
618 		desc = &ring->desc[i];
619 		data = &ring->data[i];
620 
621 		if (data->m != NULL) {
622 			bus_dmamap_sync(sc->sc_dmat, data->map, 0,
623 			    data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
624 			bus_dmamap_unload(sc->sc_dmat, data->map);
625 			m_freem(data->m);
626 			data->m = NULL;
627 		}
628 
629 		if (data->ni != NULL) {
630 			ieee80211_free_node(data->ni);
631 			data->ni = NULL;
632 		}
633 
634 		desc->flags = 0;
635 	}
636 
637 	bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
638 	    BUS_DMASYNC_PREWRITE);
639 
640 	ring->queued = 0;
641 	ring->cur = ring->next = 0;
642 	ring->cur_encrypt = ring->next_encrypt = 0;
643 }
644 
645 void
646 rt2560_free_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring)
647 {
648 	struct rt2560_tx_data *data;
649 	int i;
650 
651 	if (ring->desc != NULL) {
652 		bus_dmamap_sync(sc->sc_dmat, ring->map, 0,
653 		    ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
654 		bus_dmamap_unload(sc->sc_dmat, ring->map);
655 		bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc,
656 		    ring->count * RT2560_TX_DESC_SIZE);
657 		bus_dmamem_free(sc->sc_dmat, &ring->seg, 1);
658 	}
659 
660 	if (ring->data != NULL) {
661 		for (i = 0; i < ring->count; i++) {
662 			data = &ring->data[i];
663 
664 			if (data->m != NULL) {
665 				bus_dmamap_sync(sc->sc_dmat, data->map, 0,
666 				    data->map->dm_mapsize,
667 				    BUS_DMASYNC_POSTWRITE);
668 				bus_dmamap_unload(sc->sc_dmat, data->map);
669 				m_freem(data->m);
670 			}
671 
672 			if (data->ni != NULL)
673 				ieee80211_free_node(data->ni);
674 
675 
676 			if (data->map != NULL)
677 				bus_dmamap_destroy(sc->sc_dmat, data->map);
678 		}
679 		free(ring->data, M_DEVBUF);
680 	}
681 }
682 
683 int
684 rt2560_alloc_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring,
685     int count)
686 {
687 	struct rt2560_rx_desc *desc;
688 	struct rt2560_rx_data *data;
689 	int i, nsegs, error;
690 
691 	ring->count = count;
692 	ring->cur = ring->next = 0;
693 	ring->cur_decrypt = 0;
694 
695 	error = bus_dmamap_create(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 1,
696 	    count * RT2560_RX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map);
697 	if (error != 0) {
698 		printf("%s: could not create desc DMA map\n",
699 		    sc->sc_dev.dv_xname);
700 		goto fail;
701 	}
702 
703 	error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_RX_DESC_SIZE,
704 	    PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT);
705 	if (error != 0) {
706 		printf("%s: could not allocate DMA memory\n",
707 		    sc->sc_dev.dv_xname);
708 		goto fail;
709 	}
710 
711 	error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs,
712 	    count * RT2560_RX_DESC_SIZE, (caddr_t *)&ring->desc,
713 	    BUS_DMA_NOWAIT);
714 	if (error != 0) {
715 		printf("%s: could not map desc DMA memory\n",
716 		    sc->sc_dev.dv_xname);
717 		goto fail;
718 	}
719 
720 	error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc,
721 	    count * RT2560_RX_DESC_SIZE, NULL, BUS_DMA_NOWAIT);
722 	if (error != 0) {
723 		printf("%s: could not load desc DMA map\n",
724 		    sc->sc_dev.dv_xname);
725 		goto fail;
726 	}
727 
728 	memset(ring->desc, 0, count * RT2560_RX_DESC_SIZE);
729 	ring->physaddr = ring->map->dm_segs->ds_addr;
730 
731 	ring->data = malloc(count * sizeof (struct rt2560_rx_data), M_DEVBUF,
732 	    M_NOWAIT);
733 	if (ring->data == NULL) {
734 		printf("%s: could not allocate soft data\n",
735 		    sc->sc_dev.dv_xname);
736 		error = ENOMEM;
737 		goto fail;
738 	}
739 
740 	/*
741 	 * Pre-allocate Rx buffers and populate Rx ring.
742 	 */
743 	memset(ring->data, 0, count * sizeof (struct rt2560_rx_data));
744 	for (i = 0; i < count; i++) {
745 		desc = &sc->rxq.desc[i];
746 		data = &sc->rxq.data[i];
747 
748 		error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES,
749 		    0, BUS_DMA_NOWAIT, &data->map);
750 		if (error != 0) {
751 			printf("%s: could not create DMA map\n",
752 			    sc->sc_dev.dv_xname);
753 			goto fail;
754 		}
755 
756 		MGETHDR(data->m, M_DONTWAIT, MT_DATA);
757 		if (data->m == NULL) {
758 			printf("%s: could not allocate rx mbuf\n",
759 			    sc->sc_dev.dv_xname);
760 			error = ENOMEM;
761 			goto fail;
762 		}
763 
764 		MCLGET(data->m, M_DONTWAIT);
765 		if (!(data->m->m_flags & M_EXT)) {
766 			printf("%s: could not allocate rx mbuf cluster\n",
767 			    sc->sc_dev.dv_xname);
768 			error = ENOMEM;
769 			goto fail;
770 		}
771 
772 		error = bus_dmamap_load(sc->sc_dmat, data->map,
773 		    mtod(data->m, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT);
774 		if (error != 0) {
775 			printf("%s: could not load rx buf DMA map",
776 			    sc->sc_dev.dv_xname);
777 			goto fail;
778 		}
779 
780 		desc->flags = htole32(RT2560_RX_BUSY);
781 		desc->physaddr = htole32(data->map->dm_segs->ds_addr);
782 	}
783 
784 	bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
785 	    BUS_DMASYNC_PREWRITE);
786 
787 	return 0;
788 
789 fail:	rt2560_free_rx_ring(sc, ring);
790 	return error;
791 }
792 
793 void
794 rt2560_reset_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring)
795 {
796 	int i;
797 
798 	for (i = 0; i < ring->count; i++) {
799 		ring->desc[i].flags = htole32(RT2560_RX_BUSY);
800 		ring->data[i].drop = 0;
801 	}
802 
803 	bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize,
804 	    BUS_DMASYNC_PREWRITE);
805 
806 	ring->cur = ring->next = 0;
807 	ring->cur_decrypt = 0;
808 }
809 
810 void
811 rt2560_free_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring)
812 {
813 	struct rt2560_rx_data *data;
814 	int i;
815 
816 	if (ring->desc != NULL) {
817 		bus_dmamap_sync(sc->sc_dmat, ring->map, 0,
818 		    ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
819 		bus_dmamap_unload(sc->sc_dmat, ring->map);
820 		bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc,
821 		    ring->count * RT2560_RX_DESC_SIZE);
822 		bus_dmamem_free(sc->sc_dmat, &ring->seg, 1);
823 	}
824 
825 	if (ring->data != NULL) {
826 		for (i = 0; i < ring->count; i++) {
827 			data = &ring->data[i];
828 
829 			if (data->m != NULL) {
830 				bus_dmamap_sync(sc->sc_dmat, data->map, 0,
831 				    data->map->dm_mapsize,
832 				    BUS_DMASYNC_POSTREAD);
833 				bus_dmamap_unload(sc->sc_dmat, data->map);
834 				m_freem(data->m);
835 			}
836 
837 			if (data->map != NULL)
838 				bus_dmamap_destroy(sc->sc_dmat, data->map);
839 		}
840 		free(ring->data, M_DEVBUF);
841 	}
842 }
843 
844 struct ieee80211_node *
845 rt2560_node_alloc(struct ieee80211_node_table *nt __unused)
846 {
847 	struct rt2560_node *rn;
848 
849 	rn = malloc(sizeof (struct rt2560_node), M_80211_NODE,
850 	    M_NOWAIT | M_ZERO);
851 
852 	return (rn != NULL) ? &rn->ni : NULL;
853 }
854 
855 int
856 rt2560_media_change(struct ifnet *ifp)
857 {
858 	int error;
859 
860 	error = ieee80211_media_change(ifp);
861 	if (error != ENETRESET)
862 		return error;
863 
864 	if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
865 		rt2560_init(ifp);
866 
867 	return 0;
868 }
869 
870 /*
871  * This function is called periodically (every 200ms) during scanning to
872  * switch from one channel to another.
873  */
874 void
875 rt2560_next_scan(void *arg)
876 {
877 	struct rt2560_softc *sc = arg;
878 	struct ieee80211com *ic = &sc->sc_ic;
879 
880 	if (ic->ic_state == IEEE80211_S_SCAN)
881 		ieee80211_next_scan(ic);
882 }
883 
884 /*
885  * This function is called for each neighbor node.
886  */
887 void
888 rt2560_iter_func(void *arg __unused, struct ieee80211_node *ni)
889 {
890 	struct rt2560_node *rn = (struct rt2560_node *)ni;
891 
892 	ieee80211_rssadapt_updatestats(&rn->rssadapt);
893 }
894 
895 /*
896  * This function is called periodically (every 100ms) in RUN state to update
897  * the rate adaptation statistics.
898  */
899 void
900 rt2560_update_rssadapt(void *arg)
901 {
902 	struct rt2560_softc *sc = arg;
903 	struct ieee80211com *ic = &sc->sc_ic;
904 
905 	ieee80211_iterate_nodes(&ic->ic_sta, rt2560_iter_func, arg);
906 
907 	callout_reset(&sc->rssadapt_ch, hz / 10, rt2560_update_rssadapt, sc);
908 }
909 
910 int
911 rt2560_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
912 {
913 	struct rt2560_softc *sc = ic->ic_ifp->if_softc;
914 	enum ieee80211_state ostate;
915 	struct ieee80211_node *ni;
916 	struct mbuf *m;
917 	int error = 0;
918 
919 	ostate = ic->ic_state;
920 	callout_stop(&sc->scan_ch);
921 
922 	switch (nstate) {
923 	case IEEE80211_S_INIT:
924 		callout_stop(&sc->rssadapt_ch);
925 
926 		if (ostate == IEEE80211_S_RUN) {
927 			/* abort TSF synchronization */
928 			RAL_WRITE(sc, RT2560_CSR14, 0);
929 
930 			/* turn association led off */
931 			rt2560_update_led(sc, 0, 0);
932 		}
933 		break;
934 
935 	case IEEE80211_S_SCAN:
936 		rt2560_set_chan(sc, ic->ic_curchan);
937 		callout_reset(&sc->scan_ch, (sc->dwelltime * hz) / 1000,
938 		    rt2560_next_scan, sc);
939 		break;
940 
941 	case IEEE80211_S_AUTH:
942 		rt2560_set_chan(sc, ic->ic_curchan);
943 		break;
944 
945 	case IEEE80211_S_ASSOC:
946 		rt2560_set_chan(sc, ic->ic_curchan);
947 		break;
948 
949 	case IEEE80211_S_RUN:
950 		rt2560_set_chan(sc, ic->ic_curchan);
951 
952 		ni = ic->ic_bss;
953 
954 		if (ic->ic_opmode != IEEE80211_M_MONITOR) {
955 			rt2560_update_plcp(sc);
956 			rt2560_set_basicrates(sc);
957 			rt2560_set_bssid(sc, ni->ni_bssid);
958 		}
959 
960 		if (ic->ic_opmode == IEEE80211_M_HOSTAP ||
961 		    ic->ic_opmode == IEEE80211_M_IBSS) {
962 			m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo);
963 			if (m == NULL) {
964 				printf("%s: could not allocate beacon\n",
965 				    sc->sc_dev.dv_xname);
966 				error = ENOBUFS;
967 				break;
968 			}
969 
970 			ieee80211_ref_node(ni);
971 			error = rt2560_tx_bcn(sc, m, ni);
972 			if (error != 0)
973 				break;
974 		}
975 
976 		/* turn assocation led on */
977 		rt2560_update_led(sc, 1, 0);
978 
979 		if (ic->ic_opmode != IEEE80211_M_MONITOR) {
980 			callout_reset(&sc->rssadapt_ch, hz / 10,
981 			    rt2560_update_rssadapt, sc);
982 			rt2560_enable_tsf_sync(sc);
983 		}
984 		break;
985 	}
986 
987 	return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg);
988 }
989 
990 /*
991  * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or
992  * 93C66).
993  */
994 uint16_t
995 rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr)
996 {
997 	uint32_t tmp;
998 	uint16_t val;
999 	int n;
1000 
1001 	/* clock C once before the first command */
1002 	RT2560_EEPROM_CTL(sc, 0);
1003 
1004 	RT2560_EEPROM_CTL(sc, RT2560_S);
1005 	RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C);
1006 	RT2560_EEPROM_CTL(sc, RT2560_S);
1007 
1008 	/* write start bit (1) */
1009 	RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D);
1010 	RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C);
1011 
1012 	/* write READ opcode (10) */
1013 	RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D);
1014 	RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C);
1015 	RT2560_EEPROM_CTL(sc, RT2560_S);
1016 	RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C);
1017 
1018 	/* write address (A5-A0 or A7-A0) */
1019 	n = (RAL_READ(sc, RT2560_CSR21) & RT2560_93C46) ? 5 : 7;
1020 	for (; n >= 0; n--) {
1021 		RT2560_EEPROM_CTL(sc, RT2560_S |
1022 		    (((addr >> n) & 1) << RT2560_SHIFT_D));
1023 		RT2560_EEPROM_CTL(sc, RT2560_S |
1024 		    (((addr >> n) & 1) << RT2560_SHIFT_D) | RT2560_C);
1025 	}
1026 
1027 	RT2560_EEPROM_CTL(sc, RT2560_S);
1028 
1029 	/* read data Q15-Q0 */
1030 	val = 0;
1031 	for (n = 15; n >= 0; n--) {
1032 		RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C);
1033 		tmp = RAL_READ(sc, RT2560_CSR21);
1034 		val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n;
1035 		RT2560_EEPROM_CTL(sc, RT2560_S);
1036 	}
1037 
1038 	RT2560_EEPROM_CTL(sc, 0);
1039 
1040 	/* clear Chip Select and clock C */
1041 	RT2560_EEPROM_CTL(sc, RT2560_S);
1042 	RT2560_EEPROM_CTL(sc, 0);
1043 	RT2560_EEPROM_CTL(sc, RT2560_C);
1044 
1045 	return val;
1046 }
1047 
1048 /*
1049  * Some frames were processed by the hardware cipher engine and are ready for
1050  * transmission.
1051  */
1052 void
1053 rt2560_encryption_intr(struct rt2560_softc *sc)
1054 {
1055 	struct rt2560_tx_desc *desc;
1056 	int hw;
1057 
1058 	/* retrieve last descriptor index processed by cipher engine */
1059 	hw = (RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr) /
1060 	    RT2560_TX_DESC_SIZE;
1061 
1062 	for (; sc->txq.next_encrypt != hw;) {
1063 		desc = &sc->txq.desc[sc->txq.next_encrypt];
1064 
1065 		bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
1066 		    sc->txq.next_encrypt * RT2560_TX_DESC_SIZE,
1067 		    RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD);
1068 
1069 		if (le32toh(desc->flags) &
1070 		    (RT2560_TX_BUSY | RT2560_TX_CIPHER_BUSY))
1071 			break;
1072 
1073 		/* for TKIP, swap eiv field to fix a bug in ASIC */
1074 		if ((le32toh(desc->flags) & RT2560_TX_CIPHER_MASK) ==
1075 		    RT2560_TX_CIPHER_TKIP)
1076 			desc->eiv = bswap32(desc->eiv);
1077 
1078 		/* mark the frame ready for transmission */
1079 		desc->flags |= htole32(RT2560_TX_BUSY | RT2560_TX_VALID);
1080 
1081 		bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
1082 		    sc->txq.next_encrypt * RT2560_TX_DESC_SIZE,
1083 		    RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE);
1084 
1085 		DPRINTFN(15, ("encryption done idx=%u\n",
1086 		    sc->txq.next_encrypt));
1087 
1088 		sc->txq.next_encrypt =
1089 		    (sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT;
1090 	}
1091 
1092 	/* kick Tx */
1093 	RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX);
1094 }
1095 
1096 void
1097 rt2560_tx_intr(struct rt2560_softc *sc)
1098 {
1099 	struct ieee80211com *ic = &sc->sc_ic;
1100 	struct ifnet *ifp = ic->ic_ifp;
1101 	struct rt2560_tx_desc *desc;
1102 	struct rt2560_tx_data *data;
1103 	struct rt2560_node *rn;
1104 
1105 	for (;;) {
1106 		desc = &sc->txq.desc[sc->txq.next];
1107 		data = &sc->txq.data[sc->txq.next];
1108 
1109 		bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
1110 		    sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
1111 		    BUS_DMASYNC_POSTREAD);
1112 
1113 		if ((le32toh(desc->flags) & RT2560_TX_BUSY) ||
1114 		    (le32toh(desc->flags) & RT2560_TX_CIPHER_BUSY) ||
1115 		    !(le32toh(desc->flags) & RT2560_TX_VALID))
1116 			break;
1117 
1118 		rn = (struct rt2560_node *)data->ni;
1119 
1120 		switch (le32toh(desc->flags) & RT2560_TX_RESULT_MASK) {
1121 		case RT2560_TX_SUCCESS:
1122 			DPRINTFN(10, ("data frame sent successfully\n"));
1123 			if (data->id.id_node != NULL) {
1124 				ieee80211_rssadapt_raise_rate(ic,
1125 				    &rn->rssadapt, &data->id);
1126 			}
1127 			ifp->if_opackets++;
1128 			break;
1129 
1130 		case RT2560_TX_SUCCESS_RETRY:
1131 			DPRINTFN(9, ("data frame sent after %u retries\n",
1132 			    (le32toh(desc->flags) >> 5) & 0x7));
1133 			ifp->if_opackets++;
1134 			break;
1135 
1136 		case RT2560_TX_FAIL_RETRY:
1137 			DPRINTFN(9, ("sending data frame failed (too much "
1138 			    "retries)\n"));
1139 			if (data->id.id_node != NULL) {
1140 				ieee80211_rssadapt_lower_rate(ic, data->ni,
1141 				    &rn->rssadapt, &data->id);
1142 			}
1143 			ifp->if_oerrors++;
1144 			break;
1145 
1146 		case RT2560_TX_FAIL_INVALID:
1147 		case RT2560_TX_FAIL_OTHER:
1148 		default:
1149 			printf("%s: sending data frame failed 0x%08x\n",
1150 			    sc->sc_dev.dv_xname, le32toh(desc->flags));
1151 			ifp->if_oerrors++;
1152 		}
1153 
1154 		bus_dmamap_sync(sc->sc_dmat, data->map, 0,
1155 		    data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
1156 		bus_dmamap_unload(sc->sc_dmat, data->map);
1157 		m_freem(data->m);
1158 		data->m = NULL;
1159 		ieee80211_free_node(data->ni);
1160 		data->ni = NULL;
1161 
1162 		/* descriptor is no longer valid */
1163 		desc->flags &= ~htole32(RT2560_TX_VALID);
1164 
1165 		bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
1166 		    sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
1167 		    BUS_DMASYNC_PREWRITE);
1168 
1169 		DPRINTFN(15, ("tx done idx=%u\n", sc->txq.next));
1170 
1171 		sc->txq.queued--;
1172 		sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT;
1173 	}
1174 
1175 	sc->sc_tx_timer = 0;
1176 	ifp->if_flags &= ~IFF_OACTIVE;
1177 	rt2560_start(ifp);
1178 }
1179 
1180 void
1181 rt2560_prio_intr(struct rt2560_softc *sc)
1182 {
1183 	struct ieee80211com *ic = &sc->sc_ic;
1184 	struct ifnet *ifp = ic->ic_ifp;
1185 	struct rt2560_tx_desc *desc;
1186 	struct rt2560_tx_data *data;
1187 
1188 	for (;;) {
1189 		desc = &sc->prioq.desc[sc->prioq.next];
1190 		data = &sc->prioq.data[sc->prioq.next];
1191 
1192 		bus_dmamap_sync(sc->sc_dmat, sc->prioq.map,
1193 		    sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
1194 		    BUS_DMASYNC_POSTREAD);
1195 
1196 		if ((le32toh(desc->flags) & RT2560_TX_BUSY) ||
1197 		    !(le32toh(desc->flags) & RT2560_TX_VALID))
1198 			break;
1199 
1200 		switch (le32toh(desc->flags) & RT2560_TX_RESULT_MASK) {
1201 		case RT2560_TX_SUCCESS:
1202 			DPRINTFN(10, ("mgt frame sent successfully\n"));
1203 			break;
1204 
1205 		case RT2560_TX_SUCCESS_RETRY:
1206 			DPRINTFN(9, ("mgt frame sent after %u retries\n",
1207 			    (le32toh(desc->flags) >> 5) & 0x7));
1208 			break;
1209 
1210 		case RT2560_TX_FAIL_RETRY:
1211 			DPRINTFN(9, ("sending mgt frame failed (too much "
1212 			    "retries)\n"));
1213 			break;
1214 
1215 		case RT2560_TX_FAIL_INVALID:
1216 		case RT2560_TX_FAIL_OTHER:
1217 		default:
1218 			printf("%s: sending mgt frame failed 0x%08x\n",
1219 			    sc->sc_dev.dv_xname, le32toh(desc->flags));
1220 		}
1221 
1222 		bus_dmamap_sync(sc->sc_dmat, data->map, 0,
1223 		    data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
1224 		bus_dmamap_unload(sc->sc_dmat, data->map);
1225 		m_freem(data->m);
1226 		data->m = NULL;
1227 		ieee80211_free_node(data->ni);
1228 		data->ni = NULL;
1229 
1230 		/* descriptor is no longer valid */
1231 		desc->flags &= ~htole32(RT2560_TX_VALID);
1232 
1233 		bus_dmamap_sync(sc->sc_dmat, sc->prioq.map,
1234 		    sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
1235 		    BUS_DMASYNC_PREWRITE);
1236 
1237 		DPRINTFN(15, ("prio done idx=%u\n", sc->prioq.next));
1238 
1239 		sc->prioq.queued--;
1240 		sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT;
1241 	}
1242 
1243 	sc->sc_tx_timer = 0;
1244 	ifp->if_flags &= ~IFF_OACTIVE;
1245 	rt2560_start(ifp);
1246 }
1247 
1248 /*
1249  * Some frames were processed by the hardware cipher engine and are ready for
1250  * transmission to the IEEE802.11 layer.
1251  */
1252 void
1253 rt2560_decryption_intr(struct rt2560_softc *sc)
1254 {
1255 	struct ieee80211com *ic = &sc->sc_ic;
1256 	struct ifnet *ifp = ic->ic_ifp;
1257 	struct rt2560_rx_desc *desc;
1258 	struct rt2560_rx_data *data;
1259 	struct rt2560_node *rn;
1260 	struct ieee80211_frame *wh;
1261 	struct ieee80211_node *ni;
1262 	struct mbuf *mnew, *m;
1263 	int hw, error;
1264 
1265 	/* retrieve last decriptor index processed by cipher engine */
1266 	hw = (RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr) /
1267 	    RT2560_RX_DESC_SIZE;
1268 
1269 	for (; sc->rxq.cur_decrypt != hw;) {
1270 		desc = &sc->rxq.desc[sc->rxq.cur_decrypt];
1271 		data = &sc->rxq.data[sc->rxq.cur_decrypt];
1272 
1273 		bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,
1274 		    sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE,
1275 		    RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD);
1276 
1277 		if (le32toh(desc->flags) &
1278 		    (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY))
1279 			break;
1280 
1281 		if (data->drop) {
1282 			ifp->if_ierrors++;
1283 			goto skip;
1284 		}
1285 
1286 		if ((le32toh(desc->flags) & RT2560_RX_CIPHER_MASK) != 0 &&
1287 		    (le32toh(desc->flags) & RT2560_RX_ICV_ERROR)) {
1288 			ifp->if_ierrors++;
1289 			goto skip;
1290 		}
1291 
1292 		/*
1293 		 * Try to allocate a new mbuf for this ring element and load it
1294 		 * before processing the current mbuf.  If the ring element
1295 		 * cannot be loaded, drop the received packet and reuse the old
1296 		 * mbuf.  In the unlikely case that the old mbuf can't be
1297 		 * reloaded either, explicitly panic.
1298 		 */
1299 		MGETHDR(mnew, M_DONTWAIT, MT_DATA);
1300 		if (mnew == NULL) {
1301 			ifp->if_ierrors++;
1302 			goto skip;
1303 		}
1304 
1305 		MCLGET(mnew, M_DONTWAIT);
1306 		if (!(mnew->m_flags & M_EXT)) {
1307 			m_freem(mnew);
1308 			ifp->if_ierrors++;
1309 			goto skip;
1310 		}
1311 
1312 		bus_dmamap_sync(sc->sc_dmat, data->map, 0,
1313 		    data->map->dm_mapsize, BUS_DMASYNC_POSTREAD);
1314 		bus_dmamap_unload(sc->sc_dmat, data->map);
1315 
1316 		error = bus_dmamap_load(sc->sc_dmat, data->map,
1317 		    mtod(mnew, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT);
1318 		if (error != 0) {
1319 			m_freem(mnew);
1320 
1321 			/* try to reload the old mbuf */
1322 			error = bus_dmamap_load(sc->sc_dmat, data->map,
1323 			    mtod(data->m, void *), MCLBYTES, NULL,
1324 			    BUS_DMA_NOWAIT);
1325 			if (error != 0) {
1326 				/* very unlikely that it will fail... */
1327 				panic("%s: could not load old rx mbuf",
1328 				    sc->sc_dev.dv_xname);
1329 			}
1330 			ifp->if_ierrors++;
1331 			goto skip;
1332 		}
1333 
1334 		/*
1335 		 * New mbuf successfully loaded, update Rx ring and continue
1336 		 * processing.
1337 		 */
1338 		m = data->m;
1339 		data->m = mnew;
1340 		desc->physaddr = htole32(data->map->dm_segs->ds_addr);
1341 
1342 		/* finalize mbuf */
1343 		m->m_pkthdr.rcvif = ifp;
1344 		m->m_pkthdr.len = m->m_len =
1345 		    (le32toh(desc->flags) >> 16) & 0xfff;
1346 
1347 #if NBPFILTER > 0
1348 		if (sc->sc_drvbpf != NULL) {
1349 			struct mbuf mb;
1350 			struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtap;
1351 			uint32_t tsf_lo, tsf_hi;
1352 
1353 			/* get timestamp (low and high 32 bits) */
1354 			tsf_hi = RAL_READ(sc, RT2560_CSR17);
1355 			tsf_lo = RAL_READ(sc, RT2560_CSR16);
1356 
1357 			tap->wr_tsf =
1358 			    htole64(((uint64_t)tsf_hi << 32) | tsf_lo);
1359 			tap->wr_flags = 0;
1360 			tap->wr_rate = rt2560_rxrate(desc);
1361 			tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq);
1362 			tap->wr_chan_flags =
1363 			    htole16(ic->ic_ibss_chan->ic_flags);
1364 			tap->wr_antenna = sc->rx_ant;
1365 			tap->wr_antsignal = desc->rssi;
1366 
1367 			M_COPY_PKTHDR(&mb, m);
1368 			mb.m_data = (caddr_t)tap;
1369 			mb.m_len = sc->sc_txtap_len;
1370 			mb.m_next = m;
1371 			mb.m_pkthdr.len += mb.m_len;
1372 			bpf_mtap(sc->sc_drvbpf, &mb);
1373 		}
1374 #endif
1375 
1376 		wh = mtod(m, struct ieee80211_frame *);
1377 		ni = ieee80211_find_rxnode(ic,
1378 		    (struct ieee80211_frame_min *)wh);
1379 
1380 		/* send the frame to the 802.11 layer */
1381 		ieee80211_input(ic, m, ni, desc->rssi, 0);
1382 
1383 		/* give rssi to the rate adatation algorithm */
1384 		rn = (struct rt2560_node *)ni;
1385 		ieee80211_rssadapt_input(ic, ni, &rn->rssadapt, desc->rssi);
1386 
1387 		/* node is no longer needed */
1388 		ieee80211_free_node(ni);
1389 
1390 skip:		desc->flags = htole32(RT2560_RX_BUSY);
1391 
1392 		bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,
1393 		    sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE,
1394 		    RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE);
1395 
1396 		DPRINTFN(15, ("decryption done idx=%u\n", sc->rxq.cur_decrypt));
1397 
1398 		sc->rxq.cur_decrypt =
1399 		    (sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT;
1400 	}
1401 
1402 	/*
1403 	 * In HostAP mode, ieee80211_input() will enqueue packets in if_snd
1404 	 * without calling if_start().
1405 	 */
1406 	if (!IFQ_IS_EMPTY(&ifp->if_snd) && !(ifp->if_flags & IFF_OACTIVE))
1407 		rt2560_start(ifp);
1408 }
1409 
1410 /*
1411  * Some frames were received. Pass them to the hardware cipher engine before
1412  * sending them to the 802.11 layer.
1413  */
1414 void
1415 rt2560_rx_intr(struct rt2560_softc *sc)
1416 {
1417 	struct rt2560_rx_desc *desc;
1418 	struct rt2560_rx_data *data;
1419 
1420 	for (;;) {
1421 		desc = &sc->rxq.desc[sc->rxq.cur];
1422 		data = &sc->rxq.data[sc->rxq.cur];
1423 
1424 		bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,
1425 		    sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE,
1426 		    BUS_DMASYNC_POSTREAD);
1427 
1428 		if (le32toh(desc->flags) &
1429 		    (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY))
1430 			break;
1431 
1432 		data->drop = 0;
1433 
1434 		if (le32toh(desc->flags) &
1435 		    (RT2560_RX_PHY_ERROR | RT2560_RX_CRC_ERROR)) {
1436 			/*
1437 			 * This should not happen since we did not request
1438 			 * to receive those frames when we filled RXCSR0.
1439 			 */
1440 			DPRINTFN(5, ("PHY or CRC error flags 0x%08x\n",
1441 			    le32toh(desc->flags)));
1442 			data->drop = 1;
1443 		}
1444 
1445 		if (((le32toh(desc->flags) >> 16) & 0xfff) > MCLBYTES) {
1446 			DPRINTFN(5, ("bad length\n"));
1447 			data->drop = 1;
1448 		}
1449 
1450 		/* mark the frame for decryption */
1451 		desc->flags |= htole32(RT2560_RX_CIPHER_BUSY);
1452 
1453 		bus_dmamap_sync(sc->sc_dmat, sc->rxq.map,
1454 		    sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE,
1455 		    BUS_DMASYNC_PREWRITE);
1456 
1457 		DPRINTFN(15, ("rx done idx=%u\n", sc->rxq.cur));
1458 
1459 		sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT;
1460 	}
1461 
1462 	/* kick decrypt */
1463 	RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT);
1464 }
1465 
1466 #if 0
1467 void
1468 rt2560_shutdown(void *xsc)
1469 {
1470 	struct rt2560_softc *sc = xsc;
1471 
1472 	rt2560_stop(sc);
1473 }
1474 
1475 void
1476 rt2560_suspend(void *xsc)
1477 {
1478 	struct rt2560_softc *sc = xsc;
1479 
1480 	rt2560_stop(sc);
1481 }
1482 
1483 void
1484 rt2560_resume(void *xsc)
1485 {
1486 	struct rt2560_softc *sc = xsc;
1487 	struct ifnet *ifp = sc->sc_ic.ic_ifp;
1488 
1489 	if (ifp->if_flags & IFF_UP) {
1490 		ifp->if_init(ifp->if_softc);
1491 		if (ifp->if_flags & IFF_RUNNING)
1492 			ifp->if_start(ifp);
1493 	}
1494 }
1495 
1496 #endif
1497 /*
1498  * This function is called periodically in IBSS mode when a new beacon must be
1499  * sent out.
1500  */
1501 static void
1502 rt2560_beacon_expire(struct rt2560_softc *sc)
1503 {
1504 	struct ieee80211com *ic = &sc->sc_ic;
1505 	struct rt2560_tx_data *data;
1506 
1507 	if (ic->ic_opmode != IEEE80211_M_IBSS &&
1508 	    ic->ic_opmode != IEEE80211_M_HOSTAP)
1509 		return;
1510 
1511 	data = &sc->bcnq.data[sc->bcnq.next];
1512 
1513 	bus_dmamap_sync(sc->sc_dmat, data->map, 0,
1514 	    data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE);
1515 	bus_dmamap_unload(sc->sc_dmat, data->map);
1516 
1517 	ieee80211_beacon_update(ic, data->ni, &sc->sc_bo, data->m, 1);
1518 
1519 #if NBPFILTER > 0
1520 	if (ic->ic_rawbpf != NULL)
1521 		bpf_mtap(ic->ic_rawbpf, data->m);
1522 #endif
1523 	rt2560_tx_bcn(sc, data->m, data->ni);
1524 
1525 	DPRINTFN(15, ("beacon expired\n"));
1526 
1527 	sc->bcnq.next = (sc->bcnq.next + 1) % RT2560_BEACON_RING_COUNT;
1528 }
1529 
1530 static void
1531 rt2560_wakeup_expire(struct rt2560_softc *sc __unused)
1532 {
1533 	DPRINTFN(15, ("wakeup expired\n"));
1534 }
1535 
1536 int
1537 rt2560_intr(void *arg)
1538 {
1539 	struct rt2560_softc *sc = arg;
1540 	struct ifnet *ifp = &sc->sc_if;
1541 	uint32_t r;
1542 
1543 	/* disable interrupts */
1544 	RAL_WRITE(sc, RT2560_CSR8, 0xffffffff);
1545 
1546 	/* don't re-enable interrupts if we're shutting down */
1547 	if (!(ifp->if_flags & IFF_RUNNING))
1548 		return 0;
1549 
1550 	/* if we're suspended, don't bother */
1551 	if (sc->sc_suspend != PWR_RESUME)
1552 		return 0;
1553 
1554 	r = RAL_READ(sc, RT2560_CSR7);
1555 	RAL_WRITE(sc, RT2560_CSR7, r);
1556 
1557 	if (r & RT2560_BEACON_EXPIRE)
1558 		rt2560_beacon_expire(sc);
1559 
1560 	if (r & RT2560_WAKEUP_EXPIRE)
1561 		rt2560_wakeup_expire(sc);
1562 
1563 	if (r & RT2560_ENCRYPTION_DONE)
1564 		rt2560_encryption_intr(sc);
1565 
1566 	if (r & RT2560_TX_DONE)
1567 		rt2560_tx_intr(sc);
1568 
1569 	if (r & RT2560_PRIO_DONE)
1570 		rt2560_prio_intr(sc);
1571 
1572 	if (r & RT2560_DECRYPTION_DONE)
1573 		rt2560_decryption_intr(sc);
1574 
1575 	if (r & RT2560_RX_DONE)
1576 		rt2560_rx_intr(sc);
1577 
1578 	/* re-enable interrupts */
1579 	RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK);
1580 
1581 	return 1;
1582 }
1583 
1584 /* quickly determine if a given rate is CCK or OFDM */
1585 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22)
1586 
1587 #define RAL_ACK_SIZE	14	/* 10 + 4(FCS) */
1588 #define RAL_CTS_SIZE	14	/* 10 + 4(FCS) */
1589 
1590 #define RAL_SIFS		10	/* us */
1591 
1592 #define RT2560_RXTX_TURNAROUND	10	/* us */
1593 
1594 /*
1595  * This function is only used by the Rx radiotap code. It returns the rate at
1596  * which a given frame was received.
1597  */
1598 #if NBPFILTER > 0
1599 static uint8_t
1600 rt2560_rxrate(struct rt2560_rx_desc *desc)
1601 {
1602 	if (le32toh(desc->flags) & RT2560_RX_OFDM) {
1603 		/* reverse function of rt2560_plcp_signal */
1604 		switch (desc->rate) {
1605 		case 0xb:	return 12;
1606 		case 0xf:	return 18;
1607 		case 0xa:	return 24;
1608 		case 0xe:	return 36;
1609 		case 0x9:	return 48;
1610 		case 0xd:	return 72;
1611 		case 0x8:	return 96;
1612 		case 0xc:	return 108;
1613 		}
1614 	} else {
1615 		if (desc->rate == 10)
1616 			return 2;
1617 		if (desc->rate == 20)
1618 			return 4;
1619 		if (desc->rate == 55)
1620 			return 11;
1621 		if (desc->rate == 110)
1622 			return 22;
1623 	}
1624 	return 2;	/* should not get there */
1625 }
1626 #endif
1627 
1628 /*
1629  * Return the expected ack rate for a frame transmitted at rate `rate'.
1630  * XXX: this should depend on the destination node basic rate set.
1631  */
1632 static int
1633 rt2560_ack_rate(struct ieee80211com *ic, int rate)
1634 {
1635 	switch (rate) {
1636 	/* CCK rates */
1637 	case 2:
1638 		return 2;
1639 	case 4:
1640 	case 11:
1641 	case 22:
1642 		return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate;
1643 
1644 	/* OFDM rates */
1645 	case 12:
1646 	case 18:
1647 		return 12;
1648 	case 24:
1649 	case 36:
1650 		return 24;
1651 	case 48:
1652 	case 72:
1653 	case 96:
1654 	case 108:
1655 		return 48;
1656 	}
1657 
1658 	/* default to 1Mbps */
1659 	return 2;
1660 }
1661 
1662 /*
1663  * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'.
1664  * The function automatically determines the operating mode depending on the
1665  * given rate. `flags' indicates whether short preamble is in use or not.
1666  */
1667 static uint16_t
1668 rt2560_txtime(int len, int rate, uint32_t flags)
1669 {
1670 	uint16_t txtime;
1671 
1672 	if (RAL_RATE_IS_OFDM(rate)) {
1673 		/* IEEE Std 802.11a-1999, pp. 37 */
1674 		txtime = (8 + 4 * len + 3 + rate - 1) / rate;
1675 		txtime = 16 + 4 + 4 * txtime + 6;
1676 	} else {
1677 		/* IEEE Std 802.11b-1999, pp. 28 */
1678 		txtime = (16 * len + rate - 1) / rate;
1679 		if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE))
1680 			txtime +=  72 + 24;
1681 		else
1682 			txtime += 144 + 48;
1683 	}
1684 	return txtime;
1685 }
1686 
1687 static uint8_t
1688 rt2560_plcp_signal(int rate)
1689 {
1690 	switch (rate) {
1691 	/* CCK rates (returned values are device-dependent) */
1692 	case 2:		return 0x0;
1693 	case 4:		return 0x1;
1694 	case 11:	return 0x2;
1695 	case 22:	return 0x3;
1696 
1697 	/* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */
1698 	case 12:	return 0xb;
1699 	case 18:	return 0xf;
1700 	case 24:	return 0xa;
1701 	case 36:	return 0xe;
1702 	case 48:	return 0x9;
1703 	case 72:	return 0xd;
1704 	case 96:	return 0x8;
1705 	case 108:	return 0xc;
1706 
1707 	/* unsupported rates (should not get there) */
1708 	default:	return 0xff;
1709 	}
1710 }
1711 
1712 static void
1713 rt2560_setup_tx_desc(struct rt2560_softc *sc, struct rt2560_tx_desc *desc,
1714     uint32_t flags, int len, int rate, int encrypt, bus_addr_t physaddr)
1715 {
1716 	struct ieee80211com *ic = &sc->sc_ic;
1717 	uint16_t plcp_length;
1718 	int remainder;
1719 
1720 	desc->flags = htole32(flags);
1721 	desc->flags |= htole32(len << 16);
1722 	desc->flags |= encrypt ? htole32(RT2560_TX_CIPHER_BUSY) :
1723 	    htole32(RT2560_TX_BUSY | RT2560_TX_VALID);
1724 
1725 	desc->physaddr = htole32(physaddr);
1726 	desc->wme = htole16(
1727 	    RT2560_AIFSN(2) |
1728 	    RT2560_LOGCWMIN(3) |
1729 	    RT2560_LOGCWMAX(8));
1730 
1731 	/* setup PLCP fields */
1732 	desc->plcp_signal  = rt2560_plcp_signal(rate);
1733 	desc->plcp_service = 4;
1734 
1735 	len += IEEE80211_CRC_LEN;
1736 	if (RAL_RATE_IS_OFDM(rate)) {
1737 		desc->flags |= htole32(RT2560_TX_OFDM);
1738 
1739 		plcp_length = len & 0xfff;
1740 		desc->plcp_length_hi = plcp_length >> 6;
1741 		desc->plcp_length_lo = plcp_length & 0x3f;
1742 	} else {
1743 		plcp_length = (16 * len + rate - 1) / rate;
1744 		if (rate == 22) {
1745 			remainder = (16 * len) % 22;
1746 			if (remainder != 0 && remainder < 7)
1747 				desc->plcp_service |= RT2560_PLCP_LENGEXT;
1748 		}
1749 		desc->plcp_length_hi = plcp_length >> 8;
1750 		desc->plcp_length_lo = plcp_length & 0xff;
1751 
1752 		if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE))
1753 			desc->plcp_signal |= 0x08;
1754 	}
1755 }
1756 
1757 static int
1758 rt2560_tx_bcn(struct rt2560_softc *sc, struct mbuf *m0,
1759     struct ieee80211_node *ni)
1760 {
1761 	struct rt2560_tx_desc *desc;
1762 	struct rt2560_tx_data *data;
1763 	int rate, error;
1764 
1765 	desc = &sc->bcnq.desc[sc->bcnq.cur];
1766 	data = &sc->bcnq.data[sc->bcnq.cur];
1767 
1768 	rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2;
1769 
1770 	error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
1771 	    BUS_DMA_NOWAIT);
1772 	if (error != 0) {
1773 		printf("%s: could not map mbuf (error %d)\n",
1774 		    sc->sc_dev.dv_xname, error);
1775 		m_freem(m0);
1776 		return error;
1777 	}
1778 
1779 	data->m = m0;
1780 	data->ni = ni;
1781 
1782 	rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF |
1783 	    RT2560_TX_TIMESTAMP, m0->m_pkthdr.len, rate, 0,
1784 	    data->map->dm_segs->ds_addr);
1785 
1786 	bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize,
1787 	    BUS_DMASYNC_PREWRITE);
1788 	bus_dmamap_sync(sc->sc_dmat, sc->bcnq.map,
1789 	    sc->bcnq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
1790 	    BUS_DMASYNC_PREWRITE);
1791 
1792 	return 0;
1793 }
1794 
1795 static int
1796 rt2560_tx_mgt(struct rt2560_softc *sc, struct mbuf *m0,
1797     struct ieee80211_node *ni)
1798 {
1799 	struct ieee80211com *ic = &sc->sc_ic;
1800 	struct rt2560_tx_desc *desc;
1801 	struct rt2560_tx_data *data;
1802 	struct ieee80211_frame *wh;
1803 	uint16_t dur;
1804 	uint32_t flags = 0;
1805 	int rate, error;
1806 
1807 	desc = &sc->prioq.desc[sc->prioq.cur];
1808 	data = &sc->prioq.data[sc->prioq.cur];
1809 
1810 	rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2;
1811 
1812 	error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
1813 	    BUS_DMA_NOWAIT);
1814 	if (error != 0) {
1815 		printf("%s: could not map mbuf (error %d)\n",
1816 		    sc->sc_dev.dv_xname, error);
1817 		m_freem(m0);
1818 		return error;
1819 	}
1820 
1821 #if NBPFILTER > 0
1822 	if (sc->sc_drvbpf != NULL) {
1823 		struct mbuf mb;
1824 		struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap;
1825 
1826 		tap->wt_flags = 0;
1827 		tap->wt_rate = rate;
1828 		tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq);
1829 		tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags);
1830 		tap->wt_antenna = sc->tx_ant;
1831 
1832 		M_COPY_PKTHDR(&mb, m0);
1833 		mb.m_data = (caddr_t)tap;
1834 		mb.m_len = sc->sc_txtap_len;
1835 		mb.m_next = m0;
1836 		mb.m_pkthdr.len += mb.m_len;
1837 		bpf_mtap(sc->sc_drvbpf, &mb);
1838 	}
1839 #endif
1840 
1841 	data->m = m0;
1842 	data->ni = ni;
1843 
1844 	wh = mtod(m0, struct ieee80211_frame *);
1845 
1846 	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
1847 		flags |= RT2560_TX_ACK;
1848 
1849 		dur = rt2560_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) +
1850 		    RAL_SIFS;
1851 		*(uint16_t *)wh->i_dur = htole16(dur);
1852 
1853 		/* tell hardware to add timestamp for probe responses */
1854 		if ((wh->i_fc[0] &
1855 		    (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) ==
1856 		    (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP))
1857 			flags |= RT2560_TX_TIMESTAMP;
1858 	}
1859 
1860 	rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 0,
1861 	    data->map->dm_segs->ds_addr);
1862 
1863 	bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize,
1864 	    BUS_DMASYNC_PREWRITE);
1865 	bus_dmamap_sync(sc->sc_dmat, sc->prioq.map,
1866 	    sc->prioq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
1867 	    BUS_DMASYNC_PREWRITE);
1868 
1869 	DPRINTFN(10, ("sending mgt frame len=%u idx=%u rate=%u\n",
1870 	    m0->m_pkthdr.len, sc->prioq.cur, rate));
1871 
1872 	/* kick prio */
1873 	sc->prioq.queued++;
1874 	sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT;
1875 	RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO);
1876 
1877 	return 0;
1878 }
1879 
1880 /*
1881  * Build a RTS control frame.
1882  */
1883 static struct mbuf *
1884 rt2560_get_rts(struct rt2560_softc *sc, struct ieee80211_frame *wh,
1885     uint16_t dur)
1886 {
1887 	struct ieee80211_frame_rts *rts;
1888 	struct mbuf *m;
1889 
1890 	MGETHDR(m, M_DONTWAIT, MT_DATA);
1891 	if (m == NULL) {
1892 		sc->sc_ic.ic_stats.is_tx_nobuf++;
1893 		printf("%s: could not allocate RTS frame\n",
1894 		    sc->sc_dev.dv_xname);
1895 		return NULL;
1896 	}
1897 
1898 	rts = mtod(m, struct ieee80211_frame_rts *);
1899 
1900 	rts->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_CTL |
1901 	    IEEE80211_FC0_SUBTYPE_RTS;
1902 	rts->i_fc[1] = IEEE80211_FC1_DIR_NODS;
1903 	*(uint16_t *)rts->i_dur = htole16(dur);
1904 	IEEE80211_ADDR_COPY(rts->i_ra, wh->i_addr1);
1905 	IEEE80211_ADDR_COPY(rts->i_ta, wh->i_addr2);
1906 
1907 	m->m_pkthdr.len = m->m_len = sizeof (struct ieee80211_frame_rts);
1908 
1909 	return m;
1910 }
1911 
1912 static int
1913 rt2560_tx_data(struct rt2560_softc *sc, struct mbuf *m0,
1914     struct ieee80211_node *ni)
1915 {
1916 	struct ieee80211com *ic = &sc->sc_ic;
1917 	struct rt2560_tx_desc *desc;
1918 	struct rt2560_tx_data *data;
1919 	struct rt2560_node *rn;
1920 	struct ieee80211_rateset *rs;
1921 	struct ieee80211_frame *wh;
1922 	struct ieee80211_key *k;
1923 	struct mbuf *mnew;
1924 	uint16_t dur;
1925 	uint32_t flags = 0;
1926 	int rate, error;
1927 
1928 	wh = mtod(m0, struct ieee80211_frame *);
1929 
1930 	if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) {
1931 		rs = &ic->ic_sup_rates[ic->ic_curmode];
1932 		rate = rs->rs_rates[ic->ic_fixed_rate];
1933 	} else {
1934 		rs = &ni->ni_rates;
1935 		rn = (struct rt2560_node *)ni;
1936 		ni->ni_txrate = ieee80211_rssadapt_choose(&rn->rssadapt, rs,
1937 		    wh, m0->m_pkthdr.len, -1, NULL, 0);
1938 		rate = rs->rs_rates[ni->ni_txrate];
1939 	}
1940 	rate &= IEEE80211_RATE_VAL;
1941 
1942 	if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
1943 		k = ieee80211_crypto_encap(ic, ni, m0);
1944 		if (k == NULL) {
1945 			m_freem(m0);
1946 			return ENOBUFS;
1947 		}
1948 
1949 		/* packet header may have moved, reset our local pointer */
1950 		wh = mtod(m0, struct ieee80211_frame *);
1951 	}
1952 
1953 	/*
1954 	 * IEEE Std 802.11-1999, pp 82: "A STA shall use an RTS/CTS exchange
1955 	 * for directed frames only when the length of the MPDU is greater
1956 	 * than the length threshold indicated by [...]" ic_rtsthreshold.
1957 	 */
1958 	if (!IEEE80211_IS_MULTICAST(wh->i_addr1) &&
1959 	    m0->m_pkthdr.len > ic->ic_rtsthreshold) {
1960 		struct mbuf *m;
1961 		int rtsrate, ackrate;
1962 
1963 		rtsrate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2;
1964 		ackrate = rt2560_ack_rate(ic, rate);
1965 
1966 		dur = rt2560_txtime(m0->m_pkthdr.len + 4, rate, ic->ic_flags) +
1967 		      rt2560_txtime(RAL_CTS_SIZE, rtsrate, ic->ic_flags) +
1968 		      rt2560_txtime(RAL_ACK_SIZE, ackrate, ic->ic_flags) +
1969 		      3 * RAL_SIFS;
1970 
1971 		m = rt2560_get_rts(sc, wh, dur);
1972 
1973 		desc = &sc->txq.desc[sc->txq.cur_encrypt];
1974 		data = &sc->txq.data[sc->txq.cur_encrypt];
1975 
1976 		error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m,
1977 		    BUS_DMA_NOWAIT);
1978 		if (error != 0) {
1979 			printf("%s: could not map mbuf (error %d)\n",
1980 			    sc->sc_dev.dv_xname, error);
1981 			m_freem(m);
1982 			m_freem(m0);
1983 			return error;
1984 		}
1985 
1986 		/* avoid multiple free() of the same node for each fragment */
1987 		ieee80211_ref_node(ni);
1988 
1989 		data->m = m;
1990 		data->ni = ni;
1991 
1992 		/* RTS frames are not taken into account for rssadapt */
1993 		data->id.id_node = NULL;
1994 
1995 		rt2560_setup_tx_desc(sc, desc, RT2560_TX_ACK |
1996 		    RT2560_TX_MORE_FRAG, m->m_pkthdr.len, rtsrate, 1,
1997 		    data->map->dm_segs->ds_addr);
1998 
1999 		bus_dmamap_sync(sc->sc_dmat, data->map, 0,
2000 		    data->map->dm_mapsize, BUS_DMASYNC_PREWRITE);
2001 		bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
2002 		    sc->txq.cur_encrypt * RT2560_TX_DESC_SIZE,
2003 		    RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE);
2004 
2005 		sc->txq.queued++;
2006 		sc->txq.cur_encrypt =
2007 		    (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT;
2008 
2009 		/*
2010 		 * IEEE Std 802.11-1999: when an RTS/CTS exchange is used, the
2011 		 * asynchronous data frame shall be transmitted after the CTS
2012 		 * frame and a SIFS period.
2013 		 */
2014 		flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS;
2015 	}
2016 
2017 	data = &sc->txq.data[sc->txq.cur_encrypt];
2018 	desc = &sc->txq.desc[sc->txq.cur_encrypt];
2019 
2020 	error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
2021 	    BUS_DMA_NOWAIT);
2022 	if (error != 0 && error != EFBIG) {
2023 		printf("%s: could not map mbuf (error %d)\n",
2024 		    sc->sc_dev.dv_xname, error);
2025 		m_freem(m0);
2026 		return error;
2027 	}
2028 	if (error != 0) {
2029 		/* too many fragments, linearize */
2030 
2031 		MGETHDR(mnew, M_DONTWAIT, MT_DATA);
2032 		if (mnew == NULL) {
2033 			m_freem(m0);
2034 			return ENOMEM;
2035 		}
2036 
2037 		M_COPY_PKTHDR(mnew, m0);
2038 		if (m0->m_pkthdr.len > MHLEN) {
2039 			MCLGET(mnew, M_DONTWAIT);
2040 			if (!(mnew->m_flags & M_EXT)) {
2041 				m_freem(m0);
2042 				m_freem(mnew);
2043 				return ENOMEM;
2044 			}
2045 		}
2046 
2047 		m_copydata(m0, 0, m0->m_pkthdr.len, mtod(mnew, caddr_t));
2048 		m_freem(m0);
2049 		mnew->m_len = mnew->m_pkthdr.len;
2050 		m0 = mnew;
2051 
2052 		error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0,
2053 		    BUS_DMA_NOWAIT);
2054 		if (error != 0) {
2055 			printf("%s: could not map mbuf (error %d)\n",
2056 			    sc->sc_dev.dv_xname, error);
2057 			m_freem(m0);
2058 			return error;
2059 		}
2060 
2061 		/* packet header have moved, reset our local pointer */
2062 		wh = mtod(m0, struct ieee80211_frame *);
2063 	}
2064 
2065 #if NBPFILTER > 0
2066 	if (sc->sc_drvbpf != NULL) {
2067 		struct mbuf mb;
2068 		struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap;
2069 
2070 		tap->wt_flags = 0;
2071 		tap->wt_rate = rate;
2072 		tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq);
2073 		tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags);
2074 		tap->wt_antenna = sc->tx_ant;
2075 
2076 		M_COPY_PKTHDR(&mb, m0);
2077 		mb.m_data = (caddr_t)tap;
2078 		mb.m_len = sc->sc_txtap_len;
2079 		mb.m_next = m0;
2080 		mb.m_pkthdr.len += mb.m_len;
2081 		bpf_mtap(sc->sc_drvbpf, &mb);
2082 
2083 	}
2084 #endif
2085 
2086 	data->m = m0;
2087 	data->ni = ni;
2088 
2089 	/* remember link conditions for rate adaptation algorithm */
2090 	if (ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) {
2091 		data->id.id_len = m0->m_pkthdr.len;
2092 		data->id.id_rateidx = ni->ni_txrate;
2093 		data->id.id_node = ni;
2094 		data->id.id_rssi = ni->ni_rssi;
2095 	} else
2096 		data->id.id_node = NULL;
2097 
2098 	if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) {
2099 		flags |= RT2560_TX_ACK;
2100 
2101 		dur = rt2560_txtime(RAL_ACK_SIZE, rt2560_ack_rate(ic, rate),
2102 		    ic->ic_flags) + RAL_SIFS;
2103 		*(uint16_t *)wh->i_dur = htole16(dur);
2104 	}
2105 
2106 	rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 1,
2107 	    data->map->dm_segs->ds_addr);
2108 
2109 	bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize,
2110 	    BUS_DMASYNC_PREWRITE);
2111 	bus_dmamap_sync(sc->sc_dmat, sc->txq.map,
2112 	    sc->txq.cur_encrypt * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE,
2113 	    BUS_DMASYNC_PREWRITE);
2114 
2115 	DPRINTFN(10, ("sending data frame len=%u idx=%u rate=%u\n",
2116 	    m0->m_pkthdr.len, sc->txq.cur_encrypt, rate));
2117 
2118 	/* kick encrypt */
2119 	sc->txq.queued++;
2120 	sc->txq.cur_encrypt = (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT;
2121 	RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT);
2122 
2123 	return 0;
2124 }
2125 
2126 static void
2127 rt2560_start(struct ifnet *ifp)
2128 {
2129 	struct rt2560_softc *sc = ifp->if_softc;
2130 	struct ieee80211com *ic = &sc->sc_ic;
2131 	struct mbuf *m0;
2132 	struct ieee80211_node *ni;
2133 	struct ether_header *eh;
2134 
2135 	/*
2136 	 * net80211 may still try to send management frames even if the
2137 	 * IFF_RUNNING flag is not set...
2138 	 */
2139 	if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING)
2140 		return;
2141 
2142 	for (;;) {
2143 		IF_POLL(&ic->ic_mgtq, m0);
2144 		if (m0 != NULL) {
2145 			if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT) {
2146 				ifp->if_flags |= IFF_OACTIVE;
2147 				break;
2148 			}
2149 			IF_DEQUEUE(&ic->ic_mgtq, m0);
2150 			if (m0 == NULL)
2151 				break;
2152 
2153 			ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif;
2154 			m0->m_pkthdr.rcvif = NULL;
2155 #if NBPFILTER > 0
2156 			if (ic->ic_rawbpf != NULL)
2157 				bpf_mtap(ic->ic_rawbpf, m0);
2158 #endif
2159 			if (rt2560_tx_mgt(sc, m0, ni) != 0)
2160 				break;
2161 
2162 		} else {
2163 			if (ic->ic_state != IEEE80211_S_RUN)
2164 				break;
2165 			IFQ_DEQUEUE(&ifp->if_snd, m0);
2166 			if (m0 == NULL)
2167 				break;
2168 			if (sc->txq.queued >= RT2560_TX_RING_COUNT - 1) {
2169 				ifp->if_flags |= IFF_OACTIVE;
2170 				break;
2171 			}
2172 
2173 			if (m0->m_len < sizeof (struct ether_header) &&
2174 			    !(m0 = m_pullup(m0, sizeof (struct ether_header))))
2175                                 continue;
2176 
2177 			eh = mtod(m0, struct ether_header *);
2178 			ni = ieee80211_find_txnode(ic, eh->ether_dhost);
2179 			if (ni == NULL) {
2180 				m_freem(m0);
2181 				continue;
2182 			}
2183 #if NBPFILTER > 0
2184 			if (ifp->if_bpf != NULL)
2185 				bpf_mtap(ifp->if_bpf, m0);
2186 #endif
2187 
2188 			m0 = ieee80211_encap(ic, m0, ni);
2189 			if (m0 == NULL) {
2190 				ieee80211_free_node(ni);
2191 				continue;
2192                         }
2193 
2194 #if NBPFILTER > 0
2195 			if (ic->ic_rawbpf != NULL)
2196 				bpf_mtap(ic->ic_rawbpf, m0);
2197 
2198 #endif
2199 			if (rt2560_tx_data(sc, m0, ni) != 0) {
2200 				ieee80211_free_node(ni);
2201 				ifp->if_oerrors++;
2202 				break;
2203 			}
2204 		}
2205 
2206 		sc->sc_tx_timer = 5;
2207 		ifp->if_timer = 1;
2208 	}
2209 }
2210 
2211 static void
2212 rt2560_watchdog(struct ifnet *ifp)
2213 {
2214 	struct rt2560_softc *sc = ifp->if_softc;
2215 
2216 	ifp->if_timer = 0;
2217 
2218 	if (sc->sc_tx_timer > 0) {
2219 		if (--sc->sc_tx_timer == 0) {
2220 			printf("%s: device timeout\n", sc->sc_dev.dv_xname);
2221 			rt2560_init(ifp);
2222 			ifp->if_oerrors++;
2223 			return;
2224 		}
2225 		ifp->if_timer = 1;
2226 	}
2227 
2228 	ieee80211_watchdog(&sc->sc_ic);
2229 }
2230 
2231 /*
2232  * This function allows for fast channel switching in monitor mode (used by
2233  * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to
2234  * generate a new beacon frame.
2235  */
2236 static int
2237 rt2560_reset(struct ifnet *ifp)
2238 {
2239 	struct rt2560_softc *sc = ifp->if_softc;
2240 	struct ieee80211com *ic = &sc->sc_ic;
2241 
2242 	if (ic->ic_opmode != IEEE80211_M_MONITOR)
2243 		return ENETRESET;
2244 
2245 	rt2560_set_chan(sc, ic->ic_curchan);
2246 
2247 	return 0;
2248 }
2249 
2250 int
2251 rt2560_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
2252 {
2253 	struct rt2560_softc *sc = ifp->if_softc;
2254 	struct ieee80211com *ic = &sc->sc_ic;
2255 	struct ifreq *ifr;
2256 	int s, error = 0;
2257 
2258 	s = splnet();
2259 
2260 	switch (cmd) {
2261 	case SIOCSIFFLAGS:
2262 		if (ifp->if_flags & IFF_UP) {
2263 			if (ifp->if_flags & IFF_RUNNING)
2264 				rt2560_update_promisc(sc);
2265 			else
2266 				rt2560_init(ifp);
2267 		} else {
2268 			if (ifp->if_flags & IFF_RUNNING)
2269 				rt2560_stop(sc);
2270 		}
2271 		break;
2272 
2273 	case SIOCADDMULTI:
2274 	case SIOCDELMULTI:
2275 		ifr = (struct ifreq *)data;
2276 		error = (cmd == SIOCADDMULTI) ?
2277 		    ether_addmulti(ifr, &sc->sc_ec) :
2278 		    ether_delmulti(ifr, &sc->sc_ec);
2279 
2280 		if (error == ENETRESET)
2281 			error = 0;
2282 		break;
2283 
2284 	case SIOCS80211CHANNEL:
2285 		/*
2286 		 * This allows for fast channel switching in monitor mode
2287 		 * (used by kismet). In IBSS mode, we must explicitly reset
2288 		 * the interface to generate a new beacon frame.
2289 		 */
2290 		error = ieee80211_ioctl(ic, cmd, data);
2291 		if (error == ENETRESET &&
2292 		    ic->ic_opmode == IEEE80211_M_MONITOR) {
2293 			rt2560_set_chan(sc, ic->ic_ibss_chan);
2294 			error = 0;
2295 		}
2296 		break;
2297 
2298 	default:
2299 		error = ieee80211_ioctl(ic, cmd, data);
2300 	}
2301 
2302 	if (error == ENETRESET) {
2303 		if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
2304 		    (IFF_UP | IFF_RUNNING))
2305 			rt2560_init(ifp);
2306 		error = 0;
2307 	}
2308 
2309 	splx(s);
2310 
2311 	return error;
2312 }
2313 
2314 static void
2315 rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val)
2316 {
2317 	uint32_t tmp;
2318 	int ntries;
2319 
2320 	for (ntries = 0; ntries < 100; ntries++) {
2321 		if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY))
2322 			break;
2323 		DELAY(1);
2324 	}
2325 	if (ntries == 100) {
2326 		printf("%s: could not write to BBP\n", sc->sc_dev.dv_xname);
2327 		return;
2328 	}
2329 
2330 	tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val;
2331 	RAL_WRITE(sc, RT2560_BBPCSR, tmp);
2332 
2333 	DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val));
2334 }
2335 
2336 static uint8_t
2337 rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg)
2338 {
2339 	uint32_t val;
2340 	int ntries;
2341 
2342 	val = RT2560_BBP_BUSY | reg << 8;
2343 	RAL_WRITE(sc, RT2560_BBPCSR, val);
2344 
2345 	for (ntries = 0; ntries < 100; ntries++) {
2346 		val = RAL_READ(sc, RT2560_BBPCSR);
2347 		if (!(val & RT2560_BBP_BUSY))
2348 			return val & 0xff;
2349 		DELAY(1);
2350 	}
2351 
2352 	printf("%s: could not read from BBP\n", sc->sc_dev.dv_xname);
2353 	return 0;
2354 }
2355 
2356 static void
2357 rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val)
2358 {
2359 	uint32_t tmp;
2360 	int ntries;
2361 
2362 	for (ntries = 0; ntries < 100; ntries++) {
2363 		if (!(RAL_READ(sc, RT2560_RFCSR) & RT2560_RF_BUSY))
2364 			break;
2365 		DELAY(1);
2366 	}
2367 	if (ntries == 100) {
2368 		printf("%s: could not write to RF\n", sc->sc_dev.dv_xname);
2369 		return;
2370 	}
2371 
2372 	tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 |
2373 	    (reg & 0x3);
2374 	RAL_WRITE(sc, RT2560_RFCSR, tmp);
2375 
2376 	/* remember last written value in sc */
2377 	sc->rf_regs[reg] = val;
2378 
2379 	DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff));
2380 }
2381 
2382 static void
2383 rt2560_set_chan(struct rt2560_softc *sc, struct ieee80211_channel *c)
2384 {
2385 	struct ieee80211com *ic = &sc->sc_ic;
2386 	uint8_t power, tmp;
2387 	u_int i, chan;
2388 
2389 	chan = ieee80211_chan2ieee(ic, c);
2390 	if (chan == 0 || chan == IEEE80211_CHAN_ANY)
2391 		return;
2392 
2393 	if (IEEE80211_IS_CHAN_2GHZ(c))
2394 		power = min(sc->txpow[chan - 1], 31);
2395 	else
2396 		power = 31;
2397 
2398 	DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power));
2399 
2400 	switch (sc->rf_rev) {
2401 	case RT2560_RF_2522:
2402 		rt2560_rf_write(sc, RT2560_RF1, 0x00814);
2403 		rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2522_r2[chan - 1]);
2404 		rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040);
2405 		break;
2406 
2407 	case RT2560_RF_2523:
2408 		rt2560_rf_write(sc, RT2560_RF1, 0x08804);
2409 		rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2523_r2[chan - 1]);
2410 		rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x38044);
2411 		rt2560_rf_write(sc, RT2560_RF4,
2412 		    (chan == 14) ? 0x00280 : 0x00286);
2413 		break;
2414 
2415 	case RT2560_RF_2524:
2416 		rt2560_rf_write(sc, RT2560_RF1, 0x0c808);
2417 		rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2524_r2[chan - 1]);
2418 		rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040);
2419 		rt2560_rf_write(sc, RT2560_RF4,
2420 		    (chan == 14) ? 0x00280 : 0x00286);
2421 		break;
2422 
2423 	case RT2560_RF_2525:
2424 		rt2560_rf_write(sc, RT2560_RF1, 0x08808);
2425 		rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_hi_r2[chan - 1]);
2426 		rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044);
2427 		rt2560_rf_write(sc, RT2560_RF4,
2428 		    (chan == 14) ? 0x00280 : 0x00286);
2429 
2430 		rt2560_rf_write(sc, RT2560_RF1, 0x08808);
2431 		rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_r2[chan - 1]);
2432 		rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044);
2433 		rt2560_rf_write(sc, RT2560_RF4,
2434 		    (chan == 14) ? 0x00280 : 0x00286);
2435 		break;
2436 
2437 	case RT2560_RF_2525E:
2438 		rt2560_rf_write(sc, RT2560_RF1, 0x08808);
2439 		rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525e_r2[chan - 1]);
2440 		rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044);
2441 		rt2560_rf_write(sc, RT2560_RF4,
2442 		    (chan == 14) ? 0x00286 : 0x00282);
2443 		break;
2444 
2445 	case RT2560_RF_2526:
2446 		rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_hi_r2[chan - 1]);
2447 		rt2560_rf_write(sc, RT2560_RF4,
2448 		   (chan & 1) ? 0x00386 : 0x00381);
2449 		rt2560_rf_write(sc, RT2560_RF1, 0x08804);
2450 
2451 		rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_r2[chan - 1]);
2452 		rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044);
2453 		rt2560_rf_write(sc, RT2560_RF4,
2454 		    (chan & 1) ? 0x00386 : 0x00381);
2455 		break;
2456 
2457 	/* dual-band RF */
2458 	case RT2560_RF_5222:
2459 		for (i = 0; rt2560_rf5222[i].chan != chan; i++);
2460 
2461 		rt2560_rf_write(sc, RT2560_RF1, rt2560_rf5222[i].r1);
2462 		rt2560_rf_write(sc, RT2560_RF2, rt2560_rf5222[i].r2);
2463 		rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040);
2464 		rt2560_rf_write(sc, RT2560_RF4, rt2560_rf5222[i].r4);
2465 		break;
2466 	}
2467 
2468 	if (ic->ic_opmode != IEEE80211_M_MONITOR &&
2469 	    ic->ic_state != IEEE80211_S_SCAN) {
2470 		/* set Japan filter bit for channel 14 */
2471 		tmp = rt2560_bbp_read(sc, 70);
2472 
2473 		tmp &= ~RT2560_JAPAN_FILTER;
2474 		if (chan == 14)
2475 			tmp |= RT2560_JAPAN_FILTER;
2476 
2477 		rt2560_bbp_write(sc, 70, tmp);
2478 
2479 		DELAY(1000); /* RF needs a 1ms delay here */
2480 		rt2560_disable_rf_tune(sc);
2481 
2482 		/* clear CRC errors */
2483 		RAL_READ(sc, RT2560_CNT0);
2484 	}
2485 }
2486 
2487 /*
2488  * Disable RF auto-tuning.
2489  */
2490 static void
2491 rt2560_disable_rf_tune(struct rt2560_softc *sc)
2492 {
2493 	uint32_t tmp;
2494 
2495 	if (sc->rf_rev != RT2560_RF_2523) {
2496 		tmp = sc->rf_regs[RT2560_RF1] & ~RT2560_RF1_AUTOTUNE;
2497 		rt2560_rf_write(sc, RT2560_RF1, tmp);
2498 	}
2499 
2500 	tmp = sc->rf_regs[RT2560_RF3] & ~RT2560_RF3_AUTOTUNE;
2501 	rt2560_rf_write(sc, RT2560_RF3, tmp);
2502 
2503 	DPRINTFN(2, ("disabling RF autotune\n"));
2504 }
2505 
2506 /*
2507  * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF
2508  * synchronization.
2509  */
2510 static void
2511 rt2560_enable_tsf_sync(struct rt2560_softc *sc)
2512 {
2513 	struct ieee80211com *ic = &sc->sc_ic;
2514 	uint16_t logcwmin, preload;
2515 	uint32_t tmp;
2516 
2517 	/* first, disable TSF synchronization */
2518 	RAL_WRITE(sc, RT2560_CSR14, 0);
2519 
2520 	tmp = 16 * ic->ic_bss->ni_intval;
2521 	RAL_WRITE(sc, RT2560_CSR12, tmp);
2522 
2523 	RAL_WRITE(sc, RT2560_CSR13, 0);
2524 
2525 	logcwmin = 5;
2526 	preload = (ic->ic_opmode == IEEE80211_M_STA) ? 384 : 1024;
2527 	tmp = logcwmin << 16 | preload;
2528 	RAL_WRITE(sc, RT2560_BCNOCSR, tmp);
2529 
2530 	/* finally, enable TSF synchronization */
2531 	tmp = RT2560_ENABLE_TSF | RT2560_ENABLE_TBCN;
2532 	if (ic->ic_opmode == IEEE80211_M_STA)
2533 		tmp |= RT2560_ENABLE_TSF_SYNC(1);
2534 	else
2535 		tmp |= RT2560_ENABLE_TSF_SYNC(2) |
2536 		       RT2560_ENABLE_BEACON_GENERATOR;
2537 	RAL_WRITE(sc, RT2560_CSR14, tmp);
2538 
2539 	DPRINTF(("enabling TSF synchronization\n"));
2540 }
2541 
2542 static void
2543 rt2560_update_plcp(struct rt2560_softc *sc)
2544 {
2545 	struct ieee80211com *ic = &sc->sc_ic;
2546 
2547 	/* no short preamble for 1Mbps */
2548 	RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400);
2549 
2550 	if (!(ic->ic_flags & IEEE80211_F_SHPREAMBLE)) {
2551 		/* values taken from the reference driver */
2552 		RAL_WRITE(sc, RT2560_PLCP2MCSR,   0x00380401);
2553 		RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402);
2554 		RAL_WRITE(sc, RT2560_PLCP11MCSR,  0x000b8403);
2555 	} else {
2556 		/* same values as above or'ed 0x8 */
2557 		RAL_WRITE(sc, RT2560_PLCP2MCSR,   0x00380409);
2558 		RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a);
2559 		RAL_WRITE(sc, RT2560_PLCP11MCSR,  0x000b840b);
2560 	}
2561 
2562 	DPRINTF(("updating PLCP for %s preamble\n",
2563 	    (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "short" : "long"));
2564 }
2565 
2566 /*
2567  * IEEE 802.11a uses short slot time. Refer to IEEE Std 802.11-1999 pp. 85 to
2568  * know how these values are computed.
2569  */
2570 static void
2571 rt2560_update_slot(struct ifnet *ifp)
2572 {
2573 	struct rt2560_softc *sc = ifp->if_softc;
2574 	struct ieee80211com *ic = &sc->sc_ic;
2575 	uint8_t slottime;
2576 	uint16_t sifs, pifs, difs, eifs;
2577 	uint32_t tmp;
2578 
2579 	slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20;
2580 
2581 	/* define the MAC slot boundaries */
2582 	sifs = RAL_SIFS - RT2560_RXTX_TURNAROUND;
2583 	pifs = sifs + slottime;
2584 	difs = sifs + 2 * slottime;
2585 	eifs = (ic->ic_curmode == IEEE80211_MODE_11B) ? 364 : 60;
2586 
2587 	tmp = RAL_READ(sc, RT2560_CSR11);
2588 	tmp = (tmp & ~0x1f00) | slottime << 8;
2589 	RAL_WRITE(sc, RT2560_CSR11, tmp);
2590 
2591 	tmp = pifs << 16 | sifs;
2592 	RAL_WRITE(sc, RT2560_CSR18, tmp);
2593 
2594 	tmp = eifs << 16 | difs;
2595 	RAL_WRITE(sc, RT2560_CSR19, tmp);
2596 
2597 	DPRINTF(("setting slottime to %uus\n", slottime));
2598 }
2599 
2600 static void
2601 rt2560_set_basicrates(struct rt2560_softc *sc)
2602 {
2603 	struct ieee80211com *ic = &sc->sc_ic;
2604 
2605 	/* update basic rate set */
2606 	if (ic->ic_curmode == IEEE80211_MODE_11B) {
2607 		/* 11b basic rates: 1, 2Mbps */
2608 		RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x3);
2609 	} else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) {
2610 		/* 11a basic rates: 6, 12, 24Mbps */
2611 		RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x150);
2612 	} else {
2613 		/* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */
2614 		RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x15f);
2615 	}
2616 }
2617 
2618 static void
2619 rt2560_update_led(struct rt2560_softc *sc, int led1, int led2)
2620 {
2621 	uint32_t tmp;
2622 
2623 	/* set ON period to 70ms and OFF period to 30ms */
2624 	tmp = led1 << 16 | led2 << 17 | 70 << 8 | 30;
2625 	RAL_WRITE(sc, RT2560_LEDCSR, tmp);
2626 }
2627 
2628 static void
2629 rt2560_set_bssid(struct rt2560_softc *sc, uint8_t *bssid)
2630 {
2631 	uint32_t tmp;
2632 
2633 	tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24;
2634 	RAL_WRITE(sc, RT2560_CSR5, tmp);
2635 
2636 	tmp = bssid[4] | bssid[5] << 8;
2637 	RAL_WRITE(sc, RT2560_CSR6, tmp);
2638 
2639 	DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid)));
2640 }
2641 
2642 static void
2643 rt2560_set_macaddr(struct rt2560_softc *sc, uint8_t *addr)
2644 {
2645 	uint32_t tmp;
2646 
2647 	tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24;
2648 	RAL_WRITE(sc, RT2560_CSR3, tmp);
2649 
2650 	tmp = addr[4] | addr[5] << 8;
2651 	RAL_WRITE(sc, RT2560_CSR4, tmp);
2652 
2653 	DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr)));
2654 }
2655 
2656 static void
2657 rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr)
2658 {
2659 	uint32_t tmp;
2660 
2661 	tmp = RAL_READ(sc, RT2560_CSR3);
2662 	addr[0] = tmp & 0xff;
2663 	addr[1] = (tmp >>  8) & 0xff;
2664 	addr[2] = (tmp >> 16) & 0xff;
2665 	addr[3] = (tmp >> 24);
2666 
2667 	tmp = RAL_READ(sc, RT2560_CSR4);
2668 	addr[4] = tmp & 0xff;
2669 	addr[5] = (tmp >> 8) & 0xff;
2670 }
2671 
2672 static void
2673 rt2560_update_promisc(struct rt2560_softc *sc)
2674 {
2675 	struct ifnet *ifp = &sc->sc_if;
2676 	uint32_t tmp;
2677 
2678 	tmp = RAL_READ(sc, RT2560_RXCSR0);
2679 
2680 	tmp &= ~RT2560_DROP_NOT_TO_ME;
2681 	if (!(ifp->if_flags & IFF_PROMISC))
2682 		tmp |= RT2560_DROP_NOT_TO_ME;
2683 
2684 	RAL_WRITE(sc, RT2560_RXCSR0, tmp);
2685 
2686 	DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ?
2687 	    "entering" : "leaving"));
2688 }
2689 
2690 static void
2691 rt2560_set_txantenna(struct rt2560_softc *sc, int antenna)
2692 {
2693 	uint32_t tmp;
2694 	uint8_t tx;
2695 
2696 	tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK;
2697 	if (antenna == 1)
2698 		tx |= RT2560_BBP_ANTA;
2699 	else if (antenna == 2)
2700 		tx |= RT2560_BBP_ANTB;
2701 	else
2702 		tx |= RT2560_BBP_DIVERSITY;
2703 
2704 	/* need to force I/Q flip for RF 2525e, 2526 and 5222 */
2705 	if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526 ||
2706 	    sc->rf_rev == RT2560_RF_5222)
2707 		tx |= RT2560_BBP_FLIPIQ;
2708 
2709 	rt2560_bbp_write(sc, RT2560_BBP_TX, tx);
2710 
2711 	/* update values for CCK and OFDM in BBPCSR1 */
2712 	tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007;
2713 	tmp |= (tx & 0x7) << 16 | (tx & 0x7);
2714 	RAL_WRITE(sc, RT2560_BBPCSR1, tmp);
2715 }
2716 
2717 static void
2718 rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna)
2719 {
2720 	uint8_t rx;
2721 
2722 	rx = rt2560_bbp_read(sc, RT2560_BBP_RX) & ~RT2560_BBP_ANTMASK;
2723 	if (antenna == 1)
2724 		rx |= RT2560_BBP_ANTA;
2725 	else if (antenna == 2)
2726 		rx |= RT2560_BBP_ANTB;
2727 	else
2728 		rx |= RT2560_BBP_DIVERSITY;
2729 
2730 	/* need to force no I/Q flip for RF 2525e and 2526 */
2731 	if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526)
2732 		rx &= ~RT2560_BBP_FLIPIQ;
2733 
2734 	rt2560_bbp_write(sc, RT2560_BBP_RX, rx);
2735 }
2736 
2737 static const char *
2738 rt2560_get_rf(int rev)
2739 {
2740 	switch (rev) {
2741 	case RT2560_RF_2522:	return "RT2522";
2742 	case RT2560_RF_2523:	return "RT2523";
2743 	case RT2560_RF_2524:	return "RT2524";
2744 	case RT2560_RF_2525:	return "RT2525";
2745 	case RT2560_RF_2525E:	return "RT2525e";
2746 	case RT2560_RF_2526:	return "RT2526";
2747 	case RT2560_RF_5222:	return "RT5222";
2748 	default:		return "unknown";
2749 	}
2750 }
2751 
2752 static void
2753 rt2560_read_eeprom(struct rt2560_softc *sc)
2754 {
2755 	uint16_t val;
2756 	int i;
2757 
2758 	val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0);
2759 	sc->rf_rev =   (val >> 11) & 0x1f;
2760 	sc->hw_radio = (val >> 10) & 0x1;
2761 	sc->led_mode = (val >> 6)  & 0x7;
2762 	sc->rx_ant =   (val >> 4)  & 0x3;
2763 	sc->tx_ant =   (val >> 2)  & 0x3;
2764 	sc->nb_ant =   val & 0x3;
2765 
2766 	/* read default values for BBP registers */
2767 	for (i = 0; i < 16; i++) {
2768 		val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i);
2769 		sc->bbp_prom[i].reg = val >> 8;
2770 		sc->bbp_prom[i].val = val & 0xff;
2771 	}
2772 
2773 	/* read Tx power for all b/g channels */
2774 	for (i = 0; i < 14 / 2; i++) {
2775 		val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i);
2776 		sc->txpow[i * 2] = val >> 8;
2777 		sc->txpow[i * 2 + 1] = val & 0xff;
2778 	}
2779 }
2780 
2781 static int
2782 rt2560_bbp_init(struct rt2560_softc *sc)
2783 {
2784 #define N(a)	(sizeof (a) / sizeof ((a)[0]))
2785 	int i, ntries;
2786 
2787 	/* wait for BBP to be ready */
2788 	for (ntries = 0; ntries < 100; ntries++) {
2789 		if (rt2560_bbp_read(sc, RT2560_BBP_VERSION) != 0)
2790 			break;
2791 		DELAY(1);
2792 	}
2793 	if (ntries == 100) {
2794 		printf("%s: timeout waiting for BBP\n", sc->sc_dev.dv_xname);
2795 		return EIO;
2796 	}
2797 
2798 	/* initialize BBP registers to default values */
2799 	for (i = 0; i < N(rt2560_def_bbp); i++) {
2800 		rt2560_bbp_write(sc, rt2560_def_bbp[i].reg,
2801 		    rt2560_def_bbp[i].val);
2802 	}
2803 #if 0
2804 	/* initialize BBP registers to values stored in EEPROM */
2805 	for (i = 0; i < 16; i++) {
2806 		if (sc->bbp_prom[i].reg == 0xff)
2807 			continue;
2808 		rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val);
2809 	}
2810 #endif
2811 
2812 	return 0;
2813 #undef N
2814 }
2815 
2816 static int
2817 rt2560_init(struct ifnet *ifp)
2818 {
2819 #define N(a)	(sizeof (a) / sizeof ((a)[0]))
2820 	struct rt2560_softc *sc = ifp->if_softc;
2821 	struct ieee80211com *ic = &sc->sc_ic;
2822 	uint32_t tmp;
2823 	int i;
2824 
2825 	/* for CardBus, power on the socket */
2826 	if (!(sc->sc_flags & RT2560_ENABLED)) {
2827 		if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) {
2828 			printf("%s: could not enable device\n",
2829 			    sc->sc_dev.dv_xname);
2830 			return EIO;
2831 		}
2832 		sc->sc_flags |= RT2560_ENABLED;
2833 	}
2834 
2835 	rt2560_stop(sc);
2836 
2837 	/* setup tx rings */
2838 	tmp = RT2560_PRIO_RING_COUNT << 24 |
2839 	      RT2560_ATIM_RING_COUNT << 16 |
2840 	      RT2560_TX_RING_COUNT   <<  8 |
2841 	      RT2560_TX_DESC_SIZE;
2842 
2843 	/* rings _must_ be initialized in this _exact_ order! */
2844 	RAL_WRITE(sc, RT2560_TXCSR2, tmp);
2845 	RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr);
2846 	RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr);
2847 	RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr);
2848 	RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr);
2849 
2850 	/* setup rx ring */
2851 	tmp = RT2560_RX_RING_COUNT << 8 | RT2560_RX_DESC_SIZE;
2852 
2853 	RAL_WRITE(sc, RT2560_RXCSR1, tmp);
2854 	RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr);
2855 
2856 	/* initialize MAC registers to default values */
2857 	for (i = 0; i < N(rt2560_def_mac); i++)
2858 		RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val);
2859 
2860 	IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl));
2861 	rt2560_set_macaddr(sc, ic->ic_myaddr);
2862 
2863 	/* set basic rate set (will be updated later) */
2864 	RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153);
2865 
2866 	rt2560_set_txantenna(sc, 1);
2867 	rt2560_set_rxantenna(sc, 1);
2868 	rt2560_update_slot(ifp);
2869 	rt2560_update_plcp(sc);
2870 	rt2560_update_led(sc, 0, 0);
2871 
2872 	RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC);
2873 	RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY);
2874 
2875 	if (rt2560_bbp_init(sc) != 0) {
2876 		rt2560_stop(sc);
2877 		return EIO;
2878 	}
2879 
2880 	/* set default BSS channel */
2881 	ic->ic_bss->ni_chan = ic->ic_ibss_chan;
2882 	rt2560_set_chan(sc, ic->ic_bss->ni_chan);
2883 
2884 	/* kick Rx */
2885 	tmp = RT2560_DROP_PHY_ERROR | RT2560_DROP_CRC_ERROR;
2886 	if (ic->ic_opmode != IEEE80211_M_MONITOR) {
2887 		tmp |= RT2560_DROP_CTL | RT2560_DROP_VERSION_ERROR;
2888 		if (ic->ic_opmode != IEEE80211_M_HOSTAP)
2889 			tmp |= RT2560_DROP_TODS;
2890 		if (!(ifp->if_flags & IFF_PROMISC))
2891 			tmp |= RT2560_DROP_NOT_TO_ME;
2892 	}
2893 	RAL_WRITE(sc, RT2560_RXCSR0, tmp);
2894 
2895 	/* clear old FCS and Rx FIFO errors */
2896 	RAL_READ(sc, RT2560_CNT0);
2897 	RAL_READ(sc, RT2560_CNT4);
2898 
2899 	/* clear any pending interrupts */
2900 	RAL_WRITE(sc, RT2560_CSR7, 0xffffffff);
2901 
2902 	/* enable interrupts */
2903 	RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK);
2904 
2905 	ifp->if_flags &= ~IFF_OACTIVE;
2906 	ifp->if_flags |= IFF_RUNNING;
2907 
2908 	if (ic->ic_opmode == IEEE80211_M_MONITOR)
2909 		ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
2910 	else
2911 		ieee80211_new_state(ic, IEEE80211_S_SCAN, -1);
2912 
2913 	return 0;
2914 #undef N
2915 }
2916 
2917 static void
2918 rt2560_stop(void *priv)
2919 {
2920 	struct rt2560_softc *sc = priv;
2921 	struct ieee80211com *ic = &sc->sc_ic;
2922 	struct ifnet *ifp = ic->ic_ifp;
2923 
2924 	sc->sc_tx_timer = 0;
2925 	ifp->if_timer = 0;
2926 	ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2927 
2928 	ieee80211_new_state(ic, IEEE80211_S_INIT, -1);	/* free all nodes */
2929 
2930 	/* abort Tx */
2931 	RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX);
2932 
2933 	/* disable Rx */
2934 	RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX);
2935 
2936 	/* reset ASIC (and thus, BBP) */
2937 	RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC);
2938 	RAL_WRITE(sc, RT2560_CSR1, 0);
2939 
2940 	/* disable interrupts */
2941 	RAL_WRITE(sc, RT2560_CSR8, 0xffffffff);
2942 
2943 	/* clear any pending interrupt */
2944 	RAL_WRITE(sc, RT2560_CSR7, 0xffffffff);
2945 
2946 	/* reset Tx and Rx rings */
2947 	rt2560_reset_tx_ring(sc, &sc->txq);
2948 	rt2560_reset_tx_ring(sc, &sc->atimq);
2949 	rt2560_reset_tx_ring(sc, &sc->prioq);
2950 	rt2560_reset_tx_ring(sc, &sc->bcnq);
2951 	rt2560_reset_rx_ring(sc, &sc->rxq);
2952 
2953 }
2954 
2955 static void
2956 rt2560_powerhook(int why, void *opaque)
2957 {
2958 	struct rt2560_softc *sc;
2959 	struct ifnet *ifp;
2960 	int s;
2961 
2962 	sc = (struct rt2560_softc *)opaque;
2963 	ifp = &sc->sc_if;
2964 
2965 	s = splnet();
2966 	switch (why) {
2967 	case PWR_SUSPEND:
2968 		sc->sc_suspend = why;
2969 		rt2560_stop(sc);
2970 		if (sc->sc_power != NULL)
2971 			(*sc->sc_power)(sc, why);
2972 		break;
2973 	case PWR_RESUME:
2974 		sc->sc_suspend = why;
2975 		if (ifp->if_flags & IFF_UP) {
2976 			if (sc->sc_power != NULL)
2977 				(*sc->sc_power)(sc, why);
2978 			rt2560_init(ifp);
2979 			if (ifp->if_flags & IFF_RUNNING)
2980 				rt2560_start(ifp);
2981 		}
2982 		break;
2983 	case PWR_STANDBY:
2984 	case PWR_SOFTSUSPEND:
2985 	case PWR_SOFTRESUME:
2986 		break;
2987 	}
2988 	splx(s);
2989 
2990 	return;
2991 }
2992