1 /* $NetBSD: rt2560.c,v 1.38 2020/01/29 15:06:12 thorpej Exp $ */ 2 /* $OpenBSD: rt2560.c,v 1.15 2006/04/20 20:31:12 miod Exp $ */ 3 /* $FreeBSD: rt2560.c,v 1.3 2006/03/21 21:15:43 damien Exp $*/ 4 5 /*- 6 * Copyright (c) 2005, 2006 7 * Damien Bergamini <damien.bergamini@free.fr> 8 * 9 * Permission to use, copy, modify, and distribute this software for any 10 * purpose with or without fee is hereby granted, provided that the above 11 * copyright notice and this permission notice appear in all copies. 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 14 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 15 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 16 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 17 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 18 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 19 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 20 */ 21 22 /*- 23 * Ralink Technology RT2560 chipset driver 24 * http://www.ralinktech.com/ 25 */ 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: rt2560.c,v 1.38 2020/01/29 15:06:12 thorpej Exp $"); 28 29 30 #include <sys/param.h> 31 #include <sys/sockio.h> 32 #include <sys/mbuf.h> 33 #include <sys/kernel.h> 34 #include <sys/socket.h> 35 #include <sys/systm.h> 36 #include <sys/malloc.h> 37 #include <sys/callout.h> 38 #include <sys/conf.h> 39 #include <sys/device.h> 40 41 #include <sys/bus.h> 42 #include <machine/endian.h> 43 #include <sys/intr.h> 44 45 #include <net/bpf.h> 46 #include <net/if.h> 47 #include <net/if_arp.h> 48 #include <net/if_dl.h> 49 #include <net/if_media.h> 50 #include <net/if_types.h> 51 #include <net/if_ether.h> 52 53 #include <netinet/in.h> 54 #include <netinet/in_systm.h> 55 #include <netinet/in_var.h> 56 #include <netinet/ip.h> 57 58 #include <net80211/ieee80211_var.h> 59 #include <net80211/ieee80211_rssadapt.h> 60 #include <net80211/ieee80211_radiotap.h> 61 62 #include <dev/ic/rt2560reg.h> 63 #include <dev/ic/rt2560var.h> 64 65 #ifdef RAL_DEBUG 66 #define DPRINTF(x) do { if (rt2560_debug > 0) printf x; } while (0) 67 #define DPRINTFN(n, x) do { if (rt2560_debug >= (n)) printf x; } while (0) 68 int rt2560_debug = 0; 69 #else 70 #define DPRINTF(x) 71 #define DPRINTFN(n, x) 72 #endif 73 74 static int rt2560_alloc_tx_ring(struct rt2560_softc *, 75 struct rt2560_tx_ring *, int); 76 static void rt2560_reset_tx_ring(struct rt2560_softc *, 77 struct rt2560_tx_ring *); 78 static void rt2560_free_tx_ring(struct rt2560_softc *, 79 struct rt2560_tx_ring *); 80 static int rt2560_alloc_rx_ring(struct rt2560_softc *, 81 struct rt2560_rx_ring *, int); 82 static void rt2560_reset_rx_ring(struct rt2560_softc *, 83 struct rt2560_rx_ring *); 84 static void rt2560_free_rx_ring(struct rt2560_softc *, 85 struct rt2560_rx_ring *); 86 static struct ieee80211_node * 87 rt2560_node_alloc(struct ieee80211_node_table *); 88 static int rt2560_media_change(struct ifnet *); 89 static void rt2560_next_scan(void *); 90 static void rt2560_iter_func(void *, struct ieee80211_node *); 91 static void rt2560_update_rssadapt(void *); 92 static int rt2560_newstate(struct ieee80211com *, enum ieee80211_state, 93 int); 94 static uint16_t rt2560_eeprom_read(struct rt2560_softc *, uint8_t); 95 static void rt2560_encryption_intr(struct rt2560_softc *); 96 static void rt2560_tx_intr(struct rt2560_softc *); 97 static void rt2560_prio_intr(struct rt2560_softc *); 98 static void rt2560_decryption_intr(struct rt2560_softc *); 99 static void rt2560_rx_intr(struct rt2560_softc *); 100 static void rt2560_beacon_expire(struct rt2560_softc *); 101 static void rt2560_wakeup_expire(struct rt2560_softc *); 102 static uint8_t rt2560_rxrate(struct rt2560_rx_desc *); 103 static int rt2560_ack_rate(struct ieee80211com *, int); 104 static uint16_t rt2560_txtime(int, int, uint32_t); 105 static uint8_t rt2560_plcp_signal(int); 106 static void rt2560_setup_tx_desc(struct rt2560_softc *, 107 struct rt2560_tx_desc *, uint32_t, int, int, int, 108 bus_addr_t); 109 static int rt2560_tx_bcn(struct rt2560_softc *, struct mbuf *, 110 struct ieee80211_node *); 111 static int rt2560_tx_mgt(struct rt2560_softc *, struct mbuf *, 112 struct ieee80211_node *); 113 static struct mbuf *rt2560_get_rts(struct rt2560_softc *, 114 struct ieee80211_frame *, uint16_t); 115 static int rt2560_tx_data(struct rt2560_softc *, struct mbuf *, 116 struct ieee80211_node *); 117 static void rt2560_start(struct ifnet *); 118 static void rt2560_watchdog(struct ifnet *); 119 static int rt2560_reset(struct ifnet *); 120 static int rt2560_ioctl(struct ifnet *, u_long, void *); 121 static void rt2560_bbp_write(struct rt2560_softc *, uint8_t, uint8_t); 122 static uint8_t rt2560_bbp_read(struct rt2560_softc *, uint8_t); 123 static void rt2560_rf_write(struct rt2560_softc *, uint8_t, uint32_t); 124 static void rt2560_set_chan(struct rt2560_softc *, 125 struct ieee80211_channel *); 126 static void rt2560_disable_rf_tune(struct rt2560_softc *); 127 static void rt2560_enable_tsf_sync(struct rt2560_softc *); 128 static void rt2560_update_plcp(struct rt2560_softc *); 129 static void rt2560_update_slot(struct ifnet *); 130 static void rt2560_set_basicrates(struct rt2560_softc *); 131 static void rt2560_update_led(struct rt2560_softc *, int, int); 132 static void rt2560_set_bssid(struct rt2560_softc *, uint8_t *); 133 static void rt2560_set_macaddr(struct rt2560_softc *, uint8_t *); 134 static void rt2560_get_macaddr(struct rt2560_softc *, uint8_t *); 135 static void rt2560_update_promisc(struct rt2560_softc *); 136 static void rt2560_set_txantenna(struct rt2560_softc *, int); 137 static void rt2560_set_rxantenna(struct rt2560_softc *, int); 138 static const char *rt2560_get_rf(int); 139 static void rt2560_read_eeprom(struct rt2560_softc *); 140 static int rt2560_bbp_init(struct rt2560_softc *); 141 static int rt2560_init(struct ifnet *); 142 static void rt2560_stop(struct ifnet *, int); 143 static void rt2560_softintr(void *); 144 145 /* 146 * Default values for MAC registers; values taken from the reference driver. 147 */ 148 static const struct { 149 uint32_t reg; 150 uint32_t val; 151 } rt2560_def_mac[] = { 152 { RT2560_PSCSR0, 0x00020002 }, 153 { RT2560_PSCSR1, 0x00000002 }, 154 { RT2560_PSCSR2, 0x00020002 }, 155 { RT2560_PSCSR3, 0x00000002 }, 156 { RT2560_TIMECSR, 0x00003f21 }, 157 { RT2560_CSR9, 0x00000780 }, 158 { RT2560_CSR11, 0x07041483 }, 159 { RT2560_CNT3, 0x00000000 }, 160 { RT2560_TXCSR1, 0x07614562 }, 161 { RT2560_ARSP_PLCP_0, 0x8c8d8b8a }, 162 { RT2560_ACKPCTCSR, 0x7038140a }, 163 { RT2560_ARTCSR1, 0x1d21252d }, 164 { RT2560_ARTCSR2, 0x1919191d }, 165 { RT2560_RXCSR0, 0xffffffff }, 166 { RT2560_RXCSR3, 0xb3aab3af }, 167 { RT2560_PCICSR, 0x000003b8 }, 168 { RT2560_PWRCSR0, 0x3f3b3100 }, 169 { RT2560_GPIOCSR, 0x0000ff00 }, 170 { RT2560_TESTCSR, 0x000000f0 }, 171 { RT2560_PWRCSR1, 0x000001ff }, 172 { RT2560_MACCSR0, 0x00213223 }, 173 { RT2560_MACCSR1, 0x00235518 }, 174 { RT2560_RLPWCSR, 0x00000040 }, 175 { RT2560_RALINKCSR, 0x9a009a11 }, 176 { RT2560_CSR7, 0xffffffff }, 177 { RT2560_BBPCSR1, 0x82188200 }, 178 { RT2560_TXACKCSR0, 0x00000020 }, 179 { RT2560_SECCSR3, 0x0000e78f } 180 }; 181 182 /* 183 * Default values for BBP registers; values taken from the reference driver. 184 */ 185 static const struct { 186 uint8_t reg; 187 uint8_t val; 188 } rt2560_def_bbp[] = { 189 { 3, 0x02 }, 190 { 4, 0x19 }, 191 { 14, 0x1c }, 192 { 15, 0x30 }, 193 { 16, 0xac }, 194 { 17, 0x48 }, 195 { 18, 0x18 }, 196 { 19, 0xff }, 197 { 20, 0x1e }, 198 { 21, 0x08 }, 199 { 22, 0x08 }, 200 { 23, 0x08 }, 201 { 24, 0x80 }, 202 { 25, 0x50 }, 203 { 26, 0x08 }, 204 { 27, 0x23 }, 205 { 30, 0x10 }, 206 { 31, 0x2b }, 207 { 32, 0xb9 }, 208 { 34, 0x12 }, 209 { 35, 0x50 }, 210 { 39, 0xc4 }, 211 { 40, 0x02 }, 212 { 41, 0x60 }, 213 { 53, 0x10 }, 214 { 54, 0x18 }, 215 { 56, 0x08 }, 216 { 57, 0x10 }, 217 { 58, 0x08 }, 218 { 61, 0x60 }, 219 { 62, 0x10 }, 220 { 75, 0xff } 221 }; 222 223 /* 224 * Default values for RF register R2 indexed by channel numbers; values taken 225 * from the reference driver. 226 */ 227 static const uint32_t rt2560_rf2522_r2[] = { 228 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 229 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 230 }; 231 232 static const uint32_t rt2560_rf2523_r2[] = { 233 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 234 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 235 }; 236 237 static const uint32_t rt2560_rf2524_r2[] = { 238 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 239 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 240 }; 241 242 static const uint32_t rt2560_rf2525_r2[] = { 243 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 244 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 245 }; 246 247 static const uint32_t rt2560_rf2525_hi_r2[] = { 248 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 249 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 250 }; 251 252 static const uint32_t rt2560_rf2525e_r2[] = { 253 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 254 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 255 }; 256 257 static const uint32_t rt2560_rf2526_hi_r2[] = { 258 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 259 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 260 }; 261 262 static const uint32_t rt2560_rf2526_r2[] = { 263 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 264 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 265 }; 266 267 /* 268 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 269 * values taken from the reference driver. 270 */ 271 static const struct { 272 uint8_t chan; 273 uint32_t r1; 274 uint32_t r2; 275 uint32_t r4; 276 } rt2560_rf5222[] = { 277 { 1, 0x08808, 0x0044d, 0x00282 }, 278 { 2, 0x08808, 0x0044e, 0x00282 }, 279 { 3, 0x08808, 0x0044f, 0x00282 }, 280 { 4, 0x08808, 0x00460, 0x00282 }, 281 { 5, 0x08808, 0x00461, 0x00282 }, 282 { 6, 0x08808, 0x00462, 0x00282 }, 283 { 7, 0x08808, 0x00463, 0x00282 }, 284 { 8, 0x08808, 0x00464, 0x00282 }, 285 { 9, 0x08808, 0x00465, 0x00282 }, 286 { 10, 0x08808, 0x00466, 0x00282 }, 287 { 11, 0x08808, 0x00467, 0x00282 }, 288 { 12, 0x08808, 0x00468, 0x00282 }, 289 { 13, 0x08808, 0x00469, 0x00282 }, 290 { 14, 0x08808, 0x0046b, 0x00286 }, 291 292 { 36, 0x08804, 0x06225, 0x00287 }, 293 { 40, 0x08804, 0x06226, 0x00287 }, 294 { 44, 0x08804, 0x06227, 0x00287 }, 295 { 48, 0x08804, 0x06228, 0x00287 }, 296 { 52, 0x08804, 0x06229, 0x00287 }, 297 { 56, 0x08804, 0x0622a, 0x00287 }, 298 { 60, 0x08804, 0x0622b, 0x00287 }, 299 { 64, 0x08804, 0x0622c, 0x00287 }, 300 301 { 100, 0x08804, 0x02200, 0x00283 }, 302 { 104, 0x08804, 0x02201, 0x00283 }, 303 { 108, 0x08804, 0x02202, 0x00283 }, 304 { 112, 0x08804, 0x02203, 0x00283 }, 305 { 116, 0x08804, 0x02204, 0x00283 }, 306 { 120, 0x08804, 0x02205, 0x00283 }, 307 { 124, 0x08804, 0x02206, 0x00283 }, 308 { 128, 0x08804, 0x02207, 0x00283 }, 309 { 132, 0x08804, 0x02208, 0x00283 }, 310 { 136, 0x08804, 0x02209, 0x00283 }, 311 { 140, 0x08804, 0x0220a, 0x00283 }, 312 313 { 149, 0x08808, 0x02429, 0x00281 }, 314 { 153, 0x08808, 0x0242b, 0x00281 }, 315 { 157, 0x08808, 0x0242d, 0x00281 }, 316 { 161, 0x08808, 0x0242f, 0x00281 } 317 }; 318 319 int 320 rt2560_attach(void *xsc, int id) 321 { 322 struct rt2560_softc *sc = xsc; 323 struct ieee80211com *ic = &sc->sc_ic; 324 struct ifnet *ifp = &sc->sc_if; 325 int error, i; 326 327 callout_init(&sc->scan_ch, 0); 328 callout_init(&sc->rssadapt_ch, 0); 329 330 /* retrieve RT2560 rev. no */ 331 sc->asic_rev = RAL_READ(sc, RT2560_CSR0); 332 333 /* retrieve MAC address */ 334 rt2560_get_macaddr(sc, ic->ic_myaddr); 335 336 aprint_normal_dev(sc->sc_dev, "802.11 address %s\n", 337 ether_sprintf(ic->ic_myaddr)); 338 339 /* retrieve RF rev. no and various other things from EEPROM */ 340 rt2560_read_eeprom(sc); 341 342 aprint_normal_dev(sc->sc_dev, "MAC/BBP RT2560 (rev 0x%02x), RF %s\n", 343 sc->asic_rev, rt2560_get_rf(sc->rf_rev)); 344 345 sc->sc_soft_ih = softint_establish(SOFTINT_NET, rt2560_softintr, sc); 346 if (sc->sc_soft_ih == NULL) { 347 aprint_error_dev(sc->sc_dev, "could not establish softint\n)"); 348 goto fail0; 349 } 350 351 /* 352 * Allocate Tx and Rx rings. 353 */ 354 error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT); 355 if (error != 0) { 356 aprint_error_dev(sc->sc_dev, "could not allocate Tx ring\n)"); 357 goto fail1; 358 } 359 360 error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT); 361 if (error != 0) { 362 aprint_error_dev(sc->sc_dev, "could not allocate ATIM ring\n"); 363 goto fail2; 364 } 365 366 error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT); 367 if (error != 0) { 368 aprint_error_dev(sc->sc_dev, "could not allocate Prio ring\n"); 369 goto fail3; 370 } 371 372 error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT); 373 if (error != 0) { 374 aprint_error_dev(sc->sc_dev, "could not allocate Beacon ring\n"); 375 goto fail4; 376 } 377 378 error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT); 379 if (error != 0) { 380 aprint_error_dev(sc->sc_dev, "could not allocate Rx ring\n"); 381 goto fail5; 382 } 383 384 ifp->if_softc = sc; 385 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 386 ifp->if_init = rt2560_init; 387 ifp->if_stop = rt2560_stop; 388 ifp->if_ioctl = rt2560_ioctl; 389 ifp->if_start = rt2560_start; 390 ifp->if_watchdog = rt2560_watchdog; 391 IFQ_SET_READY(&ifp->if_snd); 392 memcpy(ifp->if_xname, device_xname(sc->sc_dev), IFNAMSIZ); 393 394 ic->ic_ifp = ifp; 395 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 396 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 397 ic->ic_state = IEEE80211_S_INIT; 398 399 /* set device capabilities */ 400 ic->ic_caps = 401 IEEE80211_C_IBSS | /* IBSS mode supported */ 402 IEEE80211_C_MONITOR | /* monitor mode supported */ 403 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 404 IEEE80211_C_TXPMGT | /* tx power management */ 405 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 406 IEEE80211_C_SHSLOT | /* short slot time supported */ 407 IEEE80211_C_WPA; /* 802.11i */ 408 409 if (sc->rf_rev == RT2560_RF_5222) { 410 /* set supported .11a rates */ 411 ic->ic_sup_rates[IEEE80211_MODE_11A] = ieee80211_std_rateset_11a; 412 413 /* set supported .11a channels */ 414 for (i = 36; i <= 64; i += 4) { 415 ic->ic_channels[i].ic_freq = 416 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 417 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 418 } 419 for (i = 100; i <= 140; i += 4) { 420 ic->ic_channels[i].ic_freq = 421 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 422 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 423 } 424 for (i = 149; i <= 161; i += 4) { 425 ic->ic_channels[i].ic_freq = 426 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 427 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 428 } 429 } 430 431 /* set supported .11b and .11g rates */ 432 ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b; 433 ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g; 434 435 /* set supported .11b and .11g channels (1 through 14) */ 436 for (i = 1; i <= 14; i++) { 437 ic->ic_channels[i].ic_freq = 438 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 439 ic->ic_channels[i].ic_flags = 440 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 441 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 442 } 443 444 error = if_initialize(ifp); 445 if (error != 0) { 446 aprint_error_dev(sc->sc_dev, "if_initialize failed(%d)\n", 447 error); 448 goto fail6; 449 } 450 ieee80211_ifattach(ic); 451 /* Use common softint-based if_input */ 452 ifp->if_percpuq = if_percpuq_create(ifp); 453 if_register(ifp); 454 455 ic->ic_node_alloc = rt2560_node_alloc; 456 ic->ic_updateslot = rt2560_update_slot; 457 ic->ic_reset = rt2560_reset; 458 459 /* override state transition machine */ 460 sc->sc_newstate = ic->ic_newstate; 461 ic->ic_newstate = rt2560_newstate; 462 ieee80211_media_init(ic, rt2560_media_change, ieee80211_media_status); 463 464 bpf_attach2(ifp, DLT_IEEE802_11_RADIO, 465 sizeof(struct ieee80211_frame) + 64, &sc->sc_drvbpf); 466 467 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 468 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 469 sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2560_RX_RADIOTAP_PRESENT); 470 471 sc->sc_txtap_len = sizeof sc->sc_txtapu; 472 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 473 sc->sc_txtap.wt_ihdr.it_present = htole32(RT2560_TX_RADIOTAP_PRESENT); 474 475 476 sc->dwelltime = 200; 477 478 ieee80211_announce(ic); 479 480 if (pmf_device_register(sc->sc_dev, NULL, NULL)) 481 pmf_class_network_register(sc->sc_dev, ifp); 482 else 483 aprint_error_dev(sc->sc_dev, 484 "couldn't establish power handler\n"); 485 486 return 0; 487 488 fail6: rt2560_free_rx_ring(sc, &sc->rxq); 489 fail5: rt2560_free_tx_ring(sc, &sc->bcnq); 490 fail4: rt2560_free_tx_ring(sc, &sc->prioq); 491 fail3: rt2560_free_tx_ring(sc, &sc->atimq); 492 fail2: rt2560_free_tx_ring(sc, &sc->txq); 493 fail1: softint_disestablish(sc->sc_soft_ih); 494 sc->sc_soft_ih = NULL; 495 fail0: return ENXIO; 496 } 497 498 499 int 500 rt2560_detach(void *xsc) 501 { 502 struct rt2560_softc *sc = xsc; 503 struct ifnet *ifp = &sc->sc_if; 504 505 callout_stop(&sc->scan_ch); 506 callout_stop(&sc->rssadapt_ch); 507 508 pmf_device_deregister(sc->sc_dev); 509 510 rt2560_stop(ifp, 1); 511 512 ieee80211_ifdetach(&sc->sc_ic); /* free all nodes */ 513 if_detach(ifp); 514 515 rt2560_free_tx_ring(sc, &sc->txq); 516 rt2560_free_tx_ring(sc, &sc->atimq); 517 rt2560_free_tx_ring(sc, &sc->prioq); 518 rt2560_free_tx_ring(sc, &sc->bcnq); 519 rt2560_free_rx_ring(sc, &sc->rxq); 520 521 if (sc->sc_soft_ih != NULL) { 522 softint_disestablish(sc->sc_soft_ih); 523 sc->sc_soft_ih = NULL; 524 } 525 526 return 0; 527 } 528 529 int 530 rt2560_alloc_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring, 531 int count) 532 { 533 int i, nsegs, error; 534 535 ring->count = count; 536 ring->queued = 0; 537 ring->cur = ring->next = 0; 538 ring->cur_encrypt = ring->next_encrypt = 0; 539 540 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 1, 541 count * RT2560_TX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 542 if (error != 0) { 543 aprint_error_dev(sc->sc_dev, "could not create desc DMA map\n"); 544 goto fail; 545 } 546 547 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 548 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 549 if (error != 0) { 550 aprint_error_dev(sc->sc_dev, "could not allocate DMA memory\n"); 551 goto fail; 552 } 553 554 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 555 count * RT2560_TX_DESC_SIZE, (void **)&ring->desc, 556 BUS_DMA_NOWAIT); 557 if (error != 0) { 558 aprint_error_dev(sc->sc_dev, "could not map desc DMA memory\n"); 559 goto fail; 560 } 561 562 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 563 count * RT2560_TX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 564 if (error != 0) { 565 aprint_error_dev(sc->sc_dev, "could not load desc DMA map\n"); 566 goto fail; 567 } 568 569 memset(ring->desc, 0, count * RT2560_TX_DESC_SIZE); 570 ring->physaddr = ring->map->dm_segs->ds_addr; 571 572 ring->data = malloc(count * sizeof (struct rt2560_tx_data), M_DEVBUF, 573 M_WAITOK | M_ZERO); 574 575 for (i = 0; i < count; i++) { 576 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 577 RT2560_MAX_SCATTER, MCLBYTES, 0, BUS_DMA_NOWAIT, 578 &ring->data[i].map); 579 if (error != 0) { 580 aprint_error_dev(sc->sc_dev, "could not create DMA map\n"); 581 goto fail; 582 } 583 } 584 585 return 0; 586 587 fail: rt2560_free_tx_ring(sc, ring); 588 return error; 589 } 590 591 void 592 rt2560_reset_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 593 { 594 struct rt2560_tx_desc *desc; 595 struct rt2560_tx_data *data; 596 int i; 597 598 for (i = 0; i < ring->count; i++) { 599 desc = &ring->desc[i]; 600 data = &ring->data[i]; 601 602 if (data->m != NULL) { 603 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 604 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 605 bus_dmamap_unload(sc->sc_dmat, data->map); 606 m_freem(data->m); 607 data->m = NULL; 608 } 609 610 if (data->ni != NULL) { 611 ieee80211_free_node(data->ni); 612 data->ni = NULL; 613 } 614 615 desc->flags = 0; 616 } 617 618 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 619 BUS_DMASYNC_PREWRITE); 620 621 ring->queued = 0; 622 ring->cur = ring->next = 0; 623 ring->cur_encrypt = ring->next_encrypt = 0; 624 } 625 626 void 627 rt2560_free_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 628 { 629 struct rt2560_tx_data *data; 630 int i; 631 632 if (ring->desc != NULL) { 633 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 634 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 635 bus_dmamap_unload(sc->sc_dmat, ring->map); 636 bus_dmamem_unmap(sc->sc_dmat, (void *)ring->desc, 637 ring->count * RT2560_TX_DESC_SIZE); 638 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 639 } 640 641 if (ring->data != NULL) { 642 for (i = 0; i < ring->count; i++) { 643 data = &ring->data[i]; 644 645 if (data->m != NULL) { 646 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 647 data->map->dm_mapsize, 648 BUS_DMASYNC_POSTWRITE); 649 bus_dmamap_unload(sc->sc_dmat, data->map); 650 m_freem(data->m); 651 } 652 653 if (data->ni != NULL) 654 ieee80211_free_node(data->ni); 655 656 657 if (data->map != NULL) 658 bus_dmamap_destroy(sc->sc_dmat, data->map); 659 } 660 free(ring->data, M_DEVBUF); 661 } 662 } 663 664 int 665 rt2560_alloc_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring, 666 int count) 667 { 668 struct rt2560_rx_desc *desc; 669 struct rt2560_rx_data *data; 670 int i, nsegs, error; 671 672 ring->count = count; 673 ring->cur = ring->next = 0; 674 ring->cur_decrypt = 0; 675 676 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 1, 677 count * RT2560_RX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 678 if (error != 0) { 679 aprint_error_dev(sc->sc_dev, "could not create desc DMA map\n"); 680 goto fail; 681 } 682 683 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 684 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 685 if (error != 0) { 686 aprint_error_dev(sc->sc_dev, "could not allocate DMA memory\n"); 687 goto fail; 688 } 689 690 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 691 count * RT2560_RX_DESC_SIZE, (void **)&ring->desc, 692 BUS_DMA_NOWAIT); 693 if (error != 0) { 694 aprint_error_dev(sc->sc_dev, "could not map desc DMA memory\n"); 695 goto fail; 696 } 697 698 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 699 count * RT2560_RX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 700 if (error != 0) { 701 aprint_error_dev(sc->sc_dev, "could not load desc DMA map\n"); 702 goto fail; 703 } 704 705 memset(ring->desc, 0, count * RT2560_RX_DESC_SIZE); 706 ring->physaddr = ring->map->dm_segs->ds_addr; 707 708 ring->data = malloc(count * sizeof (struct rt2560_rx_data), M_DEVBUF, 709 M_WAITOK | M_ZERO); 710 711 /* 712 * Pre-allocate Rx buffers and populate Rx ring. 713 */ 714 for (i = 0; i < count; i++) { 715 desc = &sc->rxq.desc[i]; 716 data = &sc->rxq.data[i]; 717 718 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 719 0, BUS_DMA_NOWAIT, &data->map); 720 if (error != 0) { 721 aprint_error_dev(sc->sc_dev, "could not create DMA map\n"); 722 goto fail; 723 } 724 725 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 726 if (data->m == NULL) { 727 aprint_error_dev(sc->sc_dev, "could not allocate rx mbuf\n"); 728 error = ENOMEM; 729 goto fail; 730 } 731 732 MCLGET(data->m, M_DONTWAIT); 733 if (!(data->m->m_flags & M_EXT)) { 734 aprint_error_dev(sc->sc_dev, "could not allocate rx mbuf cluster\n"); 735 error = ENOMEM; 736 goto fail; 737 } 738 739 error = bus_dmamap_load(sc->sc_dmat, data->map, 740 mtod(data->m, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 741 if (error != 0) { 742 aprint_error_dev(sc->sc_dev, "could not load rx buf DMA map"); 743 goto fail; 744 } 745 746 desc->flags = htole32(RT2560_RX_BUSY); 747 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 748 } 749 750 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 751 BUS_DMASYNC_PREWRITE); 752 753 return 0; 754 755 fail: rt2560_free_rx_ring(sc, ring); 756 return error; 757 } 758 759 void 760 rt2560_reset_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 761 { 762 int i; 763 764 for (i = 0; i < ring->count; i++) { 765 ring->desc[i].flags = htole32(RT2560_RX_BUSY); 766 ring->data[i].drop = 0; 767 } 768 769 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 770 BUS_DMASYNC_PREWRITE); 771 772 ring->cur = ring->next = 0; 773 ring->cur_decrypt = 0; 774 } 775 776 void 777 rt2560_free_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 778 { 779 struct rt2560_rx_data *data; 780 int i; 781 782 if (ring->desc != NULL) { 783 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 784 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 785 bus_dmamap_unload(sc->sc_dmat, ring->map); 786 bus_dmamem_unmap(sc->sc_dmat, (void *)ring->desc, 787 ring->count * RT2560_RX_DESC_SIZE); 788 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 789 } 790 791 if (ring->data != NULL) { 792 for (i = 0; i < ring->count; i++) { 793 data = &ring->data[i]; 794 795 if (data->m != NULL) { 796 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 797 data->map->dm_mapsize, 798 BUS_DMASYNC_POSTREAD); 799 bus_dmamap_unload(sc->sc_dmat, data->map); 800 m_freem(data->m); 801 } 802 803 if (data->map != NULL) 804 bus_dmamap_destroy(sc->sc_dmat, data->map); 805 } 806 free(ring->data, M_DEVBUF); 807 } 808 } 809 810 struct ieee80211_node * 811 rt2560_node_alloc(struct ieee80211_node_table *nt) 812 { 813 struct rt2560_node *rn; 814 815 rn = malloc(sizeof (struct rt2560_node), M_80211_NODE, 816 M_NOWAIT | M_ZERO); 817 818 return (rn != NULL) ? &rn->ni : NULL; 819 } 820 821 int 822 rt2560_media_change(struct ifnet *ifp) 823 { 824 int error; 825 826 error = ieee80211_media_change(ifp); 827 if (error != ENETRESET) 828 return error; 829 830 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 831 rt2560_init(ifp); 832 833 return 0; 834 } 835 836 /* 837 * This function is called periodically (every 200ms) during scanning to 838 * switch from one channel to another. 839 */ 840 void 841 rt2560_next_scan(void *arg) 842 { 843 struct rt2560_softc *sc = arg; 844 struct ieee80211com *ic = &sc->sc_ic; 845 int s; 846 847 s = splnet(); 848 if (ic->ic_state == IEEE80211_S_SCAN) 849 ieee80211_next_scan(ic); 850 splx(s); 851 } 852 853 /* 854 * This function is called for each neighbor node. 855 */ 856 void 857 rt2560_iter_func(void *arg, struct ieee80211_node *ni) 858 { 859 struct rt2560_node *rn = (struct rt2560_node *)ni; 860 861 ieee80211_rssadapt_updatestats(&rn->rssadapt); 862 } 863 864 /* 865 * This function is called periodically (every 100ms) in RUN state to update 866 * the rate adaptation statistics. 867 */ 868 void 869 rt2560_update_rssadapt(void *arg) 870 { 871 struct rt2560_softc *sc = arg; 872 struct ieee80211com *ic = &sc->sc_ic; 873 int s; 874 875 s = splnet(); 876 ieee80211_iterate_nodes(&ic->ic_sta, rt2560_iter_func, arg); 877 878 callout_reset(&sc->rssadapt_ch, hz / 10, rt2560_update_rssadapt, sc); 879 splx(s); 880 } 881 882 int 883 rt2560_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 884 { 885 struct rt2560_softc *sc = ic->ic_ifp->if_softc; 886 enum ieee80211_state ostate; 887 struct ieee80211_node *ni; 888 struct mbuf *m; 889 int error = 0; 890 891 ostate = ic->ic_state; 892 callout_stop(&sc->scan_ch); 893 894 switch (nstate) { 895 case IEEE80211_S_INIT: 896 callout_stop(&sc->rssadapt_ch); 897 898 if (ostate == IEEE80211_S_RUN) { 899 /* abort TSF synchronization */ 900 RAL_WRITE(sc, RT2560_CSR14, 0); 901 902 /* turn association led off */ 903 rt2560_update_led(sc, 0, 0); 904 } 905 break; 906 907 case IEEE80211_S_SCAN: 908 rt2560_set_chan(sc, ic->ic_curchan); 909 callout_reset(&sc->scan_ch, (sc->dwelltime * hz) / 1000, 910 rt2560_next_scan, sc); 911 break; 912 913 case IEEE80211_S_AUTH: 914 rt2560_set_chan(sc, ic->ic_curchan); 915 break; 916 917 case IEEE80211_S_ASSOC: 918 rt2560_set_chan(sc, ic->ic_curchan); 919 break; 920 921 case IEEE80211_S_RUN: 922 rt2560_set_chan(sc, ic->ic_curchan); 923 924 ni = ic->ic_bss; 925 926 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 927 rt2560_update_plcp(sc); 928 rt2560_set_basicrates(sc); 929 rt2560_set_bssid(sc, ni->ni_bssid); 930 } 931 932 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 933 ic->ic_opmode == IEEE80211_M_IBSS) { 934 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 935 if (m == NULL) { 936 aprint_error_dev(sc->sc_dev, "could not allocate beacon\n"); 937 error = ENOBUFS; 938 break; 939 } 940 941 ieee80211_ref_node(ni); 942 error = rt2560_tx_bcn(sc, m, ni); 943 if (error != 0) 944 break; 945 } 946 947 /* turn association led on */ 948 rt2560_update_led(sc, 1, 0); 949 950 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 951 callout_reset(&sc->rssadapt_ch, hz / 10, 952 rt2560_update_rssadapt, sc); 953 rt2560_enable_tsf_sync(sc); 954 } 955 break; 956 } 957 958 return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg); 959 } 960 961 /* 962 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or 963 * 93C66). 964 */ 965 uint16_t 966 rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr) 967 { 968 uint32_t tmp; 969 uint16_t val; 970 int n; 971 972 /* clock C once before the first command */ 973 RT2560_EEPROM_CTL(sc, 0); 974 975 RT2560_EEPROM_CTL(sc, RT2560_S); 976 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 977 RT2560_EEPROM_CTL(sc, RT2560_S); 978 979 /* write start bit (1) */ 980 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 981 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 982 983 /* write READ opcode (10) */ 984 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 985 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 986 RT2560_EEPROM_CTL(sc, RT2560_S); 987 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 988 989 /* write address (A5-A0 or A7-A0) */ 990 n = (RAL_READ(sc, RT2560_CSR21) & RT2560_93C46) ? 5 : 7; 991 for (; n >= 0; n--) { 992 RT2560_EEPROM_CTL(sc, RT2560_S | 993 (((addr >> n) & 1) << RT2560_SHIFT_D)); 994 RT2560_EEPROM_CTL(sc, RT2560_S | 995 (((addr >> n) & 1) << RT2560_SHIFT_D) | RT2560_C); 996 } 997 998 RT2560_EEPROM_CTL(sc, RT2560_S); 999 1000 /* read data Q15-Q0 */ 1001 val = 0; 1002 for (n = 15; n >= 0; n--) { 1003 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 1004 tmp = RAL_READ(sc, RT2560_CSR21); 1005 val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n; 1006 RT2560_EEPROM_CTL(sc, RT2560_S); 1007 } 1008 1009 RT2560_EEPROM_CTL(sc, 0); 1010 1011 /* clear Chip Select and clock C */ 1012 RT2560_EEPROM_CTL(sc, RT2560_S); 1013 RT2560_EEPROM_CTL(sc, 0); 1014 RT2560_EEPROM_CTL(sc, RT2560_C); 1015 1016 return val; 1017 } 1018 1019 /* 1020 * Some frames were processed by the hardware cipher engine and are ready for 1021 * transmission. 1022 */ 1023 void 1024 rt2560_encryption_intr(struct rt2560_softc *sc) 1025 { 1026 struct rt2560_tx_desc *desc; 1027 int hw; 1028 1029 /* retrieve last descriptor index processed by cipher engine */ 1030 hw = (RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr) / 1031 RT2560_TX_DESC_SIZE; 1032 1033 for (; sc->txq.next_encrypt != hw;) { 1034 desc = &sc->txq.desc[sc->txq.next_encrypt]; 1035 1036 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1037 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 1038 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 1039 1040 if (le32toh(desc->flags) & 1041 (RT2560_TX_BUSY | RT2560_TX_CIPHER_BUSY)) 1042 break; 1043 1044 /* for TKIP, swap eiv field to fix a bug in ASIC */ 1045 if ((le32toh(desc->flags) & RT2560_TX_CIPHER_MASK) == 1046 RT2560_TX_CIPHER_TKIP) 1047 desc->eiv = bswap32(desc->eiv); 1048 1049 /* mark the frame ready for transmission */ 1050 desc->flags |= htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 1051 1052 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1053 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 1054 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1055 1056 DPRINTFN(15, ("encryption done idx=%u\n", 1057 sc->txq.next_encrypt)); 1058 1059 sc->txq.next_encrypt = 1060 (sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT; 1061 } 1062 1063 /* kick Tx */ 1064 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX); 1065 } 1066 1067 void 1068 rt2560_tx_intr(struct rt2560_softc *sc) 1069 { 1070 struct ieee80211com *ic = &sc->sc_ic; 1071 struct ifnet *ifp = ic->ic_ifp; 1072 struct rt2560_tx_desc *desc; 1073 struct rt2560_tx_data *data; 1074 struct rt2560_node *rn; 1075 int s; 1076 1077 s = splnet(); 1078 1079 for (;;) { 1080 desc = &sc->txq.desc[sc->txq.next]; 1081 data = &sc->txq.data[sc->txq.next]; 1082 1083 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1084 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1085 BUS_DMASYNC_POSTREAD); 1086 1087 if ((le32toh(desc->flags) & RT2560_TX_BUSY) || 1088 (le32toh(desc->flags) & RT2560_TX_CIPHER_BUSY) || 1089 !(le32toh(desc->flags) & RT2560_TX_VALID)) 1090 break; 1091 1092 rn = (struct rt2560_node *)data->ni; 1093 1094 switch (le32toh(desc->flags) & RT2560_TX_RESULT_MASK) { 1095 case RT2560_TX_SUCCESS: 1096 DPRINTFN(10, ("data frame sent successfully\n")); 1097 if (data->id.id_node != NULL) { 1098 ieee80211_rssadapt_raise_rate(ic, 1099 &rn->rssadapt, &data->id); 1100 } 1101 if_statinc(ifp, if_opackets); 1102 break; 1103 1104 case RT2560_TX_SUCCESS_RETRY: 1105 DPRINTFN(9, ("data frame sent after %u retries\n", 1106 (le32toh(desc->flags) >> 5) & 0x7)); 1107 if_statinc(ifp, if_opackets); 1108 break; 1109 1110 case RT2560_TX_FAIL_RETRY: 1111 DPRINTFN(9, ("sending data frame failed (too much " 1112 "retries)\n")); 1113 if (data->id.id_node != NULL) { 1114 ieee80211_rssadapt_lower_rate(ic, data->ni, 1115 &rn->rssadapt, &data->id); 1116 } 1117 if_statinc(ifp, if_oerrors); 1118 break; 1119 1120 case RT2560_TX_FAIL_INVALID: 1121 case RT2560_TX_FAIL_OTHER: 1122 default: 1123 aprint_error_dev(sc->sc_dev, 1124 "sending data frame failed 0x%08x\n", 1125 le32toh(desc->flags)); 1126 if_statinc(ifp, if_oerrors); 1127 } 1128 1129 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1130 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1131 bus_dmamap_unload(sc->sc_dmat, data->map); 1132 m_freem(data->m); 1133 data->m = NULL; 1134 ieee80211_free_node(data->ni); 1135 data->ni = NULL; 1136 1137 /* descriptor is no longer valid */ 1138 desc->flags &= ~htole32(RT2560_TX_VALID); 1139 1140 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1141 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1142 BUS_DMASYNC_PREWRITE); 1143 1144 DPRINTFN(15, ("tx done idx=%u\n", sc->txq.next)); 1145 1146 sc->txq.queued--; 1147 sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT; 1148 } 1149 1150 sc->sc_tx_timer = 0; 1151 ifp->if_flags &= ~IFF_OACTIVE; 1152 rt2560_start(ifp); /* in softint */ 1153 1154 splx(s); 1155 } 1156 1157 void 1158 rt2560_prio_intr(struct rt2560_softc *sc) 1159 { 1160 struct ieee80211com *ic = &sc->sc_ic; 1161 struct ifnet *ifp = ic->ic_ifp; 1162 struct rt2560_tx_desc *desc; 1163 struct rt2560_tx_data *data; 1164 int s; 1165 1166 s = splnet(); 1167 1168 for (;;) { 1169 desc = &sc->prioq.desc[sc->prioq.next]; 1170 data = &sc->prioq.data[sc->prioq.next]; 1171 1172 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1173 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1174 BUS_DMASYNC_POSTREAD); 1175 1176 if ((le32toh(desc->flags) & RT2560_TX_BUSY) || 1177 !(le32toh(desc->flags) & RT2560_TX_VALID)) 1178 break; 1179 1180 switch (le32toh(desc->flags) & RT2560_TX_RESULT_MASK) { 1181 case RT2560_TX_SUCCESS: 1182 DPRINTFN(10, ("mgt frame sent successfully\n")); 1183 break; 1184 1185 case RT2560_TX_SUCCESS_RETRY: 1186 DPRINTFN(9, ("mgt frame sent after %u retries\n", 1187 (le32toh(desc->flags) >> 5) & 0x7)); 1188 break; 1189 1190 case RT2560_TX_FAIL_RETRY: 1191 DPRINTFN(9, ("sending mgt frame failed (too much " 1192 "retries)\n")); 1193 break; 1194 1195 case RT2560_TX_FAIL_INVALID: 1196 case RT2560_TX_FAIL_OTHER: 1197 default: 1198 aprint_error_dev(sc->sc_dev, "sending mgt frame failed 0x%08x\n", 1199 le32toh(desc->flags)); 1200 } 1201 1202 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1203 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1204 bus_dmamap_unload(sc->sc_dmat, data->map); 1205 m_freem(data->m); 1206 data->m = NULL; 1207 ieee80211_free_node(data->ni); 1208 data->ni = NULL; 1209 1210 /* descriptor is no longer valid */ 1211 desc->flags &= ~htole32(RT2560_TX_VALID); 1212 1213 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1214 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1215 BUS_DMASYNC_PREWRITE); 1216 1217 DPRINTFN(15, ("prio done idx=%u\n", sc->prioq.next)); 1218 1219 sc->prioq.queued--; 1220 sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT; 1221 } 1222 1223 sc->sc_tx_timer = 0; 1224 ifp->if_flags &= ~IFF_OACTIVE; 1225 rt2560_start(ifp); /* in softint */ 1226 1227 splx(s); 1228 } 1229 1230 /* 1231 * Some frames were processed by the hardware cipher engine and are ready for 1232 * transmission to the IEEE802.11 layer. 1233 */ 1234 void 1235 rt2560_decryption_intr(struct rt2560_softc *sc) 1236 { 1237 struct ieee80211com *ic = &sc->sc_ic; 1238 struct ifnet *ifp = ic->ic_ifp; 1239 struct rt2560_rx_desc *desc; 1240 struct rt2560_rx_data *data; 1241 struct rt2560_node *rn; 1242 struct ieee80211_frame *wh; 1243 struct ieee80211_node *ni; 1244 struct mbuf *mnew, *m; 1245 int hw, error, s; 1246 1247 /* retrieve last decriptor index processed by cipher engine */ 1248 hw = (RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr) / 1249 RT2560_RX_DESC_SIZE; 1250 1251 for (; sc->rxq.cur_decrypt != hw;) { 1252 desc = &sc->rxq.desc[sc->rxq.cur_decrypt]; 1253 data = &sc->rxq.data[sc->rxq.cur_decrypt]; 1254 1255 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1256 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1257 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 1258 1259 if (le32toh(desc->flags) & 1260 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1261 break; 1262 1263 if (data->drop) { 1264 if_statinc(ifp, if_ierrors); 1265 goto skip; 1266 } 1267 1268 if ((le32toh(desc->flags) & RT2560_RX_CIPHER_MASK) != 0 && 1269 (le32toh(desc->flags) & RT2560_RX_ICV_ERROR)) { 1270 if_statinc(ifp, if_ierrors); 1271 goto skip; 1272 } 1273 1274 /* 1275 * Try to allocate a new mbuf for this ring element and load it 1276 * before processing the current mbuf. If the ring element 1277 * cannot be loaded, drop the received packet and reuse the old 1278 * mbuf. In the unlikely case that the old mbuf can't be 1279 * reloaded either, explicitly panic. 1280 */ 1281 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1282 if (mnew == NULL) { 1283 if_statinc(ifp, if_ierrors); 1284 goto skip; 1285 } 1286 1287 MCLGET(mnew, M_DONTWAIT); 1288 if (!(mnew->m_flags & M_EXT)) { 1289 m_freem(mnew); 1290 if_statinc(ifp, if_ierrors); 1291 goto skip; 1292 } 1293 1294 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1295 data->map->dm_mapsize, BUS_DMASYNC_POSTREAD); 1296 bus_dmamap_unload(sc->sc_dmat, data->map); 1297 1298 error = bus_dmamap_load(sc->sc_dmat, data->map, 1299 mtod(mnew, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 1300 if (error != 0) { 1301 m_freem(mnew); 1302 1303 /* try to reload the old mbuf */ 1304 error = bus_dmamap_load(sc->sc_dmat, data->map, 1305 mtod(data->m, void *), MCLBYTES, NULL, 1306 BUS_DMA_NOWAIT); 1307 if (error != 0) { 1308 /* very unlikely that it will fail... */ 1309 panic("%s: could not load old rx mbuf", 1310 device_xname(sc->sc_dev)); 1311 } 1312 /* physical address may have changed */ 1313 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1314 if_statinc(ifp, if_ierrors); 1315 goto skip; 1316 } 1317 1318 /* 1319 * New mbuf successfully loaded, update Rx ring and continue 1320 * processing. 1321 */ 1322 m = data->m; 1323 data->m = mnew; 1324 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1325 1326 /* finalize mbuf */ 1327 m_set_rcvif(m, ifp); 1328 m->m_pkthdr.len = m->m_len = 1329 (le32toh(desc->flags) >> 16) & 0xfff; 1330 1331 s = splnet(); 1332 1333 if (sc->sc_drvbpf != NULL) { 1334 struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtap; 1335 uint32_t tsf_lo, tsf_hi; 1336 1337 /* get timestamp (low and high 32 bits) */ 1338 tsf_hi = RAL_READ(sc, RT2560_CSR17); 1339 tsf_lo = RAL_READ(sc, RT2560_CSR16); 1340 1341 tap->wr_tsf = 1342 htole64(((uint64_t)tsf_hi << 32) | tsf_lo); 1343 tap->wr_flags = 0; 1344 tap->wr_rate = rt2560_rxrate(desc); 1345 tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1346 tap->wr_chan_flags = 1347 htole16(ic->ic_ibss_chan->ic_flags); 1348 tap->wr_antenna = sc->rx_ant; 1349 tap->wr_antsignal = desc->rssi; 1350 1351 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m, 1352 BPF_D_IN); 1353 } 1354 1355 wh = mtod(m, struct ieee80211_frame *); 1356 ni = ieee80211_find_rxnode(ic, 1357 (struct ieee80211_frame_min *)wh); 1358 1359 /* send the frame to the 802.11 layer */ 1360 ieee80211_input(ic, m, ni, desc->rssi, 0); 1361 1362 /* give rssi to the rate adatation algorithm */ 1363 rn = (struct rt2560_node *)ni; 1364 ieee80211_rssadapt_input(ic, ni, &rn->rssadapt, desc->rssi); 1365 1366 /* node is no longer needed */ 1367 ieee80211_free_node(ni); 1368 1369 splx(s); 1370 1371 skip: desc->flags = htole32(RT2560_RX_BUSY); 1372 1373 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1374 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1375 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1376 1377 DPRINTFN(15, ("decryption done idx=%u\n", sc->rxq.cur_decrypt)); 1378 1379 sc->rxq.cur_decrypt = 1380 (sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT; 1381 } 1382 1383 /* 1384 * In HostAP mode, ieee80211_input() will enqueue packets in if_snd 1385 * without calling if_start(). 1386 */ 1387 s = splnet(); 1388 if (!IFQ_IS_EMPTY(&ifp->if_snd) && !(ifp->if_flags & IFF_OACTIVE)) 1389 rt2560_start(ifp); 1390 splx(s); 1391 } 1392 1393 /* 1394 * Some frames were received. Pass them to the hardware cipher engine before 1395 * sending them to the 802.11 layer. 1396 */ 1397 void 1398 rt2560_rx_intr(struct rt2560_softc *sc) 1399 { 1400 struct rt2560_rx_desc *desc; 1401 struct rt2560_rx_data *data; 1402 1403 for (;;) { 1404 desc = &sc->rxq.desc[sc->rxq.cur]; 1405 data = &sc->rxq.data[sc->rxq.cur]; 1406 1407 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1408 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1409 BUS_DMASYNC_POSTREAD); 1410 1411 if (le32toh(desc->flags) & 1412 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1413 break; 1414 1415 data->drop = 0; 1416 1417 if (le32toh(desc->flags) & 1418 (RT2560_RX_PHY_ERROR | RT2560_RX_CRC_ERROR)) { 1419 /* 1420 * This should not happen since we did not request 1421 * to receive those frames when we filled RXCSR0. 1422 */ 1423 DPRINTFN(5, ("PHY or CRC error flags 0x%08x\n", 1424 le32toh(desc->flags))); 1425 data->drop = 1; 1426 } 1427 1428 if (((le32toh(desc->flags) >> 16) & 0xfff) > MCLBYTES) { 1429 DPRINTFN(5, ("bad length\n")); 1430 data->drop = 1; 1431 } 1432 1433 /* mark the frame for decryption */ 1434 desc->flags |= htole32(RT2560_RX_CIPHER_BUSY); 1435 1436 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1437 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1438 BUS_DMASYNC_PREWRITE); 1439 1440 DPRINTFN(15, ("rx done idx=%u\n", sc->rxq.cur)); 1441 1442 sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT; 1443 } 1444 1445 /* kick decrypt */ 1446 RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT); 1447 } 1448 1449 /* 1450 * This function is called periodically in IBSS mode when a new beacon must be 1451 * sent out. 1452 */ 1453 static void 1454 rt2560_beacon_expire(struct rt2560_softc *sc) 1455 { 1456 struct ieee80211com *ic = &sc->sc_ic; 1457 struct rt2560_tx_data *data; 1458 1459 if (ic->ic_opmode != IEEE80211_M_IBSS && 1460 ic->ic_opmode != IEEE80211_M_HOSTAP) 1461 return; 1462 1463 data = &sc->bcnq.data[sc->bcnq.next]; 1464 1465 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1466 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1467 bus_dmamap_unload(sc->sc_dmat, data->map); 1468 1469 ieee80211_beacon_update(ic, data->ni, &sc->sc_bo, data->m, 1); 1470 1471 bpf_mtap3(ic->ic_rawbpf, data->m, BPF_D_OUT); 1472 rt2560_tx_bcn(sc, data->m, data->ni); 1473 1474 DPRINTFN(15, ("beacon expired\n")); 1475 1476 sc->bcnq.next = (sc->bcnq.next + 1) % RT2560_BEACON_RING_COUNT; 1477 } 1478 1479 static void 1480 rt2560_wakeup_expire(struct rt2560_softc *sc) 1481 { 1482 DPRINTFN(15, ("wakeup expired\n")); 1483 } 1484 1485 int 1486 rt2560_intr(void *arg) 1487 { 1488 struct rt2560_softc *sc = arg; 1489 struct ifnet *ifp = &sc->sc_if; 1490 uint32_t r; 1491 1492 if (!device_is_active(sc->sc_dev)) 1493 return 0; 1494 1495 if ((r = RAL_READ(sc, RT2560_CSR7)) == 0) 1496 return 0; /* not for us */ 1497 1498 /* disable interrupts */ 1499 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 1500 1501 /* don't re-enable interrupts if we're shutting down */ 1502 if (!(ifp->if_flags & IFF_RUNNING)) 1503 return 0; 1504 1505 softint_schedule(sc->sc_soft_ih); 1506 return 1; 1507 } 1508 1509 static void 1510 rt2560_softintr(void *arg) 1511 { 1512 struct rt2560_softc *sc = arg; 1513 struct ifnet *ifp = &sc->sc_if; 1514 uint32_t r; 1515 1516 if (!device_is_active(sc->sc_dev) || !(ifp->if_flags & IFF_RUNNING)) 1517 return; 1518 1519 if ((r = RAL_READ(sc, RT2560_CSR7)) == 0) 1520 goto out; 1521 1522 /* acknowledge interrupts */ 1523 RAL_WRITE(sc, RT2560_CSR7, r); 1524 1525 if (r & RT2560_BEACON_EXPIRE) 1526 rt2560_beacon_expire(sc); 1527 1528 if (r & RT2560_WAKEUP_EXPIRE) 1529 rt2560_wakeup_expire(sc); 1530 1531 if (r & RT2560_ENCRYPTION_DONE) 1532 rt2560_encryption_intr(sc); 1533 1534 if (r & RT2560_TX_DONE) 1535 rt2560_tx_intr(sc); 1536 1537 if (r & RT2560_PRIO_DONE) 1538 rt2560_prio_intr(sc); 1539 1540 if (r & RT2560_DECRYPTION_DONE) 1541 rt2560_decryption_intr(sc); 1542 1543 if (r & RT2560_RX_DONE) 1544 rt2560_rx_intr(sc); 1545 1546 out: 1547 /* re-enable interrupts */ 1548 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 1549 } 1550 1551 /* quickly determine if a given rate is CCK or OFDM */ 1552 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 1553 1554 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 1555 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 1556 1557 #define RAL_SIFS 10 /* us */ 1558 1559 #define RT2560_RXTX_TURNAROUND 10 /* us */ 1560 1561 /* 1562 * This function is only used by the Rx radiotap code. It returns the rate at 1563 * which a given frame was received. 1564 */ 1565 static uint8_t 1566 rt2560_rxrate(struct rt2560_rx_desc *desc) 1567 { 1568 if (le32toh(desc->flags) & RT2560_RX_OFDM) { 1569 /* reverse function of rt2560_plcp_signal */ 1570 switch (desc->rate) { 1571 case 0xb: return 12; 1572 case 0xf: return 18; 1573 case 0xa: return 24; 1574 case 0xe: return 36; 1575 case 0x9: return 48; 1576 case 0xd: return 72; 1577 case 0x8: return 96; 1578 case 0xc: return 108; 1579 } 1580 } else { 1581 if (desc->rate == 10) 1582 return 2; 1583 if (desc->rate == 20) 1584 return 4; 1585 if (desc->rate == 55) 1586 return 11; 1587 if (desc->rate == 110) 1588 return 22; 1589 } 1590 return 2; /* should not get there */ 1591 } 1592 1593 /* 1594 * Return the expected ack rate for a frame transmitted at rate `rate'. 1595 * XXX: this should depend on the destination node basic rate set. 1596 */ 1597 static int 1598 rt2560_ack_rate(struct ieee80211com *ic, int rate) 1599 { 1600 switch (rate) { 1601 /* CCK rates */ 1602 case 2: 1603 return 2; 1604 case 4: 1605 case 11: 1606 case 22: 1607 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1608 1609 /* OFDM rates */ 1610 case 12: 1611 case 18: 1612 return 12; 1613 case 24: 1614 case 36: 1615 return 24; 1616 case 48: 1617 case 72: 1618 case 96: 1619 case 108: 1620 return 48; 1621 } 1622 1623 /* default to 1Mbps */ 1624 return 2; 1625 } 1626 1627 /* 1628 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1629 * The function automatically determines the operating mode depending on the 1630 * given rate. `flags' indicates whether short preamble is in use or not. 1631 */ 1632 static uint16_t 1633 rt2560_txtime(int len, int rate, uint32_t flags) 1634 { 1635 uint16_t txtime; 1636 1637 if (RAL_RATE_IS_OFDM(rate)) { 1638 /* IEEE Std 802.11a-1999, pp. 37 */ 1639 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1640 txtime = 16 + 4 + 4 * txtime + 6; 1641 } else { 1642 /* IEEE Std 802.11b-1999, pp. 28 */ 1643 txtime = (16 * len + rate - 1) / rate; 1644 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1645 txtime += 72 + 24; 1646 else 1647 txtime += 144 + 48; 1648 } 1649 return txtime; 1650 } 1651 1652 static uint8_t 1653 rt2560_plcp_signal(int rate) 1654 { 1655 switch (rate) { 1656 /* CCK rates (returned values are device-dependent) */ 1657 case 2: return 0x0; 1658 case 4: return 0x1; 1659 case 11: return 0x2; 1660 case 22: return 0x3; 1661 1662 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1663 case 12: return 0xb; 1664 case 18: return 0xf; 1665 case 24: return 0xa; 1666 case 36: return 0xe; 1667 case 48: return 0x9; 1668 case 72: return 0xd; 1669 case 96: return 0x8; 1670 case 108: return 0xc; 1671 1672 /* unsupported rates (should not get there) */ 1673 default: return 0xff; 1674 } 1675 } 1676 1677 static void 1678 rt2560_setup_tx_desc(struct rt2560_softc *sc, struct rt2560_tx_desc *desc, 1679 uint32_t flags, int len, int rate, int encrypt, bus_addr_t physaddr) 1680 { 1681 struct ieee80211com *ic = &sc->sc_ic; 1682 uint16_t plcp_length; 1683 int remainder; 1684 1685 desc->flags = htole32(flags); 1686 desc->flags |= htole32(len << 16); 1687 desc->flags |= encrypt ? htole32(RT2560_TX_CIPHER_BUSY) : 1688 htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 1689 1690 desc->physaddr = htole32(physaddr); 1691 desc->wme = htole16( 1692 RT2560_AIFSN(2) | 1693 RT2560_LOGCWMIN(3) | 1694 RT2560_LOGCWMAX(8)); 1695 1696 /* setup PLCP fields */ 1697 desc->plcp_signal = rt2560_plcp_signal(rate); 1698 desc->plcp_service = 4; 1699 1700 len += IEEE80211_CRC_LEN; 1701 if (RAL_RATE_IS_OFDM(rate)) { 1702 desc->flags |= htole32(RT2560_TX_OFDM); 1703 1704 plcp_length = len & 0xfff; 1705 desc->plcp_length_hi = plcp_length >> 6; 1706 desc->plcp_length_lo = plcp_length & 0x3f; 1707 } else { 1708 plcp_length = (16 * len + rate - 1) / rate; 1709 if (rate == 22) { 1710 remainder = (16 * len) % 22; 1711 if (remainder != 0 && remainder < 7) 1712 desc->plcp_service |= RT2560_PLCP_LENGEXT; 1713 } 1714 desc->plcp_length_hi = plcp_length >> 8; 1715 desc->plcp_length_lo = plcp_length & 0xff; 1716 1717 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1718 desc->plcp_signal |= 0x08; 1719 } 1720 } 1721 1722 static int 1723 rt2560_tx_bcn(struct rt2560_softc *sc, struct mbuf *m0, 1724 struct ieee80211_node *ni) 1725 { 1726 struct rt2560_tx_desc *desc; 1727 struct rt2560_tx_data *data; 1728 int rate, error; 1729 1730 desc = &sc->bcnq.desc[sc->bcnq.cur]; 1731 data = &sc->bcnq.data[sc->bcnq.cur]; 1732 1733 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1734 1735 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1736 BUS_DMA_NOWAIT); 1737 if (error != 0) { 1738 aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n", 1739 error); 1740 m_freem(m0); 1741 return error; 1742 } 1743 1744 data->m = m0; 1745 data->ni = ni; 1746 1747 rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF | 1748 RT2560_TX_TIMESTAMP, m0->m_pkthdr.len, rate, 0, 1749 data->map->dm_segs->ds_addr); 1750 1751 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1752 BUS_DMASYNC_PREWRITE); 1753 bus_dmamap_sync(sc->sc_dmat, sc->bcnq.map, 1754 sc->bcnq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1755 BUS_DMASYNC_PREWRITE); 1756 1757 return 0; 1758 } 1759 1760 static int 1761 rt2560_tx_mgt(struct rt2560_softc *sc, struct mbuf *m0, 1762 struct ieee80211_node *ni) 1763 { 1764 struct ieee80211com *ic = &sc->sc_ic; 1765 struct rt2560_tx_desc *desc; 1766 struct rt2560_tx_data *data; 1767 struct ieee80211_frame *wh; 1768 struct ieee80211_key *k; 1769 uint16_t dur; 1770 uint32_t flags = 0; 1771 int rate, error; 1772 1773 desc = &sc->prioq.desc[sc->prioq.cur]; 1774 data = &sc->prioq.data[sc->prioq.cur]; 1775 1776 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1777 1778 wh = mtod(m0, struct ieee80211_frame *); 1779 1780 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1781 k = ieee80211_crypto_encap(ic, ni, m0); 1782 if (k == NULL) { 1783 m_freem(m0); 1784 return ENOBUFS; 1785 } 1786 1787 /* packet header may have moved, reset our local pointer */ 1788 wh = mtod(m0, struct ieee80211_frame *); 1789 } 1790 1791 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1792 BUS_DMA_NOWAIT); 1793 if (error != 0) { 1794 aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n", 1795 error); 1796 m_freem(m0); 1797 return error; 1798 } 1799 1800 if (sc->sc_drvbpf != NULL) { 1801 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1802 1803 tap->wt_flags = 0; 1804 tap->wt_rate = rate; 1805 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1806 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1807 tap->wt_antenna = sc->tx_ant; 1808 1809 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0, BPF_D_OUT); 1810 } 1811 1812 data->m = m0; 1813 data->ni = ni; 1814 1815 wh = mtod(m0, struct ieee80211_frame *); 1816 1817 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1818 flags |= RT2560_TX_ACK; 1819 1820 dur = rt2560_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + 1821 RAL_SIFS; 1822 *(uint16_t *)wh->i_dur = htole16(dur); 1823 1824 /* tell hardware to add timestamp for probe responses */ 1825 if ((wh->i_fc[0] & 1826 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 1827 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 1828 flags |= RT2560_TX_TIMESTAMP; 1829 } 1830 1831 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 0, 1832 data->map->dm_segs->ds_addr); 1833 1834 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1835 BUS_DMASYNC_PREWRITE); 1836 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1837 sc->prioq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1838 BUS_DMASYNC_PREWRITE); 1839 1840 DPRINTFN(10, ("sending mgt frame len=%u idx=%u rate=%u\n", 1841 m0->m_pkthdr.len, sc->prioq.cur, rate)); 1842 1843 /* kick prio */ 1844 sc->prioq.queued++; 1845 sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT; 1846 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO); 1847 1848 return 0; 1849 } 1850 1851 /* 1852 * Build a RTS control frame. 1853 */ 1854 static struct mbuf * 1855 rt2560_get_rts(struct rt2560_softc *sc, struct ieee80211_frame *wh, 1856 uint16_t dur) 1857 { 1858 struct ieee80211_frame_rts *rts; 1859 struct mbuf *m; 1860 1861 MGETHDR(m, M_DONTWAIT, MT_DATA); 1862 if (m == NULL) { 1863 sc->sc_ic.ic_stats.is_tx_nobuf++; 1864 aprint_error_dev(sc->sc_dev, "could not allocate RTS frame\n"); 1865 return NULL; 1866 } 1867 1868 rts = mtod(m, struct ieee80211_frame_rts *); 1869 1870 rts->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_CTL | 1871 IEEE80211_FC0_SUBTYPE_RTS; 1872 rts->i_fc[1] = IEEE80211_FC1_DIR_NODS; 1873 *(uint16_t *)rts->i_dur = htole16(dur); 1874 IEEE80211_ADDR_COPY(rts->i_ra, wh->i_addr1); 1875 IEEE80211_ADDR_COPY(rts->i_ta, wh->i_addr2); 1876 1877 m->m_pkthdr.len = m->m_len = sizeof (struct ieee80211_frame_rts); 1878 1879 return m; 1880 } 1881 1882 static int 1883 rt2560_tx_data(struct rt2560_softc *sc, struct mbuf *m0, 1884 struct ieee80211_node *ni) 1885 { 1886 struct ieee80211com *ic = &sc->sc_ic; 1887 struct rt2560_tx_desc *desc; 1888 struct rt2560_tx_data *data; 1889 struct rt2560_node *rn; 1890 struct ieee80211_rateset *rs; 1891 struct ieee80211_frame *wh; 1892 struct ieee80211_key *k; 1893 struct mbuf *mnew; 1894 uint16_t dur; 1895 uint32_t flags = 0; 1896 int rate, error; 1897 1898 wh = mtod(m0, struct ieee80211_frame *); 1899 1900 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) { 1901 rs = &ic->ic_sup_rates[ic->ic_curmode]; 1902 rate = rs->rs_rates[ic->ic_fixed_rate]; 1903 } else { 1904 rs = &ni->ni_rates; 1905 rn = (struct rt2560_node *)ni; 1906 ni->ni_txrate = ieee80211_rssadapt_choose(&rn->rssadapt, rs, 1907 wh, m0->m_pkthdr.len, -1, NULL, 0); 1908 rate = rs->rs_rates[ni->ni_txrate]; 1909 } 1910 rate &= IEEE80211_RATE_VAL; 1911 1912 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1913 k = ieee80211_crypto_encap(ic, ni, m0); 1914 if (k == NULL) { 1915 m_freem(m0); 1916 return ENOBUFS; 1917 } 1918 1919 /* packet header may have moved, reset our local pointer */ 1920 wh = mtod(m0, struct ieee80211_frame *); 1921 } 1922 1923 /* 1924 * IEEE Std 802.11-1999, pp 82: "A STA shall use an RTS/CTS exchange 1925 * for directed frames only when the length of the MPDU is greater 1926 * than the length threshold indicated by [...]" ic_rtsthreshold. 1927 */ 1928 if (!IEEE80211_IS_MULTICAST(wh->i_addr1) && 1929 m0->m_pkthdr.len > ic->ic_rtsthreshold) { 1930 struct mbuf *m; 1931 int rtsrate, ackrate; 1932 1933 rtsrate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1934 ackrate = rt2560_ack_rate(ic, rate); 1935 1936 dur = rt2560_txtime(m0->m_pkthdr.len + 4, rate, ic->ic_flags) + 1937 rt2560_txtime(RAL_CTS_SIZE, rtsrate, ic->ic_flags) + 1938 rt2560_txtime(RAL_ACK_SIZE, ackrate, ic->ic_flags) + 1939 3 * RAL_SIFS; 1940 1941 m = rt2560_get_rts(sc, wh, dur); 1942 1943 desc = &sc->txq.desc[sc->txq.cur_encrypt]; 1944 data = &sc->txq.data[sc->txq.cur_encrypt]; 1945 1946 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m, 1947 BUS_DMA_NOWAIT); 1948 if (error != 0) { 1949 aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n", 1950 error); 1951 m_freem(m); 1952 m_freem(m0); 1953 return error; 1954 } 1955 1956 /* avoid multiple free() of the same node for each fragment */ 1957 ieee80211_ref_node(ni); 1958 1959 data->m = m; 1960 data->ni = ni; 1961 1962 /* RTS frames are not taken into account for rssadapt */ 1963 data->id.id_node = NULL; 1964 1965 rt2560_setup_tx_desc(sc, desc, RT2560_TX_ACK | 1966 RT2560_TX_MORE_FRAG, m->m_pkthdr.len, rtsrate, 1, 1967 data->map->dm_segs->ds_addr); 1968 1969 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1970 data->map->dm_mapsize, BUS_DMASYNC_PREWRITE); 1971 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1972 sc->txq.cur_encrypt * RT2560_TX_DESC_SIZE, 1973 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1974 1975 sc->txq.queued++; 1976 sc->txq.cur_encrypt = 1977 (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT; 1978 1979 /* 1980 * IEEE Std 802.11-1999: when an RTS/CTS exchange is used, the 1981 * asynchronous data frame shall be transmitted after the CTS 1982 * frame and a SIFS period. 1983 */ 1984 flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS; 1985 } 1986 1987 data = &sc->txq.data[sc->txq.cur_encrypt]; 1988 desc = &sc->txq.desc[sc->txq.cur_encrypt]; 1989 1990 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1991 BUS_DMA_NOWAIT); 1992 if (error != 0 && error != EFBIG) { 1993 aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n", 1994 error); 1995 m_freem(m0); 1996 return error; 1997 } 1998 if (error != 0) { 1999 /* too many fragments, linearize */ 2000 2001 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 2002 if (mnew == NULL) { 2003 m_freem(m0); 2004 return ENOMEM; 2005 } 2006 2007 m_copy_pkthdr(mnew, m0); 2008 if (m0->m_pkthdr.len > MHLEN) { 2009 MCLGET(mnew, M_DONTWAIT); 2010 if (!(mnew->m_flags & M_EXT)) { 2011 m_freem(m0); 2012 m_freem(mnew); 2013 return ENOMEM; 2014 } 2015 } 2016 2017 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(mnew, void *)); 2018 m_freem(m0); 2019 mnew->m_len = mnew->m_pkthdr.len; 2020 m0 = mnew; 2021 2022 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 2023 BUS_DMA_NOWAIT); 2024 if (error != 0) { 2025 aprint_error_dev(sc->sc_dev, "could not map mbuf (error %d)\n", 2026 error); 2027 m_freem(m0); 2028 return error; 2029 } 2030 2031 /* packet header have moved, reset our local pointer */ 2032 wh = mtod(m0, struct ieee80211_frame *); 2033 } 2034 2035 if (sc->sc_drvbpf != NULL) { 2036 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 2037 2038 tap->wt_flags = 0; 2039 tap->wt_rate = rate; 2040 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 2041 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 2042 tap->wt_antenna = sc->tx_ant; 2043 2044 bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0, BPF_D_OUT); 2045 } 2046 2047 data->m = m0; 2048 data->ni = ni; 2049 2050 /* remember link conditions for rate adaptation algorithm */ 2051 if (ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) { 2052 data->id.id_len = m0->m_pkthdr.len; 2053 data->id.id_rateidx = ni->ni_txrate; 2054 data->id.id_node = ni; 2055 data->id.id_rssi = ni->ni_rssi; 2056 } else 2057 data->id.id_node = NULL; 2058 2059 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 2060 flags |= RT2560_TX_ACK; 2061 2062 dur = rt2560_txtime(RAL_ACK_SIZE, rt2560_ack_rate(ic, rate), 2063 ic->ic_flags) + RAL_SIFS; 2064 *(uint16_t *)wh->i_dur = htole16(dur); 2065 } 2066 2067 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 1, 2068 data->map->dm_segs->ds_addr); 2069 2070 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 2071 BUS_DMASYNC_PREWRITE); 2072 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 2073 sc->txq.cur_encrypt * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 2074 BUS_DMASYNC_PREWRITE); 2075 2076 DPRINTFN(10, ("sending data frame len=%u idx=%u rate=%u\n", 2077 m0->m_pkthdr.len, sc->txq.cur_encrypt, rate)); 2078 2079 /* kick encrypt */ 2080 sc->txq.queued++; 2081 sc->txq.cur_encrypt = (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT; 2082 RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT); 2083 2084 return 0; 2085 } 2086 2087 static void 2088 rt2560_start(struct ifnet *ifp) 2089 { 2090 struct rt2560_softc *sc = ifp->if_softc; 2091 struct ieee80211com *ic = &sc->sc_ic; 2092 struct mbuf *m0; 2093 struct ieee80211_node *ni; 2094 struct ether_header *eh; 2095 2096 /* 2097 * net80211 may still try to send management frames even if the 2098 * IFF_RUNNING flag is not set... 2099 */ 2100 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 2101 return; 2102 2103 for (;;) { 2104 IF_POLL(&ic->ic_mgtq, m0); 2105 if (m0 != NULL) { 2106 if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT) { 2107 ifp->if_flags |= IFF_OACTIVE; 2108 break; 2109 } 2110 IF_DEQUEUE(&ic->ic_mgtq, m0); 2111 if (m0 == NULL) 2112 break; 2113 2114 ni = M_GETCTX(m0, struct ieee80211_node *); 2115 M_CLEARCTX(m0); 2116 bpf_mtap3(ic->ic_rawbpf, m0, BPF_D_OUT); 2117 if (rt2560_tx_mgt(sc, m0, ni) != 0) 2118 break; 2119 2120 } else { 2121 if (ic->ic_state != IEEE80211_S_RUN) 2122 break; 2123 IFQ_DEQUEUE(&ifp->if_snd, m0); 2124 if (m0 == NULL) 2125 break; 2126 if (sc->txq.queued >= RT2560_TX_RING_COUNT - 1) { 2127 ifp->if_flags |= IFF_OACTIVE; 2128 break; 2129 } 2130 2131 if (m0->m_len < sizeof (struct ether_header) && 2132 !(m0 = m_pullup(m0, sizeof (struct ether_header)))) 2133 continue; 2134 2135 eh = mtod(m0, struct ether_header *); 2136 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 2137 if (ni == NULL) { 2138 m_freem(m0); 2139 continue; 2140 } 2141 bpf_mtap(ifp, m0, BPF_D_OUT); 2142 2143 m0 = ieee80211_encap(ic, m0, ni); 2144 if (m0 == NULL) { 2145 ieee80211_free_node(ni); 2146 continue; 2147 } 2148 2149 bpf_mtap3(ic->ic_rawbpf, m0, BPF_D_OUT); 2150 2151 if (rt2560_tx_data(sc, m0, ni) != 0) { 2152 ieee80211_free_node(ni); 2153 if_statinc(ifp, if_oerrors); 2154 break; 2155 } 2156 } 2157 2158 sc->sc_tx_timer = 5; 2159 ifp->if_timer = 1; 2160 } 2161 } 2162 2163 static void 2164 rt2560_watchdog(struct ifnet *ifp) 2165 { 2166 struct rt2560_softc *sc = ifp->if_softc; 2167 2168 ifp->if_timer = 0; 2169 2170 if (sc->sc_tx_timer > 0) { 2171 if (--sc->sc_tx_timer == 0) { 2172 aprint_error_dev(sc->sc_dev, "device timeout\n"); 2173 rt2560_init(ifp); 2174 if_statinc(ifp, if_oerrors); 2175 return; 2176 } 2177 ifp->if_timer = 1; 2178 } 2179 2180 ieee80211_watchdog(&sc->sc_ic); 2181 } 2182 2183 /* 2184 * This function allows for fast channel switching in monitor mode (used by 2185 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 2186 * generate a new beacon frame. 2187 */ 2188 static int 2189 rt2560_reset(struct ifnet *ifp) 2190 { 2191 struct rt2560_softc *sc = ifp->if_softc; 2192 struct ieee80211com *ic = &sc->sc_ic; 2193 2194 if (ic->ic_opmode != IEEE80211_M_MONITOR) 2195 return ENETRESET; 2196 2197 rt2560_set_chan(sc, ic->ic_curchan); 2198 2199 return 0; 2200 } 2201 2202 int 2203 rt2560_ioctl(struct ifnet *ifp, u_long cmd, void *data) 2204 { 2205 struct rt2560_softc *sc = ifp->if_softc; 2206 struct ieee80211com *ic = &sc->sc_ic; 2207 int s, error = 0; 2208 2209 s = splnet(); 2210 2211 switch (cmd) { 2212 case SIOCSIFFLAGS: 2213 if ((error = ifioctl_common(ifp, cmd, data)) != 0) 2214 break; 2215 if (ifp->if_flags & IFF_UP) { 2216 if (ifp->if_flags & IFF_RUNNING) 2217 rt2560_update_promisc(sc); 2218 else 2219 rt2560_init(ifp); 2220 } else { 2221 if (ifp->if_flags & IFF_RUNNING) 2222 rt2560_stop(ifp, 1); 2223 } 2224 break; 2225 2226 case SIOCADDMULTI: 2227 case SIOCDELMULTI: 2228 /* XXX no h/w multicast filter? --dyoung */ 2229 if ((error = ether_ioctl(ifp, cmd, data)) == ENETRESET) 2230 error = 0; 2231 break; 2232 2233 case SIOCS80211CHANNEL: 2234 /* 2235 * This allows for fast channel switching in monitor mode 2236 * (used by kismet). In IBSS mode, we must explicitly reset 2237 * the interface to generate a new beacon frame. 2238 */ 2239 error = ieee80211_ioctl(ic, cmd, data); 2240 if (error == ENETRESET && 2241 ic->ic_opmode == IEEE80211_M_MONITOR) { 2242 rt2560_set_chan(sc, ic->ic_ibss_chan); 2243 error = 0; 2244 } 2245 break; 2246 2247 default: 2248 error = ieee80211_ioctl(ic, cmd, data); 2249 } 2250 2251 if (error == ENETRESET) { 2252 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2253 (IFF_UP | IFF_RUNNING)) 2254 rt2560_init(ifp); 2255 error = 0; 2256 } 2257 2258 splx(s); 2259 2260 return error; 2261 } 2262 2263 static void 2264 rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val) 2265 { 2266 uint32_t tmp; 2267 int ntries; 2268 2269 for (ntries = 0; ntries < 100; ntries++) { 2270 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY)) 2271 break; 2272 DELAY(1); 2273 } 2274 if (ntries == 100) { 2275 aprint_error_dev(sc->sc_dev, "could not write to BBP\n"); 2276 return; 2277 } 2278 2279 tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val; 2280 RAL_WRITE(sc, RT2560_BBPCSR, tmp); 2281 2282 DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val)); 2283 } 2284 2285 static uint8_t 2286 rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg) 2287 { 2288 uint32_t val; 2289 int ntries; 2290 2291 val = RT2560_BBP_BUSY | reg << 8; 2292 RAL_WRITE(sc, RT2560_BBPCSR, val); 2293 2294 for (ntries = 0; ntries < 100; ntries++) { 2295 val = RAL_READ(sc, RT2560_BBPCSR); 2296 if (!(val & RT2560_BBP_BUSY)) 2297 return val & 0xff; 2298 DELAY(1); 2299 } 2300 2301 aprint_error_dev(sc->sc_dev, "could not read from BBP\n"); 2302 return 0; 2303 } 2304 2305 static void 2306 rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val) 2307 { 2308 uint32_t tmp; 2309 int ntries; 2310 2311 for (ntries = 0; ntries < 100; ntries++) { 2312 if (!(RAL_READ(sc, RT2560_RFCSR) & RT2560_RF_BUSY)) 2313 break; 2314 DELAY(1); 2315 } 2316 if (ntries == 100) { 2317 aprint_error_dev(sc->sc_dev, "could not write to RF\n"); 2318 return; 2319 } 2320 2321 tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 | 2322 (reg & 0x3); 2323 RAL_WRITE(sc, RT2560_RFCSR, tmp); 2324 2325 /* remember last written value in sc */ 2326 sc->rf_regs[reg] = val; 2327 2328 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 2329 } 2330 2331 static void 2332 rt2560_set_chan(struct rt2560_softc *sc, struct ieee80211_channel *c) 2333 { 2334 struct ieee80211com *ic = &sc->sc_ic; 2335 uint8_t power, tmp; 2336 u_int i, chan; 2337 2338 chan = ieee80211_chan2ieee(ic, c); 2339 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 2340 return; 2341 2342 if (IEEE80211_IS_CHAN_2GHZ(c)) 2343 power = uimin(sc->txpow[chan - 1], 31); 2344 else 2345 power = 31; 2346 2347 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 2348 2349 switch (sc->rf_rev) { 2350 case RT2560_RF_2522: 2351 rt2560_rf_write(sc, RT2560_RF1, 0x00814); 2352 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2522_r2[chan - 1]); 2353 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2354 break; 2355 2356 case RT2560_RF_2523: 2357 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2358 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2523_r2[chan - 1]); 2359 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x38044); 2360 rt2560_rf_write(sc, RT2560_RF4, 2361 (chan == 14) ? 0x00280 : 0x00286); 2362 break; 2363 2364 case RT2560_RF_2524: 2365 rt2560_rf_write(sc, RT2560_RF1, 0x0c808); 2366 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2524_r2[chan - 1]); 2367 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2368 rt2560_rf_write(sc, RT2560_RF4, 2369 (chan == 14) ? 0x00280 : 0x00286); 2370 break; 2371 2372 case RT2560_RF_2525: 2373 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2374 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_hi_r2[chan - 1]); 2375 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2376 rt2560_rf_write(sc, RT2560_RF4, 2377 (chan == 14) ? 0x00280 : 0x00286); 2378 2379 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2380 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_r2[chan - 1]); 2381 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2382 rt2560_rf_write(sc, RT2560_RF4, 2383 (chan == 14) ? 0x00280 : 0x00286); 2384 break; 2385 2386 case RT2560_RF_2525E: 2387 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2388 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525e_r2[chan - 1]); 2389 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2390 rt2560_rf_write(sc, RT2560_RF4, 2391 (chan == 14) ? 0x00286 : 0x00282); 2392 break; 2393 2394 case RT2560_RF_2526: 2395 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_hi_r2[chan - 1]); 2396 rt2560_rf_write(sc, RT2560_RF4, 2397 (chan & 1) ? 0x00386 : 0x00381); 2398 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2399 2400 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_r2[chan - 1]); 2401 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2402 rt2560_rf_write(sc, RT2560_RF4, 2403 (chan & 1) ? 0x00386 : 0x00381); 2404 break; 2405 2406 /* dual-band RF */ 2407 case RT2560_RF_5222: 2408 for (i = 0; rt2560_rf5222[i].chan != chan; i++); 2409 2410 rt2560_rf_write(sc, RT2560_RF1, rt2560_rf5222[i].r1); 2411 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf5222[i].r2); 2412 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2413 rt2560_rf_write(sc, RT2560_RF4, rt2560_rf5222[i].r4); 2414 break; 2415 } 2416 2417 if (ic->ic_opmode != IEEE80211_M_MONITOR && 2418 ic->ic_state != IEEE80211_S_SCAN) { 2419 /* set Japan filter bit for channel 14 */ 2420 tmp = rt2560_bbp_read(sc, 70); 2421 2422 tmp &= ~RT2560_JAPAN_FILTER; 2423 if (chan == 14) 2424 tmp |= RT2560_JAPAN_FILTER; 2425 2426 rt2560_bbp_write(sc, 70, tmp); 2427 2428 DELAY(1000); /* RF needs a 1ms delay here */ 2429 rt2560_disable_rf_tune(sc); 2430 2431 /* clear CRC errors */ 2432 RAL_READ(sc, RT2560_CNT0); 2433 } 2434 } 2435 2436 /* 2437 * Disable RF auto-tuning. 2438 */ 2439 static void 2440 rt2560_disable_rf_tune(struct rt2560_softc *sc) 2441 { 2442 uint32_t tmp; 2443 2444 if (sc->rf_rev != RT2560_RF_2523) { 2445 tmp = sc->rf_regs[RT2560_RF1] & ~RT2560_RF1_AUTOTUNE; 2446 rt2560_rf_write(sc, RT2560_RF1, tmp); 2447 } 2448 2449 tmp = sc->rf_regs[RT2560_RF3] & ~RT2560_RF3_AUTOTUNE; 2450 rt2560_rf_write(sc, RT2560_RF3, tmp); 2451 2452 DPRINTFN(2, ("disabling RF autotune\n")); 2453 } 2454 2455 /* 2456 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 2457 * synchronization. 2458 */ 2459 static void 2460 rt2560_enable_tsf_sync(struct rt2560_softc *sc) 2461 { 2462 struct ieee80211com *ic = &sc->sc_ic; 2463 uint16_t logcwmin, preload; 2464 uint32_t tmp; 2465 2466 /* first, disable TSF synchronization */ 2467 RAL_WRITE(sc, RT2560_CSR14, 0); 2468 2469 tmp = 16 * ic->ic_bss->ni_intval; 2470 RAL_WRITE(sc, RT2560_CSR12, tmp); 2471 2472 RAL_WRITE(sc, RT2560_CSR13, 0); 2473 2474 logcwmin = 5; 2475 preload = (ic->ic_opmode == IEEE80211_M_STA) ? 384 : 1024; 2476 tmp = logcwmin << 16 | preload; 2477 RAL_WRITE(sc, RT2560_BCNOCSR, tmp); 2478 2479 /* finally, enable TSF synchronization */ 2480 tmp = RT2560_ENABLE_TSF | RT2560_ENABLE_TBCN; 2481 if (ic->ic_opmode == IEEE80211_M_STA) 2482 tmp |= RT2560_ENABLE_TSF_SYNC(1); 2483 else 2484 tmp |= RT2560_ENABLE_TSF_SYNC(2) | 2485 RT2560_ENABLE_BEACON_GENERATOR; 2486 RAL_WRITE(sc, RT2560_CSR14, tmp); 2487 2488 DPRINTF(("enabling TSF synchronization\n")); 2489 } 2490 2491 static void 2492 rt2560_update_plcp(struct rt2560_softc *sc) 2493 { 2494 struct ieee80211com *ic = &sc->sc_ic; 2495 2496 /* no short preamble for 1Mbps */ 2497 RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400); 2498 2499 if (!(ic->ic_flags & IEEE80211_F_SHPREAMBLE)) { 2500 /* values taken from the reference driver */ 2501 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380401); 2502 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402); 2503 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b8403); 2504 } else { 2505 /* same values as above or'ed 0x8 */ 2506 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380409); 2507 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a); 2508 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b840b); 2509 } 2510 2511 DPRINTF(("updating PLCP for %s preamble\n", 2512 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "short" : "long")); 2513 } 2514 2515 /* 2516 * IEEE 802.11a uses short slot time. Refer to IEEE Std 802.11-1999 pp. 85 to 2517 * know how these values are computed. 2518 */ 2519 static void 2520 rt2560_update_slot(struct ifnet *ifp) 2521 { 2522 struct rt2560_softc *sc = ifp->if_softc; 2523 struct ieee80211com *ic = &sc->sc_ic; 2524 uint8_t slottime; 2525 uint16_t sifs, pifs, difs, eifs; 2526 uint32_t tmp; 2527 2528 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 2529 2530 /* define the MAC slot boundaries */ 2531 sifs = RAL_SIFS - RT2560_RXTX_TURNAROUND; 2532 pifs = sifs + slottime; 2533 difs = sifs + 2 * slottime; 2534 eifs = (ic->ic_curmode == IEEE80211_MODE_11B) ? 364 : 60; 2535 2536 tmp = RAL_READ(sc, RT2560_CSR11); 2537 tmp = (tmp & ~0x1f00) | slottime << 8; 2538 RAL_WRITE(sc, RT2560_CSR11, tmp); 2539 2540 tmp = pifs << 16 | sifs; 2541 RAL_WRITE(sc, RT2560_CSR18, tmp); 2542 2543 tmp = eifs << 16 | difs; 2544 RAL_WRITE(sc, RT2560_CSR19, tmp); 2545 2546 DPRINTF(("setting slottime to %uus\n", slottime)); 2547 } 2548 2549 static void 2550 rt2560_set_basicrates(struct rt2560_softc *sc) 2551 { 2552 struct ieee80211com *ic = &sc->sc_ic; 2553 2554 /* update basic rate set */ 2555 if (ic->ic_curmode == IEEE80211_MODE_11B) { 2556 /* 11b basic rates: 1, 2Mbps */ 2557 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x3); 2558 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 2559 /* 11a basic rates: 6, 12, 24Mbps */ 2560 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x150); 2561 } else { 2562 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 2563 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x15f); 2564 } 2565 } 2566 2567 static void 2568 rt2560_update_led(struct rt2560_softc *sc, int led1, int led2) 2569 { 2570 uint32_t tmp; 2571 2572 /* set ON period to 70ms and OFF period to 30ms */ 2573 tmp = led1 << 16 | led2 << 17 | 70 << 8 | 30; 2574 RAL_WRITE(sc, RT2560_LEDCSR, tmp); 2575 } 2576 2577 static void 2578 rt2560_set_bssid(struct rt2560_softc *sc, uint8_t *bssid) 2579 { 2580 uint32_t tmp; 2581 2582 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24; 2583 RAL_WRITE(sc, RT2560_CSR5, tmp); 2584 2585 tmp = bssid[4] | bssid[5] << 8; 2586 RAL_WRITE(sc, RT2560_CSR6, tmp); 2587 2588 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 2589 } 2590 2591 static void 2592 rt2560_set_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2593 { 2594 uint32_t tmp; 2595 2596 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24; 2597 RAL_WRITE(sc, RT2560_CSR3, tmp); 2598 2599 tmp = addr[4] | addr[5] << 8; 2600 RAL_WRITE(sc, RT2560_CSR4, tmp); 2601 2602 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 2603 } 2604 2605 static void 2606 rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2607 { 2608 uint32_t tmp; 2609 2610 tmp = RAL_READ(sc, RT2560_CSR3); 2611 addr[0] = tmp & 0xff; 2612 addr[1] = (tmp >> 8) & 0xff; 2613 addr[2] = (tmp >> 16) & 0xff; 2614 addr[3] = (tmp >> 24); 2615 2616 tmp = RAL_READ(sc, RT2560_CSR4); 2617 addr[4] = tmp & 0xff; 2618 addr[5] = (tmp >> 8) & 0xff; 2619 } 2620 2621 static void 2622 rt2560_update_promisc(struct rt2560_softc *sc) 2623 { 2624 struct ifnet *ifp = &sc->sc_if; 2625 uint32_t tmp; 2626 2627 tmp = RAL_READ(sc, RT2560_RXCSR0); 2628 2629 tmp &= ~RT2560_DROP_NOT_TO_ME; 2630 if (!(ifp->if_flags & IFF_PROMISC)) 2631 tmp |= RT2560_DROP_NOT_TO_ME; 2632 2633 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2634 2635 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 2636 "entering" : "leaving")); 2637 } 2638 2639 static void 2640 rt2560_set_txantenna(struct rt2560_softc *sc, int antenna) 2641 { 2642 uint32_t tmp; 2643 uint8_t tx; 2644 2645 tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK; 2646 if (antenna == 1) 2647 tx |= RT2560_BBP_ANTA; 2648 else if (antenna == 2) 2649 tx |= RT2560_BBP_ANTB; 2650 else 2651 tx |= RT2560_BBP_DIVERSITY; 2652 2653 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2654 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526 || 2655 sc->rf_rev == RT2560_RF_5222) 2656 tx |= RT2560_BBP_FLIPIQ; 2657 2658 rt2560_bbp_write(sc, RT2560_BBP_TX, tx); 2659 2660 /* update values for CCK and OFDM in BBPCSR1 */ 2661 tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007; 2662 tmp |= (tx & 0x7) << 16 | (tx & 0x7); 2663 RAL_WRITE(sc, RT2560_BBPCSR1, tmp); 2664 } 2665 2666 static void 2667 rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna) 2668 { 2669 uint8_t rx; 2670 2671 rx = rt2560_bbp_read(sc, RT2560_BBP_RX) & ~RT2560_BBP_ANTMASK; 2672 if (antenna == 1) 2673 rx |= RT2560_BBP_ANTA; 2674 else if (antenna == 2) 2675 rx |= RT2560_BBP_ANTB; 2676 else 2677 rx |= RT2560_BBP_DIVERSITY; 2678 2679 /* need to force no I/Q flip for RF 2525e and 2526 */ 2680 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526) 2681 rx &= ~RT2560_BBP_FLIPIQ; 2682 2683 rt2560_bbp_write(sc, RT2560_BBP_RX, rx); 2684 } 2685 2686 static const char * 2687 rt2560_get_rf(int rev) 2688 { 2689 switch (rev) { 2690 case RT2560_RF_2522: return "RT2522"; 2691 case RT2560_RF_2523: return "RT2523"; 2692 case RT2560_RF_2524: return "RT2524"; 2693 case RT2560_RF_2525: return "RT2525"; 2694 case RT2560_RF_2525E: return "RT2525e"; 2695 case RT2560_RF_2526: return "RT2526"; 2696 case RT2560_RF_5222: return "RT5222"; 2697 default: return "unknown"; 2698 } 2699 } 2700 2701 static void 2702 rt2560_read_eeprom(struct rt2560_softc *sc) 2703 { 2704 uint16_t val; 2705 int i; 2706 2707 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0); 2708 sc->rf_rev = (val >> 11) & 0x1f; 2709 sc->hw_radio = (val >> 10) & 0x1; 2710 sc->led_mode = (val >> 6) & 0x7; 2711 sc->rx_ant = (val >> 4) & 0x3; 2712 sc->tx_ant = (val >> 2) & 0x3; 2713 sc->nb_ant = val & 0x3; 2714 2715 /* read default values for BBP registers */ 2716 for (i = 0; i < 16; i++) { 2717 val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i); 2718 sc->bbp_prom[i].reg = val >> 8; 2719 sc->bbp_prom[i].val = val & 0xff; 2720 } 2721 2722 /* read Tx power for all b/g channels */ 2723 for (i = 0; i < 14 / 2; i++) { 2724 val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i); 2725 sc->txpow[i * 2] = val >> 8; 2726 sc->txpow[i * 2 + 1] = val & 0xff; 2727 } 2728 } 2729 2730 static int 2731 rt2560_bbp_init(struct rt2560_softc *sc) 2732 { 2733 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2734 int i, ntries; 2735 2736 /* wait for BBP to be ready */ 2737 for (ntries = 0; ntries < 100; ntries++) { 2738 if (rt2560_bbp_read(sc, RT2560_BBP_VERSION) != 0) 2739 break; 2740 DELAY(1); 2741 } 2742 if (ntries == 100) { 2743 aprint_error_dev(sc->sc_dev, "timeout waiting for BBP\n"); 2744 return EIO; 2745 } 2746 2747 /* initialize BBP registers to default values */ 2748 for (i = 0; i < N(rt2560_def_bbp); i++) { 2749 rt2560_bbp_write(sc, rt2560_def_bbp[i].reg, 2750 rt2560_def_bbp[i].val); 2751 } 2752 #if 0 2753 /* initialize BBP registers to values stored in EEPROM */ 2754 for (i = 0; i < 16; i++) { 2755 if (sc->bbp_prom[i].reg == 0xff) 2756 continue; 2757 rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2758 } 2759 #endif 2760 2761 return 0; 2762 #undef N 2763 } 2764 2765 static int 2766 rt2560_init(struct ifnet *ifp) 2767 { 2768 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2769 struct rt2560_softc *sc = ifp->if_softc; 2770 struct ieee80211com *ic = &sc->sc_ic; 2771 uint32_t tmp; 2772 int i; 2773 2774 /* for CardBus, power on the socket */ 2775 if (!(sc->sc_flags & RT2560_ENABLED)) { 2776 if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) { 2777 aprint_error_dev(sc->sc_dev, "could not enable device\n"); 2778 return EIO; 2779 } 2780 sc->sc_flags |= RT2560_ENABLED; 2781 } 2782 2783 rt2560_stop(ifp, 1); 2784 2785 /* setup tx rings */ 2786 tmp = RT2560_PRIO_RING_COUNT << 24 | 2787 RT2560_ATIM_RING_COUNT << 16 | 2788 RT2560_TX_RING_COUNT << 8 | 2789 RT2560_TX_DESC_SIZE; 2790 2791 /* rings _must_ be initialized in this _exact_ order! */ 2792 RAL_WRITE(sc, RT2560_TXCSR2, tmp); 2793 RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr); 2794 RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr); 2795 RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr); 2796 RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr); 2797 2798 /* setup rx ring */ 2799 tmp = RT2560_RX_RING_COUNT << 8 | RT2560_RX_DESC_SIZE; 2800 2801 RAL_WRITE(sc, RT2560_RXCSR1, tmp); 2802 RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr); 2803 2804 /* initialize MAC registers to default values */ 2805 for (i = 0; i < N(rt2560_def_mac); i++) 2806 RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val); 2807 2808 IEEE80211_ADDR_COPY(ic->ic_myaddr, CLLADDR(ifp->if_sadl)); 2809 rt2560_set_macaddr(sc, ic->ic_myaddr); 2810 2811 /* set basic rate set (will be updated later) */ 2812 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153); 2813 2814 rt2560_update_slot(ifp); 2815 rt2560_update_plcp(sc); 2816 rt2560_update_led(sc, 0, 0); 2817 2818 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2819 RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY); 2820 2821 if (rt2560_bbp_init(sc) != 0) { 2822 rt2560_stop(ifp, 1); 2823 return EIO; 2824 } 2825 2826 rt2560_set_txantenna(sc, 1); 2827 rt2560_set_rxantenna(sc, 1); 2828 2829 /* set default BSS channel */ 2830 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 2831 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 2832 2833 /* kick Rx */ 2834 tmp = RT2560_DROP_PHY_ERROR | RT2560_DROP_CRC_ERROR; 2835 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2836 tmp |= RT2560_DROP_CTL | RT2560_DROP_VERSION_ERROR; 2837 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2838 tmp |= RT2560_DROP_TODS; 2839 if (!(ifp->if_flags & IFF_PROMISC)) 2840 tmp |= RT2560_DROP_NOT_TO_ME; 2841 } 2842 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2843 2844 /* clear old FCS and Rx FIFO errors */ 2845 RAL_READ(sc, RT2560_CNT0); 2846 RAL_READ(sc, RT2560_CNT4); 2847 2848 /* clear any pending interrupts */ 2849 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2850 2851 /* enable interrupts */ 2852 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 2853 2854 ifp->if_flags &= ~IFF_OACTIVE; 2855 ifp->if_flags |= IFF_RUNNING; 2856 2857 if (ic->ic_opmode == IEEE80211_M_MONITOR) 2858 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2859 else 2860 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2861 2862 return 0; 2863 #undef N 2864 } 2865 2866 static void 2867 rt2560_stop(struct ifnet *ifp, int disable) 2868 { 2869 struct rt2560_softc *sc = ifp->if_softc; 2870 struct ieee80211com *ic = &sc->sc_ic; 2871 2872 sc->sc_tx_timer = 0; 2873 ifp->if_timer = 0; 2874 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2875 2876 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); /* free all nodes */ 2877 2878 /* abort Tx */ 2879 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX); 2880 2881 /* disable Rx */ 2882 RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX); 2883 2884 /* reset ASIC (and thus, BBP) */ 2885 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2886 RAL_WRITE(sc, RT2560_CSR1, 0); 2887 2888 /* disable interrupts */ 2889 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 2890 2891 /* clear any pending interrupt */ 2892 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2893 2894 /* reset Tx and Rx rings */ 2895 rt2560_reset_tx_ring(sc, &sc->txq); 2896 rt2560_reset_tx_ring(sc, &sc->atimq); 2897 rt2560_reset_tx_ring(sc, &sc->prioq); 2898 rt2560_reset_tx_ring(sc, &sc->bcnq); 2899 rt2560_reset_rx_ring(sc, &sc->rxq); 2900 } 2901