1 /* $NetBSD: rt2560.c,v 1.4 2006/09/17 23:58:51 jmcneill Exp $ */ 2 /* $OpenBSD: rt2560.c,v 1.15 2006/04/20 20:31:12 miod Exp $ */ 3 /* $FreeBSD: rt2560.c,v 1.3 2006/03/21 21:15:43 damien Exp $*/ 4 5 /*- 6 * Copyright (c) 2005, 2006 7 * Damien Bergamini <damien.bergamini@free.fr> 8 * 9 * Permission to use, copy, modify, and distribute this software for any 10 * purpose with or without fee is hereby granted, provided that the above 11 * copyright notice and this permission notice appear in all copies. 12 * 13 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 14 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 15 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 16 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 17 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 18 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 19 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 20 */ 21 22 /*- 23 * Ralink Technology RT2560 chipset driver 24 * http://www.ralinktech.com/ 25 */ 26 #include <sys/cdefs.h> 27 __KERNEL_RCSID(0, "$NetBSD: rt2560.c,v 1.4 2006/09/17 23:58:51 jmcneill Exp $"); 28 29 #include "bpfilter.h" 30 31 #include <sys/param.h> 32 #include <sys/sockio.h> 33 #include <sys/mbuf.h> 34 #include <sys/kernel.h> 35 #include <sys/socket.h> 36 #include <sys/systm.h> 37 #include <sys/malloc.h> 38 #include <sys/callout.h> 39 #include <sys/conf.h> 40 #include <sys/device.h> 41 42 #include <machine/bus.h> 43 #include <machine/endian.h> 44 #include <machine/intr.h> 45 46 #if NBPFILTER > 0 47 #include <net/bpf.h> 48 #endif 49 #include <net/if.h> 50 #include <net/if_arp.h> 51 #include <net/if_dl.h> 52 #include <net/if_media.h> 53 #include <net/if_types.h> 54 #include <net/if_ether.h> 55 56 #include <netinet/in.h> 57 #include <netinet/in_systm.h> 58 #include <netinet/in_var.h> 59 #include <netinet/ip.h> 60 61 #include <net80211/ieee80211_var.h> 62 #include <net80211/ieee80211_rssadapt.h> 63 #include <net80211/ieee80211_radiotap.h> 64 65 #include <dev/ic/rt2560reg.h> 66 #include <dev/ic/rt2560var.h> 67 68 #include <dev/pci/pcireg.h> 69 #include <dev/pci/pcivar.h> 70 #include <dev/pci/pcidevs.h> 71 72 #ifdef RAL_DEBUG 73 #define DPRINTF(x) do { if (rt2560_debug > 0) printf x; } while (0) 74 #define DPRINTFN(n, x) do { if (rt2560_debug >= (n)) printf x; } while (0) 75 int rt2560_debug = 0; 76 #else 77 #define DPRINTF(x) 78 #define DPRINTFN(n, x) 79 #endif 80 81 static int rt2560_alloc_tx_ring(struct rt2560_softc *, 82 struct rt2560_tx_ring *, int); 83 static void rt2560_reset_tx_ring(struct rt2560_softc *, 84 struct rt2560_tx_ring *); 85 static void rt2560_free_tx_ring(struct rt2560_softc *, 86 struct rt2560_tx_ring *); 87 static int rt2560_alloc_rx_ring(struct rt2560_softc *, 88 struct rt2560_rx_ring *, int); 89 static void rt2560_reset_rx_ring(struct rt2560_softc *, 90 struct rt2560_rx_ring *); 91 static void rt2560_free_rx_ring(struct rt2560_softc *, 92 struct rt2560_rx_ring *); 93 static struct ieee80211_node * 94 rt2560_node_alloc(struct ieee80211_node_table *); 95 static int rt2560_media_change(struct ifnet *); 96 static void rt2560_next_scan(void *); 97 static void rt2560_iter_func(void *, struct ieee80211_node *); 98 static void rt2560_update_rssadapt(void *); 99 static int rt2560_newstate(struct ieee80211com *, enum ieee80211_state, 100 int); 101 static uint16_t rt2560_eeprom_read(struct rt2560_softc *, uint8_t); 102 static void rt2560_encryption_intr(struct rt2560_softc *); 103 static void rt2560_tx_intr(struct rt2560_softc *); 104 static void rt2560_prio_intr(struct rt2560_softc *); 105 static void rt2560_decryption_intr(struct rt2560_softc *); 106 static void rt2560_rx_intr(struct rt2560_softc *); 107 static void rt2560_beacon_expire(struct rt2560_softc *); 108 static void rt2560_wakeup_expire(struct rt2560_softc *); 109 #if NBPFILTER > 0 110 static uint8_t rt2560_rxrate(struct rt2560_rx_desc *); 111 #endif 112 static int rt2560_ack_rate(struct ieee80211com *, int); 113 static uint16_t rt2560_txtime(int, int, uint32_t); 114 static uint8_t rt2560_plcp_signal(int); 115 static void rt2560_setup_tx_desc(struct rt2560_softc *, 116 struct rt2560_tx_desc *, uint32_t, int, int, int, 117 bus_addr_t); 118 static int rt2560_tx_bcn(struct rt2560_softc *, struct mbuf *, 119 struct ieee80211_node *); 120 static int rt2560_tx_mgt(struct rt2560_softc *, struct mbuf *, 121 struct ieee80211_node *); 122 static struct mbuf *rt2560_get_rts(struct rt2560_softc *, 123 struct ieee80211_frame *, uint16_t); 124 static int rt2560_tx_data(struct rt2560_softc *, struct mbuf *, 125 struct ieee80211_node *); 126 static void rt2560_start(struct ifnet *); 127 static void rt2560_watchdog(struct ifnet *); 128 static int rt2560_reset(struct ifnet *); 129 static int rt2560_ioctl(struct ifnet *, u_long, caddr_t); 130 static void rt2560_bbp_write(struct rt2560_softc *, uint8_t, uint8_t); 131 static uint8_t rt2560_bbp_read(struct rt2560_softc *, uint8_t); 132 static void rt2560_rf_write(struct rt2560_softc *, uint8_t, uint32_t); 133 static void rt2560_set_chan(struct rt2560_softc *, 134 struct ieee80211_channel *); 135 static void rt2560_disable_rf_tune(struct rt2560_softc *); 136 static void rt2560_enable_tsf_sync(struct rt2560_softc *); 137 static void rt2560_update_plcp(struct rt2560_softc *); 138 static void rt2560_update_slot(struct ifnet *); 139 static void rt2560_set_basicrates(struct rt2560_softc *); 140 static void rt2560_update_led(struct rt2560_softc *, int, int); 141 static void rt2560_set_bssid(struct rt2560_softc *, uint8_t *); 142 static void rt2560_set_macaddr(struct rt2560_softc *, uint8_t *); 143 static void rt2560_get_macaddr(struct rt2560_softc *, uint8_t *); 144 static void rt2560_update_promisc(struct rt2560_softc *); 145 static void rt2560_set_txantenna(struct rt2560_softc *, int); 146 static void rt2560_set_rxantenna(struct rt2560_softc *, int); 147 static const char *rt2560_get_rf(int); 148 static void rt2560_read_eeprom(struct rt2560_softc *); 149 static int rt2560_bbp_init(struct rt2560_softc *); 150 static int rt2560_init(struct ifnet *); 151 static void rt2560_stop(void *); 152 153 /* 154 * Supported rates for 802.11a/b/g modes (in 500Kbps unit). 155 */ 156 static const struct ieee80211_rateset rt2560_rateset_11a = 157 { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } }; 158 159 static const struct ieee80211_rateset rt2560_rateset_11b = 160 { 4, { 2, 4, 11, 22 } }; 161 162 static const struct ieee80211_rateset rt2560_rateset_11g = 163 { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } }; 164 165 /* 166 * Default values for MAC registers; values taken from the reference driver. 167 */ 168 static const struct { 169 uint32_t reg; 170 uint32_t val; 171 } rt2560_def_mac[] = { 172 { RT2560_PSCSR0, 0x00020002 }, 173 { RT2560_PSCSR1, 0x00000002 }, 174 { RT2560_PSCSR2, 0x00020002 }, 175 { RT2560_PSCSR3, 0x00000002 }, 176 { RT2560_TIMECSR, 0x00003f21 }, 177 { RT2560_CSR9, 0x00000780 }, 178 { RT2560_CSR11, 0x07041483 }, 179 { RT2560_CNT3, 0x00000000 }, 180 { RT2560_TXCSR1, 0x07614562 }, 181 { RT2560_ARSP_PLCP_0, 0x8c8d8b8a }, 182 { RT2560_ACKPCTCSR, 0x7038140a }, 183 { RT2560_ARTCSR1, 0x1d21252d }, 184 { RT2560_ARTCSR2, 0x1919191d }, 185 { RT2560_RXCSR0, 0xffffffff }, 186 { RT2560_RXCSR3, 0xb3aab3af }, 187 { RT2560_PCICSR, 0x000003b8 }, 188 { RT2560_PWRCSR0, 0x3f3b3100 }, 189 { RT2560_GPIOCSR, 0x0000ff00 }, 190 { RT2560_TESTCSR, 0x000000f0 }, 191 { RT2560_PWRCSR1, 0x000001ff }, 192 { RT2560_MACCSR0, 0x00213223 }, 193 { RT2560_MACCSR1, 0x00235518 }, 194 { RT2560_RLPWCSR, 0x00000040 }, 195 { RT2560_RALINKCSR, 0x9a009a11 }, 196 { RT2560_CSR7, 0xffffffff }, 197 { RT2560_BBPCSR1, 0x82188200 }, 198 { RT2560_TXACKCSR0, 0x00000020 }, 199 { RT2560_SECCSR3, 0x0000e78f } 200 }; 201 202 /* 203 * Default values for BBP registers; values taken from the reference driver. 204 */ 205 static const struct { 206 uint8_t reg; 207 uint8_t val; 208 } rt2560_def_bbp[] = { 209 { 3, 0x02 }, 210 { 4, 0x19 }, 211 { 14, 0x1c }, 212 { 15, 0x30 }, 213 { 16, 0xac }, 214 { 17, 0x48 }, 215 { 18, 0x18 }, 216 { 19, 0xff }, 217 { 20, 0x1e }, 218 { 21, 0x08 }, 219 { 22, 0x08 }, 220 { 23, 0x08 }, 221 { 24, 0x80 }, 222 { 25, 0x50 }, 223 { 26, 0x08 }, 224 { 27, 0x23 }, 225 { 30, 0x10 }, 226 { 31, 0x2b }, 227 { 32, 0xb9 }, 228 { 34, 0x12 }, 229 { 35, 0x50 }, 230 { 39, 0xc4 }, 231 { 40, 0x02 }, 232 { 41, 0x60 }, 233 { 53, 0x10 }, 234 { 54, 0x18 }, 235 { 56, 0x08 }, 236 { 57, 0x10 }, 237 { 58, 0x08 }, 238 { 61, 0x60 }, 239 { 62, 0x10 }, 240 { 75, 0xff } 241 }; 242 243 /* 244 * Default values for RF register R2 indexed by channel numbers; values taken 245 * from the reference driver. 246 */ 247 static const uint32_t rt2560_rf2522_r2[] = { 248 0x307f6, 0x307fb, 0x30800, 0x30805, 0x3080a, 0x3080f, 0x30814, 249 0x30819, 0x3081e, 0x30823, 0x30828, 0x3082d, 0x30832, 0x3083e 250 }; 251 252 static const uint32_t rt2560_rf2523_r2[] = { 253 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 254 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 255 }; 256 257 static const uint32_t rt2560_rf2524_r2[] = { 258 0x00327, 0x00328, 0x00329, 0x0032a, 0x0032b, 0x0032c, 0x0032d, 259 0x0032e, 0x0032f, 0x00340, 0x00341, 0x00342, 0x00343, 0x00346 260 }; 261 262 static const uint32_t rt2560_rf2525_r2[] = { 263 0x20327, 0x20328, 0x20329, 0x2032a, 0x2032b, 0x2032c, 0x2032d, 264 0x2032e, 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20346 265 }; 266 267 static const uint32_t rt2560_rf2525_hi_r2[] = { 268 0x2032f, 0x20340, 0x20341, 0x20342, 0x20343, 0x20344, 0x20345, 269 0x20346, 0x20347, 0x20348, 0x20349, 0x2034a, 0x2034b, 0x2034e 270 }; 271 272 static const uint32_t rt2560_rf2525e_r2[] = { 273 0x2044d, 0x2044e, 0x2044f, 0x20460, 0x20461, 0x20462, 0x20463, 274 0x20464, 0x20465, 0x20466, 0x20467, 0x20468, 0x20469, 0x2046b 275 }; 276 277 static const uint32_t rt2560_rf2526_hi_r2[] = { 278 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d, 0x0022d, 279 0x0022e, 0x0022e, 0x0022f, 0x0022d, 0x00240, 0x00240, 0x00241 280 }; 281 282 static const uint32_t rt2560_rf2526_r2[] = { 283 0x00226, 0x00227, 0x00227, 0x00228, 0x00228, 0x00229, 0x00229, 284 0x0022a, 0x0022a, 0x0022b, 0x0022b, 0x0022c, 0x0022c, 0x0022d 285 }; 286 287 /* 288 * For dual-band RF, RF registers R1 and R4 also depend on channel number; 289 * values taken from the reference driver. 290 */ 291 static const struct { 292 uint8_t chan; 293 uint32_t r1; 294 uint32_t r2; 295 uint32_t r4; 296 } rt2560_rf5222[] = { 297 { 1, 0x08808, 0x0044d, 0x00282 }, 298 { 2, 0x08808, 0x0044e, 0x00282 }, 299 { 3, 0x08808, 0x0044f, 0x00282 }, 300 { 4, 0x08808, 0x00460, 0x00282 }, 301 { 5, 0x08808, 0x00461, 0x00282 }, 302 { 6, 0x08808, 0x00462, 0x00282 }, 303 { 7, 0x08808, 0x00463, 0x00282 }, 304 { 8, 0x08808, 0x00464, 0x00282 }, 305 { 9, 0x08808, 0x00465, 0x00282 }, 306 { 10, 0x08808, 0x00466, 0x00282 }, 307 { 11, 0x08808, 0x00467, 0x00282 }, 308 { 12, 0x08808, 0x00468, 0x00282 }, 309 { 13, 0x08808, 0x00469, 0x00282 }, 310 { 14, 0x08808, 0x0046b, 0x00286 }, 311 312 { 36, 0x08804, 0x06225, 0x00287 }, 313 { 40, 0x08804, 0x06226, 0x00287 }, 314 { 44, 0x08804, 0x06227, 0x00287 }, 315 { 48, 0x08804, 0x06228, 0x00287 }, 316 { 52, 0x08804, 0x06229, 0x00287 }, 317 { 56, 0x08804, 0x0622a, 0x00287 }, 318 { 60, 0x08804, 0x0622b, 0x00287 }, 319 { 64, 0x08804, 0x0622c, 0x00287 }, 320 321 { 100, 0x08804, 0x02200, 0x00283 }, 322 { 104, 0x08804, 0x02201, 0x00283 }, 323 { 108, 0x08804, 0x02202, 0x00283 }, 324 { 112, 0x08804, 0x02203, 0x00283 }, 325 { 116, 0x08804, 0x02204, 0x00283 }, 326 { 120, 0x08804, 0x02205, 0x00283 }, 327 { 124, 0x08804, 0x02206, 0x00283 }, 328 { 128, 0x08804, 0x02207, 0x00283 }, 329 { 132, 0x08804, 0x02208, 0x00283 }, 330 { 136, 0x08804, 0x02209, 0x00283 }, 331 { 140, 0x08804, 0x0220a, 0x00283 }, 332 333 { 149, 0x08808, 0x02429, 0x00281 }, 334 { 153, 0x08808, 0x0242b, 0x00281 }, 335 { 157, 0x08808, 0x0242d, 0x00281 }, 336 { 161, 0x08808, 0x0242f, 0x00281 } 337 }; 338 339 int 340 rt2560_attach(void *xsc, int id) 341 { 342 struct rt2560_softc *sc = xsc; 343 struct ieee80211com *ic = &sc->sc_ic; 344 struct ifnet *ifp = &sc->sc_if; 345 int error, i; 346 347 callout_init(&sc->scan_ch); 348 callout_init(&sc->rssadapt_ch); 349 350 /* retrieve RT2560 rev. no */ 351 sc->asic_rev = RAL_READ(sc, RT2560_CSR0); 352 353 /* retrieve MAC address */ 354 rt2560_get_macaddr(sc, ic->ic_myaddr); 355 356 aprint_normal("%s: 802.11 address %s\n", sc->sc_dev.dv_xname, 357 ether_sprintf(ic->ic_myaddr)); 358 359 /* retrieve RF rev. no and various other things from EEPROM */ 360 rt2560_read_eeprom(sc); 361 362 aprint_normal("%s: MAC/BBP RT2560 (rev 0x%02x), RF %s\n", 363 sc->sc_dev.dv_xname, sc->asic_rev, rt2560_get_rf(sc->rf_rev)); 364 365 /* 366 * Allocate Tx and Rx rings. 367 */ 368 error = rt2560_alloc_tx_ring(sc, &sc->txq, RT2560_TX_RING_COUNT); 369 if (error != 0) { 370 aprint_error("%s: could not allocate Tx ring\n)", 371 sc->sc_dev.dv_xname); 372 goto fail1; 373 } 374 375 error = rt2560_alloc_tx_ring(sc, &sc->atimq, RT2560_ATIM_RING_COUNT); 376 if (error != 0) { 377 aprint_error("%s: could not allocate ATIM ring\n", 378 sc->sc_dev.dv_xname); 379 goto fail2; 380 } 381 382 error = rt2560_alloc_tx_ring(sc, &sc->prioq, RT2560_PRIO_RING_COUNT); 383 if (error != 0) { 384 aprint_error("%s: could not allocate Prio ring\n", 385 sc->sc_dev.dv_xname); 386 goto fail3; 387 } 388 389 error = rt2560_alloc_tx_ring(sc, &sc->bcnq, RT2560_BEACON_RING_COUNT); 390 if (error != 0) { 391 aprint_error("%s: could not allocate Beacon ring\n", 392 sc->sc_dev.dv_xname); 393 goto fail4; 394 } 395 396 error = rt2560_alloc_rx_ring(sc, &sc->rxq, RT2560_RX_RING_COUNT); 397 if (error != 0) { 398 aprint_error("%s: could not allocate Rx ring\n", 399 sc->sc_dev.dv_xname); 400 goto fail5; 401 } 402 403 ifp->if_softc = sc; 404 ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST; 405 ifp->if_init = rt2560_init; 406 ifp->if_ioctl = rt2560_ioctl; 407 ifp->if_start = rt2560_start; 408 ifp->if_watchdog = rt2560_watchdog; 409 IFQ_SET_READY(&ifp->if_snd); 410 memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ); 411 412 ic->ic_ifp = ifp; 413 ic->ic_phytype = IEEE80211_T_OFDM; /* not only, but not used */ 414 ic->ic_opmode = IEEE80211_M_STA; /* default to BSS mode */ 415 ic->ic_state = IEEE80211_S_INIT; 416 417 /* set device capabilities */ 418 ic->ic_caps = 419 IEEE80211_C_IBSS | /* IBSS mode supported */ 420 IEEE80211_C_MONITOR | /* monitor mode supported */ 421 IEEE80211_C_HOSTAP | /* HostAp mode supported */ 422 IEEE80211_C_TXPMGT | /* tx power management */ 423 IEEE80211_C_SHPREAMBLE | /* short preamble supported */ 424 IEEE80211_C_SHSLOT | /* short slot time supported */ 425 IEEE80211_C_WPA; /* 802.11i */ 426 427 if (sc->rf_rev == RT2560_RF_5222) { 428 /* set supported .11a rates */ 429 ic->ic_sup_rates[IEEE80211_MODE_11A] = rt2560_rateset_11a; 430 431 /* set supported .11a channels */ 432 for (i = 36; i <= 64; i += 4) { 433 ic->ic_channels[i].ic_freq = 434 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 435 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 436 } 437 for (i = 100; i <= 140; i += 4) { 438 ic->ic_channels[i].ic_freq = 439 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 440 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 441 } 442 for (i = 149; i <= 161; i += 4) { 443 ic->ic_channels[i].ic_freq = 444 ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ); 445 ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A; 446 } 447 } 448 449 /* set supported .11b and .11g rates */ 450 ic->ic_sup_rates[IEEE80211_MODE_11B] = rt2560_rateset_11b; 451 ic->ic_sup_rates[IEEE80211_MODE_11G] = rt2560_rateset_11g; 452 453 /* set supported .11b and .11g channels (1 through 14) */ 454 for (i = 1; i <= 14; i++) { 455 ic->ic_channels[i].ic_freq = 456 ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ); 457 ic->ic_channels[i].ic_flags = 458 IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM | 459 IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ; 460 } 461 462 if_attach(ifp); 463 ieee80211_ifattach(ic); 464 ic->ic_node_alloc = rt2560_node_alloc; 465 ic->ic_updateslot = rt2560_update_slot; 466 ic->ic_reset = rt2560_reset; 467 468 /* override state transition machine */ 469 sc->sc_newstate = ic->ic_newstate; 470 ic->ic_newstate = rt2560_newstate; 471 ieee80211_media_init(ic, rt2560_media_change, ieee80211_media_status); 472 473 #if NBPFILTER > 0 474 bpfattach2(ifp, DLT_IEEE802_11_RADIO, 475 sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf); 476 #endif 477 478 sc->sc_rxtap_len = sizeof sc->sc_rxtapu; 479 sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len); 480 sc->sc_rxtap.wr_ihdr.it_present = htole32(RT2560_RX_RADIOTAP_PRESENT); 481 482 sc->sc_txtap_len = sizeof sc->sc_txtapu; 483 sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len); 484 sc->sc_txtap.wt_ihdr.it_present = htole32(RT2560_TX_RADIOTAP_PRESENT); 485 486 487 sc->dwelltime = 200; 488 489 ieee80211_announce(ic); 490 491 return 0; 492 493 fail5: rt2560_free_tx_ring(sc, &sc->bcnq); 494 fail4: rt2560_free_tx_ring(sc, &sc->prioq); 495 fail3: rt2560_free_tx_ring(sc, &sc->atimq); 496 fail2: rt2560_free_tx_ring(sc, &sc->txq); 497 fail1: 498 return ENXIO; 499 } 500 501 502 int 503 rt2560_detach(void *xsc) 504 { 505 struct rt2560_softc *sc = xsc; 506 struct ifnet *ifp = &sc->sc_if; 507 508 callout_stop(&sc->scan_ch); 509 callout_stop(&sc->rssadapt_ch); 510 511 rt2560_stop(sc); 512 513 ieee80211_ifdetach(&sc->sc_ic); /* free all nodes */ 514 if_detach(ifp); 515 516 rt2560_free_tx_ring(sc, &sc->txq); 517 rt2560_free_tx_ring(sc, &sc->atimq); 518 rt2560_free_tx_ring(sc, &sc->prioq); 519 rt2560_free_tx_ring(sc, &sc->bcnq); 520 rt2560_free_rx_ring(sc, &sc->rxq); 521 522 return 0; 523 } 524 525 int 526 rt2560_alloc_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring, 527 int count) 528 { 529 int i, nsegs, error; 530 531 ring->count = count; 532 ring->queued = 0; 533 ring->cur = ring->next = 0; 534 ring->cur_encrypt = ring->next_encrypt = 0; 535 536 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 1, 537 count * RT2560_TX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 538 if (error != 0) { 539 printf("%s: could not create desc DMA map\n", 540 sc->sc_dev.dv_xname); 541 goto fail; 542 } 543 544 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_TX_DESC_SIZE, 545 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 546 if (error != 0) { 547 printf("%s: could not allocate DMA memory\n", 548 sc->sc_dev.dv_xname); 549 goto fail; 550 } 551 552 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 553 count * RT2560_TX_DESC_SIZE, (caddr_t *)&ring->desc, 554 BUS_DMA_NOWAIT); 555 if (error != 0) { 556 printf("%s: could not map desc DMA memory\n", 557 sc->sc_dev.dv_xname); 558 goto fail; 559 } 560 561 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 562 count * RT2560_TX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 563 if (error != 0) { 564 printf("%s: could not load desc DMA map\n", 565 sc->sc_dev.dv_xname); 566 goto fail; 567 } 568 569 memset(ring->desc, 0, count * RT2560_TX_DESC_SIZE); 570 ring->physaddr = ring->map->dm_segs->ds_addr; 571 572 ring->data = malloc(count * sizeof (struct rt2560_tx_data), M_DEVBUF, 573 M_NOWAIT); 574 if (ring->data == NULL) { 575 printf("%s: could not allocate soft data\n", 576 sc->sc_dev.dv_xname); 577 error = ENOMEM; 578 goto fail; 579 } 580 581 memset(ring->data, 0, count * sizeof (struct rt2560_tx_data)); 582 for (i = 0; i < count; i++) { 583 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 584 RT2560_MAX_SCATTER, MCLBYTES, 0, BUS_DMA_NOWAIT, 585 &ring->data[i].map); 586 if (error != 0) { 587 printf("%s: could not create DMA map\n", 588 sc->sc_dev.dv_xname); 589 goto fail; 590 } 591 } 592 593 return 0; 594 595 fail: rt2560_free_tx_ring(sc, ring); 596 return error; 597 } 598 599 void 600 rt2560_reset_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 601 { 602 struct rt2560_tx_desc *desc; 603 struct rt2560_tx_data *data; 604 int i; 605 606 for (i = 0; i < ring->count; i++) { 607 desc = &ring->desc[i]; 608 data = &ring->data[i]; 609 610 if (data->m != NULL) { 611 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 612 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 613 bus_dmamap_unload(sc->sc_dmat, data->map); 614 m_freem(data->m); 615 data->m = NULL; 616 } 617 618 if (data->ni != NULL) { 619 ieee80211_free_node(data->ni); 620 data->ni = NULL; 621 } 622 623 desc->flags = 0; 624 } 625 626 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 627 BUS_DMASYNC_PREWRITE); 628 629 ring->queued = 0; 630 ring->cur = ring->next = 0; 631 ring->cur_encrypt = ring->next_encrypt = 0; 632 } 633 634 void 635 rt2560_free_tx_ring(struct rt2560_softc *sc, struct rt2560_tx_ring *ring) 636 { 637 struct rt2560_tx_data *data; 638 int i; 639 640 if (ring->desc != NULL) { 641 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 642 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 643 bus_dmamap_unload(sc->sc_dmat, ring->map); 644 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc, 645 ring->count * RT2560_TX_DESC_SIZE); 646 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 647 } 648 649 if (ring->data != NULL) { 650 for (i = 0; i < ring->count; i++) { 651 data = &ring->data[i]; 652 653 if (data->m != NULL) { 654 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 655 data->map->dm_mapsize, 656 BUS_DMASYNC_POSTWRITE); 657 bus_dmamap_unload(sc->sc_dmat, data->map); 658 m_freem(data->m); 659 } 660 661 if (data->ni != NULL) 662 ieee80211_free_node(data->ni); 663 664 665 if (data->map != NULL) 666 bus_dmamap_destroy(sc->sc_dmat, data->map); 667 } 668 free(ring->data, M_DEVBUF); 669 } 670 } 671 672 int 673 rt2560_alloc_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring, 674 int count) 675 { 676 struct rt2560_rx_desc *desc; 677 struct rt2560_rx_data *data; 678 int i, nsegs, error; 679 680 ring->count = count; 681 ring->cur = ring->next = 0; 682 ring->cur_decrypt = 0; 683 684 error = bus_dmamap_create(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 1, 685 count * RT2560_RX_DESC_SIZE, 0, BUS_DMA_NOWAIT, &ring->map); 686 if (error != 0) { 687 printf("%s: could not create desc DMA map\n", 688 sc->sc_dev.dv_xname); 689 goto fail; 690 } 691 692 error = bus_dmamem_alloc(sc->sc_dmat, count * RT2560_RX_DESC_SIZE, 693 PAGE_SIZE, 0, &ring->seg, 1, &nsegs, BUS_DMA_NOWAIT); 694 if (error != 0) { 695 printf("%s: could not allocate DMA memory\n", 696 sc->sc_dev.dv_xname); 697 goto fail; 698 } 699 700 error = bus_dmamem_map(sc->sc_dmat, &ring->seg, nsegs, 701 count * RT2560_RX_DESC_SIZE, (caddr_t *)&ring->desc, 702 BUS_DMA_NOWAIT); 703 if (error != 0) { 704 printf("%s: could not map desc DMA memory\n", 705 sc->sc_dev.dv_xname); 706 goto fail; 707 } 708 709 error = bus_dmamap_load(sc->sc_dmat, ring->map, ring->desc, 710 count * RT2560_RX_DESC_SIZE, NULL, BUS_DMA_NOWAIT); 711 if (error != 0) { 712 printf("%s: could not load desc DMA map\n", 713 sc->sc_dev.dv_xname); 714 goto fail; 715 } 716 717 memset(ring->desc, 0, count * RT2560_RX_DESC_SIZE); 718 ring->physaddr = ring->map->dm_segs->ds_addr; 719 720 ring->data = malloc(count * sizeof (struct rt2560_rx_data), M_DEVBUF, 721 M_NOWAIT); 722 if (ring->data == NULL) { 723 printf("%s: could not allocate soft data\n", 724 sc->sc_dev.dv_xname); 725 error = ENOMEM; 726 goto fail; 727 } 728 729 /* 730 * Pre-allocate Rx buffers and populate Rx ring. 731 */ 732 memset(ring->data, 0, count * sizeof (struct rt2560_rx_data)); 733 for (i = 0; i < count; i++) { 734 desc = &sc->rxq.desc[i]; 735 data = &sc->rxq.data[i]; 736 737 error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES, 738 0, BUS_DMA_NOWAIT, &data->map); 739 if (error != 0) { 740 printf("%s: could not create DMA map\n", 741 sc->sc_dev.dv_xname); 742 goto fail; 743 } 744 745 MGETHDR(data->m, M_DONTWAIT, MT_DATA); 746 if (data->m == NULL) { 747 printf("%s: could not allocate rx mbuf\n", 748 sc->sc_dev.dv_xname); 749 error = ENOMEM; 750 goto fail; 751 } 752 753 MCLGET(data->m, M_DONTWAIT); 754 if (!(data->m->m_flags & M_EXT)) { 755 printf("%s: could not allocate rx mbuf cluster\n", 756 sc->sc_dev.dv_xname); 757 error = ENOMEM; 758 goto fail; 759 } 760 761 error = bus_dmamap_load(sc->sc_dmat, data->map, 762 mtod(data->m, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 763 if (error != 0) { 764 printf("%s: could not load rx buf DMA map", 765 sc->sc_dev.dv_xname); 766 goto fail; 767 } 768 769 desc->flags = htole32(RT2560_RX_BUSY); 770 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 771 } 772 773 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 774 BUS_DMASYNC_PREWRITE); 775 776 return 0; 777 778 fail: rt2560_free_rx_ring(sc, ring); 779 return error; 780 } 781 782 void 783 rt2560_reset_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 784 { 785 int i; 786 787 for (i = 0; i < ring->count; i++) { 788 ring->desc[i].flags = htole32(RT2560_RX_BUSY); 789 ring->data[i].drop = 0; 790 } 791 792 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, ring->map->dm_mapsize, 793 BUS_DMASYNC_PREWRITE); 794 795 ring->cur = ring->next = 0; 796 ring->cur_decrypt = 0; 797 } 798 799 void 800 rt2560_free_rx_ring(struct rt2560_softc *sc, struct rt2560_rx_ring *ring) 801 { 802 struct rt2560_rx_data *data; 803 int i; 804 805 if (ring->desc != NULL) { 806 bus_dmamap_sync(sc->sc_dmat, ring->map, 0, 807 ring->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 808 bus_dmamap_unload(sc->sc_dmat, ring->map); 809 bus_dmamem_unmap(sc->sc_dmat, (caddr_t)ring->desc, 810 ring->count * RT2560_RX_DESC_SIZE); 811 bus_dmamem_free(sc->sc_dmat, &ring->seg, 1); 812 } 813 814 if (ring->data != NULL) { 815 for (i = 0; i < ring->count; i++) { 816 data = &ring->data[i]; 817 818 if (data->m != NULL) { 819 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 820 data->map->dm_mapsize, 821 BUS_DMASYNC_POSTREAD); 822 bus_dmamap_unload(sc->sc_dmat, data->map); 823 m_freem(data->m); 824 } 825 826 if (data->map != NULL) 827 bus_dmamap_destroy(sc->sc_dmat, data->map); 828 } 829 free(ring->data, M_DEVBUF); 830 } 831 } 832 833 struct ieee80211_node * 834 rt2560_node_alloc(struct ieee80211_node_table *nt) 835 { 836 struct rt2560_node *rn; 837 838 rn = malloc(sizeof (struct rt2560_node), M_80211_NODE, 839 M_NOWAIT | M_ZERO); 840 841 return (rn != NULL) ? &rn->ni : NULL; 842 } 843 844 int 845 rt2560_media_change(struct ifnet *ifp) 846 { 847 int error; 848 849 error = ieee80211_media_change(ifp); 850 if (error != ENETRESET) 851 return error; 852 853 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING)) 854 rt2560_init(ifp); 855 856 return 0; 857 } 858 859 /* 860 * This function is called periodically (every 200ms) during scanning to 861 * switch from one channel to another. 862 */ 863 void 864 rt2560_next_scan(void *arg) 865 { 866 struct rt2560_softc *sc = arg; 867 struct ieee80211com *ic = &sc->sc_ic; 868 869 if (ic->ic_state == IEEE80211_S_SCAN) 870 ieee80211_next_scan(ic); 871 } 872 873 /* 874 * This function is called for each neighbor node. 875 */ 876 void 877 rt2560_iter_func(void *arg, struct ieee80211_node *ni) 878 { 879 struct rt2560_node *rn = (struct rt2560_node *)ni; 880 881 ieee80211_rssadapt_updatestats(&rn->rssadapt); 882 } 883 884 /* 885 * This function is called periodically (every 100ms) in RUN state to update 886 * the rate adaptation statistics. 887 */ 888 void 889 rt2560_update_rssadapt(void *arg) 890 { 891 struct rt2560_softc *sc = arg; 892 struct ieee80211com *ic = &sc->sc_ic; 893 894 ieee80211_iterate_nodes(&ic->ic_sta, rt2560_iter_func, arg); 895 896 callout_reset(&sc->rssadapt_ch, hz / 10, rt2560_update_rssadapt, sc); 897 } 898 899 int 900 rt2560_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg) 901 { 902 struct rt2560_softc *sc = ic->ic_ifp->if_softc; 903 enum ieee80211_state ostate; 904 struct ieee80211_node *ni; 905 struct mbuf *m; 906 int error = 0; 907 908 ostate = ic->ic_state; 909 callout_stop(&sc->scan_ch); 910 911 switch (nstate) { 912 case IEEE80211_S_INIT: 913 callout_stop(&sc->rssadapt_ch); 914 915 if (ostate == IEEE80211_S_RUN) { 916 /* abort TSF synchronization */ 917 RAL_WRITE(sc, RT2560_CSR14, 0); 918 919 /* turn association led off */ 920 rt2560_update_led(sc, 0, 0); 921 } 922 break; 923 924 case IEEE80211_S_SCAN: 925 rt2560_set_chan(sc, ic->ic_curchan); 926 callout_reset(&sc->scan_ch, (sc->dwelltime * hz) / 1000, 927 rt2560_next_scan, sc); 928 break; 929 930 case IEEE80211_S_AUTH: 931 rt2560_set_chan(sc, ic->ic_curchan); 932 break; 933 934 case IEEE80211_S_ASSOC: 935 rt2560_set_chan(sc, ic->ic_curchan); 936 break; 937 938 case IEEE80211_S_RUN: 939 rt2560_set_chan(sc, ic->ic_curchan); 940 941 ni = ic->ic_bss; 942 943 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 944 rt2560_update_plcp(sc); 945 rt2560_set_basicrates(sc); 946 rt2560_set_bssid(sc, ni->ni_bssid); 947 } 948 949 if (ic->ic_opmode == IEEE80211_M_HOSTAP || 950 ic->ic_opmode == IEEE80211_M_IBSS) { 951 m = ieee80211_beacon_alloc(ic, ni, &sc->sc_bo); 952 if (m == NULL) { 953 printf("%s: could not allocate beacon\n", 954 sc->sc_dev.dv_xname); 955 error = ENOBUFS; 956 break; 957 } 958 959 ieee80211_ref_node(ni); 960 error = rt2560_tx_bcn(sc, m, ni); 961 if (error != 0) 962 break; 963 } 964 965 /* turn assocation led on */ 966 rt2560_update_led(sc, 1, 0); 967 968 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 969 callout_reset(&sc->rssadapt_ch, hz / 10, 970 rt2560_update_rssadapt, sc); 971 rt2560_enable_tsf_sync(sc); 972 } 973 break; 974 } 975 976 return (error != 0) ? error : sc->sc_newstate(ic, nstate, arg); 977 } 978 979 /* 980 * Read 16 bits at address 'addr' from the serial EEPROM (either 93C46 or 981 * 93C66). 982 */ 983 uint16_t 984 rt2560_eeprom_read(struct rt2560_softc *sc, uint8_t addr) 985 { 986 uint32_t tmp; 987 uint16_t val; 988 int n; 989 990 /* clock C once before the first command */ 991 RT2560_EEPROM_CTL(sc, 0); 992 993 RT2560_EEPROM_CTL(sc, RT2560_S); 994 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 995 RT2560_EEPROM_CTL(sc, RT2560_S); 996 997 /* write start bit (1) */ 998 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 999 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 1000 1001 /* write READ opcode (10) */ 1002 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D); 1003 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_D | RT2560_C); 1004 RT2560_EEPROM_CTL(sc, RT2560_S); 1005 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 1006 1007 /* write address (A5-A0 or A7-A0) */ 1008 n = (RAL_READ(sc, RT2560_CSR21) & RT2560_93C46) ? 5 : 7; 1009 for (; n >= 0; n--) { 1010 RT2560_EEPROM_CTL(sc, RT2560_S | 1011 (((addr >> n) & 1) << RT2560_SHIFT_D)); 1012 RT2560_EEPROM_CTL(sc, RT2560_S | 1013 (((addr >> n) & 1) << RT2560_SHIFT_D) | RT2560_C); 1014 } 1015 1016 RT2560_EEPROM_CTL(sc, RT2560_S); 1017 1018 /* read data Q15-Q0 */ 1019 val = 0; 1020 for (n = 15; n >= 0; n--) { 1021 RT2560_EEPROM_CTL(sc, RT2560_S | RT2560_C); 1022 tmp = RAL_READ(sc, RT2560_CSR21); 1023 val |= ((tmp & RT2560_Q) >> RT2560_SHIFT_Q) << n; 1024 RT2560_EEPROM_CTL(sc, RT2560_S); 1025 } 1026 1027 RT2560_EEPROM_CTL(sc, 0); 1028 1029 /* clear Chip Select and clock C */ 1030 RT2560_EEPROM_CTL(sc, RT2560_S); 1031 RT2560_EEPROM_CTL(sc, 0); 1032 RT2560_EEPROM_CTL(sc, RT2560_C); 1033 1034 return val; 1035 } 1036 1037 /* 1038 * Some frames were processed by the hardware cipher engine and are ready for 1039 * transmission. 1040 */ 1041 void 1042 rt2560_encryption_intr(struct rt2560_softc *sc) 1043 { 1044 struct rt2560_tx_desc *desc; 1045 int hw; 1046 1047 /* retrieve last descriptor index processed by cipher engine */ 1048 hw = (RAL_READ(sc, RT2560_SECCSR1) - sc->txq.physaddr) / 1049 RT2560_TX_DESC_SIZE; 1050 1051 for (; sc->txq.next_encrypt != hw;) { 1052 desc = &sc->txq.desc[sc->txq.next_encrypt]; 1053 1054 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1055 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 1056 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 1057 1058 if (le32toh(desc->flags) & 1059 (RT2560_TX_BUSY | RT2560_TX_CIPHER_BUSY)) 1060 break; 1061 1062 /* for TKIP, swap eiv field to fix a bug in ASIC */ 1063 if ((le32toh(desc->flags) & RT2560_TX_CIPHER_MASK) == 1064 RT2560_TX_CIPHER_TKIP) 1065 desc->eiv = bswap32(desc->eiv); 1066 1067 /* mark the frame ready for transmission */ 1068 desc->flags |= htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 1069 1070 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1071 sc->txq.next_encrypt * RT2560_TX_DESC_SIZE, 1072 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1073 1074 DPRINTFN(15, ("encryption done idx=%u\n", 1075 sc->txq.next_encrypt)); 1076 1077 sc->txq.next_encrypt = 1078 (sc->txq.next_encrypt + 1) % RT2560_TX_RING_COUNT; 1079 } 1080 1081 /* kick Tx */ 1082 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_TX); 1083 } 1084 1085 void 1086 rt2560_tx_intr(struct rt2560_softc *sc) 1087 { 1088 struct ieee80211com *ic = &sc->sc_ic; 1089 struct ifnet *ifp = ic->ic_ifp; 1090 struct rt2560_tx_desc *desc; 1091 struct rt2560_tx_data *data; 1092 struct rt2560_node *rn; 1093 1094 for (;;) { 1095 desc = &sc->txq.desc[sc->txq.next]; 1096 data = &sc->txq.data[sc->txq.next]; 1097 1098 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1099 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1100 BUS_DMASYNC_POSTREAD); 1101 1102 if ((le32toh(desc->flags) & RT2560_TX_BUSY) || 1103 (le32toh(desc->flags) & RT2560_TX_CIPHER_BUSY) || 1104 !(le32toh(desc->flags) & RT2560_TX_VALID)) 1105 break; 1106 1107 rn = (struct rt2560_node *)data->ni; 1108 1109 switch (le32toh(desc->flags) & RT2560_TX_RESULT_MASK) { 1110 case RT2560_TX_SUCCESS: 1111 DPRINTFN(10, ("data frame sent successfully\n")); 1112 if (data->id.id_node != NULL) { 1113 ieee80211_rssadapt_raise_rate(ic, 1114 &rn->rssadapt, &data->id); 1115 } 1116 ifp->if_opackets++; 1117 break; 1118 1119 case RT2560_TX_SUCCESS_RETRY: 1120 DPRINTFN(9, ("data frame sent after %u retries\n", 1121 (le32toh(desc->flags) >> 5) & 0x7)); 1122 ifp->if_opackets++; 1123 break; 1124 1125 case RT2560_TX_FAIL_RETRY: 1126 DPRINTFN(9, ("sending data frame failed (too much " 1127 "retries)\n")); 1128 if (data->id.id_node != NULL) { 1129 ieee80211_rssadapt_lower_rate(ic, data->ni, 1130 &rn->rssadapt, &data->id); 1131 } 1132 ifp->if_oerrors++; 1133 break; 1134 1135 case RT2560_TX_FAIL_INVALID: 1136 case RT2560_TX_FAIL_OTHER: 1137 default: 1138 printf("%s: sending data frame failed 0x%08x\n", 1139 sc->sc_dev.dv_xname, le32toh(desc->flags)); 1140 ifp->if_oerrors++; 1141 } 1142 1143 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1144 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1145 bus_dmamap_unload(sc->sc_dmat, data->map); 1146 m_freem(data->m); 1147 data->m = NULL; 1148 ieee80211_free_node(data->ni); 1149 data->ni = NULL; 1150 1151 /* descriptor is no longer valid */ 1152 desc->flags &= ~htole32(RT2560_TX_VALID); 1153 1154 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1155 sc->txq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1156 BUS_DMASYNC_PREWRITE); 1157 1158 DPRINTFN(15, ("tx done idx=%u\n", sc->txq.next)); 1159 1160 sc->txq.queued--; 1161 sc->txq.next = (sc->txq.next + 1) % RT2560_TX_RING_COUNT; 1162 } 1163 1164 sc->sc_tx_timer = 0; 1165 ifp->if_flags &= ~IFF_OACTIVE; 1166 rt2560_start(ifp); 1167 } 1168 1169 void 1170 rt2560_prio_intr(struct rt2560_softc *sc) 1171 { 1172 struct ieee80211com *ic = &sc->sc_ic; 1173 struct ifnet *ifp = ic->ic_ifp; 1174 struct rt2560_tx_desc *desc; 1175 struct rt2560_tx_data *data; 1176 1177 for (;;) { 1178 desc = &sc->prioq.desc[sc->prioq.next]; 1179 data = &sc->prioq.data[sc->prioq.next]; 1180 1181 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1182 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1183 BUS_DMASYNC_POSTREAD); 1184 1185 if ((le32toh(desc->flags) & RT2560_TX_BUSY) || 1186 !(le32toh(desc->flags) & RT2560_TX_VALID)) 1187 break; 1188 1189 switch (le32toh(desc->flags) & RT2560_TX_RESULT_MASK) { 1190 case RT2560_TX_SUCCESS: 1191 DPRINTFN(10, ("mgt frame sent successfully\n")); 1192 break; 1193 1194 case RT2560_TX_SUCCESS_RETRY: 1195 DPRINTFN(9, ("mgt frame sent after %u retries\n", 1196 (le32toh(desc->flags) >> 5) & 0x7)); 1197 break; 1198 1199 case RT2560_TX_FAIL_RETRY: 1200 DPRINTFN(9, ("sending mgt frame failed (too much " 1201 "retries)\n")); 1202 break; 1203 1204 case RT2560_TX_FAIL_INVALID: 1205 case RT2560_TX_FAIL_OTHER: 1206 default: 1207 printf("%s: sending mgt frame failed 0x%08x\n", 1208 sc->sc_dev.dv_xname, le32toh(desc->flags)); 1209 } 1210 1211 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1212 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1213 bus_dmamap_unload(sc->sc_dmat, data->map); 1214 m_freem(data->m); 1215 data->m = NULL; 1216 ieee80211_free_node(data->ni); 1217 data->ni = NULL; 1218 1219 /* descriptor is no longer valid */ 1220 desc->flags &= ~htole32(RT2560_TX_VALID); 1221 1222 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1223 sc->prioq.next * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1224 BUS_DMASYNC_PREWRITE); 1225 1226 DPRINTFN(15, ("prio done idx=%u\n", sc->prioq.next)); 1227 1228 sc->prioq.queued--; 1229 sc->prioq.next = (sc->prioq.next + 1) % RT2560_PRIO_RING_COUNT; 1230 } 1231 1232 sc->sc_tx_timer = 0; 1233 ifp->if_flags &= ~IFF_OACTIVE; 1234 rt2560_start(ifp); 1235 } 1236 1237 /* 1238 * Some frames were processed by the hardware cipher engine and are ready for 1239 * transmission to the IEEE802.11 layer. 1240 */ 1241 void 1242 rt2560_decryption_intr(struct rt2560_softc *sc) 1243 { 1244 struct ieee80211com *ic = &sc->sc_ic; 1245 struct ifnet *ifp = ic->ic_ifp; 1246 struct rt2560_rx_desc *desc; 1247 struct rt2560_rx_data *data; 1248 struct rt2560_node *rn; 1249 struct ieee80211_frame *wh; 1250 struct ieee80211_node *ni; 1251 struct mbuf *mnew, *m; 1252 int hw, error; 1253 1254 /* retrieve last decriptor index processed by cipher engine */ 1255 hw = (RAL_READ(sc, RT2560_SECCSR0) - sc->rxq.physaddr) / 1256 RT2560_RX_DESC_SIZE; 1257 1258 for (; sc->rxq.cur_decrypt != hw;) { 1259 desc = &sc->rxq.desc[sc->rxq.cur_decrypt]; 1260 data = &sc->rxq.data[sc->rxq.cur_decrypt]; 1261 1262 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1263 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1264 RT2560_TX_DESC_SIZE, BUS_DMASYNC_POSTREAD); 1265 1266 if (le32toh(desc->flags) & 1267 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1268 break; 1269 1270 if (data->drop) { 1271 ifp->if_ierrors++; 1272 goto skip; 1273 } 1274 1275 if ((le32toh(desc->flags) & RT2560_RX_CIPHER_MASK) != 0 && 1276 (le32toh(desc->flags) & RT2560_RX_ICV_ERROR)) { 1277 ifp->if_ierrors++; 1278 goto skip; 1279 } 1280 1281 /* 1282 * Try to allocate a new mbuf for this ring element and load it 1283 * before processing the current mbuf. If the ring element 1284 * cannot be loaded, drop the received packet and reuse the old 1285 * mbuf. In the unlikely case that the old mbuf can't be 1286 * reloaded either, explicitly panic. 1287 */ 1288 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 1289 if (mnew == NULL) { 1290 ifp->if_ierrors++; 1291 goto skip; 1292 } 1293 1294 MCLGET(mnew, M_DONTWAIT); 1295 if (!(mnew->m_flags & M_EXT)) { 1296 m_freem(mnew); 1297 ifp->if_ierrors++; 1298 goto skip; 1299 } 1300 1301 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1302 data->map->dm_mapsize, BUS_DMASYNC_POSTREAD); 1303 bus_dmamap_unload(sc->sc_dmat, data->map); 1304 1305 error = bus_dmamap_load(sc->sc_dmat, data->map, 1306 mtod(mnew, void *), MCLBYTES, NULL, BUS_DMA_NOWAIT); 1307 if (error != 0) { 1308 m_freem(mnew); 1309 1310 /* try to reload the old mbuf */ 1311 error = bus_dmamap_load(sc->sc_dmat, data->map, 1312 mtod(data->m, void *), MCLBYTES, NULL, 1313 BUS_DMA_NOWAIT); 1314 if (error != 0) { 1315 /* very unlikely that it will fail... */ 1316 panic("%s: could not load old rx mbuf", 1317 sc->sc_dev.dv_xname); 1318 } 1319 ifp->if_ierrors++; 1320 goto skip; 1321 } 1322 1323 /* 1324 * New mbuf successfully loaded, update Rx ring and continue 1325 * processing. 1326 */ 1327 m = data->m; 1328 data->m = mnew; 1329 desc->physaddr = htole32(data->map->dm_segs->ds_addr); 1330 1331 /* finalize mbuf */ 1332 m->m_pkthdr.rcvif = ifp; 1333 m->m_pkthdr.len = m->m_len = 1334 (le32toh(desc->flags) >> 16) & 0xfff; 1335 1336 #if NBPFILTER > 0 1337 if (sc->sc_drvbpf != NULL) { 1338 struct mbuf mb; 1339 struct rt2560_rx_radiotap_header *tap = &sc->sc_rxtap; 1340 uint32_t tsf_lo, tsf_hi; 1341 1342 /* get timestamp (low and high 32 bits) */ 1343 tsf_hi = RAL_READ(sc, RT2560_CSR17); 1344 tsf_lo = RAL_READ(sc, RT2560_CSR16); 1345 1346 tap->wr_tsf = 1347 htole64(((uint64_t)tsf_hi << 32) | tsf_lo); 1348 tap->wr_flags = 0; 1349 tap->wr_rate = rt2560_rxrate(desc); 1350 tap->wr_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1351 tap->wr_chan_flags = 1352 htole16(ic->ic_ibss_chan->ic_flags); 1353 tap->wr_antenna = sc->rx_ant; 1354 tap->wr_antsignal = desc->rssi; 1355 1356 M_COPY_PKTHDR(&mb, m); 1357 mb.m_data = (caddr_t)tap; 1358 mb.m_len = sc->sc_txtap_len; 1359 mb.m_next = m; 1360 mb.m_pkthdr.len += mb.m_len; 1361 bpf_mtap(sc->sc_drvbpf, &mb); 1362 } 1363 #endif 1364 1365 wh = mtod(m, struct ieee80211_frame *); 1366 ni = ieee80211_find_rxnode(ic, 1367 (struct ieee80211_frame_min *)wh); 1368 1369 /* send the frame to the 802.11 layer */ 1370 ieee80211_input(ic, m, ni, desc->rssi, 0); 1371 1372 /* give rssi to the rate adatation algorithm */ 1373 rn = (struct rt2560_node *)ni; 1374 ieee80211_rssadapt_input(ic, ni, &rn->rssadapt, desc->rssi); 1375 1376 /* node is no longer needed */ 1377 ieee80211_free_node(ni); 1378 1379 skip: desc->flags = htole32(RT2560_RX_BUSY); 1380 1381 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1382 sc->rxq.cur_decrypt * RT2560_TX_DESC_SIZE, 1383 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1384 1385 DPRINTFN(15, ("decryption done idx=%u\n", sc->rxq.cur_decrypt)); 1386 1387 sc->rxq.cur_decrypt = 1388 (sc->rxq.cur_decrypt + 1) % RT2560_RX_RING_COUNT; 1389 } 1390 1391 /* 1392 * In HostAP mode, ieee80211_input() will enqueue packets in if_snd 1393 * without calling if_start(). 1394 */ 1395 if (!IFQ_IS_EMPTY(&ifp->if_snd) && !(ifp->if_flags & IFF_OACTIVE)) 1396 rt2560_start(ifp); 1397 } 1398 1399 /* 1400 * Some frames were received. Pass them to the hardware cipher engine before 1401 * sending them to the 802.11 layer. 1402 */ 1403 void 1404 rt2560_rx_intr(struct rt2560_softc *sc) 1405 { 1406 struct rt2560_rx_desc *desc; 1407 struct rt2560_rx_data *data; 1408 1409 for (;;) { 1410 desc = &sc->rxq.desc[sc->rxq.cur]; 1411 data = &sc->rxq.data[sc->rxq.cur]; 1412 1413 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1414 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1415 BUS_DMASYNC_POSTREAD); 1416 1417 if (le32toh(desc->flags) & 1418 (RT2560_RX_BUSY | RT2560_RX_CIPHER_BUSY)) 1419 break; 1420 1421 data->drop = 0; 1422 1423 if (le32toh(desc->flags) & 1424 (RT2560_RX_PHY_ERROR | RT2560_RX_CRC_ERROR)) { 1425 /* 1426 * This should not happen since we did not request 1427 * to receive those frames when we filled RXCSR0. 1428 */ 1429 DPRINTFN(5, ("PHY or CRC error flags 0x%08x\n", 1430 le32toh(desc->flags))); 1431 data->drop = 1; 1432 } 1433 1434 if (((le32toh(desc->flags) >> 16) & 0xfff) > MCLBYTES) { 1435 DPRINTFN(5, ("bad length\n")); 1436 data->drop = 1; 1437 } 1438 1439 /* mark the frame for decryption */ 1440 desc->flags |= htole32(RT2560_RX_CIPHER_BUSY); 1441 1442 bus_dmamap_sync(sc->sc_dmat, sc->rxq.map, 1443 sc->rxq.cur * RT2560_RX_DESC_SIZE, RT2560_RX_DESC_SIZE, 1444 BUS_DMASYNC_PREWRITE); 1445 1446 DPRINTFN(15, ("rx done idx=%u\n", sc->rxq.cur)); 1447 1448 sc->rxq.cur = (sc->rxq.cur + 1) % RT2560_RX_RING_COUNT; 1449 } 1450 1451 /* kick decrypt */ 1452 RAL_WRITE(sc, RT2560_SECCSR0, RT2560_KICK_DECRYPT); 1453 } 1454 1455 #if 0 1456 void 1457 rt2560_shutdown(void *xsc) 1458 { 1459 struct rt2560_softc *sc = xsc; 1460 1461 rt2560_stop(sc); 1462 } 1463 1464 void 1465 rt2560_suspend(void *xsc) 1466 { 1467 struct rt2560_softc *sc = xsc; 1468 1469 rt2560_stop(sc); 1470 } 1471 1472 void 1473 rt2560_resume(void *xsc) 1474 { 1475 struct rt2560_softc *sc = xsc; 1476 struct ifnet *ifp = sc->sc_ic.ic_ifp; 1477 1478 if (ifp->if_flags & IFF_UP) { 1479 ifp->if_init(ifp->if_softc); 1480 if (ifp->if_flags & IFF_RUNNING) 1481 ifp->if_start(ifp); 1482 } 1483 } 1484 1485 #endif 1486 /* 1487 * This function is called periodically in IBSS mode when a new beacon must be 1488 * sent out. 1489 */ 1490 static void 1491 rt2560_beacon_expire(struct rt2560_softc *sc) 1492 { 1493 struct ieee80211com *ic = &sc->sc_ic; 1494 struct rt2560_tx_data *data; 1495 1496 if (ic->ic_opmode != IEEE80211_M_IBSS && 1497 ic->ic_opmode != IEEE80211_M_HOSTAP) 1498 return; 1499 1500 data = &sc->bcnq.data[sc->bcnq.next]; 1501 1502 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1503 data->map->dm_mapsize, BUS_DMASYNC_POSTWRITE); 1504 bus_dmamap_unload(sc->sc_dmat, data->map); 1505 1506 ieee80211_beacon_update(ic, data->ni, &sc->sc_bo, data->m, 1); 1507 1508 #if NBPFILTER > 0 1509 if (ic->ic_rawbpf != NULL) 1510 bpf_mtap(ic->ic_rawbpf, data->m); 1511 #endif 1512 rt2560_tx_bcn(sc, data->m, data->ni); 1513 1514 DPRINTFN(15, ("beacon expired\n")); 1515 1516 sc->bcnq.next = (sc->bcnq.next + 1) % RT2560_BEACON_RING_COUNT; 1517 } 1518 1519 static void 1520 rt2560_wakeup_expire(struct rt2560_softc *sc) 1521 { 1522 DPRINTFN(15, ("wakeup expired\n")); 1523 } 1524 1525 int 1526 rt2560_intr(void *arg) 1527 { 1528 struct rt2560_softc *sc = arg; 1529 struct ifnet *ifp = &sc->sc_if; 1530 uint32_t r; 1531 1532 /* disable interrupts */ 1533 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 1534 1535 /* don't re-enable interrupts if we're shutting down */ 1536 if (!(ifp->if_flags & IFF_RUNNING)) 1537 return 0; 1538 1539 r = RAL_READ(sc, RT2560_CSR7); 1540 RAL_WRITE(sc, RT2560_CSR7, r); 1541 1542 if (r & RT2560_BEACON_EXPIRE) 1543 rt2560_beacon_expire(sc); 1544 1545 if (r & RT2560_WAKEUP_EXPIRE) 1546 rt2560_wakeup_expire(sc); 1547 1548 if (r & RT2560_ENCRYPTION_DONE) 1549 rt2560_encryption_intr(sc); 1550 1551 if (r & RT2560_TX_DONE) 1552 rt2560_tx_intr(sc); 1553 1554 if (r & RT2560_PRIO_DONE) 1555 rt2560_prio_intr(sc); 1556 1557 if (r & RT2560_DECRYPTION_DONE) 1558 rt2560_decryption_intr(sc); 1559 1560 if (r & RT2560_RX_DONE) 1561 rt2560_rx_intr(sc); 1562 1563 /* re-enable interrupts */ 1564 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 1565 1566 return 1; 1567 } 1568 1569 /* quickly determine if a given rate is CCK or OFDM */ 1570 #define RAL_RATE_IS_OFDM(rate) ((rate) >= 12 && (rate) != 22) 1571 1572 #define RAL_ACK_SIZE 14 /* 10 + 4(FCS) */ 1573 #define RAL_CTS_SIZE 14 /* 10 + 4(FCS) */ 1574 1575 #define RAL_SIFS 10 /* us */ 1576 1577 #define RT2560_RXTX_TURNAROUND 10 /* us */ 1578 1579 /* 1580 * This function is only used by the Rx radiotap code. It returns the rate at 1581 * which a given frame was received. 1582 */ 1583 #if NBPFILTER > 0 1584 static uint8_t 1585 rt2560_rxrate(struct rt2560_rx_desc *desc) 1586 { 1587 if (le32toh(desc->flags) & RT2560_RX_OFDM) { 1588 /* reverse function of rt2560_plcp_signal */ 1589 switch (desc->rate) { 1590 case 0xb: return 12; 1591 case 0xf: return 18; 1592 case 0xa: return 24; 1593 case 0xe: return 36; 1594 case 0x9: return 48; 1595 case 0xd: return 72; 1596 case 0x8: return 96; 1597 case 0xc: return 108; 1598 } 1599 } else { 1600 if (desc->rate == 10) 1601 return 2; 1602 if (desc->rate == 20) 1603 return 4; 1604 if (desc->rate == 55) 1605 return 11; 1606 if (desc->rate == 110) 1607 return 22; 1608 } 1609 return 2; /* should not get there */ 1610 } 1611 #endif 1612 1613 /* 1614 * Return the expected ack rate for a frame transmitted at rate `rate'. 1615 * XXX: this should depend on the destination node basic rate set. 1616 */ 1617 static int 1618 rt2560_ack_rate(struct ieee80211com *ic, int rate) 1619 { 1620 switch (rate) { 1621 /* CCK rates */ 1622 case 2: 1623 return 2; 1624 case 4: 1625 case 11: 1626 case 22: 1627 return (ic->ic_curmode == IEEE80211_MODE_11B) ? 4 : rate; 1628 1629 /* OFDM rates */ 1630 case 12: 1631 case 18: 1632 return 12; 1633 case 24: 1634 case 36: 1635 return 24; 1636 case 48: 1637 case 72: 1638 case 96: 1639 case 108: 1640 return 48; 1641 } 1642 1643 /* default to 1Mbps */ 1644 return 2; 1645 } 1646 1647 /* 1648 * Compute the duration (in us) needed to transmit `len' bytes at rate `rate'. 1649 * The function automatically determines the operating mode depending on the 1650 * given rate. `flags' indicates whether short preamble is in use or not. 1651 */ 1652 static uint16_t 1653 rt2560_txtime(int len, int rate, uint32_t flags) 1654 { 1655 uint16_t txtime; 1656 1657 if (RAL_RATE_IS_OFDM(rate)) { 1658 /* IEEE Std 802.11a-1999, pp. 37 */ 1659 txtime = (8 + 4 * len + 3 + rate - 1) / rate; 1660 txtime = 16 + 4 + 4 * txtime + 6; 1661 } else { 1662 /* IEEE Std 802.11b-1999, pp. 28 */ 1663 txtime = (16 * len + rate - 1) / rate; 1664 if (rate != 2 && (flags & IEEE80211_F_SHPREAMBLE)) 1665 txtime += 72 + 24; 1666 else 1667 txtime += 144 + 48; 1668 } 1669 return txtime; 1670 } 1671 1672 static uint8_t 1673 rt2560_plcp_signal(int rate) 1674 { 1675 switch (rate) { 1676 /* CCK rates (returned values are device-dependent) */ 1677 case 2: return 0x0; 1678 case 4: return 0x1; 1679 case 11: return 0x2; 1680 case 22: return 0x3; 1681 1682 /* OFDM rates (cf IEEE Std 802.11a-1999, pp. 14 Table 80) */ 1683 case 12: return 0xb; 1684 case 18: return 0xf; 1685 case 24: return 0xa; 1686 case 36: return 0xe; 1687 case 48: return 0x9; 1688 case 72: return 0xd; 1689 case 96: return 0x8; 1690 case 108: return 0xc; 1691 1692 /* unsupported rates (should not get there) */ 1693 default: return 0xff; 1694 } 1695 } 1696 1697 static void 1698 rt2560_setup_tx_desc(struct rt2560_softc *sc, struct rt2560_tx_desc *desc, 1699 uint32_t flags, int len, int rate, int encrypt, bus_addr_t physaddr) 1700 { 1701 struct ieee80211com *ic = &sc->sc_ic; 1702 uint16_t plcp_length; 1703 int remainder; 1704 1705 desc->flags = htole32(flags); 1706 desc->flags |= htole32(len << 16); 1707 desc->flags |= encrypt ? htole32(RT2560_TX_CIPHER_BUSY) : 1708 htole32(RT2560_TX_BUSY | RT2560_TX_VALID); 1709 1710 desc->physaddr = htole32(physaddr); 1711 desc->wme = htole16( 1712 RT2560_AIFSN(2) | 1713 RT2560_LOGCWMIN(3) | 1714 RT2560_LOGCWMAX(8)); 1715 1716 /* setup PLCP fields */ 1717 desc->plcp_signal = rt2560_plcp_signal(rate); 1718 desc->plcp_service = 4; 1719 1720 len += IEEE80211_CRC_LEN; 1721 if (RAL_RATE_IS_OFDM(rate)) { 1722 desc->flags |= htole32(RT2560_TX_OFDM); 1723 1724 plcp_length = len & 0xfff; 1725 desc->plcp_length_hi = plcp_length >> 6; 1726 desc->plcp_length_lo = plcp_length & 0x3f; 1727 } else { 1728 plcp_length = (16 * len + rate - 1) / rate; 1729 if (rate == 22) { 1730 remainder = (16 * len) % 22; 1731 if (remainder != 0 && remainder < 7) 1732 desc->plcp_service |= RT2560_PLCP_LENGEXT; 1733 } 1734 desc->plcp_length_hi = plcp_length >> 8; 1735 desc->plcp_length_lo = plcp_length & 0xff; 1736 1737 if (rate != 2 && (ic->ic_flags & IEEE80211_F_SHPREAMBLE)) 1738 desc->plcp_signal |= 0x08; 1739 } 1740 } 1741 1742 static int 1743 rt2560_tx_bcn(struct rt2560_softc *sc, struct mbuf *m0, 1744 struct ieee80211_node *ni) 1745 { 1746 struct rt2560_tx_desc *desc; 1747 struct rt2560_tx_data *data; 1748 int rate, error; 1749 1750 desc = &sc->bcnq.desc[sc->bcnq.cur]; 1751 data = &sc->bcnq.data[sc->bcnq.cur]; 1752 1753 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1754 1755 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1756 BUS_DMA_NOWAIT); 1757 if (error != 0) { 1758 printf("%s: could not map mbuf (error %d)\n", 1759 sc->sc_dev.dv_xname, error); 1760 m_freem(m0); 1761 return error; 1762 } 1763 1764 data->m = m0; 1765 data->ni = ni; 1766 1767 rt2560_setup_tx_desc(sc, desc, RT2560_TX_IFS_NEWBACKOFF | 1768 RT2560_TX_TIMESTAMP, m0->m_pkthdr.len, rate, 0, 1769 data->map->dm_segs->ds_addr); 1770 1771 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1772 BUS_DMASYNC_PREWRITE); 1773 bus_dmamap_sync(sc->sc_dmat, sc->bcnq.map, 1774 sc->bcnq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1775 BUS_DMASYNC_PREWRITE); 1776 1777 return 0; 1778 } 1779 1780 static int 1781 rt2560_tx_mgt(struct rt2560_softc *sc, struct mbuf *m0, 1782 struct ieee80211_node *ni) 1783 { 1784 struct ieee80211com *ic = &sc->sc_ic; 1785 struct rt2560_tx_desc *desc; 1786 struct rt2560_tx_data *data; 1787 struct ieee80211_frame *wh; 1788 uint16_t dur; 1789 uint32_t flags = 0; 1790 int rate, error; 1791 1792 desc = &sc->prioq.desc[sc->prioq.cur]; 1793 data = &sc->prioq.data[sc->prioq.cur]; 1794 1795 rate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1796 1797 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 1798 BUS_DMA_NOWAIT); 1799 if (error != 0) { 1800 printf("%s: could not map mbuf (error %d)\n", 1801 sc->sc_dev.dv_xname, error); 1802 m_freem(m0); 1803 return error; 1804 } 1805 1806 #if NBPFILTER > 0 1807 if (sc->sc_drvbpf != NULL) { 1808 struct mbuf mb; 1809 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 1810 1811 tap->wt_flags = 0; 1812 tap->wt_rate = rate; 1813 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 1814 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 1815 tap->wt_antenna = sc->tx_ant; 1816 1817 M_COPY_PKTHDR(&mb, m0); 1818 mb.m_data = (caddr_t)tap; 1819 mb.m_len = sc->sc_txtap_len; 1820 mb.m_next = m0; 1821 mb.m_pkthdr.len += mb.m_len; 1822 bpf_mtap(sc->sc_drvbpf, &mb); 1823 } 1824 #endif 1825 1826 data->m = m0; 1827 data->ni = ni; 1828 1829 wh = mtod(m0, struct ieee80211_frame *); 1830 1831 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 1832 flags |= RT2560_TX_ACK; 1833 1834 dur = rt2560_txtime(RAL_ACK_SIZE, rate, ic->ic_flags) + 1835 RAL_SIFS; 1836 *(uint16_t *)wh->i_dur = htole16(dur); 1837 1838 /* tell hardware to add timestamp for probe responses */ 1839 if ((wh->i_fc[0] & 1840 (IEEE80211_FC0_TYPE_MASK | IEEE80211_FC0_SUBTYPE_MASK)) == 1841 (IEEE80211_FC0_TYPE_MGT | IEEE80211_FC0_SUBTYPE_PROBE_RESP)) 1842 flags |= RT2560_TX_TIMESTAMP; 1843 } 1844 1845 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 0, 1846 data->map->dm_segs->ds_addr); 1847 1848 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 1849 BUS_DMASYNC_PREWRITE); 1850 bus_dmamap_sync(sc->sc_dmat, sc->prioq.map, 1851 sc->prioq.cur * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 1852 BUS_DMASYNC_PREWRITE); 1853 1854 DPRINTFN(10, ("sending mgt frame len=%u idx=%u rate=%u\n", 1855 m0->m_pkthdr.len, sc->prioq.cur, rate)); 1856 1857 /* kick prio */ 1858 sc->prioq.queued++; 1859 sc->prioq.cur = (sc->prioq.cur + 1) % RT2560_PRIO_RING_COUNT; 1860 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_KICK_PRIO); 1861 1862 return 0; 1863 } 1864 1865 /* 1866 * Build a RTS control frame. 1867 */ 1868 static struct mbuf * 1869 rt2560_get_rts(struct rt2560_softc *sc, struct ieee80211_frame *wh, 1870 uint16_t dur) 1871 { 1872 struct ieee80211_frame_rts *rts; 1873 struct mbuf *m; 1874 1875 MGETHDR(m, M_DONTWAIT, MT_DATA); 1876 if (m == NULL) { 1877 sc->sc_ic.ic_stats.is_tx_nobuf++; 1878 printf("%s: could not allocate RTS frame\n", 1879 sc->sc_dev.dv_xname); 1880 return NULL; 1881 } 1882 1883 rts = mtod(m, struct ieee80211_frame_rts *); 1884 1885 rts->i_fc[0] = IEEE80211_FC0_VERSION_0 | IEEE80211_FC0_TYPE_CTL | 1886 IEEE80211_FC0_SUBTYPE_RTS; 1887 rts->i_fc[1] = IEEE80211_FC1_DIR_NODS; 1888 *(uint16_t *)rts->i_dur = htole16(dur); 1889 IEEE80211_ADDR_COPY(rts->i_ra, wh->i_addr1); 1890 IEEE80211_ADDR_COPY(rts->i_ta, wh->i_addr2); 1891 1892 m->m_pkthdr.len = m->m_len = sizeof (struct ieee80211_frame_rts); 1893 1894 return m; 1895 } 1896 1897 static int 1898 rt2560_tx_data(struct rt2560_softc *sc, struct mbuf *m0, 1899 struct ieee80211_node *ni) 1900 { 1901 struct ieee80211com *ic = &sc->sc_ic; 1902 struct rt2560_tx_desc *desc; 1903 struct rt2560_tx_data *data; 1904 struct rt2560_node *rn; 1905 struct ieee80211_rateset *rs; 1906 struct ieee80211_frame *wh; 1907 struct ieee80211_key *k; 1908 struct mbuf *mnew; 1909 uint16_t dur; 1910 uint32_t flags = 0; 1911 int rate, error; 1912 1913 wh = mtod(m0, struct ieee80211_frame *); 1914 1915 if (ic->ic_fixed_rate != IEEE80211_FIXED_RATE_NONE) { 1916 rs = &ic->ic_sup_rates[ic->ic_curmode]; 1917 rate = rs->rs_rates[ic->ic_fixed_rate]; 1918 } else { 1919 rs = &ni->ni_rates; 1920 rn = (struct rt2560_node *)ni; 1921 ni->ni_txrate = ieee80211_rssadapt_choose(&rn->rssadapt, rs, 1922 wh, m0->m_pkthdr.len, -1, NULL, 0); 1923 rate = rs->rs_rates[ni->ni_txrate]; 1924 } 1925 rate &= IEEE80211_RATE_VAL; 1926 1927 if (wh->i_fc[1] & IEEE80211_FC1_WEP) { 1928 k = ieee80211_crypto_encap(ic, ni, m0); 1929 if (k == NULL) { 1930 m_freem(m0); 1931 return ENOBUFS; 1932 } 1933 1934 /* packet header may have moved, reset our local pointer */ 1935 wh = mtod(m0, struct ieee80211_frame *); 1936 } 1937 1938 /* 1939 * IEEE Std 802.11-1999, pp 82: "A STA shall use an RTS/CTS exchange 1940 * for directed frames only when the length of the MPDU is greater 1941 * than the length threshold indicated by [...]" ic_rtsthreshold. 1942 */ 1943 if (!IEEE80211_IS_MULTICAST(wh->i_addr1) && 1944 m0->m_pkthdr.len > ic->ic_rtsthreshold) { 1945 struct mbuf *m; 1946 int rtsrate, ackrate; 1947 1948 rtsrate = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? 12 : 2; 1949 ackrate = rt2560_ack_rate(ic, rate); 1950 1951 dur = rt2560_txtime(m0->m_pkthdr.len + 4, rate, ic->ic_flags) + 1952 rt2560_txtime(RAL_CTS_SIZE, rtsrate, ic->ic_flags) + 1953 rt2560_txtime(RAL_ACK_SIZE, ackrate, ic->ic_flags) + 1954 3 * RAL_SIFS; 1955 1956 m = rt2560_get_rts(sc, wh, dur); 1957 1958 desc = &sc->txq.desc[sc->txq.cur_encrypt]; 1959 data = &sc->txq.data[sc->txq.cur_encrypt]; 1960 1961 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m, 1962 BUS_DMA_NOWAIT); 1963 if (error != 0) { 1964 printf("%s: could not map mbuf (error %d)\n", 1965 sc->sc_dev.dv_xname, error); 1966 m_freem(m); 1967 m_freem(m0); 1968 return error; 1969 } 1970 1971 /* avoid multiple free() of the same node for each fragment */ 1972 ieee80211_ref_node(ni); 1973 1974 data->m = m; 1975 data->ni = ni; 1976 1977 /* RTS frames are not taken into account for rssadapt */ 1978 data->id.id_node = NULL; 1979 1980 rt2560_setup_tx_desc(sc, desc, RT2560_TX_ACK | 1981 RT2560_TX_MORE_FRAG, m->m_pkthdr.len, rtsrate, 1, 1982 data->map->dm_segs->ds_addr); 1983 1984 bus_dmamap_sync(sc->sc_dmat, data->map, 0, 1985 data->map->dm_mapsize, BUS_DMASYNC_PREWRITE); 1986 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 1987 sc->txq.cur_encrypt * RT2560_TX_DESC_SIZE, 1988 RT2560_TX_DESC_SIZE, BUS_DMASYNC_PREWRITE); 1989 1990 sc->txq.queued++; 1991 sc->txq.cur_encrypt = 1992 (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT; 1993 1994 /* 1995 * IEEE Std 802.11-1999: when an RTS/CTS exchange is used, the 1996 * asynchronous data frame shall be transmitted after the CTS 1997 * frame and a SIFS period. 1998 */ 1999 flags |= RT2560_TX_LONG_RETRY | RT2560_TX_IFS_SIFS; 2000 } 2001 2002 data = &sc->txq.data[sc->txq.cur_encrypt]; 2003 desc = &sc->txq.desc[sc->txq.cur_encrypt]; 2004 2005 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 2006 BUS_DMA_NOWAIT); 2007 if (error != 0 && error != EFBIG) { 2008 printf("%s: could not map mbuf (error %d)\n", 2009 sc->sc_dev.dv_xname, error); 2010 m_freem(m0); 2011 return error; 2012 } 2013 if (error != 0) { 2014 /* too many fragments, linearize */ 2015 2016 MGETHDR(mnew, M_DONTWAIT, MT_DATA); 2017 if (mnew == NULL) { 2018 m_freem(m0); 2019 return ENOMEM; 2020 } 2021 2022 M_COPY_PKTHDR(mnew, m0); 2023 if (m0->m_pkthdr.len > MHLEN) { 2024 MCLGET(mnew, M_DONTWAIT); 2025 if (!(mnew->m_flags & M_EXT)) { 2026 m_freem(m0); 2027 m_freem(mnew); 2028 return ENOMEM; 2029 } 2030 } 2031 2032 m_copydata(m0, 0, m0->m_pkthdr.len, mtod(mnew, caddr_t)); 2033 m_freem(m0); 2034 mnew->m_len = mnew->m_pkthdr.len; 2035 m0 = mnew; 2036 2037 error = bus_dmamap_load_mbuf(sc->sc_dmat, data->map, m0, 2038 BUS_DMA_NOWAIT); 2039 if (error != 0) { 2040 printf("%s: could not map mbuf (error %d)\n", 2041 sc->sc_dev.dv_xname, error); 2042 m_freem(m0); 2043 return error; 2044 } 2045 2046 /* packet header have moved, reset our local pointer */ 2047 wh = mtod(m0, struct ieee80211_frame *); 2048 } 2049 2050 #if NBPFILTER > 0 2051 if (sc->sc_drvbpf != NULL) { 2052 struct mbuf mb; 2053 struct rt2560_tx_radiotap_header *tap = &sc->sc_txtap; 2054 2055 tap->wt_flags = 0; 2056 tap->wt_rate = rate; 2057 tap->wt_chan_freq = htole16(ic->ic_ibss_chan->ic_freq); 2058 tap->wt_chan_flags = htole16(ic->ic_ibss_chan->ic_flags); 2059 tap->wt_antenna = sc->tx_ant; 2060 2061 M_COPY_PKTHDR(&mb, m0); 2062 mb.m_data = (caddr_t)tap; 2063 mb.m_len = sc->sc_txtap_len; 2064 mb.m_next = m0; 2065 mb.m_pkthdr.len += mb.m_len; 2066 bpf_mtap(sc->sc_drvbpf, &mb); 2067 2068 } 2069 #endif 2070 2071 data->m = m0; 2072 data->ni = ni; 2073 2074 /* remember link conditions for rate adaptation algorithm */ 2075 if (ic->ic_fixed_rate == IEEE80211_FIXED_RATE_NONE) { 2076 data->id.id_len = m0->m_pkthdr.len; 2077 data->id.id_rateidx = ni->ni_txrate; 2078 data->id.id_node = ni; 2079 data->id.id_rssi = ni->ni_rssi; 2080 } else 2081 data->id.id_node = NULL; 2082 2083 if (!IEEE80211_IS_MULTICAST(wh->i_addr1)) { 2084 flags |= RT2560_TX_ACK; 2085 2086 dur = rt2560_txtime(RAL_ACK_SIZE, rt2560_ack_rate(ic, rate), 2087 ic->ic_flags) + RAL_SIFS; 2088 *(uint16_t *)wh->i_dur = htole16(dur); 2089 } 2090 2091 rt2560_setup_tx_desc(sc, desc, flags, m0->m_pkthdr.len, rate, 1, 2092 data->map->dm_segs->ds_addr); 2093 2094 bus_dmamap_sync(sc->sc_dmat, data->map, 0, data->map->dm_mapsize, 2095 BUS_DMASYNC_PREWRITE); 2096 bus_dmamap_sync(sc->sc_dmat, sc->txq.map, 2097 sc->txq.cur_encrypt * RT2560_TX_DESC_SIZE, RT2560_TX_DESC_SIZE, 2098 BUS_DMASYNC_PREWRITE); 2099 2100 DPRINTFN(10, ("sending data frame len=%u idx=%u rate=%u\n", 2101 m0->m_pkthdr.len, sc->txq.cur_encrypt, rate)); 2102 2103 /* kick encrypt */ 2104 sc->txq.queued++; 2105 sc->txq.cur_encrypt = (sc->txq.cur_encrypt + 1) % RT2560_TX_RING_COUNT; 2106 RAL_WRITE(sc, RT2560_SECCSR1, RT2560_KICK_ENCRYPT); 2107 2108 return 0; 2109 } 2110 2111 static void 2112 rt2560_start(struct ifnet *ifp) 2113 { 2114 struct rt2560_softc *sc = ifp->if_softc; 2115 struct ieee80211com *ic = &sc->sc_ic; 2116 struct mbuf *m0; 2117 struct ieee80211_node *ni; 2118 struct ether_header *eh; 2119 2120 /* 2121 * net80211 may still try to send management frames even if the 2122 * IFF_RUNNING flag is not set... 2123 */ 2124 if ((ifp->if_flags & (IFF_RUNNING | IFF_OACTIVE)) != IFF_RUNNING) 2125 return; 2126 2127 for (;;) { 2128 IF_POLL(&ic->ic_mgtq, m0); 2129 if (m0 != NULL) { 2130 if (sc->prioq.queued >= RT2560_PRIO_RING_COUNT) { 2131 ifp->if_flags |= IFF_OACTIVE; 2132 break; 2133 } 2134 IF_DEQUEUE(&ic->ic_mgtq, m0); 2135 if (m0 == NULL) 2136 break; 2137 2138 ni = (struct ieee80211_node *)m0->m_pkthdr.rcvif; 2139 m0->m_pkthdr.rcvif = NULL; 2140 #if NBPFILTER > 0 2141 if (ic->ic_rawbpf != NULL) 2142 bpf_mtap(ic->ic_rawbpf, m0); 2143 #endif 2144 if (rt2560_tx_mgt(sc, m0, ni) != 0) 2145 break; 2146 2147 } else { 2148 if (ic->ic_state != IEEE80211_S_RUN) 2149 break; 2150 IFQ_DEQUEUE(&ifp->if_snd, m0); 2151 if (m0 == NULL) 2152 break; 2153 if (sc->txq.queued >= RT2560_TX_RING_COUNT - 1) { 2154 ifp->if_flags |= IFF_OACTIVE; 2155 break; 2156 } 2157 2158 if (m0->m_len < sizeof (struct ether_header) && 2159 !(m0 = m_pullup(m0, sizeof (struct ether_header)))) 2160 continue; 2161 2162 eh = mtod(m0, struct ether_header *); 2163 ni = ieee80211_find_txnode(ic, eh->ether_dhost); 2164 if (ni == NULL) { 2165 m_freem(m0); 2166 continue; 2167 } 2168 #if NBPFILTER > 0 2169 if (ifp->if_bpf != NULL) 2170 bpf_mtap(ifp->if_bpf, m0); 2171 #endif 2172 2173 m0 = ieee80211_encap(ic, m0, ni); 2174 if (m0 == NULL) { 2175 ieee80211_free_node(ni); 2176 continue; 2177 } 2178 2179 #if NBPFILTER > 0 2180 if (ic->ic_rawbpf != NULL) 2181 bpf_mtap(ic->ic_rawbpf, m0); 2182 2183 #endif 2184 if (rt2560_tx_data(sc, m0, ni) != 0) { 2185 ieee80211_free_node(ni); 2186 ifp->if_oerrors++; 2187 break; 2188 } 2189 } 2190 2191 sc->sc_tx_timer = 5; 2192 ifp->if_timer = 1; 2193 } 2194 } 2195 2196 static void 2197 rt2560_watchdog(struct ifnet *ifp) 2198 { 2199 struct rt2560_softc *sc = ifp->if_softc; 2200 2201 ifp->if_timer = 0; 2202 2203 if (sc->sc_tx_timer > 0) { 2204 if (--sc->sc_tx_timer == 0) { 2205 printf("%s: device timeout\n", sc->sc_dev.dv_xname); 2206 rt2560_init(ifp); 2207 ifp->if_oerrors++; 2208 return; 2209 } 2210 ifp->if_timer = 1; 2211 } 2212 2213 ieee80211_watchdog(&sc->sc_ic); 2214 } 2215 2216 /* 2217 * This function allows for fast channel switching in monitor mode (used by 2218 * net-mgmt/kismet). In IBSS mode, we must explicitly reset the interface to 2219 * generate a new beacon frame. 2220 */ 2221 static int 2222 rt2560_reset(struct ifnet *ifp) 2223 { 2224 struct rt2560_softc *sc = ifp->if_softc; 2225 struct ieee80211com *ic = &sc->sc_ic; 2226 2227 if (ic->ic_opmode != IEEE80211_M_MONITOR) 2228 return ENETRESET; 2229 2230 rt2560_set_chan(sc, ic->ic_curchan); 2231 2232 return 0; 2233 } 2234 2235 int 2236 rt2560_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data) 2237 { 2238 struct rt2560_softc *sc = ifp->if_softc; 2239 struct ieee80211com *ic = &sc->sc_ic; 2240 struct ifreq *ifr; 2241 int s, error = 0; 2242 2243 s = splnet(); 2244 2245 switch (cmd) { 2246 case SIOCSIFFLAGS: 2247 if (ifp->if_flags & IFF_UP) { 2248 if (ifp->if_flags & IFF_RUNNING) 2249 rt2560_update_promisc(sc); 2250 else 2251 rt2560_init(ifp); 2252 } else { 2253 if (ifp->if_flags & IFF_RUNNING) 2254 rt2560_stop(sc); 2255 } 2256 break; 2257 2258 case SIOCADDMULTI: 2259 case SIOCDELMULTI: 2260 ifr = (struct ifreq *)data; 2261 error = (cmd == SIOCADDMULTI) ? 2262 ether_addmulti(ifr, &sc->sc_ec) : 2263 ether_delmulti(ifr, &sc->sc_ec); 2264 2265 if (error == ENETRESET) 2266 error = 0; 2267 break; 2268 2269 case SIOCS80211CHANNEL: 2270 /* 2271 * This allows for fast channel switching in monitor mode 2272 * (used by kismet). In IBSS mode, we must explicitly reset 2273 * the interface to generate a new beacon frame. 2274 */ 2275 error = ieee80211_ioctl(ic, cmd, data); 2276 if (error == ENETRESET && 2277 ic->ic_opmode == IEEE80211_M_MONITOR) { 2278 rt2560_set_chan(sc, ic->ic_ibss_chan); 2279 error = 0; 2280 } 2281 break; 2282 2283 default: 2284 error = ieee80211_ioctl(ic, cmd, data); 2285 } 2286 2287 if (error == ENETRESET) { 2288 if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == 2289 (IFF_UP | IFF_RUNNING)) 2290 rt2560_init(ifp); 2291 error = 0; 2292 } 2293 2294 splx(s); 2295 2296 return error; 2297 } 2298 2299 static void 2300 rt2560_bbp_write(struct rt2560_softc *sc, uint8_t reg, uint8_t val) 2301 { 2302 uint32_t tmp; 2303 int ntries; 2304 2305 for (ntries = 0; ntries < 100; ntries++) { 2306 if (!(RAL_READ(sc, RT2560_BBPCSR) & RT2560_BBP_BUSY)) 2307 break; 2308 DELAY(1); 2309 } 2310 if (ntries == 100) { 2311 printf("%s: could not write to BBP\n", sc->sc_dev.dv_xname); 2312 return; 2313 } 2314 2315 tmp = RT2560_BBP_WRITE | RT2560_BBP_BUSY | reg << 8 | val; 2316 RAL_WRITE(sc, RT2560_BBPCSR, tmp); 2317 2318 DPRINTFN(15, ("BBP R%u <- 0x%02x\n", reg, val)); 2319 } 2320 2321 static uint8_t 2322 rt2560_bbp_read(struct rt2560_softc *sc, uint8_t reg) 2323 { 2324 uint32_t val; 2325 int ntries; 2326 2327 val = RT2560_BBP_BUSY | reg << 8; 2328 RAL_WRITE(sc, RT2560_BBPCSR, val); 2329 2330 for (ntries = 0; ntries < 100; ntries++) { 2331 val = RAL_READ(sc, RT2560_BBPCSR); 2332 if (!(val & RT2560_BBP_BUSY)) 2333 return val & 0xff; 2334 DELAY(1); 2335 } 2336 2337 printf("%s: could not read from BBP\n", sc->sc_dev.dv_xname); 2338 return 0; 2339 } 2340 2341 static void 2342 rt2560_rf_write(struct rt2560_softc *sc, uint8_t reg, uint32_t val) 2343 { 2344 uint32_t tmp; 2345 int ntries; 2346 2347 for (ntries = 0; ntries < 100; ntries++) { 2348 if (!(RAL_READ(sc, RT2560_RFCSR) & RT2560_RF_BUSY)) 2349 break; 2350 DELAY(1); 2351 } 2352 if (ntries == 100) { 2353 printf("%s: could not write to RF\n", sc->sc_dev.dv_xname); 2354 return; 2355 } 2356 2357 tmp = RT2560_RF_BUSY | RT2560_RF_20BIT | (val & 0xfffff) << 2 | 2358 (reg & 0x3); 2359 RAL_WRITE(sc, RT2560_RFCSR, tmp); 2360 2361 /* remember last written value in sc */ 2362 sc->rf_regs[reg] = val; 2363 2364 DPRINTFN(15, ("RF R[%u] <- 0x%05x\n", reg & 0x3, val & 0xfffff)); 2365 } 2366 2367 static void 2368 rt2560_set_chan(struct rt2560_softc *sc, struct ieee80211_channel *c) 2369 { 2370 struct ieee80211com *ic = &sc->sc_ic; 2371 uint8_t power, tmp; 2372 u_int i, chan; 2373 2374 chan = ieee80211_chan2ieee(ic, c); 2375 if (chan == 0 || chan == IEEE80211_CHAN_ANY) 2376 return; 2377 2378 if (IEEE80211_IS_CHAN_2GHZ(c)) 2379 power = min(sc->txpow[chan - 1], 31); 2380 else 2381 power = 31; 2382 2383 DPRINTFN(2, ("setting channel to %u, txpower to %u\n", chan, power)); 2384 2385 switch (sc->rf_rev) { 2386 case RT2560_RF_2522: 2387 rt2560_rf_write(sc, RT2560_RF1, 0x00814); 2388 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2522_r2[chan - 1]); 2389 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2390 break; 2391 2392 case RT2560_RF_2523: 2393 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2394 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2523_r2[chan - 1]); 2395 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x38044); 2396 rt2560_rf_write(sc, RT2560_RF4, 2397 (chan == 14) ? 0x00280 : 0x00286); 2398 break; 2399 2400 case RT2560_RF_2524: 2401 rt2560_rf_write(sc, RT2560_RF1, 0x0c808); 2402 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2524_r2[chan - 1]); 2403 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2404 rt2560_rf_write(sc, RT2560_RF4, 2405 (chan == 14) ? 0x00280 : 0x00286); 2406 break; 2407 2408 case RT2560_RF_2525: 2409 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2410 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_hi_r2[chan - 1]); 2411 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2412 rt2560_rf_write(sc, RT2560_RF4, 2413 (chan == 14) ? 0x00280 : 0x00286); 2414 2415 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2416 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525_r2[chan - 1]); 2417 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2418 rt2560_rf_write(sc, RT2560_RF4, 2419 (chan == 14) ? 0x00280 : 0x00286); 2420 break; 2421 2422 case RT2560_RF_2525E: 2423 rt2560_rf_write(sc, RT2560_RF1, 0x08808); 2424 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2525e_r2[chan - 1]); 2425 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2426 rt2560_rf_write(sc, RT2560_RF4, 2427 (chan == 14) ? 0x00286 : 0x00282); 2428 break; 2429 2430 case RT2560_RF_2526: 2431 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_hi_r2[chan - 1]); 2432 rt2560_rf_write(sc, RT2560_RF4, 2433 (chan & 1) ? 0x00386 : 0x00381); 2434 rt2560_rf_write(sc, RT2560_RF1, 0x08804); 2435 2436 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf2526_r2[chan - 1]); 2437 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x18044); 2438 rt2560_rf_write(sc, RT2560_RF4, 2439 (chan & 1) ? 0x00386 : 0x00381); 2440 break; 2441 2442 /* dual-band RF */ 2443 case RT2560_RF_5222: 2444 for (i = 0; rt2560_rf5222[i].chan != chan; i++); 2445 2446 rt2560_rf_write(sc, RT2560_RF1, rt2560_rf5222[i].r1); 2447 rt2560_rf_write(sc, RT2560_RF2, rt2560_rf5222[i].r2); 2448 rt2560_rf_write(sc, RT2560_RF3, power << 7 | 0x00040); 2449 rt2560_rf_write(sc, RT2560_RF4, rt2560_rf5222[i].r4); 2450 break; 2451 } 2452 2453 if (ic->ic_opmode != IEEE80211_M_MONITOR && 2454 ic->ic_state != IEEE80211_S_SCAN) { 2455 /* set Japan filter bit for channel 14 */ 2456 tmp = rt2560_bbp_read(sc, 70); 2457 2458 tmp &= ~RT2560_JAPAN_FILTER; 2459 if (chan == 14) 2460 tmp |= RT2560_JAPAN_FILTER; 2461 2462 rt2560_bbp_write(sc, 70, tmp); 2463 2464 DELAY(1000); /* RF needs a 1ms delay here */ 2465 rt2560_disable_rf_tune(sc); 2466 2467 /* clear CRC errors */ 2468 RAL_READ(sc, RT2560_CNT0); 2469 } 2470 } 2471 2472 /* 2473 * Disable RF auto-tuning. 2474 */ 2475 static void 2476 rt2560_disable_rf_tune(struct rt2560_softc *sc) 2477 { 2478 uint32_t tmp; 2479 2480 if (sc->rf_rev != RT2560_RF_2523) { 2481 tmp = sc->rf_regs[RT2560_RF1] & ~RT2560_RF1_AUTOTUNE; 2482 rt2560_rf_write(sc, RT2560_RF1, tmp); 2483 } 2484 2485 tmp = sc->rf_regs[RT2560_RF3] & ~RT2560_RF3_AUTOTUNE; 2486 rt2560_rf_write(sc, RT2560_RF3, tmp); 2487 2488 DPRINTFN(2, ("disabling RF autotune\n")); 2489 } 2490 2491 /* 2492 * Refer to IEEE Std 802.11-1999 pp. 123 for more information on TSF 2493 * synchronization. 2494 */ 2495 static void 2496 rt2560_enable_tsf_sync(struct rt2560_softc *sc) 2497 { 2498 struct ieee80211com *ic = &sc->sc_ic; 2499 uint16_t logcwmin, preload; 2500 uint32_t tmp; 2501 2502 /* first, disable TSF synchronization */ 2503 RAL_WRITE(sc, RT2560_CSR14, 0); 2504 2505 tmp = 16 * ic->ic_bss->ni_intval; 2506 RAL_WRITE(sc, RT2560_CSR12, tmp); 2507 2508 RAL_WRITE(sc, RT2560_CSR13, 0); 2509 2510 logcwmin = 5; 2511 preload = (ic->ic_opmode == IEEE80211_M_STA) ? 384 : 1024; 2512 tmp = logcwmin << 16 | preload; 2513 RAL_WRITE(sc, RT2560_BCNOCSR, tmp); 2514 2515 /* finally, enable TSF synchronization */ 2516 tmp = RT2560_ENABLE_TSF | RT2560_ENABLE_TBCN; 2517 if (ic->ic_opmode == IEEE80211_M_STA) 2518 tmp |= RT2560_ENABLE_TSF_SYNC(1); 2519 else 2520 tmp |= RT2560_ENABLE_TSF_SYNC(2) | 2521 RT2560_ENABLE_BEACON_GENERATOR; 2522 RAL_WRITE(sc, RT2560_CSR14, tmp); 2523 2524 DPRINTF(("enabling TSF synchronization\n")); 2525 } 2526 2527 static void 2528 rt2560_update_plcp(struct rt2560_softc *sc) 2529 { 2530 struct ieee80211com *ic = &sc->sc_ic; 2531 2532 /* no short preamble for 1Mbps */ 2533 RAL_WRITE(sc, RT2560_PLCP1MCSR, 0x00700400); 2534 2535 if (!(ic->ic_flags & IEEE80211_F_SHPREAMBLE)) { 2536 /* values taken from the reference driver */ 2537 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380401); 2538 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x00150402); 2539 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b8403); 2540 } else { 2541 /* same values as above or'ed 0x8 */ 2542 RAL_WRITE(sc, RT2560_PLCP2MCSR, 0x00380409); 2543 RAL_WRITE(sc, RT2560_PLCP5p5MCSR, 0x0015040a); 2544 RAL_WRITE(sc, RT2560_PLCP11MCSR, 0x000b840b); 2545 } 2546 2547 DPRINTF(("updating PLCP for %s preamble\n", 2548 (ic->ic_flags & IEEE80211_F_SHPREAMBLE) ? "short" : "long")); 2549 } 2550 2551 /* 2552 * IEEE 802.11a uses short slot time. Refer to IEEE Std 802.11-1999 pp. 85 to 2553 * know how these values are computed. 2554 */ 2555 static void 2556 rt2560_update_slot(struct ifnet *ifp) 2557 { 2558 struct rt2560_softc *sc = ifp->if_softc; 2559 struct ieee80211com *ic = &sc->sc_ic; 2560 uint8_t slottime; 2561 uint16_t sifs, pifs, difs, eifs; 2562 uint32_t tmp; 2563 2564 slottime = (ic->ic_flags & IEEE80211_F_SHSLOT) ? 9 : 20; 2565 2566 /* define the MAC slot boundaries */ 2567 sifs = RAL_SIFS - RT2560_RXTX_TURNAROUND; 2568 pifs = sifs + slottime; 2569 difs = sifs + 2 * slottime; 2570 eifs = (ic->ic_curmode == IEEE80211_MODE_11B) ? 364 : 60; 2571 2572 tmp = RAL_READ(sc, RT2560_CSR11); 2573 tmp = (tmp & ~0x1f00) | slottime << 8; 2574 RAL_WRITE(sc, RT2560_CSR11, tmp); 2575 2576 tmp = pifs << 16 | sifs; 2577 RAL_WRITE(sc, RT2560_CSR18, tmp); 2578 2579 tmp = eifs << 16 | difs; 2580 RAL_WRITE(sc, RT2560_CSR19, tmp); 2581 2582 DPRINTF(("setting slottime to %uus\n", slottime)); 2583 } 2584 2585 static void 2586 rt2560_set_basicrates(struct rt2560_softc *sc) 2587 { 2588 struct ieee80211com *ic = &sc->sc_ic; 2589 2590 /* update basic rate set */ 2591 if (ic->ic_curmode == IEEE80211_MODE_11B) { 2592 /* 11b basic rates: 1, 2Mbps */ 2593 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x3); 2594 } else if (IEEE80211_IS_CHAN_5GHZ(ic->ic_bss->ni_chan)) { 2595 /* 11a basic rates: 6, 12, 24Mbps */ 2596 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x150); 2597 } else { 2598 /* 11g basic rates: 1, 2, 5.5, 11, 6, 12, 24Mbps */ 2599 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x15f); 2600 } 2601 } 2602 2603 static void 2604 rt2560_update_led(struct rt2560_softc *sc, int led1, int led2) 2605 { 2606 uint32_t tmp; 2607 2608 /* set ON period to 70ms and OFF period to 30ms */ 2609 tmp = led1 << 16 | led2 << 17 | 70 << 8 | 30; 2610 RAL_WRITE(sc, RT2560_LEDCSR, tmp); 2611 } 2612 2613 static void 2614 rt2560_set_bssid(struct rt2560_softc *sc, uint8_t *bssid) 2615 { 2616 uint32_t tmp; 2617 2618 tmp = bssid[0] | bssid[1] << 8 | bssid[2] << 16 | bssid[3] << 24; 2619 RAL_WRITE(sc, RT2560_CSR5, tmp); 2620 2621 tmp = bssid[4] | bssid[5] << 8; 2622 RAL_WRITE(sc, RT2560_CSR6, tmp); 2623 2624 DPRINTF(("setting BSSID to %s\n", ether_sprintf(bssid))); 2625 } 2626 2627 static void 2628 rt2560_set_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2629 { 2630 uint32_t tmp; 2631 2632 tmp = addr[0] | addr[1] << 8 | addr[2] << 16 | addr[3] << 24; 2633 RAL_WRITE(sc, RT2560_CSR3, tmp); 2634 2635 tmp = addr[4] | addr[5] << 8; 2636 RAL_WRITE(sc, RT2560_CSR4, tmp); 2637 2638 DPRINTF(("setting MAC address to %s\n", ether_sprintf(addr))); 2639 } 2640 2641 static void 2642 rt2560_get_macaddr(struct rt2560_softc *sc, uint8_t *addr) 2643 { 2644 uint32_t tmp; 2645 2646 tmp = RAL_READ(sc, RT2560_CSR3); 2647 addr[0] = tmp & 0xff; 2648 addr[1] = (tmp >> 8) & 0xff; 2649 addr[2] = (tmp >> 16) & 0xff; 2650 addr[3] = (tmp >> 24); 2651 2652 tmp = RAL_READ(sc, RT2560_CSR4); 2653 addr[4] = tmp & 0xff; 2654 addr[5] = (tmp >> 8) & 0xff; 2655 } 2656 2657 static void 2658 rt2560_update_promisc(struct rt2560_softc *sc) 2659 { 2660 struct ifnet *ifp = &sc->sc_if; 2661 uint32_t tmp; 2662 2663 tmp = RAL_READ(sc, RT2560_RXCSR0); 2664 2665 tmp &= ~RT2560_DROP_NOT_TO_ME; 2666 if (!(ifp->if_flags & IFF_PROMISC)) 2667 tmp |= RT2560_DROP_NOT_TO_ME; 2668 2669 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2670 2671 DPRINTF(("%s promiscuous mode\n", (ifp->if_flags & IFF_PROMISC) ? 2672 "entering" : "leaving")); 2673 } 2674 2675 static void 2676 rt2560_set_txantenna(struct rt2560_softc *sc, int antenna) 2677 { 2678 uint32_t tmp; 2679 uint8_t tx; 2680 2681 tx = rt2560_bbp_read(sc, RT2560_BBP_TX) & ~RT2560_BBP_ANTMASK; 2682 if (antenna == 1) 2683 tx |= RT2560_BBP_ANTA; 2684 else if (antenna == 2) 2685 tx |= RT2560_BBP_ANTB; 2686 else 2687 tx |= RT2560_BBP_DIVERSITY; 2688 2689 /* need to force I/Q flip for RF 2525e, 2526 and 5222 */ 2690 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526 || 2691 sc->rf_rev == RT2560_RF_5222) 2692 tx |= RT2560_BBP_FLIPIQ; 2693 2694 rt2560_bbp_write(sc, RT2560_BBP_TX, tx); 2695 2696 /* update values for CCK and OFDM in BBPCSR1 */ 2697 tmp = RAL_READ(sc, RT2560_BBPCSR1) & ~0x00070007; 2698 tmp |= (tx & 0x7) << 16 | (tx & 0x7); 2699 RAL_WRITE(sc, RT2560_BBPCSR1, tmp); 2700 } 2701 2702 static void 2703 rt2560_set_rxantenna(struct rt2560_softc *sc, int antenna) 2704 { 2705 uint8_t rx; 2706 2707 rx = rt2560_bbp_read(sc, RT2560_BBP_RX) & ~RT2560_BBP_ANTMASK; 2708 if (antenna == 1) 2709 rx |= RT2560_BBP_ANTA; 2710 else if (antenna == 2) 2711 rx |= RT2560_BBP_ANTB; 2712 else 2713 rx |= RT2560_BBP_DIVERSITY; 2714 2715 /* need to force no I/Q flip for RF 2525e and 2526 */ 2716 if (sc->rf_rev == RT2560_RF_2525E || sc->rf_rev == RT2560_RF_2526) 2717 rx &= ~RT2560_BBP_FLIPIQ; 2718 2719 rt2560_bbp_write(sc, RT2560_BBP_RX, rx); 2720 } 2721 2722 static const char * 2723 rt2560_get_rf(int rev) 2724 { 2725 switch (rev) { 2726 case RT2560_RF_2522: return "RT2522"; 2727 case RT2560_RF_2523: return "RT2523"; 2728 case RT2560_RF_2524: return "RT2524"; 2729 case RT2560_RF_2525: return "RT2525"; 2730 case RT2560_RF_2525E: return "RT2525e"; 2731 case RT2560_RF_2526: return "RT2526"; 2732 case RT2560_RF_5222: return "RT5222"; 2733 default: return "unknown"; 2734 } 2735 } 2736 2737 static void 2738 rt2560_read_eeprom(struct rt2560_softc *sc) 2739 { 2740 uint16_t val; 2741 int i; 2742 2743 val = rt2560_eeprom_read(sc, RT2560_EEPROM_CONFIG0); 2744 sc->rf_rev = (val >> 11) & 0x1f; 2745 sc->hw_radio = (val >> 10) & 0x1; 2746 sc->led_mode = (val >> 6) & 0x7; 2747 sc->rx_ant = (val >> 4) & 0x3; 2748 sc->tx_ant = (val >> 2) & 0x3; 2749 sc->nb_ant = val & 0x3; 2750 2751 /* read default values for BBP registers */ 2752 for (i = 0; i < 16; i++) { 2753 val = rt2560_eeprom_read(sc, RT2560_EEPROM_BBP_BASE + i); 2754 sc->bbp_prom[i].reg = val >> 8; 2755 sc->bbp_prom[i].val = val & 0xff; 2756 } 2757 2758 /* read Tx power for all b/g channels */ 2759 for (i = 0; i < 14 / 2; i++) { 2760 val = rt2560_eeprom_read(sc, RT2560_EEPROM_TXPOWER + i); 2761 sc->txpow[i * 2] = val >> 8; 2762 sc->txpow[i * 2 + 1] = val & 0xff; 2763 } 2764 } 2765 2766 static int 2767 rt2560_bbp_init(struct rt2560_softc *sc) 2768 { 2769 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2770 int i, ntries; 2771 2772 /* wait for BBP to be ready */ 2773 for (ntries = 0; ntries < 100; ntries++) { 2774 if (rt2560_bbp_read(sc, RT2560_BBP_VERSION) != 0) 2775 break; 2776 DELAY(1); 2777 } 2778 if (ntries == 100) { 2779 printf("%s: timeout waiting for BBP\n", sc->sc_dev.dv_xname); 2780 return EIO; 2781 } 2782 2783 /* initialize BBP registers to default values */ 2784 for (i = 0; i < N(rt2560_def_bbp); i++) { 2785 rt2560_bbp_write(sc, rt2560_def_bbp[i].reg, 2786 rt2560_def_bbp[i].val); 2787 } 2788 #if 0 2789 /* initialize BBP registers to values stored in EEPROM */ 2790 for (i = 0; i < 16; i++) { 2791 if (sc->bbp_prom[i].reg == 0xff) 2792 continue; 2793 rt2560_bbp_write(sc, sc->bbp_prom[i].reg, sc->bbp_prom[i].val); 2794 } 2795 #endif 2796 2797 return 0; 2798 #undef N 2799 } 2800 2801 static int 2802 rt2560_init(struct ifnet *ifp) 2803 { 2804 #define N(a) (sizeof (a) / sizeof ((a)[0])) 2805 struct rt2560_softc *sc = ifp->if_softc; 2806 struct ieee80211com *ic = &sc->sc_ic; 2807 uint32_t tmp; 2808 int i; 2809 2810 /* for CardBus, power on the socket */ 2811 if (!(sc->sc_flags & RT2560_ENABLED)) { 2812 if (sc->sc_enable != NULL && (*sc->sc_enable)(sc) != 0) { 2813 printf("%s: could not enable device\n", 2814 sc->sc_dev.dv_xname); 2815 return EIO; 2816 } 2817 sc->sc_flags |= RT2560_ENABLED; 2818 } 2819 2820 rt2560_stop(sc); 2821 2822 /* setup tx rings */ 2823 tmp = RT2560_PRIO_RING_COUNT << 24 | 2824 RT2560_ATIM_RING_COUNT << 16 | 2825 RT2560_TX_RING_COUNT << 8 | 2826 RT2560_TX_DESC_SIZE; 2827 2828 /* rings _must_ be initialized in this _exact_ order! */ 2829 RAL_WRITE(sc, RT2560_TXCSR2, tmp); 2830 RAL_WRITE(sc, RT2560_TXCSR3, sc->txq.physaddr); 2831 RAL_WRITE(sc, RT2560_TXCSR5, sc->prioq.physaddr); 2832 RAL_WRITE(sc, RT2560_TXCSR4, sc->atimq.physaddr); 2833 RAL_WRITE(sc, RT2560_TXCSR6, sc->bcnq.physaddr); 2834 2835 /* setup rx ring */ 2836 tmp = RT2560_RX_RING_COUNT << 8 | RT2560_RX_DESC_SIZE; 2837 2838 RAL_WRITE(sc, RT2560_RXCSR1, tmp); 2839 RAL_WRITE(sc, RT2560_RXCSR2, sc->rxq.physaddr); 2840 2841 /* initialize MAC registers to default values */ 2842 for (i = 0; i < N(rt2560_def_mac); i++) 2843 RAL_WRITE(sc, rt2560_def_mac[i].reg, rt2560_def_mac[i].val); 2844 2845 IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl)); 2846 rt2560_set_macaddr(sc, ic->ic_myaddr); 2847 2848 /* set basic rate set (will be updated later) */ 2849 RAL_WRITE(sc, RT2560_ARSP_PLCP_1, 0x153); 2850 2851 rt2560_set_txantenna(sc, 1); 2852 rt2560_set_rxantenna(sc, 1); 2853 rt2560_update_slot(ifp); 2854 rt2560_update_plcp(sc); 2855 rt2560_update_led(sc, 0, 0); 2856 2857 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2858 RAL_WRITE(sc, RT2560_CSR1, RT2560_HOST_READY); 2859 2860 if (rt2560_bbp_init(sc) != 0) { 2861 rt2560_stop(sc); 2862 return EIO; 2863 } 2864 2865 /* set default BSS channel */ 2866 ic->ic_bss->ni_chan = ic->ic_ibss_chan; 2867 rt2560_set_chan(sc, ic->ic_bss->ni_chan); 2868 2869 /* kick Rx */ 2870 tmp = RT2560_DROP_PHY_ERROR | RT2560_DROP_CRC_ERROR; 2871 if (ic->ic_opmode != IEEE80211_M_MONITOR) { 2872 tmp |= RT2560_DROP_CTL | RT2560_DROP_VERSION_ERROR; 2873 if (ic->ic_opmode != IEEE80211_M_HOSTAP) 2874 tmp |= RT2560_DROP_TODS; 2875 if (!(ifp->if_flags & IFF_PROMISC)) 2876 tmp |= RT2560_DROP_NOT_TO_ME; 2877 } 2878 RAL_WRITE(sc, RT2560_RXCSR0, tmp); 2879 2880 /* clear old FCS and Rx FIFO errors */ 2881 RAL_READ(sc, RT2560_CNT0); 2882 RAL_READ(sc, RT2560_CNT4); 2883 2884 /* clear any pending interrupts */ 2885 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2886 2887 /* enable interrupts */ 2888 RAL_WRITE(sc, RT2560_CSR8, RT2560_INTR_MASK); 2889 2890 ifp->if_flags &= ~IFF_OACTIVE; 2891 ifp->if_flags |= IFF_RUNNING; 2892 2893 if (ic->ic_opmode == IEEE80211_M_MONITOR) 2894 ieee80211_new_state(ic, IEEE80211_S_RUN, -1); 2895 else 2896 ieee80211_new_state(ic, IEEE80211_S_SCAN, -1); 2897 2898 return 0; 2899 #undef N 2900 } 2901 2902 static void 2903 rt2560_stop(void *priv) 2904 { 2905 struct rt2560_softc *sc = priv; 2906 struct ieee80211com *ic = &sc->sc_ic; 2907 struct ifnet *ifp = ic->ic_ifp; 2908 2909 sc->sc_tx_timer = 0; 2910 ifp->if_timer = 0; 2911 ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE); 2912 2913 ieee80211_new_state(ic, IEEE80211_S_INIT, -1); /* free all nodes */ 2914 2915 /* abort Tx */ 2916 RAL_WRITE(sc, RT2560_TXCSR0, RT2560_ABORT_TX); 2917 2918 /* disable Rx */ 2919 RAL_WRITE(sc, RT2560_RXCSR0, RT2560_DISABLE_RX); 2920 2921 /* reset ASIC (and thus, BBP) */ 2922 RAL_WRITE(sc, RT2560_CSR1, RT2560_RESET_ASIC); 2923 RAL_WRITE(sc, RT2560_CSR1, 0); 2924 2925 /* disable interrupts */ 2926 RAL_WRITE(sc, RT2560_CSR8, 0xffffffff); 2927 2928 /* clear any pending interrupt */ 2929 RAL_WRITE(sc, RT2560_CSR7, 0xffffffff); 2930 2931 /* reset Tx and Rx rings */ 2932 rt2560_reset_tx_ring(sc, &sc->txq); 2933 rt2560_reset_tx_ring(sc, &sc->atimq); 2934 rt2560_reset_tx_ring(sc, &sc->prioq); 2935 rt2560_reset_tx_ring(sc, &sc->bcnq); 2936 rt2560_reset_rx_ring(sc, &sc->rxq); 2937 2938 } 2939