xref: /netbsd-src/sys/dev/ic/rs5c313var.h (revision 8b0f9554ff8762542c4defc4f70e1eb76fb508fa)
1 /*	$NetBSD: rs5c313var.h,v 1.1 2006/09/07 01:12:00 uwe Exp $	*/
2 
3 /*
4  * Copyright (c) 2006 Valeriy E. Ushakov
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. The name of the author may not be used to endorse or promote products
16  *    derived from this software without specific prior written permission
17  *
18  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28  */
29 
30 #ifndef	_DEV_IC_RS5C313VAR_H_
31 #define	_DEV_IC_RS5C313VAR_H_
32 
33 /*
34  * RICOH RS5C313 Real Time Clock
35  */
36 
37 struct rs5c313_ops;
38 
39 struct rs5c313_softc {
40 	struct device sc_dev;
41 
42 	struct todr_chip_handle sc_todr;
43 	struct rs5c313_ops *sc_ops;
44 
45 	int sc_valid;		/* oscillation halt sensing on init */
46 };
47 
48 struct rs5c313_ops {
49 	void (*rs5c313_op_begin)(struct rs5c313_softc *);
50 
51 	/* CE pin */
52 	void (*rs5c313_op_ce)(struct rs5c313_softc *, int);
53 
54 	/* SCLK pin */
55 	void (*rs5c313_op_clk)(struct rs5c313_softc *, int);
56 
57 	/* SIO pin */
58 	void (*rs5c313_op_dir)(struct rs5c313_softc *, int);
59 	int  (*rs5c313_op_read)(struct rs5c313_softc *);
60 	void (*rs5c313_op_write)(struct rs5c313_softc *, int);
61 };
62 
63 void rs5c313_attach(struct rs5c313_softc *);
64 
65 #endif	/* _DEV_IC_RS5C313VAR_H_ */
66