xref: /netbsd-src/sys/dev/ic/pl061var.h (revision 84f5ea6117c76c8ac2e40fed70f95d89ef203ab8)
1*84f5ea61Sjmcneill /* $NetBSD: pl061var.h,v 1.2 2018/10/21 18:31:14 jmcneill Exp $ */
25e1be26aSjmcneill 
35e1be26aSjmcneill /*
45e1be26aSjmcneill  * Copyright (c) 2018 Jonathan A. Kollasch
55e1be26aSjmcneill  * All rights reserved.
65e1be26aSjmcneill  *
75e1be26aSjmcneill  * Redistribution and use in source and binary forms, with or without
85e1be26aSjmcneill  * modification, are permitted provided that the following conditions
95e1be26aSjmcneill  * are met:
105e1be26aSjmcneill  * 1. Redistributions of source code must retain the above copyright
115e1be26aSjmcneill  *    notice, this list of conditions and the following disclaimer.
125e1be26aSjmcneill  * 2. Redistributions in binary form must reproduce the above copyright
135e1be26aSjmcneill  *    notice, this list of conditions and the following disclaimer in the
145e1be26aSjmcneill  *    documentation and/or other materials provided with the distribution.
155e1be26aSjmcneill  *
165e1be26aSjmcneill  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
175e1be26aSjmcneill  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
185e1be26aSjmcneill  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
195e1be26aSjmcneill  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT HOLDER OR
205e1be26aSjmcneill  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
215e1be26aSjmcneill  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
225e1be26aSjmcneill  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
235e1be26aSjmcneill  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
245e1be26aSjmcneill  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
255e1be26aSjmcneill  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
265e1be26aSjmcneill  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
275e1be26aSjmcneill  */
285e1be26aSjmcneill 
295e1be26aSjmcneill #ifndef _PL061VAR_H
305e1be26aSjmcneill #define _PL061VAR_H
315e1be26aSjmcneill 
325e1be26aSjmcneill struct plgpio_softc {
335e1be26aSjmcneill 	device_t		sc_dev;
345e1be26aSjmcneill 	bus_space_tag_t		sc_bst;
355e1be26aSjmcneill 	bus_space_handle_t	sc_bsh;
365e1be26aSjmcneill 
375e1be26aSjmcneill 	struct gpio_chipset_tag	sc_gc;
385e1be26aSjmcneill 	gpio_pin_t		sc_pins[8];
39*84f5ea61Sjmcneill 
40*84f5ea61Sjmcneill 	uint32_t		sc_reserved_mask;
415e1be26aSjmcneill };
425e1be26aSjmcneill 
435e1be26aSjmcneill void	plgpio_attach(struct plgpio_softc *);
445e1be26aSjmcneill 
455e1be26aSjmcneill int	plgpio_pin_read(void *, int);
465e1be26aSjmcneill void	plgpio_pin_write(void *, int, int);
475e1be26aSjmcneill void	plgpio_pin_ctl(void *, int, int);
485e1be26aSjmcneill 
495e1be26aSjmcneill #define PLGPIO_WRITE(sc, reg, val) \
505e1be26aSjmcneill 	bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
515e1be26aSjmcneill #define PLGPIO_READ(sc, reg) \
525e1be26aSjmcneill 	bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg))
535e1be26aSjmcneill 
545e1be26aSjmcneill #endif /* !_PL061VAR_H */
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