1 /* $NetBSD: ne2000.c,v 1.58 2008/04/08 12:07:27 cegger Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet 42 * adapters. 43 * 44 * Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved. 45 * 46 * Copyright (C) 1993, David Greenman. This software may be used, modified, 47 * copied, distributed, and sold, in both source and binary form provided that 48 * the above copyright and these terms are retained. Under no circumstances is 49 * the author responsible for the proper functioning of this software, nor does 50 * the author assume any responsibility for damages incurred with its use. 51 */ 52 53 /* 54 * Common code shared by all NE2000-compatible Ethernet interfaces. 55 */ 56 57 #include <sys/cdefs.h> 58 __KERNEL_RCSID(0, "$NetBSD: ne2000.c,v 1.58 2008/04/08 12:07:27 cegger Exp $"); 59 60 #include "opt_ipkdb.h" 61 62 #include <sys/param.h> 63 #include <sys/systm.h> 64 #include <sys/device.h> 65 #include <sys/socket.h> 66 #include <sys/mbuf.h> 67 #include <sys/syslog.h> 68 69 #include <net/if.h> 70 #include <net/if_dl.h> 71 #include <net/if_types.h> 72 #include <net/if_media.h> 73 74 #include <net/if_ether.h> 75 76 #include <sys/bswap.h> 77 #include <sys/bus.h> 78 79 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 80 #define bus_space_write_stream_2 bus_space_write_2 81 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 82 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 83 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 84 85 #ifdef IPKDB_NE 86 #include <ipkdb/ipkdb.h> 87 #endif 88 89 #include <dev/ic/dp8390reg.h> 90 #include <dev/ic/dp8390var.h> 91 92 #include <dev/ic/ne2000reg.h> 93 #include <dev/ic/ne2000var.h> 94 95 #include <dev/ic/ax88190reg.h> 96 97 int ne2000_write_mbuf(struct dp8390_softc *, struct mbuf *, int); 98 int ne2000_ring_copy(struct dp8390_softc *, int, void *, u_short); 99 void ne2000_read_hdr(struct dp8390_softc *, int, struct dp8390_ring *); 100 int ne2000_test_mem(struct dp8390_softc *); 101 102 void ne2000_writemem(bus_space_tag_t, bus_space_handle_t, 103 bus_space_tag_t, bus_space_handle_t, u_int8_t *, int, size_t, 104 int, int); 105 void ne2000_readmem(bus_space_tag_t, bus_space_handle_t, 106 bus_space_tag_t, bus_space_handle_t, int, u_int8_t *, size_t, int); 107 108 #define ASIC_BARRIER(asict, asich) \ 109 bus_space_barrier((asict), (asich), 0, 0x10, \ 110 BUS_SPACE_BARRIER_READ | BUS_SPACE_BARRIER_WRITE) 111 112 int 113 ne2000_attach(nsc, myea) 114 struct ne2000_softc *nsc; 115 u_int8_t *myea; 116 { 117 struct dp8390_softc *dsc = &nsc->sc_dp8390; 118 bus_space_tag_t nict = dsc->sc_regt; 119 bus_space_handle_t nich = dsc->sc_regh; 120 bus_space_tag_t asict = nsc->sc_asict; 121 bus_space_handle_t asich = nsc->sc_asich; 122 u_int8_t romdata[16]; 123 int memsize, i, useword; 124 125 /* 126 * Detect it again unless caller specified it; this gives us 127 * the memory size. 128 */ 129 if (nsc->sc_type == NE2000_TYPE_UNKNOWN) 130 nsc->sc_type = ne2000_detect(nict, nich, asict, asich); 131 132 /* 133 * 8k of memory for NE1000, 16k for NE2000 and 24k for the 134 * card uses DL10019. 135 */ 136 switch (nsc->sc_type) { 137 case NE2000_TYPE_UNKNOWN: 138 default: 139 aprint_error_dev(dsc->sc_dev, "where did the card go?\n"); 140 return (1); 141 case NE2000_TYPE_NE1000: 142 memsize = 8192; 143 useword = 0; 144 break; 145 case NE2000_TYPE_NE2000: 146 case NE2000_TYPE_AX88190: /* XXX really? */ 147 case NE2000_TYPE_AX88790: 148 memsize = 8192 * 2; 149 useword = 1; 150 break; 151 case NE2000_TYPE_DL10019: 152 case NE2000_TYPE_DL10022: 153 memsize = 8192 * 3; 154 useword = 1; 155 break; 156 } 157 158 nsc->sc_useword = useword; 159 160 dsc->cr_proto = ED_CR_RD2; 161 if (nsc->sc_type == NE2000_TYPE_AX88190 || 162 nsc->sc_type == NE2000_TYPE_AX88790) { 163 dsc->rcr_proto = ED_RCR_INTT; 164 dsc->sc_flags |= DP8390_DO_AX88190_WORKAROUND; 165 } else 166 dsc->rcr_proto = 0; 167 168 /* 169 * DCR gets: 170 * 171 * FIFO threshold to 8, No auto-init Remote DMA, 172 * byte order=80x86. 173 * 174 * NE1000 gets byte-wide DMA, NE2000 gets word-wide DMA. 175 */ 176 dsc->dcr_reg = ED_DCR_FT1 | ED_DCR_LS | (useword ? ED_DCR_WTS : 0); 177 178 dsc->test_mem = ne2000_test_mem; 179 dsc->ring_copy = ne2000_ring_copy; 180 dsc->write_mbuf = ne2000_write_mbuf; 181 dsc->read_hdr = ne2000_read_hdr; 182 183 /* Registers are linear. */ 184 for (i = 0; i < 16; i++) 185 dsc->sc_reg_map[i] = i; 186 187 /* 188 * NIC memory doens't start at zero on an NE board. 189 * The start address is tied to the bus width. 190 * (It happens to be computed the same way as mem size.) 191 */ 192 dsc->mem_start = memsize; 193 194 #ifdef GWETHER 195 { 196 int x, mstart = 0; 197 int8_t pbuf0[ED_PAGE_SIZE], pbuf[ED_PAGE_SIZE], 198 tbuf[ED_PAGE_SIZE]; 199 200 for (i = 0; i < ED_PAGE_SIZE; i++) 201 pbuf0[i] = 0; 202 203 /* Search for the start of RAM. */ 204 for (x = 1; x < 256; x++) { 205 ne2000_writemem(nict, nich, asict, asich, pbuf0, 206 x << ED_PAGE_SHIFT, ED_PAGE_SIZE, useword, 0); 207 ne2000_readmem(nict, nich, asict, asich, 208 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, useword); 209 if (memcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) { 210 for (i = 0; i < ED_PAGE_SIZE; i++) 211 pbuf[i] = 255 - x; 212 ne2000_writemem(nict, nich, asict, asich, 213 pbuf, x << ED_PAGE_SHIFT, ED_PAGE_SIZE, 214 useword, 0); 215 ne2000_readmem(nict, nich, asict, asich, 216 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, 217 useword); 218 if (memcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) { 219 mstart = x << ED_PAGE_SHIFT; 220 memsize = ED_PAGE_SIZE; 221 break; 222 } 223 } 224 } 225 226 if (mstart == 0) { 227 aprint_error_dev(&dsc->sc_dev, "cannot find start of RAM\n"); 228 return (1); 229 } 230 231 /* Search for the end of RAM. */ 232 for (++x; x < 256; x++) { 233 ne2000_writemem(nict, nich, asict, asich, pbuf0, 234 x << ED_PAGE_SHIFT, ED_PAGE_SIZE, useword, 0); 235 ne2000_readmem(nict, nich, asict, asich, 236 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, useword); 237 if (memcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) { 238 for (i = 0; i < ED_PAGE_SIZE; i++) 239 pbuf[i] = 255 - x; 240 ne2000_writemem(nict, nich, asict, asich, 241 pbuf, x << ED_PAGE_SHIFT, ED_PAGE_SIZE, 242 useword, 0); 243 ne2000_readmem(nict, nich, asict, asich, 244 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, 245 useword); 246 if (memcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) 247 memsize += ED_PAGE_SIZE; 248 else 249 break; 250 } else 251 break; 252 } 253 254 printf("%s: RAM start 0x%x, size %d\n", 255 device_xname(&dsc->sc_dev), mstart, memsize); 256 257 dsc->mem_start = mstart; 258 } 259 #endif /* GWETHER */ 260 261 dsc->mem_size = memsize; 262 263 if (myea == NULL) { 264 /* Read the station address. */ 265 if (nsc->sc_type == NE2000_TYPE_AX88190 || 266 nsc->sc_type == NE2000_TYPE_AX88790) { 267 /* Select page 0 registers. */ 268 NIC_BARRIER(nict, nich); 269 bus_space_write_1(nict, nich, ED_P0_CR, 270 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 271 NIC_BARRIER(nict, nich); 272 /* Select word transfer. */ 273 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_WTS); 274 NIC_BARRIER(nict, nich); 275 ne2000_readmem(nict, nich, asict, asich, 276 AX88190_NODEID_OFFSET, dsc->sc_enaddr, 277 ETHER_ADDR_LEN, useword); 278 } else { 279 ne2000_readmem(nict, nich, asict, asich, 0, romdata, 280 sizeof(romdata), useword); 281 for (i = 0; i < ETHER_ADDR_LEN; i++) 282 dsc->sc_enaddr[i] = 283 romdata[i * (useword ? 2 : 1)]; 284 } 285 } else 286 memcpy(dsc->sc_enaddr, myea, sizeof(dsc->sc_enaddr)); 287 288 /* Clear any pending interrupts that might have occurred above. */ 289 NIC_BARRIER(nict, nich); 290 bus_space_write_1(nict, nich, ED_P0_ISR, 0xff); 291 NIC_BARRIER(nict, nich); 292 293 if (dsc->sc_media_init == NULL) 294 dsc->sc_media_init = dp8390_media_init; 295 296 if (dp8390_config(dsc)) { 297 aprint_error_dev(dsc->sc_dev, "setup failed\n"); 298 return (1); 299 } 300 301 /* 302 * We need to compute mem_ring a bit differently; override the 303 * value set up in dp8390_config(). 304 */ 305 dsc->mem_ring = 306 dsc->mem_start + ((dsc->txb_cnt * ED_TXBUF_SIZE) << ED_PAGE_SHIFT); 307 308 return (0); 309 } 310 311 /* 312 * Detect an NE-2000 or compatible. Returns a model code. 313 */ 314 int 315 ne2000_detect(nict, nich, asict, asich) 316 bus_space_tag_t nict; 317 bus_space_handle_t nich; 318 bus_space_tag_t asict; 319 bus_space_handle_t asich; 320 { 321 static u_int8_t test_pattern[32] = "THIS is A memory TEST pattern"; 322 u_int8_t test_buffer[32], tmp; 323 int i, rv = NE2000_TYPE_UNKNOWN; 324 325 /* Reset the board. */ 326 #ifdef GWETHER 327 bus_space_write_1(asict, asich, NE2000_ASIC_RESET, 0); 328 ASIC_BARRIER(asict, asich); 329 delay(200); 330 #endif /* GWETHER */ 331 tmp = bus_space_read_1(asict, asich, NE2000_ASIC_RESET); 332 ASIC_BARRIER(asict, asich); 333 delay(10000); 334 335 /* 336 * I don't know if this is necessary; probably cruft leftover from 337 * Clarkson packet driver code. Doesn't do a thing on the boards I've 338 * tested. -DG [note that a outb(0x84, 0) seems to work here, and is 339 * non-invasive...but some boards don't seem to reset and I don't have 340 * complete documentation on what the 'right' thing to do is...so we do 341 * the invasive thing for now. Yuck.] 342 */ 343 bus_space_write_1(asict, asich, NE2000_ASIC_RESET, tmp); 344 ASIC_BARRIER(asict, asich); 345 delay(5000); 346 347 /* 348 * This is needed because some NE clones apparently don't reset the 349 * NIC properly (or the NIC chip doesn't reset fully on power-up). 350 * XXX - this makes the probe invasive! Done against my better 351 * judgement. -DLG 352 */ 353 bus_space_write_1(nict, nich, ED_P0_CR, 354 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STP); 355 NIC_BARRIER(nict, nich); 356 357 delay(5000); 358 359 /* 360 * Generic probe routine for testing for the existence of a DS8390. 361 * Must be performed after the NIC has just been reset. This 362 * works by looking at certain register values that are guaranteed 363 * to be initialized a certain way after power-up or reset. 364 * 365 * Specifically: 366 * 367 * Register reset bits set bits 368 * -------- ---------- -------- 369 * CR TXP, STA RD2, STP 370 * ISR RST 371 * IMR <all> 372 * DCR LAS 373 * TCR LB1, LB0 374 * 375 * We only look at CR and ISR, however, since looking at the others 376 * would require changing register pages, which would be intrusive 377 * if this isn't an 8390. 378 */ 379 380 tmp = bus_space_read_1(nict, nich, ED_P0_CR); 381 if ((tmp & (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) != 382 (ED_CR_RD2 | ED_CR_STP)) 383 goto out; 384 385 tmp = bus_space_read_1(nict, nich, ED_P0_ISR); 386 if ((tmp & ED_ISR_RST) != ED_ISR_RST) 387 goto out; 388 389 bus_space_write_1(nict, nich, 390 ED_P0_CR, ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 391 NIC_BARRIER(nict, nich); 392 393 for (i = 0; i < 100; i++) { 394 if ((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RST) == 395 ED_ISR_RST) { 396 /* Ack the reset bit. */ 397 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RST); 398 NIC_BARRIER(nict, nich); 399 break; 400 } 401 delay(100); 402 } 403 404 #if 0 405 /* XXX */ 406 if (i == 100) 407 goto out; 408 #endif 409 410 /* 411 * Test the ability to read and write to the NIC memory. This has 412 * the side effect of determining if this is an NE1000 or an NE2000. 413 */ 414 415 /* 416 * This prevents packets from being stored in the NIC memory when 417 * the readmem routine turns on the start bit in the CR. 418 */ 419 bus_space_write_1(nict, nich, ED_P0_RCR, ED_RCR_MON); 420 NIC_BARRIER(nict, nich); 421 422 /* Temporarily initialize DCR for byte operations. */ 423 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS); 424 425 bus_space_write_1(nict, nich, ED_P0_PSTART, 8192 >> ED_PAGE_SHIFT); 426 bus_space_write_1(nict, nich, ED_P0_PSTOP, 16384 >> ED_PAGE_SHIFT); 427 428 /* 429 * Write a test pattern in byte mode. If this fails, then there 430 * probably isn't any memory at 8k - which likely means that the 431 * board is an NE2000. 432 */ 433 ne2000_writemem(nict, nich, asict, asich, test_pattern, 8192, 434 sizeof(test_pattern), 0, 1); 435 ne2000_readmem(nict, nich, asict, asich, 8192, test_buffer, 436 sizeof(test_buffer), 0); 437 438 if (memcmp(test_pattern, test_buffer, sizeof(test_pattern))) { 439 /* not an NE1000 - try NE2000 */ 440 bus_space_write_1(nict, nich, ED_P0_DCR, 441 ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS); 442 bus_space_write_1(nict, nich, ED_P0_PSTART, 443 16384 >> ED_PAGE_SHIFT); 444 bus_space_write_1(nict, nich, ED_P0_PSTOP, 445 32768 >> ED_PAGE_SHIFT); 446 447 /* 448 * Write the test pattern in word mode. If this also fails, 449 * then we don't know what this board is. 450 */ 451 ne2000_writemem(nict, nich, asict, asich, test_pattern, 16384, 452 sizeof(test_pattern), 1, 0); 453 ne2000_readmem(nict, nich, asict, asich, 16384, test_buffer, 454 sizeof(test_buffer), 1); 455 456 if (memcmp(test_pattern, test_buffer, sizeof(test_pattern))) 457 goto out; /* not an NE2000 either */ 458 459 rv = NE2000_TYPE_NE2000; 460 } else { 461 /* We're an NE1000. */ 462 rv = NE2000_TYPE_NE1000; 463 } 464 465 /* Clear any pending interrupts that might have occurred above. */ 466 NIC_BARRIER(nict, nich); 467 bus_space_write_1(nict, nich, ED_P0_ISR, 0xff); 468 469 out: 470 return (rv); 471 } 472 473 /* 474 * Write an mbuf chain to the destination NIC memory address using programmed 475 * I/O. 476 */ 477 int 478 ne2000_write_mbuf(sc, m, buf) 479 struct dp8390_softc *sc; 480 struct mbuf *m; 481 int buf; 482 { 483 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 484 bus_space_tag_t nict = sc->sc_regt; 485 bus_space_handle_t nich = sc->sc_regh; 486 bus_space_tag_t asict = nsc->sc_asict; 487 bus_space_handle_t asich = nsc->sc_asich; 488 int savelen, padlen; 489 int maxwait = 100; /* about 120us */ 490 491 savelen = m->m_pkthdr.len; 492 if (savelen < ETHER_MIN_LEN - ETHER_CRC_LEN) { 493 padlen = ETHER_MIN_LEN - ETHER_CRC_LEN - savelen; 494 savelen = ETHER_MIN_LEN - ETHER_CRC_LEN; 495 } else 496 padlen = 0; 497 498 499 /* Select page 0 registers. */ 500 NIC_BARRIER(nict, nich); 501 bus_space_write_1(nict, nich, ED_P0_CR, 502 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 503 NIC_BARRIER(nict, nich); 504 505 /* Reset remote DMA complete flag. */ 506 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC); 507 NIC_BARRIER(nict, nich); 508 509 /* Set up DMA byte count. */ 510 bus_space_write_1(nict, nich, ED_P0_RBCR0, savelen); 511 bus_space_write_1(nict, nich, ED_P0_RBCR1, savelen >> 8); 512 513 /* Set up destination address in NIC mem. */ 514 bus_space_write_1(nict, nich, ED_P0_RSAR0, buf); 515 bus_space_write_1(nict, nich, ED_P0_RSAR1, buf >> 8); 516 517 /* Set remote DMA write. */ 518 NIC_BARRIER(nict, nich); 519 bus_space_write_1(nict, nich, 520 ED_P0_CR, ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA); 521 NIC_BARRIER(nict, nich); 522 523 /* 524 * Transfer the mbuf chain to the NIC memory. NE2000 cards 525 * require that data be transferred as words, and only words, 526 * so that case requires some extra code to patch over odd-length 527 * mbufs. 528 */ 529 if (nsc->sc_type == NE2000_TYPE_NE1000) { 530 /* NE1000s are easy. */ 531 for (; m != 0; m = m->m_next) { 532 if (m->m_len) { 533 bus_space_write_multi_1(asict, asich, 534 NE2000_ASIC_DATA, mtod(m, u_int8_t *), 535 m->m_len); 536 } 537 } 538 if (padlen) { 539 for(; padlen > 0; padlen--) 540 bus_space_write_1(asict, asich, 541 NE2000_ASIC_DATA, 0); 542 } 543 } else { 544 /* NE2000s are a bit trickier. */ 545 u_int8_t *data, savebyte[2]; 546 int l, leftover; 547 #ifdef DIAGNOSTIC 548 u_int8_t *lim; 549 #endif 550 /* Start out with no leftover data. */ 551 leftover = 0; 552 savebyte[0] = savebyte[1] = 0; 553 554 for (; m != 0; m = m->m_next) { 555 l = m->m_len; 556 if (l == 0) 557 continue; 558 data = mtod(m, u_int8_t *); 559 #ifdef DIAGNOSTIC 560 lim = data + l; 561 #endif 562 while (l > 0) { 563 if (leftover) { 564 /* 565 * Data left over (from mbuf or 566 * realignment). Buffer the next 567 * byte, and write it and the 568 * leftover data out. 569 */ 570 savebyte[1] = *data++; 571 l--; 572 bus_space_write_stream_2(asict, asich, 573 NE2000_ASIC_DATA, 574 *(u_int16_t *)savebyte); 575 leftover = 0; 576 } else if (BUS_SPACE_ALIGNED_POINTER(data, 577 u_int16_t) == 0) { 578 /* 579 * Unaligned data; buffer the next 580 * byte. 581 */ 582 savebyte[0] = *data++; 583 l--; 584 leftover = 1; 585 } else { 586 /* 587 * Aligned data; output contiguous 588 * words as much as we can, then 589 * buffer the remaining byte, if any. 590 */ 591 leftover = l & 1; 592 l &= ~1; 593 bus_space_write_multi_stream_2(asict, 594 asich, NE2000_ASIC_DATA, 595 (u_int16_t *)data, l >> 1); 596 data += l; 597 if (leftover) 598 savebyte[0] = *data++; 599 l = 0; 600 } 601 } 602 if (l < 0) 603 panic("ne2000_write_mbuf: negative len"); 604 #ifdef DIAGNOSTIC 605 if (data != lim) 606 panic("ne2000_write_mbuf: data != lim"); 607 #endif 608 } 609 if (leftover) { 610 savebyte[1] = 0; 611 bus_space_write_stream_2(asict, asich, NE2000_ASIC_DATA, 612 *(u_int16_t *)savebyte); 613 } 614 if (padlen) { 615 for(; padlen > 1; padlen -= 2) 616 bus_space_write_stream_2(asict, asich, 617 NE2000_ASIC_DATA, 0); 618 } 619 } 620 NIC_BARRIER(nict, nich); 621 622 /* AX88796 doesn't seem to have remote DMA complete */ 623 if (sc->sc_flags & DP8390_NO_REMOTE_DMA_COMPLETE) 624 return(savelen); 625 626 /* 627 * Wait for remote DMA to complete. This is necessary because on the 628 * transmit side, data is handled internally by the NIC in bursts, and 629 * we can't start another remote DMA until this one completes. Not 630 * waiting causes really bad things to happen - like the NIC wedging 631 * the bus. 632 */ 633 while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) != 634 ED_ISR_RDC) && --maxwait) { 635 (void)bus_space_read_1(nict, nich, ED_P0_CRDA1); 636 (void)bus_space_read_1(nict, nich, ED_P0_CRDA0); 637 NIC_BARRIER(nict, nich); 638 DELAY(1); 639 } 640 641 if (maxwait == 0) { 642 log(LOG_WARNING, 643 "%s: remote transmit DMA failed to complete\n", 644 device_xname(sc->sc_dev)); 645 dp8390_reset(sc); 646 } 647 648 return (savelen); 649 } 650 651 /* 652 * Given a source and destination address, copy 'amout' of a packet from 653 * the ring buffer into a linear destination buffer. Takes into account 654 * ring-wrap. 655 */ 656 int 657 ne2000_ring_copy(sc, src, dstv, amount) 658 struct dp8390_softc *sc; 659 int src; 660 void *dstv; 661 u_short amount; 662 { 663 char *dst = dstv; 664 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 665 bus_space_tag_t nict = sc->sc_regt; 666 bus_space_handle_t nich = sc->sc_regh; 667 bus_space_tag_t asict = nsc->sc_asict; 668 bus_space_handle_t asich = nsc->sc_asich; 669 u_short tmp_amount; 670 int useword = nsc->sc_useword; 671 672 /* Does copy wrap to lower addr in ring buffer? */ 673 if (src + amount > sc->mem_end) { 674 tmp_amount = sc->mem_end - src; 675 676 /* Copy amount up to end of NIC memory. */ 677 ne2000_readmem(nict, nich, asict, asich, src, 678 (u_int8_t *)dst, tmp_amount, useword); 679 680 amount -= tmp_amount; 681 src = sc->mem_ring; 682 dst += tmp_amount; 683 } 684 685 ne2000_readmem(nict, nich, asict, asich, src, (u_int8_t *)dst, 686 amount, useword); 687 688 return (src + amount); 689 } 690 691 void 692 ne2000_read_hdr(sc, buf, hdr) 693 struct dp8390_softc *sc; 694 int buf; 695 struct dp8390_ring *hdr; 696 { 697 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 698 699 ne2000_readmem(sc->sc_regt, sc->sc_regh, nsc->sc_asict, nsc->sc_asich, 700 buf, (u_int8_t *)hdr, sizeof(struct dp8390_ring), 701 nsc->sc_useword); 702 #if BYTE_ORDER == BIG_ENDIAN 703 hdr->count = bswap16(hdr->count); 704 #endif 705 } 706 707 int 708 ne2000_test_mem(struct dp8390_softc *sc) 709 { 710 711 /* Noop. */ 712 return (0); 713 } 714 715 /* 716 * Given a NIC memory source address and a host memory destination address, 717 * copy 'amount' from NIC to host using programmed i/o. The 'amount' is 718 * rounded up to a word - ok as long as mbufs are word sized. 719 */ 720 void 721 ne2000_readmem(nict, nich, asict, asich, src, dst, amount, useword) 722 bus_space_tag_t nict; 723 bus_space_handle_t nich; 724 bus_space_tag_t asict; 725 bus_space_handle_t asich; 726 int src; 727 u_int8_t *dst; 728 size_t amount; 729 int useword; 730 { 731 732 /* Select page 0 registers. */ 733 NIC_BARRIER(nict, nich); 734 bus_space_write_1(nict, nich, ED_P0_CR, 735 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 736 NIC_BARRIER(nict, nich); 737 738 /* Round up to a word. */ 739 if (amount & 1) 740 ++amount; 741 742 /* Set up DMA byte count. */ 743 bus_space_write_1(nict, nich, ED_P0_RBCR0, amount); 744 bus_space_write_1(nict, nich, ED_P0_RBCR1, amount >> 8); 745 746 /* Set up source address in NIC mem. */ 747 bus_space_write_1(nict, nich, ED_P0_RSAR0, src); 748 bus_space_write_1(nict, nich, ED_P0_RSAR1, src >> 8); 749 750 NIC_BARRIER(nict, nich); 751 bus_space_write_1(nict, nich, ED_P0_CR, 752 ED_CR_RD0 | ED_CR_PAGE_0 | ED_CR_STA); 753 754 ASIC_BARRIER(asict, asich); 755 if (useword) 756 bus_space_read_multi_stream_2(asict, asich, NE2000_ASIC_DATA, 757 (u_int16_t *)dst, amount >> 1); 758 else 759 bus_space_read_multi_1(asict, asich, NE2000_ASIC_DATA, 760 dst, amount); 761 } 762 763 /* 764 * Stripped down routine for writing a linear buffer to NIC memory. Only 765 * used in the probe routine to test the memory. 'len' must be even. 766 */ 767 void 768 ne2000_writemem(nict, nich, asict, asich, src, dst, len, useword, quiet) 769 bus_space_tag_t nict; 770 bus_space_handle_t nich; 771 bus_space_tag_t asict; 772 bus_space_handle_t asich; 773 u_int8_t *src; 774 int dst; 775 size_t len; 776 int useword; 777 int quiet; 778 { 779 int maxwait = 100; /* about 120us */ 780 781 /* Select page 0 registers. */ 782 NIC_BARRIER(nict, nich); 783 bus_space_write_1(nict, nich, ED_P0_CR, 784 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 785 NIC_BARRIER(nict, nich); 786 787 /* Reset remote DMA complete flag. */ 788 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC); 789 NIC_BARRIER(nict, nich); 790 791 /* Set up DMA byte count. */ 792 bus_space_write_1(nict, nich, ED_P0_RBCR0, len); 793 bus_space_write_1(nict, nich, ED_P0_RBCR1, len >> 8); 794 795 /* Set up destination address in NIC mem. */ 796 bus_space_write_1(nict, nich, ED_P0_RSAR0, dst); 797 bus_space_write_1(nict, nich, ED_P0_RSAR1, dst >> 8); 798 799 /* Set remote DMA write. */ 800 NIC_BARRIER(nict, nich); 801 bus_space_write_1(nict, nich, ED_P0_CR, 802 ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA); 803 NIC_BARRIER(nict, nich); 804 805 ASIC_BARRIER(asict, asich); 806 if (useword) 807 bus_space_write_multi_stream_2(asict, asich, NE2000_ASIC_DATA, 808 (u_int16_t *)src, len >> 1); 809 else 810 bus_space_write_multi_1(asict, asich, NE2000_ASIC_DATA, 811 src, len); 812 ASIC_BARRIER(asict, asich); 813 814 /* 815 * Wait for remote DMA to complete. This is necessary because on the 816 * transmit side, data is handled internally by the NIC in bursts, and 817 * we can't start another remote DMA until this one completes. Not 818 * waiting causes really bad things to happen - like the NIC wedging 819 * the bus. 820 */ 821 while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) != 822 ED_ISR_RDC) && --maxwait) 823 DELAY(1); 824 825 if (!quiet && maxwait == 0) 826 printf("ne2000_writemem: failed to complete\n"); 827 } 828 829 int 830 ne2000_detach(sc, flags) 831 struct ne2000_softc *sc; 832 int flags; 833 { 834 835 return (dp8390_detach(&sc->sc_dp8390, flags)); 836 } 837 838 #ifdef IPKDB_NE 839 /* 840 * This code is essentially the same as ne2000_attach above. 841 */ 842 int 843 ne2000_ipkdb_attach(kip) 844 struct ipkdb_if *kip; 845 { 846 struct ne2000_softc *np = kip->port; 847 struct dp8390_softc *dp = &np->sc_dp8390; 848 bus_space_tag_t nict = dp->sc_regt; 849 bus_space_handle_t nich = dp->sc_regh; 850 int i, useword; 851 852 #ifdef GWETHER 853 /* Not supported (yet?) */ 854 return -1; 855 #endif 856 857 if (np->sc_type == 0) 858 np->sc_type = ne2000_detect(nict, nich, 859 np->sc_asict, np->sc_asich); 860 if (np->sc_type == 0) 861 return -1; 862 863 useword = np->sc_useword; 864 865 dp->cr_proto = ED_CR_RD2; 866 dp->dcr_reg = ED_DCR_FT1 | ED_DCR_LS | (useword ? ED_DCR_WTS : 0); 867 dp->rcr_proto = 0; 868 869 dp->test_mem = ne2000_test_mem; 870 dp->ring_copy = ne2000_ring_copy; 871 dp->write_mbuf = ne2000_write_mbuf; 872 dp->read_hdr = ne2000_read_hdr; 873 874 for (i = 0; i < 16; i++) 875 dp->sc_reg_map[i] = i; 876 877 switch (np->sc_type) { 878 case NE2000_TYPE_NE1000: 879 dp->mem_start = dp->mem_size = 8192; 880 kip->name = "ne1000"; 881 break; 882 case NE2000_TYPE_NE2000: 883 dp->mem_start = dp->mem_size = 8192 * 2; 884 kip->name = "ne2000"; 885 break; 886 case NE2000_TYPE_DL10019: 887 case NE2000_TYPE_DL10022: 888 dp->mem_start = dp->mem_size = 8192 * 3; 889 kip->name = (np->sc_type == NE2000_TYPE_DL10019) ? 890 "dl10022" : "dl10019"; 891 break; 892 case NE2000_TYPE_AX88190: 893 case NE2000_TYPE_AX88790: 894 dp->rcr_proto = ED_RCR_INTT; 895 dp->sc_flags |= DP8390_DO_AX88190_WORKAROUND; 896 dp->mem_start = dp->mem_size = 8192 * 2; 897 kip->name = "ax88190"; 898 break; 899 default: 900 return -1; 901 break; 902 } 903 904 if (dp8390_ipkdb_attach(kip)) 905 return -1; 906 907 dp->mem_ring = dp->mem_start 908 + ((dp->txb_cnt * ED_TXBUF_SIZE) << ED_PAGE_SHIFT); 909 910 if (!(kip->flags & IPKDB_MYHW)) { 911 char romdata[16]; 912 913 /* Read the station address. */ 914 if (np->sc_type == NE2000_TYPE_AX88190 || 915 np->sc_type == NE2000_TYPE_AX88790) { 916 /* Select page 0 registers. */ 917 NIC_BARRIER(nict, nich); 918 bus_space_write_1(nict, nich, ED_P0_CR, 919 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 920 NIC_BARRIER(nict, nich); 921 /* Select word transfer */ 922 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_WTS); 923 ne2000_readmem(nict, nich, np->sc_asict, np->sc_asich, 924 AX88190_NODEID_OFFSET, kip->myenetaddr, 925 ETHER_ADDR_LEN, useword); 926 } else { 927 ne2000_readmem(nict, nich, np->sc_asict, np->sc_asich, 928 0, romdata, sizeof romdata, useword); 929 for (i = 0; i < ETHER_ADDR_LEN; i++) 930 kip->myenetaddr[i] = romdata[i << useword]; 931 } 932 kip->flags |= IPKDB_MYHW; 933 934 } 935 dp8390_stop(dp); 936 937 return 0; 938 } 939 #endif 940 941 void 942 ne2000_power(int why, void *arg) 943 { 944 struct ne2000_softc *sc = arg; 945 struct dp8390_softc *dsc = &sc->sc_dp8390; 946 struct ifnet *ifp = &dsc->sc_ec.ec_if; 947 int s; 948 949 s = splnet(); 950 switch (why) { 951 case PWR_SUSPEND: 952 case PWR_STANDBY: 953 dp8390_stop(dsc); 954 dp8390_disable(dsc); 955 break; 956 case PWR_RESUME: 957 if (ifp->if_flags & IFF_UP) { 958 if (dp8390_enable(dsc) == 0) 959 dp8390_init(dsc); 960 } 961 break; 962 case PWR_SOFTSUSPEND: 963 case PWR_SOFTSTANDBY: 964 case PWR_SOFTRESUME: 965 break; 966 } 967 splx(s); 968 } 969