1 /* $NetBSD: ne2000.c,v 1.27 2000/02/09 15:40:24 enami Exp $ */ 2 3 /*- 4 * Copyright (c) 1997, 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * Device driver for National Semiconductor DS8390/WD83C690 based ethernet 42 * adapters. 43 * 44 * Copyright (c) 1994, 1995 Charles M. Hannum. All rights reserved. 45 * 46 * Copyright (C) 1993, David Greenman. This software may be used, modified, 47 * copied, distributed, and sold, in both source and binary form provided that 48 * the above copyright and these terms are retained. Under no circumstances is 49 * the author responsible for the proper functioning of this software, nor does 50 * the author assume any responsibility for damages incurred with its use. 51 */ 52 53 /* 54 * Common code shared by all NE2000-compatible Ethernet interfaces. 55 */ 56 57 #include <sys/param.h> 58 #include <sys/systm.h> 59 #include <sys/device.h> 60 #include <sys/socket.h> 61 #include <sys/mbuf.h> 62 #include <sys/syslog.h> 63 64 #include <net/if.h> 65 #include <net/if_dl.h> 66 #include <net/if_types.h> 67 #include <net/if_media.h> 68 69 #include <net/if_ether.h> 70 71 #include <machine/bswap.h> 72 #include <machine/bus.h> 73 74 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 75 #define bus_space_write_stream_2 bus_space_write_2 76 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 77 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 78 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 79 80 #include <dev/ic/dp8390reg.h> 81 #include <dev/ic/dp8390var.h> 82 83 #include <dev/ic/ne2000reg.h> 84 #include <dev/ic/ne2000var.h> 85 86 #if BYTE_ORDER == BIG_ENDIAN 87 #include <machine/bswap.h> 88 #endif 89 90 int ne2000_write_mbuf __P((struct dp8390_softc *, struct mbuf *, int)); 91 int ne2000_ring_copy __P((struct dp8390_softc *, int, caddr_t, u_short)); 92 void ne2000_read_hdr __P((struct dp8390_softc *, int, struct dp8390_ring *)); 93 int ne2000_test_mem __P((struct dp8390_softc *)); 94 95 void ne2000_writemem __P((bus_space_tag_t, bus_space_handle_t, 96 bus_space_tag_t, bus_space_handle_t, u_int8_t *, int, size_t, 97 int, int)); 98 void ne2000_readmem __P((bus_space_tag_t, bus_space_handle_t, 99 bus_space_tag_t, bus_space_handle_t, int, u_int8_t *, size_t, int)); 100 101 int 102 ne2000_attach(nsc, myea, media, nmedia, defmedia) 103 struct ne2000_softc *nsc; 104 u_int8_t *myea; 105 int *media, nmedia, defmedia; 106 { 107 struct dp8390_softc *dsc = &nsc->sc_dp8390; 108 bus_space_tag_t nict = dsc->sc_regt; 109 bus_space_handle_t nich = dsc->sc_regh; 110 bus_space_tag_t asict = nsc->sc_asict; 111 bus_space_handle_t asich = nsc->sc_asich; 112 u_int8_t romdata[16]; 113 int memsize, i, useword; 114 115 /* 116 * Detect it again unless caller specified it; this gives us 117 * the memory size. 118 */ 119 if (nsc->sc_type == 0) { 120 nsc->sc_type = ne2000_detect(nict, nich, asict, asich); 121 if (nsc->sc_type == 0) { 122 printf("%s: where did the card go?\n", 123 dsc->sc_dev.dv_xname); 124 return (1); 125 } 126 } 127 128 useword = NE2000_USE_WORD(nsc); 129 130 dsc->cr_proto = ED_CR_RD2; 131 if (nsc->sc_type == NE2000_TYPE_AX88190) { 132 dsc->rcr_proto = ED_RCR_INTT; 133 dsc->sc_flags |= DP8390_DO_AX88190_WORKAROUND; 134 } else 135 dsc->rcr_proto = 0; 136 137 /* 138 * DCR gets: 139 * 140 * FIFO threshold to 8, No auto-init Remote DMA, 141 * byte order=80x86. 142 * 143 * NE1000 gets byte-wide DMA, NE2000 gets word-wide DMA. 144 */ 145 dsc->dcr_reg = ED_DCR_FT1 | ED_DCR_LS | (useword ? ED_DCR_WTS : 0); 146 147 dsc->test_mem = ne2000_test_mem; 148 dsc->ring_copy = ne2000_ring_copy; 149 dsc->write_mbuf = ne2000_write_mbuf; 150 dsc->read_hdr = ne2000_read_hdr; 151 152 /* Registers are linear. */ 153 for (i = 0; i < 16; i++) 154 dsc->sc_reg_map[i] = i; 155 156 /* 157 * 8k of memory for NE1000, 16k for NE2000 and 24k for the 158 * card uses DL10019. 159 */ 160 switch (nsc->sc_type) { 161 case NE2000_TYPE_NE1000: 162 memsize = 8192; 163 break; 164 case NE2000_TYPE_NE2000: 165 case NE2000_TYPE_AX88190: /* XXX really? */ 166 memsize = 8192 * 2; 167 break; 168 case NE2000_TYPE_DL10019: 169 memsize = 8192 * 3; 170 break; 171 } 172 173 /* 174 * NIC memory doens't start at zero on an NE board. 175 * The start address is tied to the bus width. 176 * (It happens to be computed the same way as mem size.) 177 */ 178 dsc->mem_start = memsize; 179 180 #ifdef GWETHER 181 { 182 int x, mstart = 0; 183 int8_t pbuf0[ED_PAGE_SIZE], pbuf[ED_PAGE_SIZE], 184 tbuf[ED_PAGE_SIZE]; 185 186 for (i = 0; i < ED_PAGE_SIZE; i++) 187 pbuf0[i] = 0; 188 189 /* Search for the start of RAM. */ 190 for (x = 1; x < 256; x++) { 191 ne2000_writemem(nict, nich, asict, asich, pbuf0, 192 x << ED_PAGE_SHIFT, ED_PAGE_SIZE, useword, 0); 193 ne2000_readmem(nict, nich, asict, asich, 194 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, useword); 195 if (bcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) { 196 for (i = 0; i < ED_PAGE_SIZE; i++) 197 pbuf[i] = 255 - x; 198 ne2000_writemem(nict, nich, asict, asich, 199 pbuf, x << ED_PAGE_SHIFT, ED_PAGE_SIZE, 200 useword, 0); 201 ne2000_readmem(nict, nich, asict, asich, 202 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, 203 useword); 204 if (bcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) { 205 mstart = x << ED_PAGE_SHIFT; 206 memsize = ED_PAGE_SIZE; 207 break; 208 } 209 } 210 } 211 212 if (mstart == 0) { 213 printf("%s: cannot find start of RAM\n", 214 dsc->sc_dev.dv_xname); 215 return (1); 216 } 217 218 /* Search for the end of RAM. */ 219 for (++x; x < 256; x++) { 220 ne2000_writemem(nict, nich, asict, asich, pbuf0, 221 x << ED_PAGE_SHIFT, ED_PAGE_SIZE, useword, 0); 222 ne2000_readmem(nict, nich, asict, asich, 223 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, useword); 224 if (bcmp(pbuf0, tbuf, ED_PAGE_SIZE) == 0) { 225 for (i = 0; i < ED_PAGE_SIZE; i++) 226 pbuf[i] = 255 - x; 227 ne2000_writemem(nict, nich, asict, asich, 228 pbuf, x << ED_PAGE_SHIFT, ED_PAGE_SIZE, 229 useword, 0); 230 ne2000_readmem(nict, nich, asict, asich, 231 x << ED_PAGE_SHIFT, tbuf, ED_PAGE_SIZE, 232 useword); 233 if (bcmp(pbuf, tbuf, ED_PAGE_SIZE) == 0) 234 memsize += ED_PAGE_SIZE; 235 else 236 break; 237 } else 238 break; 239 } 240 241 printf("%s: RAM start 0x%x, size %d\n", 242 dsc->sc_dev.dv_xname, mstart, memsize); 243 244 dsc->mem_start = mstart; 245 } 246 #endif /* GWETHER */ 247 248 dsc->mem_size = memsize; 249 250 if (myea == NULL) { 251 /* Read the station address. */ 252 if (nsc->sc_type == NE2000_TYPE_AX88190) { 253 /* Select page 0 registers. */ 254 bus_space_write_1(nict, nich, ED_P0_CR, 255 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 256 /* Select word transfer. */ 257 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_WTS); 258 ne2000_readmem(nict, nich, asict, asich, 259 NE2000_AX88190_NODEID_OFFSET, dsc->sc_enaddr, 260 ETHER_ADDR_LEN, useword); 261 } else { 262 ne2000_readmem(nict, nich, asict, asich, 0, romdata, 263 sizeof(romdata), useword); 264 for (i = 0; i < ETHER_ADDR_LEN; i++) 265 dsc->sc_enaddr[i] = 266 romdata[i * (useword ? 2 : 1)]; 267 } 268 } else 269 bcopy(myea, dsc->sc_enaddr, sizeof(dsc->sc_enaddr)); 270 271 /* Clear any pending interrupts that might have occurred above. */ 272 bus_space_write_1(nict, nich, ED_P0_ISR, 0xff); 273 274 if (dp8390_config(dsc, media, nmedia, defmedia)) { 275 printf("%s: setup failed\n", dsc->sc_dev.dv_xname); 276 return (1); 277 } 278 279 /* 280 * We need to compute mem_ring a bit differently; override the 281 * value set up in dp8390_config(). 282 */ 283 dsc->mem_ring = 284 dsc->mem_start + ((dsc->txb_cnt * ED_TXBUF_SIZE) << ED_PAGE_SHIFT); 285 286 return (0); 287 } 288 289 /* 290 * Detect an NE-2000 or compatible. Returns a model code. 291 */ 292 int 293 ne2000_detect(nict, nich, asict, asich) 294 bus_space_tag_t nict; 295 bus_space_handle_t nich; 296 bus_space_tag_t asict; 297 bus_space_handle_t asich; 298 { 299 static u_int8_t test_pattern[32] = "THIS is A memory TEST pattern"; 300 u_int8_t test_buffer[32], tmp; 301 int i, rv = 0; 302 303 /* Reset the board. */ 304 #ifdef GWETHER 305 bus_space_write_1(asict, asich, NE2000_ASIC_RESET, 0); 306 delay(200); 307 #endif /* GWETHER */ 308 tmp = bus_space_read_1(asict, asich, NE2000_ASIC_RESET); 309 delay(10000); 310 311 /* 312 * I don't know if this is necessary; probably cruft leftover from 313 * Clarkson packet driver code. Doesn't do a thing on the boards I've 314 * tested. -DG [note that a outb(0x84, 0) seems to work here, and is 315 * non-invasive...but some boards don't seem to reset and I don't have 316 * complete documentation on what the 'right' thing to do is...so we do 317 * the invasive thing for now. Yuck.] 318 */ 319 bus_space_write_1(asict, asich, NE2000_ASIC_RESET, tmp); 320 delay(5000); 321 322 /* 323 * This is needed because some NE clones apparently don't reset the 324 * NIC properly (or the NIC chip doesn't reset fully on power-up). 325 * XXX - this makes the probe invasive! Done against my better 326 * judgement. -DLG 327 */ 328 bus_space_write_1(nict, nich, ED_P0_CR, 329 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STP); 330 331 delay(5000); 332 333 /* 334 * Generic probe routine for testing for the existance of a DS8390. 335 * Must be performed after the NIC has just been reset. This 336 * works by looking at certain register values that are guaranteed 337 * to be initialized a certain way after power-up or reset. 338 * 339 * Specifically: 340 * 341 * Register reset bits set bits 342 * -------- ---------- -------- 343 * CR TXP, STA RD2, STP 344 * ISR RST 345 * IMR <all> 346 * DCR LAS 347 * TCR LB1, LB0 348 * 349 * We only look at CR and ISR, however, since looking at the others 350 * would require changing register pages, which would be intrusive 351 * if this isn't an 8390. 352 */ 353 354 tmp = bus_space_read_1(nict, nich, ED_P0_CR); 355 if ((tmp & (ED_CR_RD2 | ED_CR_TXP | ED_CR_STA | ED_CR_STP)) != 356 (ED_CR_RD2 | ED_CR_STP)) 357 goto out; 358 359 tmp = bus_space_read_1(nict, nich, ED_P0_ISR); 360 if ((tmp & ED_ISR_RST) != ED_ISR_RST) 361 goto out; 362 363 bus_space_write_1(nict, nich, 364 ED_P0_CR, ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 365 366 for (i = 0; i < 100; i++) { 367 if ((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RST) == 368 ED_ISR_RST) { 369 /* Ack the reset bit. */ 370 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RST); 371 break; 372 } 373 delay(100); 374 } 375 376 #if 0 377 /* XXX */ 378 if (i == 100) 379 goto out; 380 #endif 381 382 /* 383 * Test the ability to read and write to the NIC memory. This has 384 * the side effect of determining if this is an NE1000 or an NE2000. 385 */ 386 387 /* 388 * This prevents packets from being stored in the NIC memory when 389 * the readmem routine turns on the start bit in the CR. 390 */ 391 bus_space_write_1(nict, nich, ED_P0_RCR, ED_RCR_MON); 392 393 /* Temporarily initialize DCR for byte operations. */ 394 bus_space_write_1(nict, nich, ED_P0_DCR, ED_DCR_FT1 | ED_DCR_LS); 395 396 bus_space_write_1(nict, nich, ED_P0_PSTART, 8192 >> ED_PAGE_SHIFT); 397 bus_space_write_1(nict, nich, ED_P0_PSTOP, 16384 >> ED_PAGE_SHIFT); 398 399 /* 400 * Write a test pattern in byte mode. If this fails, then there 401 * probably isn't any memory at 8k - which likely means that the 402 * board is an NE2000. 403 */ 404 ne2000_writemem(nict, nich, asict, asich, test_pattern, 8192, 405 sizeof(test_pattern), 0, 1); 406 ne2000_readmem(nict, nich, asict, asich, 8192, test_buffer, 407 sizeof(test_buffer), 0); 408 409 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern))) { 410 /* not an NE1000 - try NE2000 */ 411 bus_space_write_1(nict, nich, ED_P0_DCR, 412 ED_DCR_WTS | ED_DCR_FT1 | ED_DCR_LS); 413 bus_space_write_1(nict, nich, ED_P0_PSTART, 414 16384 >> ED_PAGE_SHIFT); 415 bus_space_write_1(nict, nich, ED_P0_PSTOP, 416 32768 >> ED_PAGE_SHIFT); 417 418 /* 419 * Write the test pattern in word mode. If this also fails, 420 * then we don't know what this board is. 421 */ 422 ne2000_writemem(nict, nich, asict, asich, test_pattern, 16384, 423 sizeof(test_pattern), 1, 0); 424 ne2000_readmem(nict, nich, asict, asich, 16384, test_buffer, 425 sizeof(test_buffer), 1); 426 427 if (bcmp(test_pattern, test_buffer, sizeof(test_pattern))) 428 goto out; /* not an NE2000 either */ 429 430 rv = NE2000_TYPE_NE2000; 431 } else { 432 /* We're an NE1000. */ 433 rv = NE2000_TYPE_NE1000; 434 } 435 436 /* Clear any pending interrupts that might have occurred above. */ 437 bus_space_write_1(nict, nich, ED_P0_ISR, 0xff); 438 439 out: 440 return (rv); 441 } 442 443 /* 444 * Write an mbuf chain to the destination NIC memory address using programmed 445 * I/O. 446 */ 447 int 448 ne2000_write_mbuf(sc, m, buf) 449 struct dp8390_softc *sc; 450 struct mbuf *m; 451 int buf; 452 { 453 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 454 bus_space_tag_t nict = sc->sc_regt; 455 bus_space_handle_t nich = sc->sc_regh; 456 bus_space_tag_t asict = nsc->sc_asict; 457 bus_space_handle_t asich = nsc->sc_asich; 458 int savelen; 459 int maxwait = 100; /* about 120us */ 460 461 savelen = m->m_pkthdr.len; 462 463 /* Select page 0 registers. */ 464 bus_space_write_1(nict, nich, ED_P0_CR, 465 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 466 467 /* Reset remote DMA complete flag. */ 468 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC); 469 470 /* Set up DMA byte count. */ 471 bus_space_write_1(nict, nich, ED_P0_RBCR0, savelen); 472 bus_space_write_1(nict, nich, ED_P0_RBCR1, savelen >> 8); 473 474 /* Set up destination address in NIC mem. */ 475 bus_space_write_1(nict, nich, ED_P0_RSAR0, buf); 476 bus_space_write_1(nict, nich, ED_P0_RSAR1, buf >> 8); 477 478 /* Set remote DMA write. */ 479 bus_space_write_1(nict, nich, 480 ED_P0_CR, ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA); 481 482 /* 483 * Transfer the mbuf chain to the NIC memory. NE2000 cards 484 * require that data be transferred as words, and only words, 485 * so that case requires some extra code to patch over odd-length 486 * mbufs. 487 */ 488 if (nsc->sc_type == NE2000_TYPE_NE1000) { 489 /* NE1000s are easy. */ 490 for (; m != 0; m = m->m_next) { 491 if (m->m_len) { 492 bus_space_write_multi_1(asict, asich, 493 NE2000_ASIC_DATA, mtod(m, u_int8_t *), 494 m->m_len); 495 } 496 } 497 } else { 498 /* NE2000s are a bit trickier. */ 499 u_int8_t *data, savebyte[2]; 500 int l, leftover; 501 #ifdef DIAGNOSTIC 502 u_int8_t *lim; 503 #endif 504 /* Start out with no leftover data. */ 505 leftover = 0; 506 savebyte[0] = savebyte[1] = 0; 507 508 for (; m != 0; m = m->m_next) { 509 l = m->m_len; 510 if (l == 0) 511 continue; 512 data = mtod(m, u_int8_t *); 513 #ifdef DIAGNOSTIC 514 lim = data + l; 515 #endif 516 while (l > 0) { 517 if (leftover) { 518 /* 519 * Data left over (from mbuf or 520 * realignment). Buffer the next 521 * byte, and write it and the 522 * leftover data out. 523 */ 524 savebyte[1] = *data++; 525 l--; 526 bus_space_write_stream_2(asict, asich, 527 NE2000_ASIC_DATA, 528 *(u_int16_t *)savebyte); 529 leftover = 0; 530 } else if (BUS_SPACE_ALIGNED_POINTER(data, 531 u_int16_t) == 0) { 532 /* 533 * Unaligned data; buffer the next 534 * byte. 535 */ 536 savebyte[0] = *data++; 537 l--; 538 leftover = 1; 539 } else { 540 /* 541 * Aligned data; output contiguous 542 * words as much as we can, then 543 * buffer the remaining byte, if any. 544 */ 545 leftover = l & 1; 546 l &= ~1; 547 bus_space_write_multi_stream_2(asict, 548 asich, NE2000_ASIC_DATA, 549 (u_int16_t *)data, l >> 1); 550 data += l; 551 if (leftover) 552 savebyte[0] = *data++; 553 l = 0; 554 } 555 } 556 if (l < 0) 557 panic("ne2000_write_mbuf: negative len"); 558 #ifdef DIAGNOSTIC 559 if (data != lim) 560 panic("ne2000_write_mbuf: data != lim"); 561 #endif 562 } 563 if (leftover) { 564 savebyte[1] = 0; 565 bus_space_write_stream_2(asict, asich, NE2000_ASIC_DATA, 566 *(u_int16_t *)savebyte); 567 } 568 } 569 570 /* 571 * Wait for remote DMA to complete. This is necessary because on the 572 * transmit side, data is handled internally by the NIC in bursts, and 573 * we can't start another remote DMA until this one completes. Not 574 * waiting causes really bad things to happen - like the NIC wedging 575 * the bus. 576 */ 577 while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) != 578 ED_ISR_RDC) && --maxwait); 579 580 if (maxwait == 0) { 581 log(LOG_WARNING, 582 "%s: remote transmit DMA failed to complete\n", 583 sc->sc_dev.dv_xname); 584 dp8390_reset(sc); 585 } 586 587 return (savelen); 588 } 589 590 /* 591 * Given a source and destination address, copy 'amout' of a packet from 592 * the ring buffer into a linear destination buffer. Takes into account 593 * ring-wrap. 594 */ 595 int 596 ne2000_ring_copy(sc, src, dst, amount) 597 struct dp8390_softc *sc; 598 int src; 599 caddr_t dst; 600 u_short amount; 601 { 602 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 603 bus_space_tag_t nict = sc->sc_regt; 604 bus_space_handle_t nich = sc->sc_regh; 605 bus_space_tag_t asict = nsc->sc_asict; 606 bus_space_handle_t asich = nsc->sc_asich; 607 u_short tmp_amount; 608 int useword = NE2000_USE_WORD(nsc); 609 610 /* Does copy wrap to lower addr in ring buffer? */ 611 if (src + amount > sc->mem_end) { 612 tmp_amount = sc->mem_end - src; 613 614 /* Copy amount up to end of NIC memory. */ 615 ne2000_readmem(nict, nich, asict, asich, src, 616 (u_int8_t *)dst, tmp_amount, useword); 617 618 amount -= tmp_amount; 619 src = sc->mem_ring; 620 dst += tmp_amount; 621 } 622 623 ne2000_readmem(nict, nich, asict, asich, src, (u_int8_t *)dst, 624 amount, useword); 625 626 return (src + amount); 627 } 628 629 void 630 ne2000_read_hdr(sc, buf, hdr) 631 struct dp8390_softc *sc; 632 int buf; 633 struct dp8390_ring *hdr; 634 { 635 struct ne2000_softc *nsc = (struct ne2000_softc *)sc; 636 637 ne2000_readmem(sc->sc_regt, sc->sc_regh, nsc->sc_asict, nsc->sc_asich, 638 buf, (u_int8_t *)hdr, sizeof(struct dp8390_ring), 639 NE2000_USE_WORD(nsc)); 640 #if BYTE_ORDER == BIG_ENDIAN 641 hdr->count = bswap16(hdr->count); 642 #endif 643 } 644 645 int 646 ne2000_test_mem(sc) 647 struct dp8390_softc *sc; 648 { 649 650 /* Noop. */ 651 return (0); 652 } 653 654 /* 655 * Given a NIC memory source address and a host memory destination address, 656 * copy 'amount' from NIC to host using programmed i/o. The 'amount' is 657 * rounded up to a word - ok as long as mbufs are word sized. 658 */ 659 void 660 ne2000_readmem(nict, nich, asict, asich, src, dst, amount, useword) 661 bus_space_tag_t nict; 662 bus_space_handle_t nich; 663 bus_space_tag_t asict; 664 bus_space_handle_t asich; 665 int src; 666 u_int8_t *dst; 667 size_t amount; 668 int useword; 669 { 670 671 /* Select page 0 registers. */ 672 bus_space_write_1(nict, nich, ED_P0_CR, 673 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 674 675 /* Round up to a word. */ 676 if (amount & 1) 677 ++amount; 678 679 /* Set up DMA byte count. */ 680 bus_space_write_1(nict, nich, ED_P0_RBCR0, amount); 681 bus_space_write_1(nict, nich, ED_P0_RBCR1, amount >> 8); 682 683 /* Set up source address in NIC mem. */ 684 bus_space_write_1(nict, nich, ED_P0_RSAR0, src); 685 bus_space_write_1(nict, nich, ED_P0_RSAR1, src >> 8); 686 687 bus_space_write_1(nict, nich, ED_P0_CR, 688 ED_CR_RD0 | ED_CR_PAGE_0 | ED_CR_STA); 689 690 if (useword) 691 bus_space_read_multi_stream_2(asict, asich, NE2000_ASIC_DATA, 692 (u_int16_t *)dst, amount >> 1); 693 else 694 bus_space_read_multi_1(asict, asich, NE2000_ASIC_DATA, 695 dst, amount); 696 } 697 698 /* 699 * Stripped down routine for writing a linear buffer to NIC memory. Only 700 * used in the probe routine to test the memory. 'len' must be even. 701 */ 702 void 703 ne2000_writemem(nict, nich, asict, asich, src, dst, len, useword, quiet) 704 bus_space_tag_t nict; 705 bus_space_handle_t nich; 706 bus_space_tag_t asict; 707 bus_space_handle_t asich; 708 u_int8_t *src; 709 int dst; 710 size_t len; 711 int useword; 712 int quiet; 713 { 714 int maxwait = 100; /* about 120us */ 715 716 /* Select page 0 registers. */ 717 bus_space_write_1(nict, nich, ED_P0_CR, 718 ED_CR_RD2 | ED_CR_PAGE_0 | ED_CR_STA); 719 720 /* Reset remote DMA complete flag. */ 721 bus_space_write_1(nict, nich, ED_P0_ISR, ED_ISR_RDC); 722 723 /* Set up DMA byte count. */ 724 bus_space_write_1(nict, nich, ED_P0_RBCR0, len); 725 bus_space_write_1(nict, nich, ED_P0_RBCR1, len >> 8); 726 727 /* Set up destination address in NIC mem. */ 728 bus_space_write_1(nict, nich, ED_P0_RSAR0, dst); 729 bus_space_write_1(nict, nich, ED_P0_RSAR1, dst >> 8); 730 731 /* Set remote DMA write. */ 732 bus_space_write_1(nict, nich, ED_P0_CR, 733 ED_CR_RD1 | ED_CR_PAGE_0 | ED_CR_STA); 734 735 if (useword) 736 bus_space_write_multi_stream_2(asict, asich, NE2000_ASIC_DATA, 737 (u_int16_t *)src, len >> 1); 738 else 739 bus_space_write_multi_1(asict, asich, NE2000_ASIC_DATA, 740 src, len); 741 742 /* 743 * Wait for remote DMA to complete. This is necessary because on the 744 * transmit side, data is handled internally by the NIC in bursts, and 745 * we can't start another remote DMA until this one completes. Not 746 * waiting causes really bad things to happen - like the NIC wedging 747 * the bus. 748 */ 749 while (((bus_space_read_1(nict, nich, ED_P0_ISR) & ED_ISR_RDC) != 750 ED_ISR_RDC) && --maxwait); 751 752 if (!quiet && maxwait == 0) 753 printf("ne2000_writemem: failed to complete\n"); 754 } 755 756 int 757 ne2000_detach(sc, flags) 758 struct ne2000_softc *sc; 759 int flags; 760 { 761 762 return (dp8390_detach(&sc->sc_dp8390, flags)); 763 } 764