1 /* $NetBSD: mb89352.c,v 1.32 2004/08/12 03:39:11 mycroft Exp $ */ 2 /* NecBSD: mb89352.c,v 1.4 1998/03/14 07:31:20 kmatsuda Exp */ 3 4 /*- 5 * Copyright (c) 1996,97,98,99,2004 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Charles M. Hannum, Masaru Oki and Kouichi Matsuda. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Charles M. Hannum. 22 * 4. The name of the author may not be used to endorse or promote products 23 * derived from this software without specific prior written permission. 24 * 25 * Copyright (c) 1994 Jarle Greipsland 26 * All rights reserved. 27 * 28 * Redistribution and use in source and binary forms, with or without 29 * modification, are permitted provided that the following conditions 30 * are met: 31 * 1. Redistributions of source code must retain the above copyright 32 * notice, this list of conditions and the following disclaimer. 33 * 2. Redistributions in binary form must reproduce the above copyright 34 * notice, this list of conditions and the following disclaimer in the 35 * documentation and/or other materials provided with the distribution. 36 * 3. The name of the author may not be used to endorse or promote products 37 * derived from this software without specific prior written permission. 38 * 39 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 40 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 41 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 42 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 43 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 44 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 45 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 46 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 47 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 48 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 49 * POSSIBILITY OF SUCH DAMAGE. 50 */ 51 /* 52 * [NetBSD for NEC PC-98 series] 53 * Copyright (c) 1996, 1997, 1998 54 * NetBSD/pc98 porting staff. All rights reserved. 55 * Copyright (c) 1996, 1997, 1998 56 * Kouichi Matsuda. All rights reserved. 57 */ 58 59 /* 60 * Acknowledgements: Many of the algorithms used in this driver are 61 * inspired by the work of Julian Elischer (julian@tfs.com) and 62 * Charles Hannum (mycroft@duality.gnu.ai.mit.edu). Thanks a million! 63 */ 64 65 /* TODO list: 66 * 1) Get the DMA stuff working. 67 * 2) Get the iov/uio stuff working. Is this a good thing ??? 68 * 3) Get the synch stuff working. 69 * 4) Rewrite it to use malloc for the acb structs instead of static alloc.? 70 */ 71 72 #include <sys/cdefs.h> 73 __KERNEL_RCSID(0, "$NetBSD: mb89352.c,v 1.32 2004/08/12 03:39:11 mycroft Exp $"); 74 75 #ifdef DDB 76 #define integrate 77 #else 78 #define integrate __inline static 79 #endif 80 81 /* 82 * A few customizable items: 83 */ 84 85 /* Synchronous data transfers? */ 86 #define SPC_USE_SYNCHRONOUS 0 87 #define SPC_SYNC_REQ_ACK_OFS 8 88 89 /* Wide data transfers? */ 90 #define SPC_USE_WIDE 0 91 #define SPC_MAX_WIDTH 0 92 93 /* Max attempts made to transmit a message */ 94 #define SPC_MSG_MAX_ATTEMPT 3 /* Not used now XXX */ 95 96 /* 97 * Some spin loop parameters (essentially how long to wait some places) 98 * The problem(?) is that sometimes we expect either to be able to transmit a 99 * byte or to get a new one from the SCSI bus pretty soon. In order to avoid 100 * returning from the interrupt just to get yanked back for the next byte we 101 * may spin in the interrupt routine waiting for this byte to come. How long? 102 * This is really (SCSI) device and processor dependent. Tuneable, I guess. 103 */ 104 #define SPC_MSGIN_SPIN 1 /* Will spinwait upto ?ms for a new msg byte */ 105 #define SPC_MSGOUT_SPIN 1 106 107 /* 108 * Include debug functions? At the end of this file there are a bunch of 109 * functions that will print out various information regarding queued SCSI 110 * commands, driver state and chip contents. You can call them from the 111 * kernel debugger. If you set SPC_DEBUG to 0 they are not included (the 112 * kernel uses less memory) but you lose the debugging facilities. 113 */ 114 #if 0 115 #define SPC_DEBUG 1 116 #endif 117 118 #define SPC_ABORT_TIMEOUT 2000 /* time to wait for abort */ 119 120 /* threshold length for DMA transfer */ 121 #define SPC_MIN_DMA_LEN 32 122 123 #ifdef x68k /* XXX it seems x68k SPC SCSI hardware has some quirks */ 124 #define NEED_DREQ_ON_HARDWARE_XFER 125 #define NO_MANUAL_XFER 126 #endif 127 128 /* End of customizable parameters */ 129 130 /* 131 * MB89352 SCSI Protocol Controller (SPC) routines. 132 */ 133 134 #include "opt_ddb.h" 135 136 #include <sys/param.h> 137 #include <sys/systm.h> 138 #include <sys/kernel.h> 139 #include <sys/errno.h> 140 #include <sys/ioctl.h> 141 #include <sys/device.h> 142 #include <sys/buf.h> 143 #include <sys/proc.h> 144 #include <sys/user.h> 145 #include <sys/queue.h> 146 147 #include <machine/intr.h> 148 #include <machine/bus.h> 149 150 #include <dev/scsipi/scsi_all.h> 151 #include <dev/scsipi/scsipi_all.h> 152 #include <dev/scsipi/scsi_message.h> 153 #include <dev/scsipi/scsiconf.h> 154 155 #include <dev/ic/mb89352reg.h> 156 #include <dev/ic/mb89352var.h> 157 158 #ifndef DDB 159 #define Debugger() panic("should call debugger here (mb89352.c)") 160 #endif /* ! DDB */ 161 162 #if SPC_DEBUG 163 int spc_debug = 0x00; /* SPC_SHOWSTART|SPC_SHOWMISC|SPC_SHOWTRACE; */ 164 #endif 165 166 void spc_done __P((struct spc_softc *, struct spc_acb *)); 167 void spc_dequeue __P((struct spc_softc *, struct spc_acb *)); 168 void spc_scsipi_request __P((struct scsipi_channel *, 169 scsipi_adapter_req_t, void *)); 170 int spc_poll __P((struct spc_softc *, struct scsipi_xfer *, int)); 171 integrate void spc_sched_msgout __P((struct spc_softc *, u_char)); 172 integrate void spc_setsync __P((struct spc_softc *, struct spc_tinfo *)); 173 void spc_select __P((struct spc_softc *, struct spc_acb *)); 174 void spc_timeout __P((void *)); 175 void spc_scsi_reset __P((struct spc_softc *)); 176 void spc_reset __P((struct spc_softc *)); 177 void spc_free_acb __P((struct spc_softc *, struct spc_acb *, int)); 178 struct spc_acb* spc_get_acb __P((struct spc_softc *)); 179 int spc_reselect __P((struct spc_softc *, int)); 180 void spc_msgin __P((struct spc_softc *)); 181 void spc_abort __P((struct spc_softc *, struct spc_acb *)); 182 void spc_msgout __P((struct spc_softc *)); 183 int spc_dataout_pio __P((struct spc_softc *, u_char *, int)); 184 int spc_datain_pio __P((struct spc_softc *, u_char *, int)); 185 #if SPC_DEBUG 186 void spc_print_acb __P((struct spc_acb *)); 187 void spc_dump_driver __P((struct spc_softc *)); 188 void spc_dump89352 __P((struct spc_softc *)); 189 void spc_show_scsi_cmd __P((struct spc_acb *)); 190 void spc_print_active_acb __P((void)); 191 #endif 192 193 extern struct cfdriver spc_cd; 194 195 /* 196 * INITIALIZATION ROUTINES (probe, attach ++) 197 */ 198 199 /* 200 * Do the real search-for-device. 201 * Prerequisite: sc->sc_iobase should be set to the proper value 202 */ 203 int 204 spc_find(iot, ioh, bdid) 205 bus_space_tag_t iot; 206 bus_space_handle_t ioh; 207 int bdid; 208 { 209 long timeout = SPC_ABORT_TIMEOUT; 210 211 SPC_TRACE(("spc: probing for spc-chip\n")); 212 /* 213 * Disable interrupts then reset the FUJITSU chip. 214 */ 215 bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST); 216 bus_space_write_1(iot, ioh, SCMD, 0); 217 bus_space_write_1(iot, ioh, PCTL, 0); 218 bus_space_write_1(iot, ioh, TEMP, 0); 219 bus_space_write_1(iot, ioh, TCH, 0); 220 bus_space_write_1(iot, ioh, TCM, 0); 221 bus_space_write_1(iot, ioh, TCL, 0); 222 bus_space_write_1(iot, ioh, INTS, 0); 223 bus_space_write_1(iot, ioh, SCTL, 224 SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB); 225 bus_space_write_1(iot, ioh, BDID, bdid); 226 delay(400); 227 bus_space_write_1(iot, ioh, SCTL, 228 bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE); 229 230 /* The following detection is derived from spc.c 231 * (by Takahide Matsutsuka) in FreeBSD/pccard-test. 232 */ 233 while (bus_space_read_1(iot, ioh, PSNS) && timeout) { 234 timeout--; 235 DELAY(1); 236 } 237 if (timeout == 0) { 238 printf("spc: find failed\n"); 239 return 0; 240 } 241 242 SPC_START(("SPC found")); 243 return 1; 244 } 245 246 void 247 spc_attach(sc) 248 struct spc_softc *sc; 249 { 250 struct scsipi_adapter *adapt = &sc->sc_adapter; 251 struct scsipi_channel *chan = &sc->sc_channel; 252 253 SPC_TRACE(("spc_attach ")); 254 sc->sc_state = SPC_INIT; 255 256 sc->sc_freq = 20; /* XXXX Assume 20 MHz. */ 257 258 #if SPC_USE_SYNCHRONOUS 259 /* 260 * These are the bounds of the sync period, based on the frequency of 261 * the chip's clock input and the size and offset of the sync period 262 * register. 263 * 264 * For a 20MHz clock, this gives us 25, or 100nS, or 10MB/s, as a 265 * maximum transfer rate, and 112.5, or 450nS, or 2.22MB/s, as a 266 * minimum transfer rate. 267 */ 268 sc->sc_minsync = (2 * 250) / sc->sc_freq; 269 sc->sc_maxsync = (9 * 250) / sc->sc_freq; 270 #endif 271 272 /* 273 * Fill in the adapter. 274 */ 275 adapt->adapt_dev = &sc->sc_dev; 276 adapt->adapt_nchannels = 1; 277 adapt->adapt_openings = 7; 278 adapt->adapt_max_periph = 1; 279 adapt->adapt_request = spc_scsipi_request; 280 adapt->adapt_minphys = minphys; 281 282 chan->chan_adapter = &sc->sc_adapter; 283 chan->chan_bustype = &scsi_bustype; 284 chan->chan_channel = 0; 285 chan->chan_ntargets = 8; 286 chan->chan_nluns = 8; 287 chan->chan_id = sc->sc_initiator; 288 289 /* 290 * Add reference to adapter so that we drop the reference after 291 * config_found() to make sure the adatper is disabled. 292 */ 293 if (scsipi_adapter_addref(adapt) != 0) { 294 printf("%s: unable to enable controller\n", 295 sc->sc_dev.dv_xname); 296 return; 297 } 298 299 spc_init(sc, 1); /* Init chip and driver */ 300 301 /* 302 * ask the adapter what subunits are present 303 */ 304 sc->sc_child = config_found(&sc->sc_dev, chan, scsiprint); 305 scsipi_adapter_delref(adapt); 306 } 307 308 int 309 spc_activate(struct device *self, enum devact act) 310 { 311 struct spc_softc *sc = (void *)self; 312 int s, rv = 0; 313 314 s = splhigh(); 315 switch (act) { 316 case DVACT_ACTIVATE: 317 rv = EOPNOTSUPP; 318 break; 319 320 case DVACT_DEACTIVATE: 321 if (sc->sc_child != NULL) 322 rv = config_deactivate(sc->sc_child); 323 break; 324 } 325 splx(s); 326 327 return (rv); 328 } 329 330 int 331 spc_detach(struct device *self, int flags) 332 { 333 struct spc_softc *sc = (void *)self; 334 int rv = 0; 335 336 if (sc->sc_child != NULL) 337 rv = config_detach(sc->sc_child, flags); 338 339 return (rv); 340 } 341 342 /* 343 * Initialize MB89352 chip itself 344 * The following conditions should hold: 345 * spc_isa_probe should have succeeded, i.e. the iobase address in spc_softc 346 * must be valid. 347 */ 348 void 349 spc_reset(sc) 350 struct spc_softc *sc; 351 { 352 bus_space_tag_t iot = sc->sc_iot; 353 bus_space_handle_t ioh = sc->sc_ioh; 354 355 SPC_TRACE(("spc_reset ")); 356 /* 357 * Disable interrupts then reset the FUJITSU chip. 358 */ 359 bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST); 360 bus_space_write_1(iot, ioh, SCMD, 0); 361 bus_space_write_1(iot, ioh, TMOD, 0); 362 bus_space_write_1(iot, ioh, PCTL, 0); 363 bus_space_write_1(iot, ioh, TEMP, 0); 364 bus_space_write_1(iot, ioh, TCH, 0); 365 bus_space_write_1(iot, ioh, TCM, 0); 366 bus_space_write_1(iot, ioh, TCL, 0); 367 bus_space_write_1(iot, ioh, INTS, 0); 368 bus_space_write_1(iot, ioh, SCTL, 369 SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB); 370 bus_space_write_1(iot, ioh, BDID, sc->sc_initiator); 371 delay(400); 372 bus_space_write_1(iot, ioh, SCTL, 373 bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE); 374 } 375 376 377 /* 378 * Pull the SCSI RST line for 500us. 379 */ 380 void 381 spc_scsi_reset(sc) 382 struct spc_softc *sc; 383 { 384 bus_space_tag_t iot = sc->sc_iot; 385 bus_space_handle_t ioh = sc->sc_ioh; 386 387 SPC_TRACE(("spc_scsi_reset ")); 388 bus_space_write_1(iot, ioh, SCMD, 389 bus_space_read_1(iot, ioh, SCMD) | SCMD_RST); 390 delay(500); 391 bus_space_write_1(iot, ioh, SCMD, 392 bus_space_read_1(iot, ioh, SCMD) & ~SCMD_RST); 393 delay(50); 394 } 395 396 /* 397 * Initialize spc SCSI driver. 398 */ 399 void 400 spc_init(sc, bus_reset) 401 struct spc_softc *sc; 402 int bus_reset; 403 { 404 struct spc_acb *acb; 405 int r; 406 407 SPC_TRACE(("spc_init ")); 408 if (bus_reset) { 409 spc_reset(sc); 410 spc_scsi_reset(sc); 411 } 412 spc_reset(sc); 413 414 if (sc->sc_state == SPC_INIT) { 415 /* First time through; initialize. */ 416 TAILQ_INIT(&sc->ready_list); 417 TAILQ_INIT(&sc->nexus_list); 418 TAILQ_INIT(&sc->free_list); 419 sc->sc_nexus = NULL; 420 acb = sc->sc_acb; 421 memset(acb, 0, sizeof(sc->sc_acb)); 422 for (r = 0; r < sizeof(sc->sc_acb) / sizeof(*acb); r++) { 423 TAILQ_INSERT_TAIL(&sc->free_list, acb, chain); 424 acb++; 425 } 426 memset(&sc->sc_tinfo, 0, sizeof(sc->sc_tinfo)); 427 } else { 428 /* Cancel any active commands. */ 429 sc->sc_state = SPC_CLEANING; 430 if ((acb = sc->sc_nexus) != NULL) { 431 acb->xs->error = XS_DRIVER_STUFFUP; 432 callout_stop(&acb->xs->xs_callout); 433 spc_done(sc, acb); 434 } 435 while ((acb = TAILQ_FIRST(&sc->nexus_list)) != NULL) { 436 acb->xs->error = XS_DRIVER_STUFFUP; 437 callout_stop(&acb->xs->xs_callout); 438 spc_done(sc, acb); 439 } 440 } 441 442 sc->sc_prevphase = PH_INVALID; 443 for (r = 0; r < 8; r++) { 444 struct spc_tinfo *ti = &sc->sc_tinfo[r]; 445 446 ti->flags = 0; 447 #if SPC_USE_SYNCHRONOUS 448 ti->flags |= DO_SYNC; 449 ti->period = sc->sc_minsync; 450 ti->offset = SPC_SYNC_REQ_ACK_OFS; 451 #else 452 ti->period = ti->offset = 0; 453 #endif 454 #if SPC_USE_WIDE 455 ti->flags |= DO_WIDE; 456 ti->width = SPC_MAX_WIDTH; 457 #else 458 ti->width = 0; 459 #endif 460 } 461 462 sc->sc_state = SPC_IDLE; 463 bus_space_write_1(sc->sc_iot, sc->sc_ioh, SCTL, 464 bus_space_read_1(sc->sc_iot, sc->sc_ioh, SCTL) | SCTL_INTR_ENAB); 465 } 466 467 void 468 spc_free_acb(sc, acb, flags) 469 struct spc_softc *sc; 470 struct spc_acb *acb; 471 int flags; 472 { 473 int s; 474 475 SPC_TRACE(("spc_free_acb ")); 476 s = splbio(); 477 478 acb->flags = 0; 479 TAILQ_INSERT_HEAD(&sc->free_list, acb, chain); 480 splx(s); 481 } 482 483 struct spc_acb * 484 spc_get_acb(sc) 485 struct spc_softc *sc; 486 { 487 struct spc_acb *acb; 488 int s; 489 490 SPC_TRACE(("spc_get_acb ")); 491 s = splbio(); 492 acb = TAILQ_FIRST(&sc->free_list); 493 if (acb != NULL) { 494 TAILQ_REMOVE(&sc->free_list, acb, chain); 495 acb->flags |= ACB_ALLOC; 496 } 497 splx(s); 498 return acb; 499 } 500 501 /* 502 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS 503 */ 504 505 /* 506 * Expected sequence: 507 * 1) Command inserted into ready list 508 * 2) Command selected for execution 509 * 3) Command won arbitration and has selected target device 510 * 4) Send message out (identify message, eventually also sync.negotiations) 511 * 5) Send command 512 * 5a) Receive disconnect message, disconnect. 513 * 5b) Reselected by target 514 * 5c) Receive identify message from target. 515 * 6) Send or receive data 516 * 7) Receive status 517 * 8) Receive message (command complete etc.) 518 */ 519 520 /* 521 * Start a SCSI-command 522 * This function is called by the higher level SCSI-driver to queue/run 523 * SCSI-commands. 524 */ 525 void 526 spc_scsipi_request(chan, req, arg) 527 struct scsipi_channel *chan; 528 scsipi_adapter_req_t req; 529 void *arg; 530 { 531 struct scsipi_xfer *xs; 532 struct scsipi_periph *periph; 533 struct spc_softc *sc = (void *)chan->chan_adapter->adapt_dev; 534 struct spc_acb *acb; 535 int s, flags; 536 537 switch (req) { 538 case ADAPTER_REQ_RUN_XFER: 539 xs = arg; 540 periph = xs->xs_periph; 541 SPC_TRACE(("spc_scsipi_request ")); 542 SPC_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen, 543 periph->periph_target)); 544 545 flags = xs->xs_control; 546 acb = spc_get_acb(sc); 547 #ifdef DIAGNOSTIC 548 /* 549 * This should nerver happen as we track the resources 550 * in the mid-layer. 551 */ 552 if (acb == NULL) { 553 scsipi_printaddr(periph); 554 printf("unable to allocate acb\n"); 555 panic("spc_scsipi_request"); 556 } 557 #endif 558 559 /* Initialize acb */ 560 acb->xs = xs; 561 acb->timeout = xs->timeout; 562 563 if (xs->xs_control & XS_CTL_RESET) { 564 acb->flags |= ACB_RESET; 565 acb->scsipi_cmd_length = 0; 566 acb->data_length = 0; 567 } else { 568 memcpy(&acb->scsipi_cmd, xs->cmd, xs->cmdlen); 569 acb->scsipi_cmd_length = xs->cmdlen; 570 acb->data_addr = xs->data; 571 acb->data_length = xs->datalen; 572 } 573 acb->target_stat = 0; 574 575 s = splbio(); 576 577 TAILQ_INSERT_TAIL(&sc->ready_list, acb, chain); 578 /* 579 * Start scheduling unless a queue process is in progress. 580 */ 581 if (sc->sc_state == SPC_IDLE) 582 spc_sched(sc); 583 /* 584 * After successful sending, check if we should return just now. 585 * If so, return SUCCESSFULLY_QUEUED. 586 */ 587 588 splx(s); 589 590 if ((flags & XS_CTL_POLL) == 0) 591 return; 592 593 /* Not allowed to use interrupts, use polling instead */ 594 s = splbio(); 595 if (spc_poll(sc, xs, acb->timeout)) { 596 spc_timeout(acb); 597 if (spc_poll(sc, xs, acb->timeout)) 598 spc_timeout(acb); 599 } 600 splx(s); 601 return; 602 case ADAPTER_REQ_GROW_RESOURCES: 603 /* XXX Not supported. */ 604 return; 605 case ADAPTER_REQ_SET_XFER_MODE: 606 { 607 /* 608 * We don't support Sync, Wide, or Tagged Command Queuing. 609 * Just callback now, to report this. 610 */ 611 struct scsipi_xfer_mode *xm = arg; 612 613 xm->xm_mode = 0; 614 xm->xm_period = 0; 615 xm->xm_offset = 0; 616 scsipi_async_event(chan, ASYNC_EVENT_XFER_MODE, xm); 617 return; 618 } 619 } 620 } 621 622 /* 623 * Used when interrupt driven I/O isn't allowed, e.g. during boot. 624 */ 625 int 626 spc_poll(sc, xs, count) 627 struct spc_softc *sc; 628 struct scsipi_xfer *xs; 629 int count; 630 { 631 bus_space_tag_t iot = sc->sc_iot; 632 bus_space_handle_t ioh = sc->sc_ioh; 633 634 SPC_TRACE(("spc_poll ")); 635 while (count) { 636 /* 637 * If we had interrupts enabled, would we 638 * have got an interrupt? 639 */ 640 if (bus_space_read_1(iot, ioh, INTS) != 0) 641 spc_intr(sc); 642 if ((xs->xs_status & XS_STS_DONE) != 0) 643 return 0; 644 delay(1000); 645 count--; 646 } 647 return 1; 648 } 649 650 /* 651 * LOW LEVEL SCSI UTILITIES 652 */ 653 654 integrate void 655 spc_sched_msgout(sc, m) 656 struct spc_softc *sc; 657 u_char m; 658 { 659 bus_space_tag_t iot = sc->sc_iot; 660 bus_space_handle_t ioh = sc->sc_ioh; 661 662 SPC_TRACE(("spc_sched_msgout ")); 663 if (sc->sc_msgpriq == 0) 664 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN); 665 sc->sc_msgpriq |= m; 666 } 667 668 /* 669 * Set synchronous transfer offset and period. 670 */ 671 integrate void 672 spc_setsync(sc, ti) 673 struct spc_softc *sc; 674 struct spc_tinfo *ti; 675 { 676 #if SPC_USE_SYNCHRONOUS 677 bus_space_tag_t iot = sc->sc_iot; 678 bus_space_handle_t ioh = sc->sc_ioh; 679 680 SPC_TRACE(("spc_setsync ")); 681 if (ti->offset != 0) 682 bus_space_write_1(iot, ioh, TMOD, 683 ((ti->period * sc->sc_freq) / 250 - 2) << 4 | ti->offset); 684 else 685 bus_space_write_1(iot, ioh, TMOD, 0); 686 #endif 687 } 688 689 /* 690 * Start a selection. This is used by spc_sched() to select an idle target. 691 */ 692 void 693 spc_select(sc, acb) 694 struct spc_softc *sc; 695 struct spc_acb *acb; 696 { 697 struct scsipi_periph *periph = acb->xs->xs_periph; 698 int target = periph->periph_target; 699 struct spc_tinfo *ti = &sc->sc_tinfo[target]; 700 bus_space_tag_t iot = sc->sc_iot; 701 bus_space_handle_t ioh = sc->sc_ioh; 702 703 SPC_TRACE(("spc_select ")); 704 spc_setsync(sc, ti); 705 706 #if 0 707 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN); 708 #endif 709 710 bus_space_write_1(iot, ioh, PCTL, 0); 711 bus_space_write_1(iot, ioh, TEMP, 712 (1 << sc->sc_initiator) | (1 << target)); 713 /* 714 * Setup BSY timeout (selection timeout). 715 * 250ms according to the SCSI specification. 716 * T = (X * 256 + 15) * Tclf * 2 (Tclf = 200ns on x68k) 717 * To setup 256ms timeout, 718 * 128000ns/200ns = X * 256 + 15 719 * 640 - 15 = X * 256 720 * X = 625 / 256 721 * X = 2 + 113 / 256 722 * ==> tch = 2, tcm = 113 (correct?) 723 */ 724 /* Time to the information transfer phase start. */ 725 /* XXX These values should be calculated from sc_freq */ 726 bus_space_write_1(iot, ioh, TCH, 2); 727 bus_space_write_1(iot, ioh, TCM, 113); 728 bus_space_write_1(iot, ioh, TCL, 3); 729 bus_space_write_1(iot, ioh, SCMD, SCMD_SELECT); 730 731 sc->sc_state = SPC_SELECTING; 732 } 733 734 int 735 spc_reselect(sc, message) 736 struct spc_softc *sc; 737 int message; 738 { 739 u_char selid, target, lun; 740 struct spc_acb *acb; 741 struct scsipi_periph *periph; 742 struct spc_tinfo *ti; 743 744 SPC_TRACE(("spc_reselect ")); 745 /* 746 * The SCSI chip made a snapshot of the data bus while the reselection 747 * was being negotiated. This enables us to determine which target did 748 * the reselect. 749 */ 750 selid = sc->sc_selid & ~(1 << sc->sc_initiator); 751 if (selid & (selid - 1)) { 752 printf("%s: reselect with invalid selid %02x; " 753 "sending DEVICE RESET\n", sc->sc_dev.dv_xname, selid); 754 SPC_BREAK(); 755 goto reset; 756 } 757 758 /* 759 * Search wait queue for disconnected cmd 760 * The list should be short, so I haven't bothered with 761 * any more sophisticated structures than a simple 762 * singly linked list. 763 */ 764 target = ffs(selid) - 1; 765 lun = message & 0x07; 766 TAILQ_FOREACH(acb, &sc->nexus_list, chain) { 767 periph = acb->xs->xs_periph; 768 if (periph->periph_target == target && 769 periph->periph_lun == lun) 770 break; 771 } 772 if (acb == NULL) { 773 printf("%s: reselect from target %d lun %d with no nexus; " 774 "sending ABORT\n", sc->sc_dev.dv_xname, target, lun); 775 SPC_BREAK(); 776 goto abort; 777 } 778 779 /* Make this nexus active again. */ 780 TAILQ_REMOVE(&sc->nexus_list, acb, chain); 781 sc->sc_state = SPC_CONNECTED; 782 sc->sc_nexus = acb; 783 ti = &sc->sc_tinfo[target]; 784 ti->lubusy |= (1 << lun); 785 spc_setsync(sc, ti); 786 787 if (acb->flags & ACB_RESET) 788 spc_sched_msgout(sc, SEND_DEV_RESET); 789 else if (acb->flags & ACB_ABORT) 790 spc_sched_msgout(sc, SEND_ABORT); 791 792 /* Do an implicit RESTORE POINTERS. */ 793 sc->sc_dp = acb->data_addr; 794 sc->sc_dleft = acb->data_length; 795 sc->sc_cp = (u_char *)&acb->scsipi_cmd; 796 sc->sc_cleft = acb->scsipi_cmd_length; 797 798 return (0); 799 800 reset: 801 spc_sched_msgout(sc, SEND_DEV_RESET); 802 return (1); 803 804 abort: 805 spc_sched_msgout(sc, SEND_ABORT); 806 return (1); 807 } 808 809 /* 810 * Schedule a SCSI operation. This has now been pulled out of the interrupt 811 * handler so that we may call it from spc_scsi_cmd and spc_done. This may 812 * save us an unnecessary interrupt just to get things going. Should only be 813 * called when state == SPC_IDLE and at bio pl. 814 */ 815 void 816 spc_sched(sc) 817 struct spc_softc *sc; 818 { 819 struct spc_acb *acb; 820 struct scsipi_periph *periph; 821 struct spc_tinfo *ti; 822 823 /* missing the hw, just return and wait for our hw */ 824 if (sc->sc_flags & SPC_INACTIVE) 825 return; 826 SPC_TRACE(("spc_sched ")); 827 /* 828 * Find first acb in ready queue that is for a target/lunit pair that 829 * is not busy. 830 */ 831 TAILQ_FOREACH(acb, &sc->ready_list, chain) { 832 periph = acb->xs->xs_periph; 833 ti = &sc->sc_tinfo[periph->periph_target]; 834 if ((ti->lubusy & (1 << periph->periph_lun)) == 0) { 835 SPC_MISC(("selecting %d:%d ", 836 periph->periph_target, periph->periph_lun)); 837 TAILQ_REMOVE(&sc->ready_list, acb, chain); 838 sc->sc_nexus = acb; 839 spc_select(sc, acb); 840 return; 841 } else 842 SPC_MISC(("%d:%d busy\n", 843 periph->periph_target, periph->periph_lun)); 844 } 845 SPC_MISC(("idle ")); 846 /* Nothing to start; just enable reselections and wait. */ 847 } 848 849 /* 850 * POST PROCESSING OF SCSI_CMD (usually current) 851 */ 852 void 853 spc_done(sc, acb) 854 struct spc_softc *sc; 855 struct spc_acb *acb; 856 { 857 struct scsipi_xfer *xs = acb->xs; 858 struct scsipi_periph *periph = xs->xs_periph; 859 struct spc_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 860 861 SPC_TRACE(("spc_done ")); 862 863 if (xs->error == XS_NOERROR) { 864 if (acb->flags & ACB_ABORT) { 865 xs->error = XS_DRIVER_STUFFUP; 866 } else { 867 switch (acb->target_stat) { 868 case SCSI_CHECK: 869 /* First, save the return values */ 870 xs->resid = acb->data_length; 871 /* FALLTHROUGH */ 872 case SCSI_BUSY: 873 xs->status = acb->target_stat; 874 xs->error = XS_BUSY; 875 break; 876 case SCSI_OK: 877 xs->resid = acb->data_length; 878 break; 879 default: 880 xs->error = XS_DRIVER_STUFFUP; 881 #if SPC_DEBUG 882 printf("%s: spc_done: bad stat 0x%x\n", 883 sc->sc_dev.dv_xname, acb->target_stat); 884 #endif 885 break; 886 } 887 } 888 } 889 890 #if SPC_DEBUG 891 if ((spc_debug & SPC_SHOWMISC) != 0) { 892 if (xs->resid != 0) 893 printf("resid=%d ", xs->resid); 894 else 895 printf("error=%d\n", xs->error); 896 } 897 #endif 898 899 /* 900 * Remove the ACB from whatever queue it happens to be on. 901 */ 902 if (acb->flags & ACB_NEXUS) 903 ti->lubusy &= ~(1 << periph->periph_lun); 904 if (acb == sc->sc_nexus) { 905 sc->sc_nexus = NULL; 906 sc->sc_state = SPC_IDLE; 907 spc_sched(sc); 908 } else 909 spc_dequeue(sc, acb); 910 911 spc_free_acb(sc, acb, xs->xs_control); 912 ti->cmds++; 913 scsipi_done(xs); 914 } 915 916 void 917 spc_dequeue(sc, acb) 918 struct spc_softc *sc; 919 struct spc_acb *acb; 920 { 921 922 SPC_TRACE(("spc_dequeue ")); 923 if (acb->flags & ACB_NEXUS) 924 TAILQ_REMOVE(&sc->nexus_list, acb, chain); 925 else 926 TAILQ_REMOVE(&sc->ready_list, acb, chain); 927 } 928 929 /* 930 * INTERRUPT/PROTOCOL ENGINE 931 */ 932 933 /* 934 * Precondition: 935 * The SCSI bus is already in the MSGI phase and there is a message byte 936 * on the bus, along with an asserted REQ signal. 937 */ 938 void 939 spc_msgin(sc) 940 struct spc_softc *sc; 941 { 942 bus_space_tag_t iot = sc->sc_iot; 943 bus_space_handle_t ioh = sc->sc_ioh; 944 int n; 945 u_int8_t msg; 946 947 SPC_TRACE(("spc_msgin ")); 948 949 if (sc->sc_prevphase == PH_MSGIN) { 950 /* This is a continuation of the previous message. */ 951 n = sc->sc_imp - sc->sc_imess; 952 goto nextbyte; 953 } 954 955 /* This is a new MESSAGE IN phase. Clean up our state. */ 956 sc->sc_flags &= ~SPC_DROP_MSGIN; 957 958 nextmsg: 959 n = 0; 960 sc->sc_imp = &sc->sc_imess[n]; 961 962 nextbyte: 963 /* 964 * Read a whole message, but don't ack the last byte. If we reject the 965 * message, we have to assert ATN during the message transfer phase 966 * itself. 967 */ 968 for (;;) { 969 #ifdef NO_MANUAL_XFER /* XXX */ 970 if (bus_space_read_1(iot, ioh, INTS) != 0) { 971 /* 972 * Target left MESSAGE IN, probably because it 973 * a) noticed our ATN signal, or 974 * b) ran out of messages. 975 */ 976 goto out; 977 } 978 #endif 979 /* If parity error, just dump everything on the floor. */ 980 if ((bus_space_read_1(iot, ioh, SERR) & 981 (SERR_SCSI_PAR|SERR_SPC_PAR)) != 0) { 982 sc->sc_flags |= SPC_DROP_MSGIN; 983 spc_sched_msgout(sc, SEND_PARITY_ERROR); 984 } 985 986 #ifdef NO_MANUAL_XFER /* XXX */ 987 /* send TRANSFER command. */ 988 bus_space_write_1(iot, ioh, TCH, 0); 989 bus_space_write_1(iot, ioh, TCM, 0); 990 bus_space_write_1(iot, ioh, TCL, 1); 991 bus_space_write_1(iot, ioh, PCTL, 992 sc->sc_phase | PCTL_BFINT_ENAB); 993 #ifdef NEED_DREQ_ON_HARDWARE_XFER 994 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); 995 #else 996 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR); 997 #endif 998 for (;;) { 999 if ((bus_space_read_1(iot, ioh, SSTS) & 1000 SSTS_DREG_EMPTY) == 0) 1001 break; 1002 if (bus_space_read_1(iot, ioh, INTS) != 0) 1003 goto out; 1004 } 1005 msg = bus_space_read_1(iot, ioh, DREG); 1006 #else 1007 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_ATN) != 0) 1008 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN); 1009 1010 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) { 1011 /* XXX needs timeout */ 1012 if ((bus_space_read_1(iot, ioh, PSNS) & PH_MASK) 1013 != PH_MSGIN) 1014 /* 1015 * Target left MESSAGE IN, probably because it 1016 * a) noticed our ATN signal, or 1017 * b) ran out of messages. 1018 */ 1019 goto out; 1020 } 1021 1022 bus_space_write_1(iot, ioh, PCTL, PH_MSGIN); 1023 msg = bus_space_read_1(iot, ioh, TEMP); 1024 #endif 1025 1026 /* Gather incoming message bytes if needed. */ 1027 if ((sc->sc_flags & SPC_DROP_MSGIN) == 0) { 1028 if (n >= SPC_MAX_MSG_LEN) { 1029 sc->sc_flags |= SPC_DROP_MSGIN; 1030 spc_sched_msgout(sc, SEND_REJECT); 1031 } else { 1032 *sc->sc_imp++ = msg; 1033 n++; 1034 /* 1035 * This testing is suboptimal, but most 1036 * messages will be of the one byte variety, so 1037 * it should not affect performance 1038 * significantly. 1039 */ 1040 if (n == 1 && MSG_IS1BYTE(sc->sc_imess[0])) 1041 break; 1042 if (n == 2 && MSG_IS2BYTE(sc->sc_imess[0])) 1043 break; 1044 if (n >= 3 && MSG_ISEXTENDED(sc->sc_imess[0]) && 1045 n == sc->sc_imess[1] + 2) 1046 break; 1047 } 1048 } 1049 /* 1050 * If we reach this spot we're either: 1051 * a) in the middle of a multi-byte message, or 1052 * b) dropping bytes. 1053 */ 1054 1055 #ifndef NO_MANUAL_XFER /* XXX */ 1056 /* Ack the last byte read. */ 1057 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ACK); 1058 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0) 1059 continue; /* XXX needs timeout */ 1060 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK); 1061 #endif 1062 } 1063 1064 SPC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0])); 1065 1066 /* We now have a complete message. Parse it. */ 1067 switch (sc->sc_state) { 1068 struct spc_acb *acb; 1069 struct scsipi_periph *periph; 1070 struct spc_tinfo *ti; 1071 1072 case SPC_CONNECTED: 1073 SPC_ASSERT(sc->sc_nexus != NULL); 1074 acb = sc->sc_nexus; 1075 ti = &sc->sc_tinfo[acb->xs->xs_periph->periph_target]; 1076 1077 switch (sc->sc_imess[0]) { 1078 case MSG_CMDCOMPLETE: 1079 if (sc->sc_dleft < 0) { 1080 periph = acb->xs->xs_periph; 1081 printf("%s: %ld extra bytes from %d:%d\n", 1082 sc->sc_dev.dv_xname, (long)-sc->sc_dleft, 1083 periph->periph_target, periph->periph_lun); 1084 sc->sc_dleft = 0; 1085 } 1086 acb->xs->resid = acb->data_length = sc->sc_dleft; 1087 sc->sc_state = SPC_CMDCOMPLETE; 1088 break; 1089 1090 case MSG_PARITY_ERROR: 1091 /* Resend the last message. */ 1092 spc_sched_msgout(sc, sc->sc_lastmsg); 1093 break; 1094 1095 case MSG_MESSAGE_REJECT: 1096 SPC_MISC(("message rejected %02x ", sc->sc_lastmsg)); 1097 switch (sc->sc_lastmsg) { 1098 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE 1099 case SEND_IDENTIFY: 1100 ti->flags &= ~(DO_SYNC | DO_WIDE); 1101 ti->period = ti->offset = 0; 1102 spc_setsync(sc, ti); 1103 ti->width = 0; 1104 break; 1105 #endif 1106 #if SPC_USE_SYNCHRONOUS 1107 case SEND_SDTR: 1108 ti->flags &= ~DO_SYNC; 1109 ti->period = ti->offset = 0; 1110 spc_setsync(sc, ti); 1111 break; 1112 #endif 1113 #if SPC_USE_WIDE 1114 case SEND_WDTR: 1115 ti->flags &= ~DO_WIDE; 1116 ti->width = 0; 1117 break; 1118 #endif 1119 case SEND_INIT_DET_ERR: 1120 spc_sched_msgout(sc, SEND_ABORT); 1121 break; 1122 } 1123 break; 1124 1125 case MSG_NOOP: 1126 break; 1127 1128 case MSG_DISCONNECT: 1129 ti->dconns++; 1130 sc->sc_state = SPC_DISCONNECT; 1131 break; 1132 1133 case MSG_SAVEDATAPOINTER: 1134 acb->data_addr = sc->sc_dp; 1135 acb->data_length = sc->sc_dleft; 1136 break; 1137 1138 case MSG_RESTOREPOINTERS: 1139 sc->sc_dp = acb->data_addr; 1140 sc->sc_dleft = acb->data_length; 1141 sc->sc_cp = (u_char *)&acb->scsipi_cmd; 1142 sc->sc_cleft = acb->scsipi_cmd_length; 1143 break; 1144 1145 case MSG_EXTENDED: 1146 switch (sc->sc_imess[2]) { 1147 #if SPC_USE_SYNCHRONOUS 1148 case MSG_EXT_SDTR: 1149 if (sc->sc_imess[1] != 3) 1150 goto reject; 1151 ti->period = sc->sc_imess[3]; 1152 ti->offset = sc->sc_imess[4]; 1153 ti->flags &= ~DO_SYNC; 1154 if (ti->offset == 0) { 1155 } else if (ti->period < sc->sc_minsync || 1156 ti->period > sc->sc_maxsync || 1157 ti->offset > 8) { 1158 ti->period = ti->offset = 0; 1159 spc_sched_msgout(sc, SEND_SDTR); 1160 } else { 1161 scsipi_printaddr(acb->xs->xs_periph); 1162 printf("sync, offset %d, " 1163 "period %dnsec\n", 1164 ti->offset, ti->period * 4); 1165 } 1166 spc_setsync(sc, ti); 1167 break; 1168 #endif 1169 1170 #if SPC_USE_WIDE 1171 case MSG_EXT_WDTR: 1172 if (sc->sc_imess[1] != 2) 1173 goto reject; 1174 ti->width = sc->sc_imess[3]; 1175 ti->flags &= ~DO_WIDE; 1176 if (ti->width == 0) { 1177 } else if (ti->width > SPC_MAX_WIDTH) { 1178 ti->width = 0; 1179 spc_sched_msgout(sc, SEND_WDTR); 1180 } else { 1181 scsipi_printaddr(acb->xs->xs_periph); 1182 printf("wide, width %d\n", 1183 1 << (3 + ti->width)); 1184 } 1185 break; 1186 #endif 1187 1188 default: 1189 printf("%s: unrecognized MESSAGE EXTENDED; " 1190 "sending REJECT\n", sc->sc_dev.dv_xname); 1191 SPC_BREAK(); 1192 goto reject; 1193 } 1194 break; 1195 1196 default: 1197 printf("%s: unrecognized MESSAGE; sending REJECT\n", 1198 sc->sc_dev.dv_xname); 1199 SPC_BREAK(); 1200 reject: 1201 spc_sched_msgout(sc, SEND_REJECT); 1202 break; 1203 } 1204 break; 1205 1206 case SPC_RESELECTED: 1207 if (!MSG_ISIDENTIFY(sc->sc_imess[0])) { 1208 printf("%s: reselect without IDENTIFY; " 1209 "sending DEVICE RESET\n", sc->sc_dev.dv_xname); 1210 SPC_BREAK(); 1211 goto reset; 1212 } 1213 1214 (void) spc_reselect(sc, sc->sc_imess[0]); 1215 break; 1216 1217 default: 1218 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n", 1219 sc->sc_dev.dv_xname); 1220 SPC_BREAK(); 1221 reset: 1222 spc_sched_msgout(sc, SEND_DEV_RESET); 1223 break; 1224 1225 #ifdef notdef 1226 abort: 1227 spc_sched_msgout(sc, SEND_ABORT); 1228 break; 1229 #endif 1230 } 1231 1232 #ifndef NO_MANUAL_XFER /* XXX */ 1233 /* Ack the last message byte. */ 1234 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ACK); 1235 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0) 1236 continue; /* XXX needs timeout */ 1237 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK); 1238 #endif 1239 1240 /* Go get the next message, if any. */ 1241 goto nextmsg; 1242 1243 out: 1244 #ifdef NO_MANUAL_XFER /* XXX */ 1245 /* Ack the last message byte. */ 1246 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK); 1247 #endif 1248 SPC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0])); 1249 } 1250 1251 /* 1252 * Send the highest priority, scheduled message. 1253 */ 1254 void 1255 spc_msgout(sc) 1256 struct spc_softc *sc; 1257 { 1258 bus_space_tag_t iot = sc->sc_iot; 1259 bus_space_handle_t ioh = sc->sc_ioh; 1260 #if SPC_USE_SYNCHRONOUS 1261 struct spc_tinfo *ti; 1262 #endif 1263 int n; 1264 1265 SPC_TRACE(("spc_msgout ")); 1266 1267 if (sc->sc_prevphase == PH_MSGOUT) { 1268 if (sc->sc_omp == sc->sc_omess) { 1269 /* 1270 * This is a retransmission. 1271 * 1272 * We get here if the target stayed in MESSAGE OUT 1273 * phase. Section 5.1.9.2 of the SCSI 2 spec indicates 1274 * that all of the previously transmitted messages must 1275 * be sent again, in the same order. Therefore, we 1276 * requeue all the previously transmitted messages, and 1277 * start again from the top. Our simple priority 1278 * scheme keeps the messages in the right order. 1279 */ 1280 SPC_MISC(("retransmitting ")); 1281 sc->sc_msgpriq |= sc->sc_msgoutq; 1282 /* 1283 * Set ATN. If we're just sending a trivial 1-byte 1284 * message, we'll clear ATN later on anyway. 1285 */ 1286 bus_space_write_1(iot, ioh, SCMD, 1287 SCMD_SET_ATN); /* XXX? */ 1288 } else { 1289 /* This is a continuation of the previous message. */ 1290 n = sc->sc_omp - sc->sc_omess; 1291 goto nextbyte; 1292 } 1293 } 1294 1295 /* No messages transmitted so far. */ 1296 sc->sc_msgoutq = 0; 1297 sc->sc_lastmsg = 0; 1298 1299 nextmsg: 1300 /* Pick up highest priority message. */ 1301 sc->sc_currmsg = sc->sc_msgpriq & -sc->sc_msgpriq; 1302 sc->sc_msgpriq &= ~sc->sc_currmsg; 1303 sc->sc_msgoutq |= sc->sc_currmsg; 1304 1305 /* Build the outgoing message data. */ 1306 switch (sc->sc_currmsg) { 1307 case SEND_IDENTIFY: 1308 SPC_ASSERT(sc->sc_nexus != NULL); 1309 sc->sc_omess[0] = 1310 MSG_IDENTIFY(sc->sc_nexus->xs->xs_periph->periph_lun, 1); 1311 n = 1; 1312 break; 1313 1314 #if SPC_USE_SYNCHRONOUS 1315 case SEND_SDTR: 1316 SPC_ASSERT(sc->sc_nexus != NULL); 1317 ti = &sc->sc_tinfo[sc->sc_nexus->xs->xs_periph->periph_target]; 1318 sc->sc_omess[4] = MSG_EXTENDED; 1319 sc->sc_omess[3] = MSG_EXT_SDTR_LEN; 1320 sc->sc_omess[2] = MSG_EXT_SDTR; 1321 sc->sc_omess[1] = ti->period >> 2; 1322 sc->sc_omess[0] = ti->offset; 1323 n = 5; 1324 break; 1325 #endif 1326 1327 #if SPC_USE_WIDE 1328 case SEND_WDTR: 1329 SPC_ASSERT(sc->sc_nexus != NULL); 1330 ti = &sc->sc_tinfo[sc->sc_nexus->xs->xs_periph->periph_target]; 1331 sc->sc_omess[3] = MSG_EXTENDED; 1332 sc->sc_omess[2] = MSG_EXT_WDTR_LEN; 1333 sc->sc_omess[1] = MSG_EXT_WDTR; 1334 sc->sc_omess[0] = ti->width; 1335 n = 4; 1336 break; 1337 #endif 1338 1339 case SEND_DEV_RESET: 1340 sc->sc_flags |= SPC_ABORTING; 1341 sc->sc_omess[0] = MSG_BUS_DEV_RESET; 1342 n = 1; 1343 break; 1344 1345 case SEND_REJECT: 1346 sc->sc_omess[0] = MSG_MESSAGE_REJECT; 1347 n = 1; 1348 break; 1349 1350 case SEND_PARITY_ERROR: 1351 sc->sc_omess[0] = MSG_PARITY_ERROR; 1352 n = 1; 1353 break; 1354 1355 case SEND_INIT_DET_ERR: 1356 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR; 1357 n = 1; 1358 break; 1359 1360 case SEND_ABORT: 1361 sc->sc_flags |= SPC_ABORTING; 1362 sc->sc_omess[0] = MSG_ABORT; 1363 n = 1; 1364 break; 1365 1366 default: 1367 printf("%s: unexpected MESSAGE OUT; sending NOOP\n", 1368 sc->sc_dev.dv_xname); 1369 SPC_BREAK(); 1370 sc->sc_omess[0] = MSG_NOOP; 1371 n = 1; 1372 break; 1373 } 1374 sc->sc_omp = &sc->sc_omess[n]; 1375 1376 nextbyte: 1377 /* Send message bytes. */ 1378 /* send TRANSFER command. */ 1379 bus_space_write_1(iot, ioh, TCH, n >> 16); 1380 bus_space_write_1(iot, ioh, TCM, n >> 8); 1381 bus_space_write_1(iot, ioh, TCL, n); 1382 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB); 1383 #ifdef NEED_DREQ_ON_HARDWARE_XFER 1384 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */ 1385 #else 1386 bus_space_write_1(iot, ioh, SCMD, 1387 SCMD_XFR | SCMD_PROG_XFR); 1388 #endif 1389 for (;;) { 1390 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0) 1391 break; 1392 if (bus_space_read_1(iot, ioh, INTS) != 0) 1393 goto out; 1394 } 1395 for (;;) { 1396 #if 0 1397 for (;;) { 1398 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0) 1399 break; 1400 /* Wait for REQINIT. XXX Need timeout. */ 1401 } 1402 #endif 1403 if (bus_space_read_1(iot, ioh, INTS) != 0) { 1404 /* 1405 * Target left MESSAGE OUT, possibly to reject 1406 * our message. 1407 * 1408 * If this is the last message being sent, then we 1409 * deassert ATN, since either the target is going to 1410 * ignore this message, or it's going to ask for a 1411 * retransmission via MESSAGE PARITY ERROR (in which 1412 * case we reassert ATN anyway). 1413 */ 1414 #if 0 1415 if (sc->sc_msgpriq == 0) 1416 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN); 1417 #endif 1418 goto out; 1419 } 1420 1421 #if 0 1422 /* Clear ATN before last byte if this is the last message. */ 1423 if (n == 1 && sc->sc_msgpriq == 0) 1424 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN); 1425 #endif 1426 1427 while ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_FULL) != 0) 1428 ; 1429 /* Send message byte. */ 1430 bus_space_write_1(iot, ioh, DREG, *--sc->sc_omp); 1431 --n; 1432 /* Keep track of the last message we've sent any bytes of. */ 1433 sc->sc_lastmsg = sc->sc_currmsg; 1434 #if 0 1435 /* Wait for ACK to be negated. XXX Need timeout. */ 1436 while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0) 1437 ; 1438 #endif 1439 1440 if (n == 0) 1441 break; 1442 } 1443 1444 /* We get here only if the entire message has been transmitted. */ 1445 if (sc->sc_msgpriq != 0) { 1446 /* There are more outgoing messages. */ 1447 goto nextmsg; 1448 } 1449 1450 /* 1451 * The last message has been transmitted. We need to remember the last 1452 * message transmitted (in case the target switches to MESSAGE IN phase 1453 * and sends a MESSAGE REJECT), and the list of messages transmitted 1454 * this time around (in case the target stays in MESSAGE OUT phase to 1455 * request a retransmit). 1456 */ 1457 1458 out: 1459 /* Disable REQ/ACK protocol. */ 1460 return; 1461 } 1462 1463 /* 1464 * spc_dataout_pio: perform a data transfer using the FIFO datapath in the spc 1465 * Precondition: The SCSI bus should be in the DOUT phase, with REQ asserted 1466 * and ACK deasserted (i.e. waiting for a data byte) 1467 * 1468 * This new revision has been optimized (I tried) to make the common case fast, 1469 * and the rarer cases (as a result) somewhat more comlex 1470 */ 1471 int 1472 spc_dataout_pio(sc, p, n) 1473 struct spc_softc *sc; 1474 u_char *p; 1475 int n; 1476 { 1477 bus_space_tag_t iot = sc->sc_iot; 1478 bus_space_handle_t ioh = sc->sc_ioh; 1479 u_char intstat = 0; 1480 int out = 0; 1481 #define DOUTAMOUNT 8 /* Full FIFO */ 1482 1483 SPC_TRACE(("spc_dataout_pio ")); 1484 /* send TRANSFER command. */ 1485 bus_space_write_1(iot, ioh, TCH, n >> 16); 1486 bus_space_write_1(iot, ioh, TCM, n >> 8); 1487 bus_space_write_1(iot, ioh, TCL, n); 1488 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB); 1489 #ifdef NEED_DREQ_ON_HARDWARE_XFER 1490 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */ 1491 #else 1492 bus_space_write_1(iot, ioh, SCMD, 1493 SCMD_XFR | SCMD_PROG_XFR); /* XXX */ 1494 #endif 1495 for (;;) { 1496 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0) 1497 break; 1498 if (bus_space_read_1(iot, ioh, INTS) != 0) 1499 break; 1500 } 1501 1502 /* 1503 * I have tried to make the main loop as tight as possible. This 1504 * means that some of the code following the loop is a bit more 1505 * complex than otherwise. 1506 */ 1507 while (n > 0) { 1508 int xfer; 1509 1510 for (;;) { 1511 intstat = bus_space_read_1(iot, ioh, INTS); 1512 /* Wait till buffer is empty. */ 1513 if ((bus_space_read_1(iot, ioh, SSTS) & 1514 SSTS_DREG_EMPTY) != 0) 1515 break; 1516 /* Break on interrupt. */ 1517 if (intstat != 0) 1518 goto phasechange; 1519 } 1520 1521 xfer = min(DOUTAMOUNT, n); 1522 1523 SPC_MISC(("%d> ", xfer)); 1524 1525 n -= xfer; 1526 out += xfer; 1527 1528 bus_space_write_multi_1(iot, ioh, DREG, p, xfer); 1529 p += xfer; 1530 } 1531 1532 if (out == 0) { 1533 for (;;) { 1534 if (bus_space_read_1(iot, ioh, INTS) != 0) 1535 break; 1536 } 1537 SPC_MISC(("extra data ")); 1538 } else { 1539 /* See the bytes off chip */ 1540 for (;;) { 1541 /* Wait till buffer is empty. */ 1542 if ((bus_space_read_1(iot, ioh, SSTS) & 1543 SSTS_DREG_EMPTY) != 0) 1544 break; 1545 intstat = bus_space_read_1(iot, ioh, INTS); 1546 /* Break on interrupt. */ 1547 if (intstat != 0) 1548 goto phasechange; 1549 } 1550 } 1551 1552 phasechange: 1553 /* Stop the FIFO data path. */ 1554 1555 if (intstat != 0) { 1556 /* Some sort of phase change. */ 1557 int amount; 1558 1559 amount = (bus_space_read_1(iot, ioh, TCH) << 16) | 1560 (bus_space_read_1(iot, ioh, TCM) << 8) | 1561 bus_space_read_1(iot, ioh, TCL); 1562 if (amount > 0) { 1563 out -= amount; 1564 SPC_MISC(("+%d ", amount)); 1565 } 1566 } 1567 1568 return out; 1569 } 1570 1571 /* 1572 * spc_datain_pio: perform data transfers using the FIFO datapath in the spc 1573 * Precondition: The SCSI bus should be in the DIN phase, with REQ asserted 1574 * and ACK deasserted (i.e. at least one byte is ready). 1575 * 1576 * For now, uses a pretty dumb algorithm, hangs around until all data has been 1577 * transferred. This, is OK for fast targets, but not so smart for slow 1578 * targets which don't disconnect or for huge transfers. 1579 */ 1580 int 1581 spc_datain_pio(sc, p, n) 1582 struct spc_softc *sc; 1583 u_char *p; 1584 int n; 1585 { 1586 bus_space_tag_t iot = sc->sc_iot; 1587 bus_space_handle_t ioh = sc->sc_ioh; 1588 int in = 0; 1589 u_int8_t intstat, sstat; 1590 #define DINAMOUNT 8 /* Full FIFO */ 1591 1592 SPC_TRACE(("spc_datain_pio ")); 1593 /* send TRANSFER command. */ 1594 bus_space_write_1(iot, ioh, TCH, n >> 16); 1595 bus_space_write_1(iot, ioh, TCM, n >> 8); 1596 bus_space_write_1(iot, ioh, TCL, n); 1597 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB); 1598 #ifdef NEED_DREQ_ON_HARDWARE_XFER 1599 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */ 1600 #else 1601 bus_space_write_1(iot, ioh, SCMD, 1602 SCMD_XFR | SCMD_PROG_XFR); /* XXX */ 1603 #endif 1604 1605 /* 1606 * We leave this loop if one or more of the following is true: 1607 * a) phase != PH_DATAIN && FIFOs are empty 1608 * b) reset has occurred or busfree is detected. 1609 */ 1610 intstat = 0; 1611 while (n > 0) { 1612 sstat = bus_space_read_1(iot, ioh, SSTS); 1613 if ((sstat & SSTS_DREG_FULL) != 0) { 1614 n -= DINAMOUNT; 1615 in += DINAMOUNT; 1616 bus_space_read_multi_1(iot, ioh, DREG, p, DINAMOUNT); 1617 p += DINAMOUNT; 1618 } else if ((sstat & SSTS_DREG_EMPTY) == 0) { 1619 n--; 1620 in++; 1621 *p++ = bus_space_read_1(iot, ioh, DREG); 1622 } else { 1623 if (intstat != 0) 1624 goto phasechange; 1625 intstat = bus_space_read_1(iot, ioh, INTS); 1626 } 1627 } 1628 1629 /* 1630 * Some SCSI-devices are rude enough to transfer more data than what 1631 * was requested, e.g. 2048 bytes from a CD-ROM instead of the 1632 * requested 512. Test for progress, i.e. real transfers. If no real 1633 * transfers have been performed (n is probably already zero) and the 1634 * FIFO is not empty, waste some bytes.... 1635 */ 1636 if (in == 0) { 1637 for (;;) { 1638 sstat = bus_space_read_1(iot, ioh, SSTS); 1639 if ((sstat & SSTS_DREG_EMPTY) == 0) { 1640 (void) bus_space_read_1(iot, ioh, DREG); 1641 } else { 1642 if (intstat != 0) 1643 goto phasechange; 1644 intstat = bus_space_read_1(iot, ioh, INTS); 1645 } 1646 } 1647 SPC_MISC(("extra data ")); 1648 } 1649 1650 phasechange: 1651 /* Stop the FIFO data path. */ 1652 1653 return in; 1654 } 1655 1656 /* 1657 * Catch an interrupt from the adaptor 1658 */ 1659 /* 1660 * This is the workhorse routine of the driver. 1661 * Deficiencies (for now): 1662 * 1) always uses programmed I/O 1663 */ 1664 int 1665 spc_intr(arg) 1666 void *arg; 1667 { 1668 struct spc_softc *sc = arg; 1669 bus_space_tag_t iot = sc->sc_iot; 1670 bus_space_handle_t ioh = sc->sc_ioh; 1671 u_char ints; 1672 struct spc_acb *acb; 1673 struct scsipi_periph *periph; 1674 struct spc_tinfo *ti; 1675 int n; 1676 1677 /* 1678 * Disable interrupt. 1679 */ 1680 bus_space_write_1(iot, ioh, SCTL, 1681 bus_space_read_1(iot, ioh, SCTL) & ~SCTL_INTR_ENAB); 1682 1683 SPC_TRACE(("spc_intr ")); 1684 1685 ints = bus_space_read_1(iot, ioh, INTS); 1686 if (ints == 0) 1687 goto out; 1688 1689 if (sc->sc_dma_done != NULL && 1690 sc->sc_state == SPC_CONNECTED && 1691 (sc->sc_flags & SPC_DOINGDMA) != 0 && 1692 (sc->sc_phase == PH_DATAOUT || sc->sc_phase == PH_DATAIN)) { 1693 (*sc->sc_dma_done)(sc); 1694 } 1695 1696 loop: 1697 /* 1698 * Loop until transfer completion. 1699 */ 1700 /* 1701 * First check for abnormal conditions, such as reset. 1702 */ 1703 ints = bus_space_read_1(iot, ioh, INTS); 1704 SPC_MISC(("ints = 0x%x ", ints)); 1705 1706 if ((ints & INTS_RST) != 0) { 1707 printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname); 1708 goto reset; 1709 } 1710 1711 /* 1712 * Check for less serious errors. 1713 */ 1714 if ((bus_space_read_1(iot, ioh, SERR) & (SERR_SCSI_PAR|SERR_SPC_PAR)) 1715 != 0) { 1716 printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname); 1717 if (sc->sc_prevphase == PH_MSGIN) { 1718 sc->sc_flags |= SPC_DROP_MSGIN; 1719 spc_sched_msgout(sc, SEND_PARITY_ERROR); 1720 } else 1721 spc_sched_msgout(sc, SEND_INIT_DET_ERR); 1722 } 1723 1724 /* 1725 * If we're not already busy doing something test for the following 1726 * conditions: 1727 * 1) We have been reselected by something 1728 * 2) We have selected something successfully 1729 * 3) Our selection process has timed out 1730 * 4) This is really a bus free interrupt just to get a new command 1731 * going? 1732 * 5) Spurious interrupt? 1733 */ 1734 switch (sc->sc_state) { 1735 case SPC_IDLE: 1736 case SPC_SELECTING: 1737 SPC_MISC(("ints:0x%02x ", ints)); 1738 1739 if ((ints & INTS_SEL) != 0) { 1740 /* 1741 * We don't currently support target mode. 1742 */ 1743 printf("%s: target mode selected; going to BUS FREE\n", 1744 sc->sc_dev.dv_xname); 1745 1746 goto sched; 1747 } else if ((ints & INTS_RESEL) != 0) { 1748 SPC_MISC(("reselected ")); 1749 1750 /* 1751 * If we're trying to select a target ourselves, 1752 * push our command back into the ready list. 1753 */ 1754 if (sc->sc_state == SPC_SELECTING) { 1755 SPC_MISC(("backoff selector ")); 1756 SPC_ASSERT(sc->sc_nexus != NULL); 1757 acb = sc->sc_nexus; 1758 sc->sc_nexus = NULL; 1759 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain); 1760 } 1761 1762 /* Save reselection ID. */ 1763 sc->sc_selid = bus_space_read_1(iot, ioh, TEMP); 1764 1765 sc->sc_state = SPC_RESELECTED; 1766 } else if ((ints & INTS_CMD_DONE) != 0) { 1767 SPC_MISC(("selected ")); 1768 1769 /* 1770 * We have selected a target. Things to do: 1771 * a) Determine what message(s) to send. 1772 * b) Verify that we're still selecting the target. 1773 * c) Mark device as busy. 1774 */ 1775 if (sc->sc_state != SPC_SELECTING) { 1776 printf("%s: selection out while idle; " 1777 "resetting\n", sc->sc_dev.dv_xname); 1778 SPC_BREAK(); 1779 goto reset; 1780 } 1781 SPC_ASSERT(sc->sc_nexus != NULL); 1782 acb = sc->sc_nexus; 1783 periph = acb->xs->xs_periph; 1784 ti = &sc->sc_tinfo[periph->periph_target]; 1785 1786 sc->sc_msgpriq = SEND_IDENTIFY; 1787 if (acb->flags & ACB_RESET) 1788 sc->sc_msgpriq |= SEND_DEV_RESET; 1789 else if (acb->flags & ACB_ABORT) 1790 sc->sc_msgpriq |= SEND_ABORT; 1791 else { 1792 #if SPC_USE_SYNCHRONOUS 1793 if ((ti->flags & DO_SYNC) != 0) 1794 sc->sc_msgpriq |= SEND_SDTR; 1795 #endif 1796 #if SPC_USE_WIDE 1797 if ((ti->flags & DO_WIDE) != 0) 1798 sc->sc_msgpriq |= SEND_WDTR; 1799 #endif 1800 } 1801 1802 acb->flags |= ACB_NEXUS; 1803 ti->lubusy |= (1 << periph->periph_lun); 1804 1805 /* Do an implicit RESTORE POINTERS. */ 1806 sc->sc_dp = acb->data_addr; 1807 sc->sc_dleft = acb->data_length; 1808 sc->sc_cp = (u_char *)&acb->scsipi_cmd; 1809 sc->sc_cleft = acb->scsipi_cmd_length; 1810 1811 /* On our first connection, schedule a timeout. */ 1812 if ((acb->xs->xs_control & XS_CTL_POLL) == 0) 1813 callout_reset(&acb->xs->xs_callout, 1814 mstohz(acb->timeout), spc_timeout, acb); 1815 1816 sc->sc_state = SPC_CONNECTED; 1817 } else if ((ints & INTS_TIMEOUT) != 0) { 1818 SPC_MISC(("selection timeout ")); 1819 1820 if (sc->sc_state != SPC_SELECTING) { 1821 printf("%s: selection timeout while idle; " 1822 "resetting\n", sc->sc_dev.dv_xname); 1823 SPC_BREAK(); 1824 goto reset; 1825 } 1826 SPC_ASSERT(sc->sc_nexus != NULL); 1827 acb = sc->sc_nexus; 1828 1829 delay(250); 1830 1831 acb->xs->error = XS_SELTIMEOUT; 1832 goto finish; 1833 } else { 1834 if (sc->sc_state != SPC_IDLE) { 1835 printf("%s: BUS FREE while not idle; " 1836 "state=%d\n", 1837 sc->sc_dev.dv_xname, sc->sc_state); 1838 SPC_BREAK(); 1839 goto out; 1840 } 1841 1842 goto sched; 1843 } 1844 1845 /* 1846 * Turn off selection stuff, and prepare to catch bus free 1847 * interrupts, parity errors, and phase changes. 1848 */ 1849 1850 sc->sc_flags = 0; 1851 sc->sc_prevphase = PH_INVALID; 1852 goto dophase; 1853 } 1854 1855 if ((ints & INTS_DISCON) != 0) { 1856 /* We've gone to BUS FREE phase. */ 1857 /* disable disconnect interrupt */ 1858 bus_space_write_1(iot, ioh, PCTL, 1859 bus_space_read_1(iot, ioh, PCTL) & ~PCTL_BFINT_ENAB); 1860 /* XXX reset interrput */ 1861 bus_space_write_1(iot, ioh, INTS, ints); 1862 1863 switch (sc->sc_state) { 1864 case SPC_RESELECTED: 1865 goto sched; 1866 1867 case SPC_CONNECTED: 1868 SPC_ASSERT(sc->sc_nexus != NULL); 1869 acb = sc->sc_nexus; 1870 1871 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE 1872 if (sc->sc_prevphase == PH_MSGOUT) { 1873 /* 1874 * If the target went to BUS FREE phase during 1875 * or immediately after sending a SDTR or WDTR 1876 * message, disable negotiation. 1877 */ 1878 periph = acb->xs->xs_periph; 1879 ti = &sc->sc_tinfo[periph->periph_target]; 1880 switch (sc->sc_lastmsg) { 1881 #if SPC_USE_SYNCHRONOUS 1882 case SEND_SDTR: 1883 ti->flags &= ~DO_SYNC; 1884 ti->period = ti->offset = 0; 1885 break; 1886 #endif 1887 #if SPC_USE_WIDE 1888 case SEND_WDTR: 1889 ti->flags &= ~DO_WIDE; 1890 ti->width = 0; 1891 break; 1892 #endif 1893 } 1894 } 1895 #endif 1896 1897 if ((sc->sc_flags & SPC_ABORTING) == 0) { 1898 /* 1899 * Section 5.1.1 of the SCSI 2 spec suggests 1900 * issuing a REQUEST SENSE following an 1901 * unexpected disconnect. Some devices go into 1902 * a contingent allegiance condition when 1903 * disconnecting, and this is necessary to 1904 * clean up their state. 1905 */ 1906 printf("%s: unexpected disconnect; " 1907 "sending REQUEST SENSE\n", 1908 sc->sc_dev.dv_xname); 1909 SPC_BREAK(); 1910 acb->target_stat = SCSI_CHECK; 1911 acb->xs->error = XS_NOERROR; 1912 goto finish; 1913 } 1914 1915 acb->xs->error = XS_DRIVER_STUFFUP; 1916 goto finish; 1917 1918 case SPC_DISCONNECT: 1919 SPC_ASSERT(sc->sc_nexus != NULL); 1920 acb = sc->sc_nexus; 1921 TAILQ_INSERT_HEAD(&sc->nexus_list, acb, chain); 1922 sc->sc_nexus = NULL; 1923 goto sched; 1924 1925 case SPC_CMDCOMPLETE: 1926 SPC_ASSERT(sc->sc_nexus != NULL); 1927 acb = sc->sc_nexus; 1928 goto finish; 1929 } 1930 } 1931 else if ((ints & INTS_CMD_DONE) != 0 && 1932 sc->sc_prevphase == PH_MSGIN && 1933 sc->sc_state != SPC_CONNECTED) 1934 goto out; 1935 1936 dophase: 1937 #if 0 1938 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) { 1939 /* Wait for REQINIT. */ 1940 goto out; 1941 } 1942 #else 1943 bus_space_write_1(iot, ioh, INTS, ints); 1944 ints = 0; 1945 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) 1946 delay(1); /* need timeout XXX */ 1947 #endif 1948 1949 /* 1950 * State transition. 1951 */ 1952 sc->sc_phase = bus_space_read_1(iot, ioh, PSNS) & PH_MASK; 1953 #if 0 1954 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase); 1955 #endif 1956 1957 SPC_MISC(("phase=%d\n", sc->sc_phase)); 1958 switch (sc->sc_phase) { 1959 case PH_MSGOUT: 1960 if (sc->sc_state != SPC_CONNECTED && 1961 sc->sc_state != SPC_RESELECTED) 1962 break; 1963 spc_msgout(sc); 1964 sc->sc_prevphase = PH_MSGOUT; 1965 goto loop; 1966 1967 case PH_MSGIN: 1968 if (sc->sc_state != SPC_CONNECTED && 1969 sc->sc_state != SPC_RESELECTED) 1970 break; 1971 spc_msgin(sc); 1972 sc->sc_prevphase = PH_MSGIN; 1973 goto loop; 1974 1975 case PH_CMD: 1976 if (sc->sc_state != SPC_CONNECTED) 1977 break; 1978 #if SPC_DEBUG 1979 if ((spc_debug & SPC_SHOWMISC) != 0) { 1980 SPC_ASSERT(sc->sc_nexus != NULL); 1981 acb = sc->sc_nexus; 1982 printf("cmd=0x%02x+%d ", 1983 acb->scsipi_cmd.opcode, acb->scsipi_cmd_length - 1); 1984 } 1985 #endif 1986 n = spc_dataout_pio(sc, sc->sc_cp, sc->sc_cleft); 1987 sc->sc_cp += n; 1988 sc->sc_cleft -= n; 1989 sc->sc_prevphase = PH_CMD; 1990 goto loop; 1991 1992 case PH_DATAOUT: 1993 if (sc->sc_state != SPC_CONNECTED) 1994 break; 1995 SPC_MISC(("dataout dleft=%d ", sc->sc_dleft)); 1996 if (sc->sc_dma_start != NULL && 1997 sc->sc_dleft > SPC_MIN_DMA_LEN) { 1998 (*sc->sc_dma_start)(sc, sc->sc_dp, sc->sc_dleft, 0); 1999 sc->sc_prevphase = PH_DATAOUT; 2000 goto out; 2001 } 2002 n = spc_dataout_pio(sc, sc->sc_dp, sc->sc_dleft); 2003 sc->sc_dp += n; 2004 sc->sc_dleft -= n; 2005 sc->sc_prevphase = PH_DATAOUT; 2006 goto loop; 2007 2008 case PH_DATAIN: 2009 if (sc->sc_state != SPC_CONNECTED) 2010 break; 2011 SPC_MISC(("datain ")); 2012 if (sc->sc_dma_start != NULL && 2013 sc->sc_dleft > SPC_MIN_DMA_LEN) { 2014 (*sc->sc_dma_start)(sc, sc->sc_dp, sc->sc_dleft, 1); 2015 sc->sc_prevphase = PH_DATAIN; 2016 goto out; 2017 } 2018 n = spc_datain_pio(sc, sc->sc_dp, sc->sc_dleft); 2019 sc->sc_dp += n; 2020 sc->sc_dleft -= n; 2021 sc->sc_prevphase = PH_DATAIN; 2022 goto loop; 2023 2024 case PH_STAT: 2025 if (sc->sc_state != SPC_CONNECTED) 2026 break; 2027 SPC_ASSERT(sc->sc_nexus != NULL); 2028 acb = sc->sc_nexus; 2029 2030 #ifdef NO_MANUAL_XFER 2031 spc_datain_pio(sc, &acb->target_stat, 1); 2032 #else 2033 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_ATN) != 0) 2034 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN); 2035 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) 2036 continue; /* XXX needs timeout */ 2037 bus_space_write_1(iot, ioh, PCTL, PH_STAT); 2038 acb->target_stat = bus_space_read_1(iot, ioh, TEMP); 2039 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ACK); 2040 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0) 2041 continue; /* XXX needs timeout */ 2042 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK); 2043 #endif 2044 2045 SPC_MISC(("target_stat=0x%02x ", acb->target_stat)); 2046 sc->sc_prevphase = PH_STAT; 2047 goto loop; 2048 } 2049 2050 printf("%s: unexpected bus phase; resetting\n", sc->sc_dev.dv_xname); 2051 SPC_BREAK(); 2052 reset: 2053 spc_init(sc, 1); 2054 return 1; 2055 2056 finish: 2057 callout_stop(&acb->xs->xs_callout); 2058 bus_space_write_1(iot, ioh, INTS, ints); 2059 ints = 0; 2060 spc_done(sc, acb); 2061 goto out; 2062 2063 sched: 2064 sc->sc_state = SPC_IDLE; 2065 spc_sched(sc); 2066 goto out; 2067 2068 out: 2069 if (ints) 2070 bus_space_write_1(iot, ioh, INTS, ints); 2071 bus_space_write_1(iot, ioh, SCTL, 2072 bus_space_read_1(iot, ioh, SCTL) | SCTL_INTR_ENAB); 2073 return 1; 2074 } 2075 2076 void 2077 spc_abort(sc, acb) 2078 struct spc_softc *sc; 2079 struct spc_acb *acb; 2080 { 2081 2082 /* 2 secs for the abort */ 2083 acb->timeout = SPC_ABORT_TIMEOUT; 2084 acb->flags |= ACB_ABORT; 2085 2086 if (acb == sc->sc_nexus) { 2087 /* 2088 * If we're still selecting, the message will be scheduled 2089 * after selection is complete. 2090 */ 2091 if (sc->sc_state == SPC_CONNECTED) 2092 spc_sched_msgout(sc, SEND_ABORT); 2093 } else { 2094 spc_dequeue(sc, acb); 2095 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain); 2096 if (sc->sc_state == SPC_IDLE) 2097 spc_sched(sc); 2098 } 2099 } 2100 2101 void 2102 spc_timeout(arg) 2103 void *arg; 2104 { 2105 struct spc_acb *acb = arg; 2106 struct scsipi_xfer *xs = acb->xs; 2107 struct scsipi_periph *periph = xs->xs_periph; 2108 struct spc_softc *sc; 2109 int s; 2110 2111 sc = (void *)periph->periph_channel->chan_adapter->adapt_dev; 2112 scsipi_printaddr(periph); 2113 printf("timed out"); 2114 2115 s = splbio(); 2116 2117 if (acb->flags & ACB_ABORT) { 2118 /* abort timed out */ 2119 printf(" AGAIN\n"); 2120 /* XXX Must reset! */ 2121 } else { 2122 /* abort the operation that has timed out */ 2123 printf("\n"); 2124 acb->xs->error = XS_TIMEOUT; 2125 spc_abort(sc, acb); 2126 } 2127 2128 splx(s); 2129 } 2130 2131 #ifdef SPC_DEBUG 2132 /* 2133 * The following functions are mostly used for debugging purposes, either 2134 * directly called from the driver or from the kernel debugger. 2135 */ 2136 2137 void 2138 spc_show_scsi_cmd(acb) 2139 struct spc_acb *acb; 2140 { 2141 u_char *b = (u_char *)&acb->scsipi_cmd; 2142 int i; 2143 2144 scsipi_printaddr(acb->xs->xs_periph); 2145 if ((acb->xs->xs_control & XS_CTL_RESET) == 0) { 2146 for (i = 0; i < acb->scsipi_cmd_length; i++) { 2147 if (i) 2148 printf(","); 2149 printf("%x", b[i]); 2150 } 2151 printf("\n"); 2152 } else 2153 printf("RESET\n"); 2154 } 2155 2156 void 2157 spc_print_acb(acb) 2158 struct spc_acb *acb; 2159 { 2160 2161 printf("acb@%p xs=%p flags=%x", acb, acb->xs, acb->flags); 2162 printf(" dp=%p dleft=%d target_stat=%x\n", 2163 acb->data_addr, acb->data_length, acb->target_stat); 2164 spc_show_scsi_cmd(acb); 2165 } 2166 2167 void 2168 spc_print_active_acb() 2169 { 2170 struct spc_acb *acb; 2171 struct spc_softc *sc = spc_cd.cd_devs[0]; /* XXX */ 2172 2173 printf("ready list:\n"); 2174 TAILQ_FOREACH(acb, &sc->ready_list, chain) 2175 spc_print_acb(acb); 2176 printf("nexus:\n"); 2177 if (sc->sc_nexus != NULL) 2178 spc_print_acb(sc->sc_nexus); 2179 printf("nexus list:\n"); 2180 TAILQ_FOREACH(acb, &sc->nexus_list, chain) 2181 spc_print_acb(acb); 2182 } 2183 2184 void 2185 spc_dump89352(sc) 2186 struct spc_softc *sc; 2187 { 2188 bus_space_tag_t iot = sc->sc_iot; 2189 bus_space_handle_t ioh = sc->sc_ioh; 2190 2191 printf("mb89352: BDID=%x SCTL=%x SCMD=%x TMOD=%x\n", 2192 bus_space_read_1(iot, ioh, BDID), 2193 bus_space_read_1(iot, ioh, SCTL), 2194 bus_space_read_1(iot, ioh, SCMD), 2195 bus_space_read_1(iot, ioh, TMOD)); 2196 printf(" INTS=%x PSNS=%x SSTS=%x SERR=%x PCTL=%x\n", 2197 bus_space_read_1(iot, ioh, INTS), 2198 bus_space_read_1(iot, ioh, PSNS), 2199 bus_space_read_1(iot, ioh, SSTS), 2200 bus_space_read_1(iot, ioh, SERR), 2201 bus_space_read_1(iot, ioh, PCTL)); 2202 printf(" MBC=%x DREG=%x TEMP=%x TCH=%x TCM=%x\n", 2203 bus_space_read_1(iot, ioh, MBC), 2204 #if 0 2205 bus_space_read_1(iot, ioh, DREG), 2206 #else 2207 0, 2208 #endif 2209 bus_space_read_1(iot, ioh, TEMP), 2210 bus_space_read_1(iot, ioh, TCH), 2211 bus_space_read_1(iot, ioh, TCM)); 2212 printf(" TCL=%x EXBF=%x\n", 2213 bus_space_read_1(iot, ioh, TCL), 2214 bus_space_read_1(iot, ioh, EXBF)); 2215 } 2216 2217 void 2218 spc_dump_driver(sc) 2219 struct spc_softc *sc; 2220 { 2221 struct spc_tinfo *ti; 2222 int i; 2223 2224 printf("nexus=%p prevphase=%x\n", sc->sc_nexus, sc->sc_prevphase); 2225 printf("state=%x msgin=%x msgpriq=%x msgoutq=%x lastmsg=%x " 2226 "currmsg=%x\n", sc->sc_state, sc->sc_imess[0], 2227 sc->sc_msgpriq, sc->sc_msgoutq, sc->sc_lastmsg, sc->sc_currmsg); 2228 for (i = 0; i < 7; i++) { 2229 ti = &sc->sc_tinfo[i]; 2230 printf("tinfo%d: %d cmds %d disconnects %d timeouts", 2231 i, ti->cmds, ti->dconns, ti->touts); 2232 printf(" %d senses flags=%x\n", ti->senses, ti->flags); 2233 } 2234 } 2235 #endif 2236