1 /* $NetBSD: mb89352.c,v 1.47 2008/03/31 15:20:47 tsutsui Exp $ */ 2 /* NecBSD: mb89352.c,v 1.4 1998/03/14 07:31:20 kmatsuda Exp */ 3 4 /*- 5 * Copyright (c) 1996,97,98,99,2004 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Charles M. Hannum, Masaru Oki and Kouichi Matsuda. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Charles M. Hannum. 22 * 4. The name of the author may not be used to endorse or promote products 23 * derived from this software without specific prior written permission. 24 * 25 * Copyright (c) 1994 Jarle Greipsland 26 * All rights reserved. 27 * 28 * Redistribution and use in source and binary forms, with or without 29 * modification, are permitted provided that the following conditions 30 * are met: 31 * 1. Redistributions of source code must retain the above copyright 32 * notice, this list of conditions and the following disclaimer. 33 * 2. Redistributions in binary form must reproduce the above copyright 34 * notice, this list of conditions and the following disclaimer in the 35 * documentation and/or other materials provided with the distribution. 36 * 3. The name of the author may not be used to endorse or promote products 37 * derived from this software without specific prior written permission. 38 * 39 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 40 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 41 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 42 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 43 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 44 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 45 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 46 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 47 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 48 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 49 * POSSIBILITY OF SUCH DAMAGE. 50 */ 51 /* 52 * [NetBSD for NEC PC-98 series] 53 * Copyright (c) 1996, 1997, 1998 54 * NetBSD/pc98 porting staff. All rights reserved. 55 * Copyright (c) 1996, 1997, 1998 56 * Kouichi Matsuda. All rights reserved. 57 */ 58 59 /* 60 * Acknowledgements: Many of the algorithms used in this driver are 61 * inspired by the work of Julian Elischer (julian@tfs.com) and 62 * Charles Hannum (mycroft@duality.gnu.ai.mit.edu). Thanks a million! 63 */ 64 65 /* TODO list: 66 * 1) Get the DMA stuff working. 67 * 2) Get the iov/uio stuff working. Is this a good thing ??? 68 * 3) Get the synch stuff working. 69 * 4) Rewrite it to use malloc for the acb structs instead of static alloc.? 70 */ 71 72 #include <sys/cdefs.h> 73 __KERNEL_RCSID(0, "$NetBSD: mb89352.c,v 1.47 2008/03/31 15:20:47 tsutsui Exp $"); 74 75 #ifdef DDB 76 #define integrate 77 #else 78 #define integrate inline static 79 #endif 80 81 /* 82 * A few customizable items: 83 */ 84 85 /* Synchronous data transfers? */ 86 #define SPC_USE_SYNCHRONOUS 0 87 #define SPC_SYNC_REQ_ACK_OFS 8 88 89 /* Wide data transfers? */ 90 #define SPC_USE_WIDE 0 91 #define SPC_MAX_WIDTH 0 92 93 /* Max attempts made to transmit a message */ 94 #define SPC_MSG_MAX_ATTEMPT 3 /* Not used now XXX */ 95 96 /* 97 * Some spin loop parameters (essentially how long to wait some places) 98 * The problem(?) is that sometimes we expect either to be able to transmit a 99 * byte or to get a new one from the SCSI bus pretty soon. In order to avoid 100 * returning from the interrupt just to get yanked back for the next byte we 101 * may spin in the interrupt routine waiting for this byte to come. How long? 102 * This is really (SCSI) device and processor dependent. Tuneable, I guess. 103 */ 104 #define SPC_MSGIN_SPIN 1 /* Will spinwait upto ?ms for a new msg byte */ 105 #define SPC_MSGOUT_SPIN 1 106 107 /* 108 * Include debug functions? At the end of this file there are a bunch of 109 * functions that will print out various information regarding queued SCSI 110 * commands, driver state and chip contents. You can call them from the 111 * kernel debugger. If you set SPC_DEBUG to 0 they are not included (the 112 * kernel uses less memory) but you lose the debugging facilities. 113 */ 114 #if 0 115 #define SPC_DEBUG 1 116 #endif 117 118 #define SPC_ABORT_TIMEOUT 2000 /* time to wait for abort */ 119 120 /* threshold length for DMA transfer */ 121 #define SPC_MIN_DMA_LEN 32 122 123 #ifdef x68k /* XXX it seems x68k SPC SCSI hardware has some quirks */ 124 #define NEED_DREQ_ON_HARDWARE_XFER 125 #define NO_MANUAL_XFER 126 #endif 127 128 /* End of customizable parameters */ 129 130 /* 131 * MB89352 SCSI Protocol Controller (SPC) routines. 132 */ 133 134 #include "opt_ddb.h" 135 136 #include <sys/param.h> 137 #include <sys/systm.h> 138 #include <sys/kernel.h> 139 #include <sys/errno.h> 140 #include <sys/ioctl.h> 141 #include <sys/device.h> 142 #include <sys/buf.h> 143 #include <sys/proc.h> 144 #include <sys/user.h> 145 #include <sys/queue.h> 146 147 #include <sys/intr.h> 148 #include <sys/bus.h> 149 150 #include <dev/scsipi/scsi_all.h> 151 #include <dev/scsipi/scsipi_all.h> 152 #include <dev/scsipi/scsi_message.h> 153 #include <dev/scsipi/scsiconf.h> 154 155 #include <dev/ic/mb89352reg.h> 156 #include <dev/ic/mb89352var.h> 157 158 #ifndef DDB 159 #define Debugger() panic("should call debugger here (mb89352.c)") 160 #endif /* ! DDB */ 161 162 #if SPC_DEBUG 163 int spc_debug = 0x00; /* SPC_SHOWSTART|SPC_SHOWMISC|SPC_SHOWTRACE; */ 164 #endif 165 166 void spc_done(struct spc_softc *, struct spc_acb *); 167 void spc_dequeue(struct spc_softc *, struct spc_acb *); 168 void spc_scsipi_request(struct scsipi_channel *, scsipi_adapter_req_t, 169 void *); 170 int spc_poll(struct spc_softc *, struct scsipi_xfer *, int); 171 integrate void spc_sched_msgout(struct spc_softc *, uint8_t); 172 integrate void spc_setsync(struct spc_softc *, struct spc_tinfo *); 173 void spc_select(struct spc_softc *, struct spc_acb *); 174 void spc_timeout(void *); 175 void spc_scsi_reset(struct spc_softc *); 176 void spc_reset(struct spc_softc *); 177 void spc_free_acb(struct spc_softc *, struct spc_acb *, int); 178 struct spc_acb* spc_get_acb(struct spc_softc *); 179 int spc_reselect(struct spc_softc *, int); 180 void spc_msgin(struct spc_softc *); 181 void spc_abort(struct spc_softc *, struct spc_acb *); 182 void spc_msgout(struct spc_softc *); 183 int spc_dataout_pio(struct spc_softc *, uint8_t *, int); 184 int spc_datain_pio(struct spc_softc *, uint8_t *, int); 185 #if SPC_DEBUG 186 void spc_print_acb(struct spc_acb *); 187 void spc_dump_driver(struct spc_softc *); 188 void spc_dump89352(struct spc_softc *); 189 void spc_show_scsi_cmd(struct spc_acb *); 190 void spc_print_active_acb(void); 191 #endif 192 193 extern struct cfdriver spc_cd; 194 195 /* 196 * INITIALIZATION ROUTINES (probe, attach ++) 197 */ 198 199 /* 200 * Do the real search-for-device. 201 * Prerequisite: sc->sc_iobase should be set to the proper value 202 */ 203 int 204 spc_find(bus_space_tag_t iot, bus_space_handle_t ioh, int bdid) 205 { 206 long timeout = SPC_ABORT_TIMEOUT; 207 208 SPC_TRACE(("spc: probing for spc-chip\n")); 209 /* 210 * Disable interrupts then reset the FUJITSU chip. 211 */ 212 bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST); 213 bus_space_write_1(iot, ioh, SCMD, 0); 214 bus_space_write_1(iot, ioh, PCTL, 0); 215 bus_space_write_1(iot, ioh, TEMP, 0); 216 bus_space_write_1(iot, ioh, TCH, 0); 217 bus_space_write_1(iot, ioh, TCM, 0); 218 bus_space_write_1(iot, ioh, TCL, 0); 219 bus_space_write_1(iot, ioh, INTS, 0); 220 bus_space_write_1(iot, ioh, SCTL, 221 SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB); 222 bus_space_write_1(iot, ioh, BDID, bdid); 223 delay(400); 224 bus_space_write_1(iot, ioh, SCTL, 225 bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE); 226 227 /* The following detection is derived from spc.c 228 * (by Takahide Matsutsuka) in FreeBSD/pccard-test. 229 */ 230 while (bus_space_read_1(iot, ioh, PSNS) && timeout) { 231 timeout--; 232 DELAY(1); 233 } 234 if (timeout == 0) { 235 printf("spc: find failed\n"); 236 return 0; 237 } 238 239 SPC_START(("SPC found")); 240 return 1; 241 } 242 243 void 244 spc_attach(struct spc_softc *sc) 245 { 246 struct scsipi_adapter *adapt = &sc->sc_adapter; 247 struct scsipi_channel *chan = &sc->sc_channel; 248 249 SPC_TRACE(("spc_attach ")); 250 sc->sc_state = SPC_INIT; 251 252 sc->sc_freq = 20; /* XXXX Assume 20 MHz. */ 253 254 #if SPC_USE_SYNCHRONOUS 255 /* 256 * These are the bounds of the sync period, based on the frequency of 257 * the chip's clock input and the size and offset of the sync period 258 * register. 259 * 260 * For a 20MHz clock, this gives us 25, or 100ns, or 10MB/s, as a 261 * maximum transfer rate, and 112.5, or 450ns, or 2.22MB/s, as a 262 * minimum transfer rate. 263 */ 264 sc->sc_minsync = (2 * 250) / sc->sc_freq; 265 sc->sc_maxsync = (9 * 250) / sc->sc_freq; 266 #endif 267 268 /* 269 * Fill in the adapter. 270 */ 271 adapt->adapt_dev = sc->sc_dev; 272 adapt->adapt_nchannels = 1; 273 adapt->adapt_openings = 7; 274 adapt->adapt_max_periph = 1; 275 adapt->adapt_request = spc_scsipi_request; 276 adapt->adapt_minphys = minphys; 277 278 chan->chan_adapter = &sc->sc_adapter; 279 chan->chan_bustype = &scsi_bustype; 280 chan->chan_channel = 0; 281 chan->chan_ntargets = 8; 282 chan->chan_nluns = 8; 283 chan->chan_id = sc->sc_initiator; 284 285 /* 286 * Add reference to adapter so that we drop the reference after 287 * config_found() to make sure the adatper is disabled. 288 */ 289 if (scsipi_adapter_addref(adapt) != 0) { 290 aprint_error_dev(sc->sc_dev, "unable to enable controller\n"); 291 return; 292 } 293 294 spc_init(sc, 1); /* Init chip and driver */ 295 296 /* 297 * ask the adapter what subunits are present 298 */ 299 sc->sc_child = config_found(sc->sc_dev, chan, scsiprint); 300 scsipi_adapter_delref(adapt); 301 } 302 303 int 304 spc_activate(device_t self, enum devact act) 305 { 306 struct spc_softc *sc = device_private(self); 307 int s, rv = 0; 308 309 s = splhigh(); 310 switch (act) { 311 case DVACT_ACTIVATE: 312 rv = EOPNOTSUPP; 313 break; 314 315 case DVACT_DEACTIVATE: 316 if (sc->sc_child != NULL) 317 rv = config_deactivate(sc->sc_child); 318 break; 319 } 320 splx(s); 321 322 return (rv); 323 } 324 325 int 326 spc_detach(device_t self, int flags) 327 { 328 struct spc_softc *sc = device_private(self); 329 int rv = 0; 330 331 if (sc->sc_child != NULL) 332 rv = config_detach(sc->sc_child, flags); 333 334 return (rv); 335 } 336 337 /* 338 * Initialize MB89352 chip itself 339 * The following conditions should hold: 340 * spc_isa_probe should have succeeded, i.e. the iobase address in spc_softc 341 * must be valid. 342 */ 343 void 344 spc_reset(struct spc_softc *sc) 345 { 346 bus_space_tag_t iot = sc->sc_iot; 347 bus_space_handle_t ioh = sc->sc_ioh; 348 349 SPC_TRACE(("spc_reset ")); 350 /* 351 * Disable interrupts then reset the FUJITSU chip. 352 */ 353 bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST); 354 bus_space_write_1(iot, ioh, SCMD, 0); 355 bus_space_write_1(iot, ioh, TMOD, 0); 356 bus_space_write_1(iot, ioh, PCTL, 0); 357 bus_space_write_1(iot, ioh, TEMP, 0); 358 bus_space_write_1(iot, ioh, TCH, 0); 359 bus_space_write_1(iot, ioh, TCM, 0); 360 bus_space_write_1(iot, ioh, TCL, 0); 361 bus_space_write_1(iot, ioh, INTS, 0); 362 bus_space_write_1(iot, ioh, SCTL, 363 SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB); 364 bus_space_write_1(iot, ioh, BDID, sc->sc_initiator); 365 delay(400); 366 bus_space_write_1(iot, ioh, SCTL, 367 bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE); 368 } 369 370 371 /* 372 * Pull the SCSI RST line for 500us. 373 */ 374 void 375 spc_scsi_reset(struct spc_softc *sc) 376 { 377 bus_space_tag_t iot = sc->sc_iot; 378 bus_space_handle_t ioh = sc->sc_ioh; 379 380 SPC_TRACE(("spc_scsi_reset ")); 381 bus_space_write_1(iot, ioh, SCMD, 382 bus_space_read_1(iot, ioh, SCMD) | SCMD_RST); 383 delay(500); 384 bus_space_write_1(iot, ioh, SCMD, 385 bus_space_read_1(iot, ioh, SCMD) & ~SCMD_RST); 386 delay(50); 387 } 388 389 /* 390 * Initialize spc SCSI driver. 391 */ 392 void 393 spc_init(struct spc_softc *sc, int bus_reset) 394 { 395 struct spc_acb *acb; 396 int r; 397 398 SPC_TRACE(("spc_init ")); 399 if (bus_reset) { 400 spc_reset(sc); 401 spc_scsi_reset(sc); 402 } 403 spc_reset(sc); 404 405 if (sc->sc_state == SPC_INIT) { 406 /* First time through; initialize. */ 407 TAILQ_INIT(&sc->ready_list); 408 TAILQ_INIT(&sc->nexus_list); 409 TAILQ_INIT(&sc->free_list); 410 sc->sc_nexus = NULL; 411 acb = sc->sc_acb; 412 memset(acb, 0, sizeof(sc->sc_acb)); 413 for (r = 0; r < sizeof(sc->sc_acb) / sizeof(*acb); r++) { 414 TAILQ_INSERT_TAIL(&sc->free_list, acb, chain); 415 acb++; 416 } 417 memset(&sc->sc_tinfo, 0, sizeof(sc->sc_tinfo)); 418 } else { 419 /* Cancel any active commands. */ 420 sc->sc_state = SPC_CLEANING; 421 if ((acb = sc->sc_nexus) != NULL) { 422 acb->xs->error = XS_DRIVER_STUFFUP; 423 callout_stop(&acb->xs->xs_callout); 424 spc_done(sc, acb); 425 } 426 while ((acb = TAILQ_FIRST(&sc->nexus_list)) != NULL) { 427 acb->xs->error = XS_DRIVER_STUFFUP; 428 callout_stop(&acb->xs->xs_callout); 429 spc_done(sc, acb); 430 } 431 } 432 433 sc->sc_prevphase = PH_INVALID; 434 for (r = 0; r < 8; r++) { 435 struct spc_tinfo *ti = &sc->sc_tinfo[r]; 436 437 ti->flags = 0; 438 #if SPC_USE_SYNCHRONOUS 439 ti->flags |= DO_SYNC; 440 ti->period = sc->sc_minsync; 441 ti->offset = SPC_SYNC_REQ_ACK_OFS; 442 #else 443 ti->period = ti->offset = 0; 444 #endif 445 #if SPC_USE_WIDE 446 ti->flags |= DO_WIDE; 447 ti->width = SPC_MAX_WIDTH; 448 #else 449 ti->width = 0; 450 #endif 451 } 452 453 sc->sc_state = SPC_IDLE; 454 bus_space_write_1(sc->sc_iot, sc->sc_ioh, SCTL, 455 bus_space_read_1(sc->sc_iot, sc->sc_ioh, SCTL) | SCTL_INTR_ENAB); 456 } 457 458 void 459 spc_free_acb(struct spc_softc *sc, struct spc_acb *acb, int flags) 460 { 461 int s; 462 463 SPC_TRACE(("spc_free_acb ")); 464 s = splbio(); 465 466 acb->flags = 0; 467 TAILQ_INSERT_HEAD(&sc->free_list, acb, chain); 468 splx(s); 469 } 470 471 struct spc_acb * 472 spc_get_acb(struct spc_softc *sc) 473 { 474 struct spc_acb *acb; 475 int s; 476 477 SPC_TRACE(("spc_get_acb ")); 478 s = splbio(); 479 acb = TAILQ_FIRST(&sc->free_list); 480 if (acb != NULL) { 481 TAILQ_REMOVE(&sc->free_list, acb, chain); 482 acb->flags |= ACB_ALLOC; 483 } 484 splx(s); 485 return acb; 486 } 487 488 /* 489 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS 490 */ 491 492 /* 493 * Expected sequence: 494 * 1) Command inserted into ready list 495 * 2) Command selected for execution 496 * 3) Command won arbitration and has selected target device 497 * 4) Send message out (identify message, eventually also sync.negotiations) 498 * 5) Send command 499 * 5a) Receive disconnect message, disconnect. 500 * 5b) Reselected by target 501 * 5c) Receive identify message from target. 502 * 6) Send or receive data 503 * 7) Receive status 504 * 8) Receive message (command complete etc.) 505 */ 506 507 /* 508 * Start a SCSI-command 509 * This function is called by the higher level SCSI-driver to queue/run 510 * SCSI-commands. 511 */ 512 void 513 spc_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req, 514 void *arg) 515 { 516 struct scsipi_xfer *xs; 517 struct scsipi_periph *periph; 518 struct spc_softc *sc = device_private(chan->chan_adapter->adapt_dev); 519 struct spc_acb *acb; 520 int s, flags; 521 522 switch (req) { 523 case ADAPTER_REQ_RUN_XFER: 524 xs = arg; 525 periph = xs->xs_periph; 526 SPC_TRACE(("spc_scsipi_request ")); 527 SPC_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen, 528 periph->periph_target)); 529 530 flags = xs->xs_control; 531 acb = spc_get_acb(sc); 532 #ifdef DIAGNOSTIC 533 /* 534 * This should nerver happen as we track the resources 535 * in the mid-layer. 536 */ 537 if (acb == NULL) { 538 scsipi_printaddr(periph); 539 printf("unable to allocate acb\n"); 540 panic("spc_scsipi_request"); 541 } 542 #endif 543 544 /* Initialize acb */ 545 acb->xs = xs; 546 acb->timeout = xs->timeout; 547 548 if (xs->xs_control & XS_CTL_RESET) { 549 acb->flags |= ACB_RESET; 550 acb->scsipi_cmd_length = 0; 551 acb->data_length = 0; 552 } else { 553 memcpy(&acb->scsipi_cmd, xs->cmd, xs->cmdlen); 554 acb->scsipi_cmd_length = xs->cmdlen; 555 acb->data_addr = xs->data; 556 acb->data_length = xs->datalen; 557 } 558 acb->target_stat = 0; 559 560 s = splbio(); 561 562 TAILQ_INSERT_TAIL(&sc->ready_list, acb, chain); 563 /* 564 * Start scheduling unless a queue process is in progress. 565 */ 566 if (sc->sc_state == SPC_IDLE) 567 spc_sched(sc); 568 /* 569 * After successful sending, check if we should return just now. 570 * If so, return SUCCESSFULLY_QUEUED. 571 */ 572 573 splx(s); 574 575 if ((flags & XS_CTL_POLL) == 0) 576 return; 577 578 /* Not allowed to use interrupts, use polling instead */ 579 s = splbio(); 580 if (spc_poll(sc, xs, acb->timeout)) { 581 spc_timeout(acb); 582 if (spc_poll(sc, xs, acb->timeout)) 583 spc_timeout(acb); 584 } 585 splx(s); 586 return; 587 case ADAPTER_REQ_GROW_RESOURCES: 588 /* XXX Not supported. */ 589 return; 590 case ADAPTER_REQ_SET_XFER_MODE: 591 { 592 /* 593 * We don't support Sync, Wide, or Tagged Command Queuing. 594 * Just callback now, to report this. 595 */ 596 struct scsipi_xfer_mode *xm = arg; 597 598 xm->xm_mode = 0; 599 xm->xm_period = 0; 600 xm->xm_offset = 0; 601 scsipi_async_event(chan, ASYNC_EVENT_XFER_MODE, xm); 602 return; 603 } 604 } 605 } 606 607 /* 608 * Used when interrupt driven I/O isn't allowed, e.g. during boot. 609 */ 610 int 611 spc_poll(struct spc_softc *sc, struct scsipi_xfer *xs, int count) 612 { 613 bus_space_tag_t iot = sc->sc_iot; 614 bus_space_handle_t ioh = sc->sc_ioh; 615 616 SPC_TRACE(("spc_poll ")); 617 while (count) { 618 /* 619 * If we had interrupts enabled, would we 620 * have got an interrupt? 621 */ 622 if (bus_space_read_1(iot, ioh, INTS) != 0) 623 spc_intr(sc); 624 if ((xs->xs_status & XS_STS_DONE) != 0) 625 return 0; 626 delay(1000); 627 count--; 628 } 629 return 1; 630 } 631 632 /* 633 * LOW LEVEL SCSI UTILITIES 634 */ 635 636 integrate void 637 spc_sched_msgout(struct spc_softc *sc, uint8_t m) 638 { 639 bus_space_tag_t iot = sc->sc_iot; 640 bus_space_handle_t ioh = sc->sc_ioh; 641 642 SPC_TRACE(("spc_sched_msgout ")); 643 if (sc->sc_msgpriq == 0) 644 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN); 645 sc->sc_msgpriq |= m; 646 } 647 648 /* 649 * Set synchronous transfer offset and period. 650 */ 651 integrate void 652 spc_setsync(struct spc_softc *sc, struct spc_tinfo *ti) 653 { 654 #if SPC_USE_SYNCHRONOUS 655 bus_space_tag_t iot = sc->sc_iot; 656 bus_space_handle_t ioh = sc->sc_ioh; 657 658 SPC_TRACE(("spc_setsync ")); 659 if (ti->offset != 0) 660 bus_space_write_1(iot, ioh, TMOD, 661 ((ti->period * sc->sc_freq) / 250 - 2) << 4 | ti->offset); 662 else 663 bus_space_write_1(iot, ioh, TMOD, 0); 664 #endif 665 } 666 667 /* 668 * Start a selection. This is used by spc_sched() to select an idle target. 669 */ 670 void 671 spc_select(struct spc_softc *sc, struct spc_acb *acb) 672 { 673 struct scsipi_periph *periph = acb->xs->xs_periph; 674 int target = periph->periph_target; 675 struct spc_tinfo *ti = &sc->sc_tinfo[target]; 676 bus_space_tag_t iot = sc->sc_iot; 677 bus_space_handle_t ioh = sc->sc_ioh; 678 679 SPC_TRACE(("spc_select ")); 680 spc_setsync(sc, ti); 681 682 #if 0 683 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN); 684 #endif 685 686 bus_space_write_1(iot, ioh, PCTL, 0); 687 bus_space_write_1(iot, ioh, TEMP, 688 (1 << sc->sc_initiator) | (1 << target)); 689 /* 690 * Setup BSY timeout (selection timeout). 691 * 250ms according to the SCSI specification. 692 * T = (X * 256 + 15) * Tclf * 2 (Tclf = 200ns on x68k) 693 * To setup 256ms timeout, 694 * 128000ns/200ns = X * 256 + 15 695 * 640 - 15 = X * 256 696 * X = 625 / 256 697 * X = 2 + 113 / 256 698 * ==> tch = 2, tcm = 113 (correct?) 699 */ 700 /* Time to the information transfer phase start. */ 701 /* XXX These values should be calculated from sc_freq */ 702 bus_space_write_1(iot, ioh, TCH, 2); 703 bus_space_write_1(iot, ioh, TCM, 113); 704 bus_space_write_1(iot, ioh, TCL, 3); 705 bus_space_write_1(iot, ioh, SCMD, SCMD_SELECT); 706 707 sc->sc_state = SPC_SELECTING; 708 } 709 710 int 711 spc_reselect(struct spc_softc *sc, int message) 712 { 713 uint8_t selid, target, lun; 714 struct spc_acb *acb; 715 struct scsipi_periph *periph; 716 struct spc_tinfo *ti; 717 718 SPC_TRACE(("spc_reselect ")); 719 /* 720 * The SCSI chip made a snapshot of the data bus while the reselection 721 * was being negotiated. This enables us to determine which target did 722 * the reselect. 723 */ 724 selid = sc->sc_selid & ~(1 << sc->sc_initiator); 725 if (selid & (selid - 1)) { 726 printf("%s: reselect with invalid selid %02x; " 727 "sending DEVICE RESET\n", device_xname(sc->sc_dev), selid); 728 SPC_BREAK(); 729 goto reset; 730 } 731 732 /* 733 * Search wait queue for disconnected cmd 734 * The list should be short, so I haven't bothered with 735 * any more sophisticated structures than a simple 736 * singly linked list. 737 */ 738 target = ffs(selid) - 1; 739 lun = message & 0x07; 740 TAILQ_FOREACH(acb, &sc->nexus_list, chain) { 741 periph = acb->xs->xs_periph; 742 if (periph->periph_target == target && 743 periph->periph_lun == lun) 744 break; 745 } 746 if (acb == NULL) { 747 printf("%s: reselect from target %d lun %d with no nexus; " 748 "sending ABORT\n", device_xname(sc->sc_dev), target, lun); 749 SPC_BREAK(); 750 goto abort; 751 } 752 753 /* Make this nexus active again. */ 754 TAILQ_REMOVE(&sc->nexus_list, acb, chain); 755 sc->sc_state = SPC_CONNECTED; 756 sc->sc_nexus = acb; 757 ti = &sc->sc_tinfo[target]; 758 ti->lubusy |= (1 << lun); 759 spc_setsync(sc, ti); 760 761 if (acb->flags & ACB_RESET) 762 spc_sched_msgout(sc, SEND_DEV_RESET); 763 else if (acb->flags & ACB_ABORT) 764 spc_sched_msgout(sc, SEND_ABORT); 765 766 /* Do an implicit RESTORE POINTERS. */ 767 sc->sc_dp = acb->data_addr; 768 sc->sc_dleft = acb->data_length; 769 sc->sc_cp = (uint8_t *)&acb->scsipi_cmd; 770 sc->sc_cleft = acb->scsipi_cmd_length; 771 772 return (0); 773 774 reset: 775 spc_sched_msgout(sc, SEND_DEV_RESET); 776 return (1); 777 778 abort: 779 spc_sched_msgout(sc, SEND_ABORT); 780 return (1); 781 } 782 783 /* 784 * Schedule a SCSI operation. This has now been pulled out of the interrupt 785 * handler so that we may call it from spc_scsi_cmd and spc_done. This may 786 * save us an unnecessary interrupt just to get things going. Should only be 787 * called when state == SPC_IDLE and at bio pl. 788 */ 789 void 790 spc_sched(struct spc_softc *sc) 791 { 792 struct spc_acb *acb; 793 struct scsipi_periph *periph; 794 struct spc_tinfo *ti; 795 796 /* missing the hw, just return and wait for our hw */ 797 if (sc->sc_flags & SPC_INACTIVE) 798 return; 799 SPC_TRACE(("spc_sched ")); 800 /* 801 * Find first acb in ready queue that is for a target/lunit pair that 802 * is not busy. 803 */ 804 TAILQ_FOREACH(acb, &sc->ready_list, chain) { 805 periph = acb->xs->xs_periph; 806 ti = &sc->sc_tinfo[periph->periph_target]; 807 if ((ti->lubusy & (1 << periph->periph_lun)) == 0) { 808 SPC_MISC(("selecting %d:%d ", 809 periph->periph_target, periph->periph_lun)); 810 TAILQ_REMOVE(&sc->ready_list, acb, chain); 811 sc->sc_nexus = acb; 812 spc_select(sc, acb); 813 return; 814 } else { 815 SPC_MISC(("%d:%d busy\n", 816 periph->periph_target, periph->periph_lun)); 817 } 818 } 819 SPC_MISC(("idle ")); 820 /* Nothing to start; just enable reselections and wait. */ 821 } 822 823 /* 824 * POST PROCESSING OF SCSI_CMD (usually current) 825 */ 826 void 827 spc_done(struct spc_softc *sc, struct spc_acb *acb) 828 { 829 struct scsipi_xfer *xs = acb->xs; 830 struct scsipi_periph *periph = xs->xs_periph; 831 struct spc_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 832 833 SPC_TRACE(("spc_done ")); 834 835 if (xs->error == XS_NOERROR) { 836 if (acb->flags & ACB_ABORT) { 837 xs->error = XS_DRIVER_STUFFUP; 838 } else { 839 switch (acb->target_stat) { 840 case SCSI_CHECK: 841 /* First, save the return values */ 842 xs->resid = acb->data_length; 843 /* FALLTHROUGH */ 844 case SCSI_BUSY: 845 xs->status = acb->target_stat; 846 xs->error = XS_BUSY; 847 break; 848 case SCSI_OK: 849 xs->resid = acb->data_length; 850 break; 851 default: 852 xs->error = XS_DRIVER_STUFFUP; 853 #if SPC_DEBUG 854 printf("%s: spc_done: bad stat 0x%x\n", 855 device_xname(sc->sc_dev), acb->target_stat); 856 #endif 857 break; 858 } 859 } 860 } 861 862 #if SPC_DEBUG 863 if ((spc_debug & SPC_SHOWMISC) != 0) { 864 if (xs->resid != 0) 865 printf("resid=%d ", xs->resid); 866 else 867 printf("error=%d\n", xs->error); 868 } 869 #endif 870 871 /* 872 * Remove the ACB from whatever queue it happens to be on. 873 */ 874 if (acb->flags & ACB_NEXUS) 875 ti->lubusy &= ~(1 << periph->periph_lun); 876 if (acb == sc->sc_nexus) { 877 sc->sc_nexus = NULL; 878 sc->sc_state = SPC_IDLE; 879 spc_sched(sc); 880 } else 881 spc_dequeue(sc, acb); 882 883 spc_free_acb(sc, acb, xs->xs_control); 884 ti->cmds++; 885 scsipi_done(xs); 886 } 887 888 void 889 spc_dequeue(struct spc_softc *sc, struct spc_acb *acb) 890 { 891 892 SPC_TRACE(("spc_dequeue ")); 893 if (acb->flags & ACB_NEXUS) 894 TAILQ_REMOVE(&sc->nexus_list, acb, chain); 895 else 896 TAILQ_REMOVE(&sc->ready_list, acb, chain); 897 } 898 899 /* 900 * INTERRUPT/PROTOCOL ENGINE 901 */ 902 903 /* 904 * Precondition: 905 * The SCSI bus is already in the MSGI phase and there is a message byte 906 * on the bus, along with an asserted REQ signal. 907 */ 908 void 909 spc_msgin(struct spc_softc *sc) 910 { 911 bus_space_tag_t iot = sc->sc_iot; 912 bus_space_handle_t ioh = sc->sc_ioh; 913 int n; 914 uint8_t msg; 915 916 SPC_TRACE(("spc_msgin ")); 917 918 if (sc->sc_prevphase == PH_MSGIN) { 919 /* This is a continuation of the previous message. */ 920 n = sc->sc_imp - sc->sc_imess; 921 goto nextbyte; 922 } 923 924 /* This is a new MESSAGE IN phase. Clean up our state. */ 925 sc->sc_flags &= ~SPC_DROP_MSGIN; 926 927 nextmsg: 928 n = 0; 929 sc->sc_imp = &sc->sc_imess[n]; 930 931 nextbyte: 932 /* 933 * Read a whole message, but don't ack the last byte. If we reject the 934 * message, we have to assert ATN during the message transfer phase 935 * itself. 936 */ 937 for (;;) { 938 #ifdef NO_MANUAL_XFER /* XXX */ 939 if (bus_space_read_1(iot, ioh, INTS) != 0) { 940 /* 941 * Target left MESSAGE IN, probably because it 942 * a) noticed our ATN signal, or 943 * b) ran out of messages. 944 */ 945 goto out; 946 } 947 #endif 948 /* If parity error, just dump everything on the floor. */ 949 if ((bus_space_read_1(iot, ioh, SERR) & 950 (SERR_SCSI_PAR|SERR_SPC_PAR)) != 0) { 951 sc->sc_flags |= SPC_DROP_MSGIN; 952 spc_sched_msgout(sc, SEND_PARITY_ERROR); 953 } 954 955 #ifdef NO_MANUAL_XFER /* XXX */ 956 /* send TRANSFER command. */ 957 bus_space_write_1(iot, ioh, TCH, 0); 958 bus_space_write_1(iot, ioh, TCM, 0); 959 bus_space_write_1(iot, ioh, TCL, 1); 960 bus_space_write_1(iot, ioh, PCTL, 961 sc->sc_phase | PCTL_BFINT_ENAB); 962 #ifdef NEED_DREQ_ON_HARDWARE_XFER 963 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); 964 #else 965 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR); 966 #endif 967 for (;;) { 968 if ((bus_space_read_1(iot, ioh, SSTS) & 969 SSTS_DREG_EMPTY) == 0) 970 break; 971 if (bus_space_read_1(iot, ioh, INTS) != 0) 972 goto out; 973 } 974 msg = bus_space_read_1(iot, ioh, DREG); 975 #else 976 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_ATN) != 0) 977 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN); 978 bus_space_write_1(iot, ioh, PCTL, PCTL_BFINT_ENAB | PH_MSGIN); 979 980 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) { 981 if ((bus_space_read_1(iot, ioh, PSNS) & PH_MASK) 982 != PH_MSGIN || 983 bus_space_read_1(iot, ioh, INTS) != 0) 984 /* 985 * Target left MESSAGE IN, probably because it 986 * a) noticed our ATN signal, or 987 * b) ran out of messages. 988 */ 989 goto out; 990 DELAY(1); /* XXX needs timeout */ 991 } 992 993 msg = bus_space_read_1(iot, ioh, TEMP); 994 #endif 995 996 /* Gather incoming message bytes if needed. */ 997 if ((sc->sc_flags & SPC_DROP_MSGIN) == 0) { 998 if (n >= SPC_MAX_MSG_LEN) { 999 sc->sc_flags |= SPC_DROP_MSGIN; 1000 spc_sched_msgout(sc, SEND_REJECT); 1001 } else { 1002 *sc->sc_imp++ = msg; 1003 n++; 1004 /* 1005 * This testing is suboptimal, but most 1006 * messages will be of the one byte variety, so 1007 * it should not affect performance 1008 * significantly. 1009 */ 1010 if (n == 1 && MSG_IS1BYTE(sc->sc_imess[0])) 1011 break; 1012 if (n == 2 && MSG_IS2BYTE(sc->sc_imess[0])) 1013 break; 1014 if (n >= 3 && MSG_ISEXTENDED(sc->sc_imess[0]) && 1015 n == sc->sc_imess[1] + 2) 1016 break; 1017 } 1018 } 1019 /* 1020 * If we reach this spot we're either: 1021 * a) in the middle of a multi-byte message, or 1022 * b) dropping bytes. 1023 */ 1024 1025 #ifndef NO_MANUAL_XFER /* XXX */ 1026 /* Ack the last byte read. */ 1027 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ACK); 1028 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0) 1029 DELAY(1); /* XXX needs timeout */ 1030 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK); 1031 #endif 1032 } 1033 1034 SPC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0])); 1035 1036 /* We now have a complete message. Parse it. */ 1037 switch (sc->sc_state) { 1038 struct spc_acb *acb; 1039 struct spc_tinfo *ti; 1040 1041 case SPC_CONNECTED: 1042 SPC_ASSERT(sc->sc_nexus != NULL); 1043 acb = sc->sc_nexus; 1044 ti = &sc->sc_tinfo[acb->xs->xs_periph->periph_target]; 1045 1046 switch (sc->sc_imess[0]) { 1047 case MSG_CMDCOMPLETE: 1048 #if 0 1049 if (sc->sc_dleft < 0) { 1050 periph = acb->xs->xs_periph; 1051 printf("%s: %ld extra bytes from %d:%d\n", 1052 device_xname(sc->sc_dev), 1053 (long)-sc->sc_dleft, 1054 periph->periph_target, periph->periph_lun); 1055 sc->sc_dleft = 0; 1056 } 1057 #endif 1058 acb->xs->resid = acb->data_length = sc->sc_dleft; 1059 sc->sc_state = SPC_CMDCOMPLETE; 1060 break; 1061 1062 case MSG_PARITY_ERROR: 1063 /* Resend the last message. */ 1064 spc_sched_msgout(sc, sc->sc_lastmsg); 1065 break; 1066 1067 case MSG_MESSAGE_REJECT: 1068 SPC_MISC(("message rejected %02x ", sc->sc_lastmsg)); 1069 switch (sc->sc_lastmsg) { 1070 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE 1071 case SEND_IDENTIFY: 1072 ti->flags &= ~(DO_SYNC | DO_WIDE); 1073 ti->period = ti->offset = 0; 1074 spc_setsync(sc, ti); 1075 ti->width = 0; 1076 break; 1077 #endif 1078 #if SPC_USE_SYNCHRONOUS 1079 case SEND_SDTR: 1080 ti->flags &= ~DO_SYNC; 1081 ti->period = ti->offset = 0; 1082 spc_setsync(sc, ti); 1083 break; 1084 #endif 1085 #if SPC_USE_WIDE 1086 case SEND_WDTR: 1087 ti->flags &= ~DO_WIDE; 1088 ti->width = 0; 1089 break; 1090 #endif 1091 case SEND_INIT_DET_ERR: 1092 spc_sched_msgout(sc, SEND_ABORT); 1093 break; 1094 } 1095 break; 1096 1097 case MSG_NOOP: 1098 break; 1099 1100 case MSG_DISCONNECT: 1101 ti->dconns++; 1102 sc->sc_state = SPC_DISCONNECT; 1103 break; 1104 1105 case MSG_SAVEDATAPOINTER: 1106 acb->data_addr = sc->sc_dp; 1107 acb->data_length = sc->sc_dleft; 1108 break; 1109 1110 case MSG_RESTOREPOINTERS: 1111 sc->sc_dp = acb->data_addr; 1112 sc->sc_dleft = acb->data_length; 1113 sc->sc_cp = (uint8_t *)&acb->scsipi_cmd; 1114 sc->sc_cleft = acb->scsipi_cmd_length; 1115 break; 1116 1117 case MSG_EXTENDED: 1118 switch (sc->sc_imess[2]) { 1119 #if SPC_USE_SYNCHRONOUS 1120 case MSG_EXT_SDTR: 1121 if (sc->sc_imess[1] != 3) 1122 goto reject; 1123 ti->period = sc->sc_imess[3]; 1124 ti->offset = sc->sc_imess[4]; 1125 ti->flags &= ~DO_SYNC; 1126 if (ti->offset == 0) { 1127 } else if (ti->period < sc->sc_minsync || 1128 ti->period > sc->sc_maxsync || 1129 ti->offset > 8) { 1130 ti->period = ti->offset = 0; 1131 spc_sched_msgout(sc, SEND_SDTR); 1132 } else { 1133 scsipi_printaddr(acb->xs->xs_periph); 1134 printf("sync, offset %d, " 1135 "period %dnsec\n", 1136 ti->offset, ti->period * 4); 1137 } 1138 spc_setsync(sc, ti); 1139 break; 1140 #endif 1141 1142 #if SPC_USE_WIDE 1143 case MSG_EXT_WDTR: 1144 if (sc->sc_imess[1] != 2) 1145 goto reject; 1146 ti->width = sc->sc_imess[3]; 1147 ti->flags &= ~DO_WIDE; 1148 if (ti->width == 0) { 1149 } else if (ti->width > SPC_MAX_WIDTH) { 1150 ti->width = 0; 1151 spc_sched_msgout(sc, SEND_WDTR); 1152 } else { 1153 scsipi_printaddr(acb->xs->xs_periph); 1154 printf("wide, width %d\n", 1155 1 << (3 + ti->width)); 1156 } 1157 break; 1158 #endif 1159 1160 default: 1161 printf("%s: unrecognized MESSAGE EXTENDED; " 1162 "sending REJECT\n", 1163 device_xname(sc->sc_dev)); 1164 SPC_BREAK(); 1165 goto reject; 1166 } 1167 break; 1168 1169 default: 1170 printf("%s: unrecognized MESSAGE; sending REJECT\n", 1171 device_xname(sc->sc_dev)); 1172 SPC_BREAK(); 1173 reject: 1174 spc_sched_msgout(sc, SEND_REJECT); 1175 break; 1176 } 1177 break; 1178 1179 case SPC_RESELECTED: 1180 if (!MSG_ISIDENTIFY(sc->sc_imess[0])) { 1181 printf("%s: reselect without IDENTIFY; " 1182 "sending DEVICE RESET\n", device_xname(sc->sc_dev)); 1183 SPC_BREAK(); 1184 goto reset; 1185 } 1186 1187 (void) spc_reselect(sc, sc->sc_imess[0]); 1188 break; 1189 1190 default: 1191 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n", 1192 device_xname(sc->sc_dev)); 1193 SPC_BREAK(); 1194 reset: 1195 spc_sched_msgout(sc, SEND_DEV_RESET); 1196 break; 1197 1198 #ifdef notdef 1199 abort: 1200 spc_sched_msgout(sc, SEND_ABORT); 1201 break; 1202 #endif 1203 } 1204 1205 #ifndef NO_MANUAL_XFER /* XXX */ 1206 /* Ack the last message byte. */ 1207 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ACK); 1208 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0) 1209 DELAY(1); /* XXX needs timeout */ 1210 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK); 1211 #endif 1212 1213 /* Go get the next message, if any. */ 1214 goto nextmsg; 1215 1216 out: 1217 #ifdef NO_MANUAL_XFER /* XXX */ 1218 /* Ack the last message byte. */ 1219 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK); 1220 #endif 1221 SPC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0])); 1222 } 1223 1224 /* 1225 * Send the highest priority, scheduled message. 1226 */ 1227 void 1228 spc_msgout(struct spc_softc *sc) 1229 { 1230 bus_space_tag_t iot = sc->sc_iot; 1231 bus_space_handle_t ioh = sc->sc_ioh; 1232 #if SPC_USE_SYNCHRONOUS 1233 struct spc_tinfo *ti; 1234 #endif 1235 int n; 1236 1237 SPC_TRACE(("spc_msgout ")); 1238 1239 if (sc->sc_prevphase == PH_MSGOUT) { 1240 if (sc->sc_omp == sc->sc_omess) { 1241 /* 1242 * This is a retransmission. 1243 * 1244 * We get here if the target stayed in MESSAGE OUT 1245 * phase. Section 5.1.9.2 of the SCSI 2 spec indicates 1246 * that all of the previously transmitted messages must 1247 * be sent again, in the same order. Therefore, we 1248 * requeue all the previously transmitted messages, and 1249 * start again from the top. Our simple priority 1250 * scheme keeps the messages in the right order. 1251 */ 1252 SPC_MISC(("retransmitting ")); 1253 sc->sc_msgpriq |= sc->sc_msgoutq; 1254 /* 1255 * Set ATN. If we're just sending a trivial 1-byte 1256 * message, we'll clear ATN later on anyway. 1257 */ 1258 bus_space_write_1(iot, ioh, SCMD, 1259 SCMD_SET_ATN); /* XXX? */ 1260 } else { 1261 /* This is a continuation of the previous message. */ 1262 n = sc->sc_omp - sc->sc_omess; 1263 goto nextbyte; 1264 } 1265 } 1266 1267 /* No messages transmitted so far. */ 1268 sc->sc_msgoutq = 0; 1269 sc->sc_lastmsg = 0; 1270 1271 nextmsg: 1272 /* Pick up highest priority message. */ 1273 sc->sc_currmsg = sc->sc_msgpriq & -sc->sc_msgpriq; 1274 sc->sc_msgpriq &= ~sc->sc_currmsg; 1275 sc->sc_msgoutq |= sc->sc_currmsg; 1276 1277 /* Build the outgoing message data. */ 1278 switch (sc->sc_currmsg) { 1279 case SEND_IDENTIFY: 1280 SPC_ASSERT(sc->sc_nexus != NULL); 1281 sc->sc_omess[0] = 1282 MSG_IDENTIFY(sc->sc_nexus->xs->xs_periph->periph_lun, 1); 1283 n = 1; 1284 break; 1285 1286 #if SPC_USE_SYNCHRONOUS 1287 case SEND_SDTR: 1288 SPC_ASSERT(sc->sc_nexus != NULL); 1289 ti = &sc->sc_tinfo[sc->sc_nexus->xs->xs_periph->periph_target]; 1290 sc->sc_omess[4] = MSG_EXTENDED; 1291 sc->sc_omess[3] = MSG_EXT_SDTR_LEN; 1292 sc->sc_omess[2] = MSG_EXT_SDTR; 1293 sc->sc_omess[1] = ti->period >> 2; 1294 sc->sc_omess[0] = ti->offset; 1295 n = 5; 1296 break; 1297 #endif 1298 1299 #if SPC_USE_WIDE 1300 case SEND_WDTR: 1301 SPC_ASSERT(sc->sc_nexus != NULL); 1302 ti = &sc->sc_tinfo[sc->sc_nexus->xs->xs_periph->periph_target]; 1303 sc->sc_omess[3] = MSG_EXTENDED; 1304 sc->sc_omess[2] = MSG_EXT_WDTR_LEN; 1305 sc->sc_omess[1] = MSG_EXT_WDTR; 1306 sc->sc_omess[0] = ti->width; 1307 n = 4; 1308 break; 1309 #endif 1310 1311 case SEND_DEV_RESET: 1312 sc->sc_flags |= SPC_ABORTING; 1313 sc->sc_omess[0] = MSG_BUS_DEV_RESET; 1314 n = 1; 1315 break; 1316 1317 case SEND_REJECT: 1318 sc->sc_omess[0] = MSG_MESSAGE_REJECT; 1319 n = 1; 1320 break; 1321 1322 case SEND_PARITY_ERROR: 1323 sc->sc_omess[0] = MSG_PARITY_ERROR; 1324 n = 1; 1325 break; 1326 1327 case SEND_INIT_DET_ERR: 1328 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR; 1329 n = 1; 1330 break; 1331 1332 case SEND_ABORT: 1333 sc->sc_flags |= SPC_ABORTING; 1334 sc->sc_omess[0] = MSG_ABORT; 1335 n = 1; 1336 break; 1337 1338 default: 1339 printf("%s: unexpected MESSAGE OUT; sending NOOP\n", 1340 device_xname(sc->sc_dev)); 1341 SPC_BREAK(); 1342 sc->sc_omess[0] = MSG_NOOP; 1343 n = 1; 1344 break; 1345 } 1346 sc->sc_omp = &sc->sc_omess[n]; 1347 1348 nextbyte: 1349 /* Send message bytes. */ 1350 /* send TRANSFER command. */ 1351 bus_space_write_1(iot, ioh, TCH, n >> 16); 1352 bus_space_write_1(iot, ioh, TCM, n >> 8); 1353 bus_space_write_1(iot, ioh, TCL, n); 1354 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB); 1355 #ifdef NEED_DREQ_ON_HARDWARE_XFER 1356 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */ 1357 #else 1358 bus_space_write_1(iot, ioh, SCMD, 1359 SCMD_XFR | SCMD_PROG_XFR); 1360 #endif 1361 for (;;) { 1362 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0) 1363 break; 1364 if (bus_space_read_1(iot, ioh, INTS) != 0) 1365 goto out; 1366 } 1367 for (;;) { 1368 #if 0 1369 for (;;) { 1370 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0) 1371 break; 1372 /* Wait for REQINIT. XXX Need timeout. */ 1373 } 1374 #endif 1375 if (bus_space_read_1(iot, ioh, INTS) != 0) { 1376 /* 1377 * Target left MESSAGE OUT, possibly to reject 1378 * our message. 1379 * 1380 * If this is the last message being sent, then we 1381 * deassert ATN, since either the target is going to 1382 * ignore this message, or it's going to ask for a 1383 * retransmission via MESSAGE PARITY ERROR (in which 1384 * case we reassert ATN anyway). 1385 */ 1386 #if 0 1387 if (sc->sc_msgpriq == 0) 1388 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN); 1389 #endif 1390 goto out; 1391 } 1392 1393 #if 0 1394 /* Clear ATN before last byte if this is the last message. */ 1395 if (n == 1 && sc->sc_msgpriq == 0) 1396 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN); 1397 #endif 1398 1399 while ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_FULL) != 0) 1400 DELAY(1); 1401 /* Send message byte. */ 1402 bus_space_write_1(iot, ioh, DREG, *--sc->sc_omp); 1403 --n; 1404 /* Keep track of the last message we've sent any bytes of. */ 1405 sc->sc_lastmsg = sc->sc_currmsg; 1406 #if 0 1407 /* Wait for ACK to be negated. XXX Need timeout. */ 1408 while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0) 1409 ; 1410 #endif 1411 1412 if (n == 0) 1413 break; 1414 } 1415 1416 /* We get here only if the entire message has been transmitted. */ 1417 if (sc->sc_msgpriq != 0) { 1418 /* There are more outgoing messages. */ 1419 goto nextmsg; 1420 } 1421 1422 /* 1423 * The last message has been transmitted. We need to remember the last 1424 * message transmitted (in case the target switches to MESSAGE IN phase 1425 * and sends a MESSAGE REJECT), and the list of messages transmitted 1426 * this time around (in case the target stays in MESSAGE OUT phase to 1427 * request a retransmit). 1428 */ 1429 1430 out: 1431 /* Disable REQ/ACK protocol. */ 1432 return; 1433 } 1434 1435 /* 1436 * spc_dataout_pio: perform a data transfer using the FIFO datapath in the spc 1437 * Precondition: The SCSI bus should be in the DOUT phase, with REQ asserted 1438 * and ACK deasserted (i.e. waiting for a data byte) 1439 * 1440 * This new revision has been optimized (I tried) to make the common case fast, 1441 * and the rarer cases (as a result) somewhat more comlex 1442 */ 1443 int 1444 spc_dataout_pio(struct spc_softc *sc, uint8_t *p, int n) 1445 { 1446 bus_space_tag_t iot = sc->sc_iot; 1447 bus_space_handle_t ioh = sc->sc_ioh; 1448 uint8_t intstat = 0; 1449 int out = 0; 1450 #define DOUTAMOUNT 8 /* Full FIFO */ 1451 1452 SPC_TRACE(("spc_dataout_pio ")); 1453 /* send TRANSFER command. */ 1454 bus_space_write_1(iot, ioh, TCH, n >> 16); 1455 bus_space_write_1(iot, ioh, TCM, n >> 8); 1456 bus_space_write_1(iot, ioh, TCL, n); 1457 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB); 1458 #ifdef NEED_DREQ_ON_HARDWARE_XFER 1459 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */ 1460 #else 1461 bus_space_write_1(iot, ioh, SCMD, 1462 SCMD_XFR | SCMD_PROG_XFR); /* XXX */ 1463 #endif 1464 for (;;) { 1465 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0) 1466 break; 1467 if (bus_space_read_1(iot, ioh, INTS) != 0) 1468 break; 1469 } 1470 1471 /* 1472 * I have tried to make the main loop as tight as possible. This 1473 * means that some of the code following the loop is a bit more 1474 * complex than otherwise. 1475 */ 1476 while (n > 0) { 1477 int xfer; 1478 1479 for (;;) { 1480 intstat = bus_space_read_1(iot, ioh, INTS); 1481 /* Wait till buffer is empty. */ 1482 if ((bus_space_read_1(iot, ioh, SSTS) & 1483 SSTS_DREG_EMPTY) != 0) 1484 break; 1485 /* Break on interrupt. */ 1486 if (intstat != 0) 1487 goto phasechange; 1488 DELAY(1); 1489 } 1490 1491 xfer = min(DOUTAMOUNT, n); 1492 1493 SPC_MISC(("%d> ", xfer)); 1494 1495 n -= xfer; 1496 out += xfer; 1497 1498 bus_space_write_multi_1(iot, ioh, DREG, p, xfer); 1499 p += xfer; 1500 } 1501 1502 if (out == 0) { 1503 for (;;) { 1504 if (bus_space_read_1(iot, ioh, INTS) != 0) 1505 break; 1506 DELAY(1); 1507 } 1508 SPC_MISC(("extra data ")); 1509 } else { 1510 /* See the bytes off chip */ 1511 for (;;) { 1512 /* Wait till buffer is empty. */ 1513 if ((bus_space_read_1(iot, ioh, SSTS) & 1514 SSTS_DREG_EMPTY) != 0) 1515 break; 1516 intstat = bus_space_read_1(iot, ioh, INTS); 1517 /* Break on interrupt. */ 1518 if (intstat != 0) 1519 goto phasechange; 1520 DELAY(1); 1521 } 1522 } 1523 1524 phasechange: 1525 /* Stop the FIFO data path. */ 1526 1527 if (intstat != 0) { 1528 /* Some sort of phase change. */ 1529 int amount; 1530 1531 amount = (bus_space_read_1(iot, ioh, TCH) << 16) | 1532 (bus_space_read_1(iot, ioh, TCM) << 8) | 1533 bus_space_read_1(iot, ioh, TCL); 1534 if (amount > 0) { 1535 out -= amount; 1536 SPC_MISC(("+%d ", amount)); 1537 } 1538 } 1539 1540 return out; 1541 } 1542 1543 /* 1544 * spc_datain_pio: perform data transfers using the FIFO datapath in the spc 1545 * Precondition: The SCSI bus should be in the DIN phase, with REQ asserted 1546 * and ACK deasserted (i.e. at least one byte is ready). 1547 * 1548 * For now, uses a pretty dumb algorithm, hangs around until all data has been 1549 * transferred. This, is OK for fast targets, but not so smart for slow 1550 * targets which don't disconnect or for huge transfers. 1551 */ 1552 int 1553 spc_datain_pio(struct spc_softc *sc, uint8_t *p, int n) 1554 { 1555 bus_space_tag_t iot = sc->sc_iot; 1556 bus_space_handle_t ioh = sc->sc_ioh; 1557 int in = 0; 1558 uint8_t intstat, sstat; 1559 #define DINAMOUNT 8 /* Full FIFO */ 1560 1561 SPC_TRACE(("spc_datain_pio ")); 1562 /* send TRANSFER command. */ 1563 bus_space_write_1(iot, ioh, TCH, n >> 16); 1564 bus_space_write_1(iot, ioh, TCM, n >> 8); 1565 bus_space_write_1(iot, ioh, TCL, n); 1566 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB); 1567 #ifdef NEED_DREQ_ON_HARDWARE_XFER 1568 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */ 1569 #else 1570 bus_space_write_1(iot, ioh, SCMD, 1571 SCMD_XFR | SCMD_PROG_XFR); /* XXX */ 1572 #endif 1573 1574 /* 1575 * We leave this loop if one or more of the following is true: 1576 * a) phase != PH_DATAIN && FIFOs are empty 1577 * b) reset has occurred or busfree is detected. 1578 */ 1579 intstat = 0; 1580 while (n > 0) { 1581 sstat = bus_space_read_1(iot, ioh, SSTS); 1582 if ((sstat & SSTS_DREG_FULL) != 0) { 1583 n -= DINAMOUNT; 1584 in += DINAMOUNT; 1585 bus_space_read_multi_1(iot, ioh, DREG, p, DINAMOUNT); 1586 p += DINAMOUNT; 1587 } else if ((sstat & SSTS_DREG_EMPTY) == 0) { 1588 n--; 1589 in++; 1590 *p++ = bus_space_read_1(iot, ioh, DREG); 1591 } else { 1592 if (intstat != 0) 1593 goto phasechange; 1594 intstat = bus_space_read_1(iot, ioh, INTS); 1595 } 1596 } 1597 1598 /* 1599 * Some SCSI-devices are rude enough to transfer more data than what 1600 * was requested, e.g. 2048 bytes from a CD-ROM instead of the 1601 * requested 512. Test for progress, i.e. real transfers. If no real 1602 * transfers have been performed (n is probably already zero) and the 1603 * FIFO is not empty, waste some bytes.... 1604 */ 1605 if (in == 0) { 1606 for (;;) { 1607 sstat = bus_space_read_1(iot, ioh, SSTS); 1608 if ((sstat & SSTS_DREG_EMPTY) == 0) { 1609 (void) bus_space_read_1(iot, ioh, DREG); 1610 } else { 1611 if (intstat != 0) 1612 goto phasechange; 1613 intstat = bus_space_read_1(iot, ioh, INTS); 1614 } 1615 DELAY(1); 1616 } 1617 SPC_MISC(("extra data ")); 1618 } 1619 1620 phasechange: 1621 /* Stop the FIFO data path. */ 1622 1623 return in; 1624 } 1625 1626 /* 1627 * Catch an interrupt from the adaptor 1628 */ 1629 /* 1630 * This is the workhorse routine of the driver. 1631 * Deficiencies (for now): 1632 * 1) always uses programmed I/O 1633 */ 1634 int 1635 spc_intr(void *arg) 1636 { 1637 struct spc_softc *sc = arg; 1638 bus_space_tag_t iot = sc->sc_iot; 1639 bus_space_handle_t ioh = sc->sc_ioh; 1640 uint8_t ints; 1641 struct spc_acb *acb; 1642 struct scsipi_periph *periph; 1643 struct spc_tinfo *ti; 1644 int n; 1645 1646 SPC_TRACE(("spc_intr ")); 1647 1648 ints = bus_space_read_1(iot, ioh, INTS); 1649 if (ints == 0) 1650 return 0; 1651 1652 /* 1653 * Disable interrupt. 1654 */ 1655 bus_space_write_1(iot, ioh, SCTL, 1656 bus_space_read_1(iot, ioh, SCTL) & ~SCTL_INTR_ENAB); 1657 1658 if (sc->sc_dma_done != NULL && 1659 sc->sc_state == SPC_CONNECTED && 1660 (sc->sc_flags & SPC_DOINGDMA) != 0 && 1661 (sc->sc_phase == PH_DATAOUT || sc->sc_phase == PH_DATAIN)) { 1662 (*sc->sc_dma_done)(sc); 1663 } 1664 1665 loop: 1666 /* 1667 * Loop until transfer completion. 1668 */ 1669 /* 1670 * First check for abnormal conditions, such as reset. 1671 */ 1672 ints = bus_space_read_1(iot, ioh, INTS); 1673 SPC_MISC(("ints = 0x%x ", ints)); 1674 1675 if ((ints & INTS_RST) != 0) { 1676 printf("%s: SCSI bus reset\n", device_xname(sc->sc_dev)); 1677 goto reset; 1678 } 1679 1680 /* 1681 * Check for less serious errors. 1682 */ 1683 if ((bus_space_read_1(iot, ioh, SERR) & (SERR_SCSI_PAR|SERR_SPC_PAR)) 1684 != 0) { 1685 printf("%s: SCSI bus parity error\n", device_xname(sc->sc_dev)); 1686 if (sc->sc_prevphase == PH_MSGIN) { 1687 sc->sc_flags |= SPC_DROP_MSGIN; 1688 spc_sched_msgout(sc, SEND_PARITY_ERROR); 1689 } else 1690 spc_sched_msgout(sc, SEND_INIT_DET_ERR); 1691 } 1692 1693 /* 1694 * If we're not already busy doing something test for the following 1695 * conditions: 1696 * 1) We have been reselected by something 1697 * 2) We have selected something successfully 1698 * 3) Our selection process has timed out 1699 * 4) This is really a bus free interrupt just to get a new command 1700 * going? 1701 * 5) Spurious interrupt? 1702 */ 1703 switch (sc->sc_state) { 1704 case SPC_IDLE: 1705 case SPC_SELECTING: 1706 SPC_MISC(("ints:0x%02x ", ints)); 1707 1708 if ((ints & INTS_SEL) != 0) { 1709 /* 1710 * We don't currently support target mode. 1711 */ 1712 printf("%s: target mode selected; going to BUS FREE\n", 1713 device_xname(sc->sc_dev)); 1714 1715 goto sched; 1716 } else if ((ints & INTS_RESEL) != 0) { 1717 SPC_MISC(("reselected ")); 1718 1719 /* 1720 * If we're trying to select a target ourselves, 1721 * push our command back into the ready list. 1722 */ 1723 if (sc->sc_state == SPC_SELECTING) { 1724 SPC_MISC(("backoff selector ")); 1725 SPC_ASSERT(sc->sc_nexus != NULL); 1726 acb = sc->sc_nexus; 1727 sc->sc_nexus = NULL; 1728 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain); 1729 } 1730 1731 /* Save reselection ID. */ 1732 sc->sc_selid = bus_space_read_1(iot, ioh, TEMP); 1733 1734 sc->sc_state = SPC_RESELECTED; 1735 } else if ((ints & INTS_CMD_DONE) != 0) { 1736 SPC_MISC(("selected ")); 1737 1738 /* 1739 * We have selected a target. Things to do: 1740 * a) Determine what message(s) to send. 1741 * b) Verify that we're still selecting the target. 1742 * c) Mark device as busy. 1743 */ 1744 if (sc->sc_state != SPC_SELECTING) { 1745 printf("%s: selection out while idle; " 1746 "resetting\n", device_xname(sc->sc_dev)); 1747 SPC_BREAK(); 1748 goto reset; 1749 } 1750 SPC_ASSERT(sc->sc_nexus != NULL); 1751 acb = sc->sc_nexus; 1752 periph = acb->xs->xs_periph; 1753 ti = &sc->sc_tinfo[periph->periph_target]; 1754 1755 sc->sc_msgpriq = SEND_IDENTIFY; 1756 if (acb->flags & ACB_RESET) 1757 sc->sc_msgpriq |= SEND_DEV_RESET; 1758 else if (acb->flags & ACB_ABORT) 1759 sc->sc_msgpriq |= SEND_ABORT; 1760 else { 1761 #if SPC_USE_SYNCHRONOUS 1762 if ((ti->flags & DO_SYNC) != 0) 1763 sc->sc_msgpriq |= SEND_SDTR; 1764 #endif 1765 #if SPC_USE_WIDE 1766 if ((ti->flags & DO_WIDE) != 0) 1767 sc->sc_msgpriq |= SEND_WDTR; 1768 #endif 1769 } 1770 1771 acb->flags |= ACB_NEXUS; 1772 ti->lubusy |= (1 << periph->periph_lun); 1773 1774 /* Do an implicit RESTORE POINTERS. */ 1775 sc->sc_dp = acb->data_addr; 1776 sc->sc_dleft = acb->data_length; 1777 sc->sc_cp = (uint8_t *)&acb->scsipi_cmd; 1778 sc->sc_cleft = acb->scsipi_cmd_length; 1779 1780 /* On our first connection, schedule a timeout. */ 1781 if ((acb->xs->xs_control & XS_CTL_POLL) == 0) 1782 callout_reset(&acb->xs->xs_callout, 1783 mstohz(acb->timeout), spc_timeout, acb); 1784 1785 sc->sc_state = SPC_CONNECTED; 1786 } else if ((ints & INTS_TIMEOUT) != 0) { 1787 SPC_MISC(("selection timeout ")); 1788 1789 if (sc->sc_state != SPC_SELECTING) { 1790 printf("%s: selection timeout while idle; " 1791 "resetting\n", device_xname(sc->sc_dev)); 1792 SPC_BREAK(); 1793 goto reset; 1794 } 1795 SPC_ASSERT(sc->sc_nexus != NULL); 1796 acb = sc->sc_nexus; 1797 1798 delay(250); 1799 1800 acb->xs->error = XS_SELTIMEOUT; 1801 goto finish; 1802 } else { 1803 if (sc->sc_state != SPC_IDLE) { 1804 printf("%s: BUS FREE while not idle; " 1805 "state=%d\n", 1806 device_xname(sc->sc_dev), sc->sc_state); 1807 SPC_BREAK(); 1808 goto out; 1809 } 1810 1811 goto sched; 1812 } 1813 1814 /* 1815 * Turn off selection stuff, and prepare to catch bus free 1816 * interrupts, parity errors, and phase changes. 1817 */ 1818 1819 sc->sc_flags = 0; 1820 sc->sc_prevphase = PH_INVALID; 1821 goto dophase; 1822 } 1823 1824 if ((ints & INTS_DISCON) != 0) { 1825 /* We've gone to BUS FREE phase. */ 1826 /* disable disconnect interrupt */ 1827 bus_space_write_1(iot, ioh, PCTL, 1828 bus_space_read_1(iot, ioh, PCTL) & ~PCTL_BFINT_ENAB); 1829 /* XXX reset interrput */ 1830 bus_space_write_1(iot, ioh, INTS, ints); 1831 1832 switch (sc->sc_state) { 1833 case SPC_RESELECTED: 1834 goto sched; 1835 1836 case SPC_CONNECTED: 1837 SPC_ASSERT(sc->sc_nexus != NULL); 1838 acb = sc->sc_nexus; 1839 1840 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE 1841 if (sc->sc_prevphase == PH_MSGOUT) { 1842 /* 1843 * If the target went to BUS FREE phase during 1844 * or immediately after sending a SDTR or WDTR 1845 * message, disable negotiation. 1846 */ 1847 periph = acb->xs->xs_periph; 1848 ti = &sc->sc_tinfo[periph->periph_target]; 1849 switch (sc->sc_lastmsg) { 1850 #if SPC_USE_SYNCHRONOUS 1851 case SEND_SDTR: 1852 ti->flags &= ~DO_SYNC; 1853 ti->period = ti->offset = 0; 1854 break; 1855 #endif 1856 #if SPC_USE_WIDE 1857 case SEND_WDTR: 1858 ti->flags &= ~DO_WIDE; 1859 ti->width = 0; 1860 break; 1861 #endif 1862 } 1863 } 1864 #endif 1865 1866 if ((sc->sc_flags & SPC_ABORTING) == 0) { 1867 /* 1868 * Section 5.1.1 of the SCSI 2 spec suggests 1869 * issuing a REQUEST SENSE following an 1870 * unexpected disconnect. Some devices go into 1871 * a contingent allegiance condition when 1872 * disconnecting, and this is necessary to 1873 * clean up their state. 1874 */ 1875 printf("%s: unexpected disconnect; " 1876 "sending REQUEST SENSE\n", 1877 device_xname(sc->sc_dev)); 1878 SPC_BREAK(); 1879 acb->target_stat = SCSI_CHECK; 1880 acb->xs->error = XS_NOERROR; 1881 goto finish; 1882 } 1883 1884 acb->xs->error = XS_DRIVER_STUFFUP; 1885 goto finish; 1886 1887 case SPC_DISCONNECT: 1888 SPC_ASSERT(sc->sc_nexus != NULL); 1889 acb = sc->sc_nexus; 1890 TAILQ_INSERT_HEAD(&sc->nexus_list, acb, chain); 1891 sc->sc_nexus = NULL; 1892 goto sched; 1893 1894 case SPC_CMDCOMPLETE: 1895 SPC_ASSERT(sc->sc_nexus != NULL); 1896 acb = sc->sc_nexus; 1897 goto finish; 1898 } 1899 } 1900 else if ((ints & INTS_CMD_DONE) != 0 && 1901 sc->sc_prevphase == PH_MSGIN && 1902 sc->sc_state != SPC_CONNECTED) 1903 goto out; 1904 1905 dophase: 1906 #if 0 1907 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) { 1908 /* Wait for REQINIT. */ 1909 goto out; 1910 } 1911 #else 1912 bus_space_write_1(iot, ioh, INTS, ints); 1913 ints = 0; 1914 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) 1915 delay(1); /* need timeout XXX */ 1916 #endif 1917 1918 /* 1919 * State transition. 1920 */ 1921 sc->sc_phase = bus_space_read_1(iot, ioh, PSNS) & PH_MASK; 1922 #if 0 1923 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase); 1924 #endif 1925 1926 SPC_MISC(("phase=%d\n", sc->sc_phase)); 1927 switch (sc->sc_phase) { 1928 case PH_MSGOUT: 1929 if (sc->sc_state != SPC_CONNECTED && 1930 sc->sc_state != SPC_RESELECTED) 1931 break; 1932 spc_msgout(sc); 1933 sc->sc_prevphase = PH_MSGOUT; 1934 goto loop; 1935 1936 case PH_MSGIN: 1937 if (sc->sc_state != SPC_CONNECTED && 1938 sc->sc_state != SPC_RESELECTED) 1939 break; 1940 spc_msgin(sc); 1941 sc->sc_prevphase = PH_MSGIN; 1942 goto loop; 1943 1944 case PH_CMD: 1945 if (sc->sc_state != SPC_CONNECTED) 1946 break; 1947 #if SPC_DEBUG 1948 if ((spc_debug & SPC_SHOWMISC) != 0) { 1949 SPC_ASSERT(sc->sc_nexus != NULL); 1950 acb = sc->sc_nexus; 1951 printf("cmd=0x%02x+%d ", 1952 acb->scsipi_cmd.opcode, acb->scsipi_cmd_length - 1); 1953 } 1954 #endif 1955 n = spc_dataout_pio(sc, sc->sc_cp, sc->sc_cleft); 1956 sc->sc_cp += n; 1957 sc->sc_cleft -= n; 1958 sc->sc_prevphase = PH_CMD; 1959 goto loop; 1960 1961 case PH_DATAOUT: 1962 if (sc->sc_state != SPC_CONNECTED) 1963 break; 1964 SPC_MISC(("dataout dleft=%d ", sc->sc_dleft)); 1965 if (sc->sc_dma_start != NULL && 1966 sc->sc_dleft > SPC_MIN_DMA_LEN) { 1967 (*sc->sc_dma_start)(sc, sc->sc_dp, sc->sc_dleft, 0); 1968 sc->sc_prevphase = PH_DATAOUT; 1969 goto out; 1970 } 1971 n = spc_dataout_pio(sc, sc->sc_dp, sc->sc_dleft); 1972 sc->sc_dp += n; 1973 sc->sc_dleft -= n; 1974 sc->sc_prevphase = PH_DATAOUT; 1975 goto loop; 1976 1977 case PH_DATAIN: 1978 if (sc->sc_state != SPC_CONNECTED) 1979 break; 1980 SPC_MISC(("datain ")); 1981 if (sc->sc_dma_start != NULL && 1982 sc->sc_dleft > SPC_MIN_DMA_LEN) { 1983 (*sc->sc_dma_start)(sc, sc->sc_dp, sc->sc_dleft, 1); 1984 sc->sc_prevphase = PH_DATAIN; 1985 goto out; 1986 } 1987 n = spc_datain_pio(sc, sc->sc_dp, sc->sc_dleft); 1988 sc->sc_dp += n; 1989 sc->sc_dleft -= n; 1990 sc->sc_prevphase = PH_DATAIN; 1991 goto loop; 1992 1993 case PH_STAT: 1994 if (sc->sc_state != SPC_CONNECTED) 1995 break; 1996 SPC_ASSERT(sc->sc_nexus != NULL); 1997 acb = sc->sc_nexus; 1998 1999 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_ATN) != 0) 2000 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN); 2001 bus_space_write_1(iot, ioh, PCTL, PCTL_BFINT_ENAB | PH_STAT); 2002 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) 2003 DELAY(1); /* XXX needs timeout */ 2004 acb->target_stat = bus_space_read_1(iot, ioh, TEMP); 2005 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ACK); 2006 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0) 2007 DELAY(1); /* XXX needs timeout */ 2008 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK); 2009 2010 SPC_MISC(("target_stat=0x%02x ", acb->target_stat)); 2011 sc->sc_prevphase = PH_STAT; 2012 goto loop; 2013 } 2014 2015 printf("%s: unexpected bus phase; resetting\n", 2016 device_xname(sc->sc_dev)); 2017 SPC_BREAK(); 2018 reset: 2019 spc_init(sc, 1); 2020 return 1; 2021 2022 finish: 2023 callout_stop(&acb->xs->xs_callout); 2024 bus_space_write_1(iot, ioh, INTS, ints); 2025 ints = 0; 2026 spc_done(sc, acb); 2027 goto out; 2028 2029 sched: 2030 sc->sc_state = SPC_IDLE; 2031 spc_sched(sc); 2032 goto out; 2033 2034 out: 2035 if (ints) 2036 bus_space_write_1(iot, ioh, INTS, ints); 2037 bus_space_write_1(iot, ioh, SCTL, 2038 bus_space_read_1(iot, ioh, SCTL) | SCTL_INTR_ENAB); 2039 return 1; 2040 } 2041 2042 void 2043 spc_abort(struct spc_softc *sc, struct spc_acb *acb) 2044 { 2045 2046 /* 2 secs for the abort */ 2047 acb->timeout = SPC_ABORT_TIMEOUT; 2048 acb->flags |= ACB_ABORT; 2049 2050 if (acb == sc->sc_nexus) { 2051 /* 2052 * If we're still selecting, the message will be scheduled 2053 * after selection is complete. 2054 */ 2055 if (sc->sc_state == SPC_CONNECTED) 2056 spc_sched_msgout(sc, SEND_ABORT); 2057 } else { 2058 spc_dequeue(sc, acb); 2059 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain); 2060 if (sc->sc_state == SPC_IDLE) 2061 spc_sched(sc); 2062 } 2063 } 2064 2065 void 2066 spc_timeout(void *arg) 2067 { 2068 struct spc_acb *acb = arg; 2069 struct scsipi_xfer *xs = acb->xs; 2070 struct scsipi_periph *periph = xs->xs_periph; 2071 struct spc_softc *sc; 2072 int s; 2073 2074 sc = device_private(periph->periph_channel->chan_adapter->adapt_dev); 2075 scsipi_printaddr(periph); 2076 printf("timed out"); 2077 2078 s = splbio(); 2079 2080 if (acb->flags & ACB_ABORT) { 2081 /* abort timed out */ 2082 printf(" AGAIN\n"); 2083 /* XXX Must reset! */ 2084 } else { 2085 /* abort the operation that has timed out */ 2086 printf("\n"); 2087 acb->xs->error = XS_TIMEOUT; 2088 spc_abort(sc, acb); 2089 } 2090 2091 splx(s); 2092 } 2093 2094 #ifdef SPC_DEBUG 2095 /* 2096 * The following functions are mostly used for debugging purposes, either 2097 * directly called from the driver or from the kernel debugger. 2098 */ 2099 2100 void 2101 spc_show_scsi_cmd(struct spc_acb *acb) 2102 { 2103 uint8_t *b = (uint8_t *)&acb->scsipi_cmd; 2104 int i; 2105 2106 scsipi_printaddr(acb->xs->xs_periph); 2107 if ((acb->xs->xs_control & XS_CTL_RESET) == 0) { 2108 for (i = 0; i < acb->scsipi_cmd_length; i++) { 2109 if (i) 2110 printf(","); 2111 printf("%x", b[i]); 2112 } 2113 printf("\n"); 2114 } else 2115 printf("RESET\n"); 2116 } 2117 2118 void 2119 spc_print_acb(struct spc_acb *acb) 2120 { 2121 2122 printf("acb@%p xs=%p flags=%x", acb, acb->xs, acb->flags); 2123 printf(" dp=%p dleft=%d target_stat=%x\n", 2124 acb->data_addr, acb->data_length, acb->target_stat); 2125 spc_show_scsi_cmd(acb); 2126 } 2127 2128 void 2129 spc_print_active_acb(void) 2130 { 2131 struct spc_acb *acb; 2132 struct spc_softc *sc = device_private(spc_cd.cd_devs[0]); /* XXX */ 2133 2134 printf("ready list:\n"); 2135 TAILQ_FOREACH(acb, &sc->ready_list, chain) 2136 spc_print_acb(acb); 2137 printf("nexus:\n"); 2138 if (sc->sc_nexus != NULL) 2139 spc_print_acb(sc->sc_nexus); 2140 printf("nexus list:\n"); 2141 TAILQ_FOREACH(acb, &sc->nexus_list, chain) 2142 spc_print_acb(acb); 2143 } 2144 2145 void 2146 spc_dump89352(struct spc_softc *sc) 2147 { 2148 bus_space_tag_t iot = sc->sc_iot; 2149 bus_space_handle_t ioh = sc->sc_ioh; 2150 2151 printf("mb89352: BDID=%x SCTL=%x SCMD=%x TMOD=%x\n", 2152 bus_space_read_1(iot, ioh, BDID), 2153 bus_space_read_1(iot, ioh, SCTL), 2154 bus_space_read_1(iot, ioh, SCMD), 2155 bus_space_read_1(iot, ioh, TMOD)); 2156 printf(" INTS=%x PSNS=%x SSTS=%x SERR=%x PCTL=%x\n", 2157 bus_space_read_1(iot, ioh, INTS), 2158 bus_space_read_1(iot, ioh, PSNS), 2159 bus_space_read_1(iot, ioh, SSTS), 2160 bus_space_read_1(iot, ioh, SERR), 2161 bus_space_read_1(iot, ioh, PCTL)); 2162 printf(" MBC=%x DREG=%x TEMP=%x TCH=%x TCM=%x\n", 2163 bus_space_read_1(iot, ioh, MBC), 2164 #if 0 2165 bus_space_read_1(iot, ioh, DREG), 2166 #else 2167 0, 2168 #endif 2169 bus_space_read_1(iot, ioh, TEMP), 2170 bus_space_read_1(iot, ioh, TCH), 2171 bus_space_read_1(iot, ioh, TCM)); 2172 printf(" TCL=%x EXBF=%x\n", 2173 bus_space_read_1(iot, ioh, TCL), 2174 bus_space_read_1(iot, ioh, EXBF)); 2175 } 2176 2177 void 2178 spc_dump_driver(struct spc_softc *sc) 2179 { 2180 struct spc_tinfo *ti; 2181 int i; 2182 2183 printf("nexus=%p prevphase=%x\n", sc->sc_nexus, sc->sc_prevphase); 2184 printf("state=%x msgin=%x msgpriq=%x msgoutq=%x lastmsg=%x " 2185 "currmsg=%x\n", sc->sc_state, sc->sc_imess[0], 2186 sc->sc_msgpriq, sc->sc_msgoutq, sc->sc_lastmsg, sc->sc_currmsg); 2187 for (i = 0; i < 7; i++) { 2188 ti = &sc->sc_tinfo[i]; 2189 printf("tinfo%d: %d cmds %d disconnects %d timeouts", 2190 i, ti->cmds, ti->dconns, ti->touts); 2191 printf(" %d senses flags=%x\n", ti->senses, ti->flags); 2192 } 2193 } 2194 #endif 2195