xref: /netbsd-src/sys/dev/ic/mb89352.c (revision 481fca6e59249d8ffcf24fef7cfbe7b131bfb080)
1 /*	$NetBSD: mb89352.c,v 1.5 2000/03/23 07:01:31 thorpej Exp $	*/
2 /*	NecBSD: mb89352.c,v 1.4 1998/03/14 07:31:20 kmatsuda Exp	*/
3 
4 #ifdef DDB
5 #define	integrate
6 #else
7 #define	integrate	__inline static
8 #endif
9 
10 /*-
11  * Copyright (c) 1996,97,98,99 The NetBSD Foundation, Inc.
12  * All rights reserved.
13  *
14  * This code is derived from software contributed to The NetBSD Foundation
15  * by Charles M. Hannum, Masaru Oki and Kouichi Matsuda.
16  *
17  * Redistribution and use in source and binary forms, with or without
18  * modification, are permitted provided that the following conditions
19  * are met:
20  * 1. Redistributions of source code must retain the above copyright
21  *    notice, this list of conditions and the following disclaimer.
22  * 2. Redistributions in binary form must reproduce the above copyright
23  *    notice, this list of conditions and the following disclaimer in the
24  *    documentation and/or other materials provided with the distribution.
25  * 3. All advertising materials mentioning features or use of this software
26  *    must display the following acknowledgement:
27  *	This product includes software developed by Charles M. Hannum.
28  * 4. The name of the author may not be used to endorse or promote products
29  *    derived from this software without specific prior written permission.
30  *
31  * Copyright (c) 1994 Jarle Greipsland
32  * All rights reserved.
33  *
34  * Redistribution and use in source and binary forms, with or without
35  * modification, are permitted provided that the following conditions
36  * are met:
37  * 1. Redistributions of source code must retain the above copyright
38  *    notice, this list of conditions and the following disclaimer.
39  * 2. Redistributions in binary form must reproduce the above copyright
40  *    notice, this list of conditions and the following disclaimer in the
41  *    documentation and/or other materials provided with the distribution.
42  * 3. The name of the author may not be used to endorse or promote products
43  *    derived from this software without specific prior written permission.
44  *
45  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
46  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
47  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
48  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
49  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
50  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
51  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
52  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
53  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
54  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
55  * POSSIBILITY OF SUCH DAMAGE.
56  */
57 /*
58  * [NetBSD for NEC PC-98 series]
59  *  Copyright (c) 1996, 1997, 1998
60  *	NetBSD/pc98 porting staff. All rights reserved.
61  *  Copyright (c) 1996, 1997, 1998
62  *	Kouichi Matsuda. All rights reserved.
63  */
64 
65 /*
66  * Acknowledgements: Many of the algorithms used in this driver are
67  * inspired by the work of Julian Elischer (julian@tfs.com) and
68  * Charles Hannum (mycroft@duality.gnu.ai.mit.edu).  Thanks a million!
69  */
70 
71 /* TODO list:
72  * 1) Get the DMA stuff working.
73  * 2) Get the iov/uio stuff working. Is this a good thing ???
74  * 3) Get the synch stuff working.
75  * 4) Rewrite it to use malloc for the acb structs instead of static alloc.?
76  */
77 
78 /*
79  * A few customizable items:
80  */
81 
82 /* Use doubleword transfers to/from SCSI chip.  Note: This requires
83  * motherboard support.  Basicly, some motherboard chipsets are able to
84  * split a 32 bit I/O operation into two 16 bit I/O operations,
85  * transparently to the processor.  This speeds up some things, notably long
86  * data transfers.
87  */
88 #define SPC_USE_DWORDS		0
89 
90 /* Synchronous data transfers? */
91 #define SPC_USE_SYNCHRONOUS	0
92 #define SPC_SYNC_REQ_ACK_OFS 	8
93 
94 /* Wide data transfers? */
95 #define	SPC_USE_WIDE		0
96 #define	SPC_MAX_WIDTH		0
97 
98 /* Max attempts made to transmit a message */
99 #define SPC_MSG_MAX_ATTEMPT	3 /* Not used now XXX */
100 
101 /*
102  * Some spin loop parameters (essentially how long to wait some places)
103  * The problem(?) is that sometimes we expect either to be able to transmit a
104  * byte or to get a new one from the SCSI bus pretty soon.  In order to avoid
105  * returning from the interrupt just to get yanked back for the next byte we
106  * may spin in the interrupt routine waiting for this byte to come.  How long?
107  * This is really (SCSI) device and processor dependent.  Tuneable, I guess.
108  */
109 #define SPC_MSGIN_SPIN	1 	/* Will spinwait upto ?ms for a new msg byte */
110 #define SPC_MSGOUT_SPIN	1
111 
112 /* Include debug functions?  At the end of this file there are a bunch of
113  * functions that will print out various information regarding queued SCSI
114  * commands, driver state and chip contents.  You can call them from the
115  * kernel debugger.  If you set SPC_DEBUG to 0 they are not included (the
116  * kernel uses less memory) but you lose the debugging facilities.
117  */
118 #define SPC_DEBUG		1
119 
120 #define	SPC_ABORT_TIMEOUT	2000	/* time to wait for abort */
121 
122 /* End of customizable parameters */
123 
124 /*
125  * MB89352 SCSI Protocol Controller (SPC) routines.
126  */
127 
128 #include "opt_ddb.h"
129 
130 #include <sys/types.h>
131 #include <sys/param.h>
132 #include <sys/systm.h>
133 #include <sys/kernel.h>
134 #include <sys/errno.h>
135 #include <sys/ioctl.h>
136 #include <sys/device.h>
137 #include <sys/buf.h>
138 #include <sys/proc.h>
139 #include <sys/user.h>
140 #include <sys/queue.h>
141 
142 #include <machine/intr.h>
143 #include <machine/bus.h>
144 
145 #include <dev/scsipi/scsi_all.h>
146 #include <dev/scsipi/scsipi_all.h>
147 #include <dev/scsipi/scsi_message.h>
148 #include <dev/scsipi/scsiconf.h>
149 
150 #include <dev/ic/mb89352reg.h>
151 #include <dev/ic/mb89352var.h>
152 
153 #ifndef DDB
154 #define	Debugger() panic("should call debugger here (mb89352.c)")
155 #endif /* ! DDB */
156 
157 #if SPC_DEBUG
158 int spc_debug = 0x00; /* SPC_SHOWSTART|SPC_SHOWMISC|SPC_SHOWTRACE; */
159 #endif
160 
161 void	spc_minphys	__P((struct buf *));
162 void	spc_done	__P((struct spc_softc *, struct spc_acb *));
163 void	spc_dequeue	__P((struct spc_softc *, struct spc_acb *));
164 int	spc_scsi_cmd	__P((struct scsipi_xfer *));
165 int	spc_poll	__P((struct spc_softc *, struct scsipi_xfer *, int));
166 integrate void	spc_sched_msgout __P((struct spc_softc *, u_char));
167 integrate void	spc_setsync	__P((struct spc_softc *, struct spc_tinfo *));
168 void	spc_select	__P((struct spc_softc *, struct spc_acb *));
169 void	spc_timeout	__P((void *));
170 void	spc_scsi_reset	__P((struct spc_softc *));
171 void	spc_reset	__P((struct spc_softc *));
172 void	spc_free_acb	__P((struct spc_softc *, struct spc_acb *, int));
173 struct spc_acb* spc_get_acb __P((struct spc_softc *, int));
174 int	spc_reselect	__P((struct spc_softc *, int));
175 void	spc_sense	__P((struct spc_softc *, struct spc_acb *));
176 void	spc_msgin	__P((struct spc_softc *));
177 void	spc_abort	__P((struct spc_softc *, struct spc_acb *));
178 void	spc_msgout	__P((struct spc_softc *));
179 int	spc_dataout_pio	__P((struct spc_softc *, u_char *, int));
180 int	spc_datain_pio	__P((struct spc_softc *, u_char *, int));
181 #if SPC_DEBUG
182 void	spc_print_acb	__P((struct spc_acb *));
183 void	spc_dump_driver __P((struct spc_softc *));
184 void	spc_dump89352	__P((struct spc_softc *));
185 void	spc_show_scsi_cmd __P((struct spc_acb *));
186 void	spc_print_active_acb __P((void));
187 #endif
188 
189 extern struct cfdriver spc_cd;
190 
191 struct scsipi_device spc_dev = {
192 	NULL,			/* Use default error handler */
193 	NULL,			/* have a queue, served by this */
194 	NULL,			/* have no async handler */
195 	NULL,			/* Use default 'done' routine */
196 };
197 
198 /*
199  * INITIALIZATION ROUTINES (probe, attach ++)
200  */
201 
202 /*
203  * Do the real search-for-device.
204  * Prerequisite: sc->sc_iobase should be set to the proper value
205  */
206 int
207 spc_find(iot, ioh, bdid)
208 	bus_space_tag_t iot;
209 	bus_space_handle_t ioh;
210 	int bdid;
211 {
212 	long timeout = SPC_ABORT_TIMEOUT;
213 
214 	SPC_TRACE(("spc: probing for spc-chip\n"));
215 	/*
216 	 * Disable interrupts then reset the FUJITSU chip.
217 	 */
218 	bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST);
219 	bus_space_write_1(iot, ioh, SCMD, 0);
220 	bus_space_write_1(iot, ioh, PCTL, 0);
221 	bus_space_write_1(iot, ioh, TEMP, 0);
222 	bus_space_write_1(iot, ioh, TCH, 0);
223 	bus_space_write_1(iot, ioh, TCM, 0);
224 	bus_space_write_1(iot, ioh, TCL, 0);
225 	bus_space_write_1(iot, ioh, INTS, 0);
226 	bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB);
227 	bus_space_write_1(iot, ioh, BDID, bdid);
228 	delay(400);
229 	bus_space_write_1(iot, ioh, SCTL, bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE);
230 
231 	/* The following detection is derived from spc.c
232 	 * (by Takahide Matsutsuka) in FreeBSD/pccard-test.
233 	 */
234 	while (bus_space_read_1(iot, ioh, PSNS) && timeout)
235 		timeout--;
236 	if (!timeout) {
237 		printf("spc: find failed\n");
238 		return 0;
239 	}
240 
241 	SPC_START(("SPC found"));
242 	return 1;
243 }
244 
245 void
246 spcattach(sc)
247 	struct spc_softc *sc;
248 {
249 
250 	SPC_TRACE(("spcattach  "));
251 	sc->sc_state = SPC_INIT;
252 
253 	sc->sc_freq = 20;	/* XXXX Assume 20 MHz. */
254 
255 #if SPC_USE_SYNCHRONOUS
256 	/*
257 	 * These are the bounds of the sync period, based on the frequency of
258 	 * the chip's clock input and the size and offset of the sync period
259 	 * register.
260 	 *
261 	 * For a 20Mhz clock, this gives us 25, or 100nS, or 10MB/s, as a
262 	 * maximum transfer rate, and 112.5, or 450nS, or 2.22MB/s, as a
263 	 * minimum transfer rate.
264 	 */
265 	sc->sc_minsync = (2 * 250) / sc->sc_freq;
266 	sc->sc_maxsync = (9 * 250) / sc->sc_freq;
267 #endif
268 
269 	spc_init(sc);	/* Init chip and driver */
270 
271 	/*
272 	 * Fill in the adapter.
273 	 */
274 	sc->sc_adapter.scsipi_cmd = spc_scsi_cmd;
275 	sc->sc_adapter.scsipi_minphys = spc_minphys;
276 
277 	/*
278 	 * Fill in the prototype scsipi_link
279 	 */
280 	sc->sc_link.scsipi_scsi.channel = SCSI_CHANNEL_ONLY_ONE;
281 	sc->sc_link.adapter_softc = sc;
282 	sc->sc_link.scsipi_scsi.adapter_target = sc->sc_initiator;
283 	sc->sc_link.adapter = &sc->sc_adapter;
284 	sc->sc_link.device = &spc_dev;
285 	sc->sc_link.openings = 2;
286 	sc->sc_link.scsipi_scsi.max_target = 7;
287 	sc->sc_link.scsipi_scsi.max_lun = 7;
288 	sc->sc_link.type = BUS_SCSI;
289 
290 	/*
291 	 * ask the adapter what subunits are present
292 	 */
293 	config_found(&sc->sc_dev, &sc->sc_link, scsiprint);
294 }
295 
296 /*
297  * Initialize MB89352 chip itself
298  * The following conditions should hold:
299  * spc_isa_probe should have succeeded, i.e. the iobase address in spc_softc
300  * must be valid.
301  */
302 void
303 spc_reset(sc)
304 	struct spc_softc *sc;
305 {
306 	bus_space_tag_t iot = sc->sc_iot;
307 	bus_space_handle_t ioh = sc->sc_ioh;
308 
309 	SPC_TRACE(("spc_reset  "));
310 	/*
311 	 * Disable interrupts then reset the FUJITSU chip.
312 	 */
313 	bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST);
314 	bus_space_write_1(iot, ioh, SCMD, 0);
315 	bus_space_write_1(iot, ioh, PCTL, 0);
316 	bus_space_write_1(iot, ioh, TEMP, 0);
317 	bus_space_write_1(iot, ioh, TCH, 0);
318 	bus_space_write_1(iot, ioh, TCM, 0);
319 	bus_space_write_1(iot, ioh, TCL, 0);
320 	bus_space_write_1(iot, ioh, INTS, 0);
321 	bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB);
322 	bus_space_write_1(iot, ioh, BDID, sc->sc_initiator);
323 	delay(400);
324 	bus_space_write_1(iot, ioh, SCTL, bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE);
325 }
326 
327 
328 /*
329  * Pull the SCSI RST line for 500us.
330  */
331 void
332 spc_scsi_reset(sc)
333 	struct spc_softc *sc;
334 {
335 	bus_space_tag_t iot = sc->sc_iot;
336 	bus_space_handle_t ioh = sc->sc_ioh;
337 
338 	SPC_TRACE(("spc_scsi_reset  "));
339 	bus_space_write_1(iot, ioh, SCMD, bus_space_read_1(iot, ioh, SCMD) | SCMD_RST);
340 	delay(500);
341 	bus_space_write_1(iot, ioh, SCMD, bus_space_read_1(iot, ioh, SCMD) & ~SCMD_RST);
342 	delay(50);
343 }
344 
345 /*
346  * Initialize spc SCSI driver.
347  */
348 void
349 spc_init(sc)
350 	struct spc_softc *sc;
351 {
352 	struct spc_acb *acb;
353 	int r;
354 
355 	SPC_TRACE(("spc_init  "));
356 	spc_reset(sc);
357 	spc_scsi_reset(sc);
358 	spc_reset(sc);
359 
360 	if (sc->sc_state == SPC_INIT) {
361 		/* First time through; initialize. */
362 		TAILQ_INIT(&sc->ready_list);
363 		TAILQ_INIT(&sc->nexus_list);
364 		TAILQ_INIT(&sc->free_list);
365 		sc->sc_nexus = NULL;
366 		acb = sc->sc_acb;
367 		bzero(acb, sizeof(sc->sc_acb));
368 		for (r = 0; r < sizeof(sc->sc_acb) / sizeof(*acb); r++) {
369 			TAILQ_INSERT_TAIL(&sc->free_list, acb, chain);
370 			acb++;
371 		}
372 		bzero(&sc->sc_tinfo, sizeof(sc->sc_tinfo));
373 	} else {
374 		/* Cancel any active commands. */
375 		sc->sc_state = SPC_CLEANING;
376 		if ((acb = sc->sc_nexus) != NULL) {
377 			acb->xs->error = XS_DRIVER_STUFFUP;
378 			callout_stop(&acb->xs->xs_callout);
379 			spc_done(sc, acb);
380 		}
381 		while ((acb = sc->nexus_list.tqh_first) != NULL) {
382 			acb->xs->error = XS_DRIVER_STUFFUP;
383 			callout_stop(&acb->xs->xs_callout);
384 			spc_done(sc, acb);
385 		}
386 	}
387 
388 	sc->sc_prevphase = PH_INVALID;
389 	for (r = 0; r < 8; r++) {
390 		struct spc_tinfo *ti = &sc->sc_tinfo[r];
391 
392 		ti->flags = 0;
393 #if SPC_USE_SYNCHRONOUS
394 		ti->flags |= DO_SYNC;
395 		ti->period = sc->sc_minsync;
396 		ti->offset = SPC_SYNC_REQ_ACK_OFS;
397 #else
398 		ti->period = ti->offset = 0;
399 #endif
400 #if SPC_USE_WIDE
401 		ti->flags |= DO_WIDE;
402 		ti->width = SPC_MAX_WIDTH;
403 #else
404 		ti->width = 0;
405 #endif
406 	}
407 
408 	sc->sc_state = SPC_IDLE;
409 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, SCTL,
410 	    bus_space_read_1(sc->sc_iot, sc->sc_ioh, SCTL) | SCTL_INTR_ENAB);
411 }
412 
413 void
414 spc_free_acb(sc, acb, flags)
415 	struct spc_softc *sc;
416 	struct spc_acb *acb;
417 	int flags;
418 {
419 	int s;
420 
421 	SPC_TRACE(("spc_free_acb  "));
422 	s = splbio();
423 
424 	acb->flags = 0;
425 	TAILQ_INSERT_HEAD(&sc->free_list, acb, chain);
426 
427 	/*
428 	 * If there were none, wake anybody waiting for one to come free,
429 	 * starting with queued entries.
430 	 */
431 	if (acb->chain.tqe_next == 0)
432 		wakeup(&sc->free_list);
433 
434 	splx(s);
435 }
436 
437 struct spc_acb *
438 spc_get_acb(sc, flags)
439 	struct spc_softc *sc;
440 	int flags;
441 {
442 	struct spc_acb *acb;
443 	int s;
444 
445 	SPC_TRACE(("spc_get_acb  "));
446 	s = splbio();
447 
448 	while ((acb = sc->free_list.tqh_first) == NULL &&
449 	       (flags & XS_CTL_NOSLEEP) == 0)
450 		tsleep(&sc->free_list, PRIBIO, "spcacb", 0);
451 	if (acb) {
452 		TAILQ_REMOVE(&sc->free_list, acb, chain);
453 		acb->flags |= ACB_ALLOC;
454 	}
455 
456 	splx(s);
457 	return acb;
458 }
459 
460 /*
461  * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS
462  */
463 
464 /*
465  * Expected sequence:
466  * 1) Command inserted into ready list
467  * 2) Command selected for execution
468  * 3) Command won arbitration and has selected target device
469  * 4) Send message out (identify message, eventually also sync.negotiations)
470  * 5) Send command
471  * 5a) Receive disconnect message, disconnect.
472  * 5b) Reselected by target
473  * 5c) Receive identify message from target.
474  * 6) Send or receive data
475  * 7) Receive status
476  * 8) Receive message (command complete etc.)
477  * 9) If status == SCSI_CHECK construct a synthetic request sense SCSI cmd.
478  *    Repeat 2-8 (no disconnects please...)
479  */
480 
481 /*
482  * Start a SCSI-command
483  * This function is called by the higher level SCSI-driver to queue/run
484  * SCSI-commands.
485  */
486 int
487 spc_scsi_cmd(xs)
488 	struct scsipi_xfer *xs;
489 {
490 	struct scsipi_link *sc_link = xs->sc_link;
491 	struct spc_softc *sc = sc_link->adapter_softc;
492 	struct spc_acb *acb;
493 	int s, flags;
494 
495 	SPC_TRACE(("spc_scsi_cmd  "));
496 	SPC_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen,
497 	    sc_link->scsipi_scsi.target));
498 
499 	flags = xs->xs_control;
500 	if ((acb = spc_get_acb(sc, flags)) == NULL) {
501 		xs->error = XS_DRIVER_STUFFUP;
502 		return TRY_AGAIN_LATER;
503 	}
504 
505 	/* Initialize acb */
506 	acb->xs = xs;
507 	acb->timeout = xs->timeout;
508 
509 	if (xs->xs_control & XS_CTL_RESET) {
510 		acb->flags |= ACB_RESET;
511 		acb->scsipi_cmd_length = 0;
512 		acb->data_length = 0;
513 	} else {
514 		bcopy(xs->cmd, &acb->scsipi_cmd, xs->cmdlen);
515 #if 1
516 		acb->scsipi_cmd.bytes[0] |= sc_link->scsipi_scsi.lun << 5; /* XXX? */
517 #endif
518 		acb->scsipi_cmd_length = xs->cmdlen;
519 		acb->data_addr = xs->data;
520 		acb->data_length = xs->datalen;
521 	}
522 	acb->target_stat = 0;
523 
524 	s = splbio();
525 
526 	TAILQ_INSERT_TAIL(&sc->ready_list, acb, chain);
527 	/*
528 	 * Start scheduling unless a queue process is in progress.
529 	 */
530 	if (sc->sc_state == SPC_IDLE)
531 		spc_sched(sc);
532 	/*
533 	 * After successful sending, check if we should return just now.
534 	 * If so, return SUCCESSFULLY_QUEUED.
535 	 */
536 
537 	splx(s);
538 
539 	if ((flags & XS_CTL_POLL) == 0)
540 		return SUCCESSFULLY_QUEUED;
541 
542 	/* Not allowed to use interrupts, use polling instead */
543 	s = splbio();
544 	if (spc_poll(sc, xs, acb->timeout)) {
545 		spc_timeout(acb);
546 		if (spc_poll(sc, xs, acb->timeout))
547 			spc_timeout(acb);
548 	}
549 	splx(s);
550 	return COMPLETE;
551 }
552 
553 /*
554  * Adjust transfer size in buffer structure
555  */
556 void
557 spc_minphys(bp)
558 	struct buf *bp;
559 {
560 
561 	SPC_TRACE(("spc_minphys  "));
562 	minphys(bp);
563 }
564 
565 /*
566  * Used when interrupt driven I/O isn't allowed, e.g. during boot.
567  */
568 int
569 spc_poll(sc, xs, count)
570 	struct spc_softc *sc;
571 	struct scsipi_xfer *xs;
572 	int count;
573 {
574 	bus_space_tag_t iot = sc->sc_iot;
575 	bus_space_handle_t ioh = sc->sc_ioh;
576 
577 	SPC_TRACE(("spc_poll  "));
578 	while (count) {
579 		/*
580 		 * If we had interrupts enabled, would we
581 		 * have got an interrupt?
582 		 */
583 		if (bus_space_read_1(iot, ioh, INTS) != 0)
584 			spcintr(sc);
585 		if ((xs->xs_status & XS_STS_DONE) != 0)
586 			return 0;
587 		delay(1000);
588 		count--;
589 	}
590 	return 1;
591 }
592 
593 /*
594  * LOW LEVEL SCSI UTILITIES
595  */
596 
597 integrate void
598 spc_sched_msgout(sc, m)
599 	struct spc_softc *sc;
600 	u_char m;
601 {
602 	bus_space_tag_t iot = sc->sc_iot;
603 	bus_space_handle_t ioh = sc->sc_ioh;
604 
605 	SPC_TRACE(("spc_sched_msgout  "));
606 	if (sc->sc_msgpriq == 0)
607 		bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN);
608 	sc->sc_msgpriq |= m;
609 }
610 
611 /*
612  * Set synchronous transfer offset and period.
613  */
614 integrate void
615 spc_setsync(sc, ti)
616 	struct spc_softc *sc;
617 	struct spc_tinfo *ti;
618 {
619 #if SPC_USE_SYNCHRONOUS
620 	bus_space_tag_t iot = sc->sc_iot;
621 	bus_space_handle_t ioh = sc->sc_ioh;
622 
623 	SPC_TRACE(("spc_setsync  "));
624 	if (ti->offset != 0)
625 		bus_space_write_1(iot, ioh, TMOD,
626 		    ((ti->period * sc->sc_freq) / 250 - 2) << 4 | ti->offset);
627 	else
628 		bus_space_write_1(iot, ioh, TMOD, 0);
629 #endif
630 }
631 
632 /*
633  * Start a selection.  This is used by spc_sched() to select an idle target,
634  * and by spc_done() to immediately reselect a target to get sense information.
635  */
636 void
637 spc_select(sc, acb)
638 	struct spc_softc *sc;
639 	struct spc_acb *acb;
640 {
641 	struct scsipi_link *sc_link = acb->xs->sc_link;
642 	int target = sc_link->scsipi_scsi.target;
643 	struct spc_tinfo *ti = &sc->sc_tinfo[target];
644 	bus_space_tag_t iot = sc->sc_iot;
645 	bus_space_handle_t ioh = sc->sc_ioh;
646 
647 	SPC_TRACE(("spc_select  "));
648 	spc_setsync(sc, ti);
649 
650 #if 0
651 	bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN);
652 #endif
653 #ifdef x68k			/* XXX? */
654 	do {
655 		asm ("nop");
656 	} while (bus_space_read_1(iot, ioh, SSTS) &
657 		 (SSTS_ACTIVE|SSTS_TARGET|SSTS_BUSY));
658 #endif
659 
660 	bus_space_write_1(iot, ioh, PCTL, 0);
661 	bus_space_write_1(iot, ioh, TEMP, (1 << sc->sc_initiator) | (1 << target));
662 	/*
663 	 * Setup BSY timeout (selection timeout).
664 	 * 250ms according to the SCSI specification.
665 	 * T = (X * 256 + 15) * Tclf * 2  (Tclf = 200ns on x68k)
666 	 * To setup 256ms timeout,
667 	 * 128000ns/200ns = X * 256 + 15
668 	 * 640 - 15 = X * 256
669 	 * X = 625 / 256
670 	 * X = 2 + 113 / 256
671 	 *  ==> tch = 2, tcm = 113 (correct?)
672 	 */
673 	bus_space_write_1(iot, ioh, TCH, 2);
674 	bus_space_write_1(iot, ioh, TCM, 113);
675 	/* Time to the information transfer phase start. */
676 	bus_space_write_1(iot, ioh, TCL, 3);
677 	bus_space_write_1(iot, ioh, SCMD, SCMD_SELECT);
678 
679 	sc->sc_state = SPC_SELECTING;
680 }
681 
682 int
683 spc_reselect(sc, message)
684 	struct spc_softc *sc;
685 	int message;
686 {
687 	u_char selid, target, lun;
688 	struct spc_acb *acb;
689 	struct scsipi_link *sc_link;
690 	struct spc_tinfo *ti;
691 
692 	SPC_TRACE(("spc_reselect  "));
693 	/*
694 	 * The SCSI chip made a snapshot of the data bus while the reselection
695 	 * was being negotiated.  This enables us to determine which target did
696 	 * the reselect.
697 	 */
698 	selid = sc->sc_selid & ~(1 << sc->sc_initiator);
699 	if (selid & (selid - 1)) {
700 		printf("%s: reselect with invalid selid %02x; sending DEVICE RESET\n",
701 		    sc->sc_dev.dv_xname, selid);
702 		SPC_BREAK();
703 		goto reset;
704 	}
705 
706 	/*
707 	 * Search wait queue for disconnected cmd
708 	 * The list should be short, so I haven't bothered with
709 	 * any more sophisticated structures than a simple
710 	 * singly linked list.
711 	 */
712 	target = ffs(selid) - 1;
713 	lun = message & 0x07;
714 	for (acb = sc->nexus_list.tqh_first; acb != NULL;
715 	     acb = acb->chain.tqe_next) {
716 		sc_link = acb->xs->sc_link;
717 		if (sc_link->scsipi_scsi.target == target &&
718 		    sc_link->scsipi_scsi.lun == lun)
719 			break;
720 	}
721 	if (acb == NULL) {
722 		printf("%s: reselect from target %d lun %d with no nexus; sending ABORT\n",
723 		    sc->sc_dev.dv_xname, target, lun);
724 		SPC_BREAK();
725 		goto abort;
726 	}
727 
728 	/* Make this nexus active again. */
729 	TAILQ_REMOVE(&sc->nexus_list, acb, chain);
730 	sc->sc_state = SPC_CONNECTED;
731 	sc->sc_nexus = acb;
732 	ti = &sc->sc_tinfo[target];
733 	ti->lubusy |= (1 << lun);
734 	spc_setsync(sc, ti);
735 
736 	if (acb->flags & ACB_RESET)
737 		spc_sched_msgout(sc, SEND_DEV_RESET);
738 	else if (acb->flags & ACB_ABORT)
739 		spc_sched_msgout(sc, SEND_ABORT);
740 
741 	/* Do an implicit RESTORE POINTERS. */
742 	sc->sc_dp = acb->data_addr;
743 	sc->sc_dleft = acb->data_length;
744 	sc->sc_cp = (u_char *)&acb->scsipi_cmd;
745 	sc->sc_cleft = acb->scsipi_cmd_length;
746 
747 	return (0);
748 
749 reset:
750 	spc_sched_msgout(sc, SEND_DEV_RESET);
751 	return (1);
752 
753 abort:
754 	spc_sched_msgout(sc, SEND_ABORT);
755 	return (1);
756 }
757 
758 /*
759  * Schedule a SCSI operation.  This has now been pulled out of the interrupt
760  * handler so that we may call it from spc_scsi_cmd and spc_done.  This may
761  * save us an unecessary interrupt just to get things going.  Should only be
762  * called when state == SPC_IDLE and at bio pl.
763  */
764 void
765 spc_sched(sc)
766 	struct spc_softc *sc;
767 {
768 	struct spc_acb *acb;
769 	struct scsipi_link *sc_link;
770 	struct spc_tinfo *ti;
771 
772 	/* missing the hw, just return and wait for our hw */
773 	if (sc->sc_flags & SPC_INACTIVE)
774 		return;
775 	SPC_TRACE(("spc_sched  "));
776 	/*
777 	 * Find first acb in ready queue that is for a target/lunit pair that
778 	 * is not busy.
779 	 */
780 	for (acb = sc->ready_list.tqh_first; acb != NULL;
781 	    acb = acb->chain.tqe_next) {
782 		sc_link = acb->xs->sc_link;
783 		ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
784 		if ((ti->lubusy & (1 << sc_link->scsipi_scsi.lun)) == 0) {
785 			SPC_MISC(("selecting %d:%d  ",
786 			    sc_link->scsipi_scsi.target, sc_link->scsipi_scsi.lun));
787 			TAILQ_REMOVE(&sc->ready_list, acb, chain);
788 			sc->sc_nexus = acb;
789 			spc_select(sc, acb);
790 			return;
791 		} else
792 			SPC_MISC(("%d:%d busy\n",
793 			    sc_link->scsipi_scsi.target, sc_link->scsipi_scsi.lun));
794 	}
795 	SPC_MISC(("idle  "));
796 	/* Nothing to start; just enable reselections and wait. */
797 }
798 
799 void
800 spc_sense(sc, acb)
801 	struct spc_softc *sc;
802 	struct spc_acb *acb;
803 {
804 	struct scsipi_xfer *xs = acb->xs;
805 	struct scsipi_link *sc_link = xs->sc_link;
806 	struct spc_tinfo *ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
807 	struct scsipi_sense *ss = (void *)&acb->scsipi_cmd;
808 
809 	SPC_MISC(("requesting sense  "));
810 	/* Next, setup a request sense command block */
811 	bzero(ss, sizeof(*ss));
812 	ss->opcode = REQUEST_SENSE;
813 	ss->byte2 = sc_link->scsipi_scsi.lun << 5;
814 	ss->length = sizeof(struct scsipi_sense_data);
815 	acb->scsipi_cmd_length = sizeof(*ss);
816 	acb->data_addr = (char *)&xs->sense.scsi_sense;
817 	acb->data_length = sizeof(struct scsipi_sense_data);
818 	acb->flags |= ACB_SENSE;
819 	ti->senses++;
820 	if (acb->flags & ACB_NEXUS)
821 		ti->lubusy &= ~(1 << sc_link->scsipi_scsi.lun);
822 	if (acb == sc->sc_nexus) {
823 		spc_select(sc, acb);
824 	} else {
825 		spc_dequeue(sc, acb);
826 		TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
827 		if (sc->sc_state == SPC_IDLE)
828 			spc_sched(sc);
829 	}
830 }
831 
832 /*
833  * POST PROCESSING OF SCSI_CMD (usually current)
834  */
835 void
836 spc_done(sc, acb)
837 	struct spc_softc *sc;
838 	struct spc_acb *acb;
839 {
840 	struct scsipi_xfer *xs = acb->xs;
841 	struct scsipi_link *sc_link = xs->sc_link;
842 	struct spc_tinfo *ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
843 
844 	SPC_TRACE(("spc_done  "));
845 
846 	/*
847 	 * Now, if we've come here with no error code, i.e. we've kept the
848 	 * initial XS_NOERROR, and the status code signals that we should
849 	 * check sense, we'll need to set up a request sense cmd block and
850 	 * push the command back into the ready queue *before* any other
851 	 * commands for this target/lunit, else we lose the sense info.
852 	 * We don't support chk sense conditions for the request sense cmd.
853 	 */
854 	if (xs->error == XS_NOERROR) {
855 		if (acb->flags & ACB_ABORT) {
856 			xs->error = XS_DRIVER_STUFFUP;
857 		} else if (acb->flags & ACB_SENSE) {
858 			xs->error = XS_SENSE;
859 		} else {
860 			switch (acb->target_stat) {
861 			case SCSI_CHECK:
862 				/* First, save the return values */
863 				xs->resid = acb->data_length;
864 				xs->status = acb->target_stat;
865 				spc_sense(sc, acb);
866 				return;
867 			case SCSI_BUSY:
868 				xs->error = XS_BUSY;
869 				break;
870 			case SCSI_OK:
871 				xs->resid = acb->data_length;
872 				break;
873 			default:
874 				xs->error = XS_DRIVER_STUFFUP;
875 #if SPC_DEBUG
876 				printf("%s: spc_done: bad stat 0x%x\n",
877 					sc->sc_dev.dv_xname, acb->target_stat);
878 #endif
879 				break;
880 			}
881 		}
882 	}
883 
884 	xs->xs_status |= XS_STS_DONE;
885 
886 #if SPC_DEBUG
887 	if ((spc_debug & SPC_SHOWMISC) != 0) {
888 		if (xs->resid != 0)
889 			printf("resid=%d ", xs->resid);
890 		if (xs->error == XS_SENSE)
891 			printf("sense=0x%02x\n", xs->sense.scsi_sense.error_code);
892 		else
893 			printf("error=%d\n", xs->error);
894 	}
895 #endif
896 
897 	/*
898 	 * Remove the ACB from whatever queue it happens to be on.
899 	 */
900 	if (acb->flags & ACB_NEXUS)
901 		ti->lubusy &= ~(1 << sc_link->scsipi_scsi.lun);
902 	if (acb == sc->sc_nexus) {
903 		sc->sc_nexus = NULL;
904 		sc->sc_state = SPC_IDLE;
905 		spc_sched(sc);
906 	} else
907 		spc_dequeue(sc, acb);
908 
909 	spc_free_acb(sc, acb, xs->xs_control);
910 	ti->cmds++;
911 	scsipi_done(xs);
912 }
913 
914 void
915 spc_dequeue(sc, acb)
916 	struct spc_softc *sc;
917 	struct spc_acb *acb;
918 {
919 
920 	SPC_TRACE(("spc_dequeue  "));
921 	if (acb->flags & ACB_NEXUS) {
922 		TAILQ_REMOVE(&sc->nexus_list, acb, chain);
923 	} else {
924 		TAILQ_REMOVE(&sc->ready_list, acb, chain);
925 	}
926 }
927 
928 /*
929  * INTERRUPT/PROTOCOL ENGINE
930  */
931 
932 #define IS1BYTEMSG(m) (((m) != 0x01 && (m) < 0x20) || (m) >= 0x80)
933 #define IS2BYTEMSG(m) (((m) & 0xf0) == 0x20)
934 #define ISEXTMSG(m) ((m) == 0x01)
935 
936 /*
937  * Precondition:
938  * The SCSI bus is already in the MSGI phase and there is a message byte
939  * on the bus, along with an asserted REQ signal.
940  */
941 void
942 spc_msgin(sc)
943 	struct spc_softc *sc;
944 {
945 	bus_space_tag_t iot = sc->sc_iot;
946 	bus_space_handle_t ioh = sc->sc_ioh;
947 	int n;
948 
949 	SPC_TRACE(("spc_msgin  "));
950 
951 	if (sc->sc_prevphase == PH_MSGIN) {
952 		/* This is a continuation of the previous message. */
953 		n = sc->sc_imp - sc->sc_imess;
954 		goto nextbyte;
955 	}
956 
957 	/* This is a new MESSAGE IN phase.  Clean up our state. */
958 	sc->sc_flags &= ~SPC_DROP_MSGIN;
959 
960 nextmsg:
961 	n = 0;
962 	sc->sc_imp = &sc->sc_imess[n];
963 
964 nextbyte:
965 	/*
966 	 * Read a whole message, but don't ack the last byte.  If we reject the
967 	 * message, we have to assert ATN during the message transfer phase
968 	 * itself.
969 	 */
970 	for (;;) {
971 #if 0
972 		for (;;) {
973 			if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0)
974 				break;
975 			/* Wait for REQINIT.  XXX Need timeout. */
976 		}
977 #endif
978 		if (bus_space_read_1(iot, ioh, INTS) != 0) {
979 			/*
980 			 * Target left MESSAGE IN, probably because it
981 			 * a) noticed our ATN signal, or
982 			 * b) ran out of messages.
983 			 */
984 			goto out;
985 		}
986 
987 		/* If parity error, just dump everything on the floor. */
988 		if ((bus_space_read_1(iot, ioh, SERR) &
989 		     (SERR_SCSI_PAR|SERR_SPC_PAR)) != 0) {
990 			sc->sc_flags |= SPC_DROP_MSGIN;
991 			spc_sched_msgout(sc, SEND_PARITY_ERROR);
992 		}
993 
994 		/* send TRANSFER command. */
995 		bus_space_write_1(iot, ioh, TCH, 0);
996 		bus_space_write_1(iot, ioh, TCM, 0);
997 		bus_space_write_1(iot, ioh, TCL, 1);
998 		bus_space_write_1(iot, ioh, PCTL,
999 				  sc->sc_phase | PCTL_BFINT_ENAB);
1000 #ifdef x68k
1001 		bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* | SCMD_PROG_XFR */
1002 #else
1003 		bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR);	/* XXX */
1004 #endif
1005 		for (;;) {
1006 			/*if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0
1007 				&& (bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) != 0)*/
1008 			if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) == 0)
1009 				break;
1010 			if (bus_space_read_1(iot, ioh, INTS) != 0)
1011 				goto out;
1012 		}
1013 
1014 		/* Gather incoming message bytes if needed. */
1015 		if ((sc->sc_flags & SPC_DROP_MSGIN) == 0) {
1016 			if (n >= SPC_MAX_MSG_LEN) {
1017 				(void) bus_space_read_1(iot, ioh, DREG);
1018 				sc->sc_flags |= SPC_DROP_MSGIN;
1019 				spc_sched_msgout(sc, SEND_REJECT);
1020 			} else {
1021 				*sc->sc_imp++ = bus_space_read_1(iot, ioh, DREG);
1022 				n++;
1023 				/*
1024 				 * This testing is suboptimal, but most
1025 				 * messages will be of the one byte variety, so
1026 				 * it should not affect performance
1027 				 * significantly.
1028 				 */
1029 				if (n == 1 && IS1BYTEMSG(sc->sc_imess[0]))
1030 					break;
1031 				if (n == 2 && IS2BYTEMSG(sc->sc_imess[0]))
1032 					break;
1033 				if (n >= 3 && ISEXTMSG(sc->sc_imess[0]) &&
1034 				    n == sc->sc_imess[1] + 2)
1035 					break;
1036 			}
1037 		} else
1038 			(void) bus_space_read_1(iot, ioh, DREG);
1039 
1040 		/*
1041 		 * If we reach this spot we're either:
1042 		 * a) in the middle of a multi-byte message, or
1043 		 * b) dropping bytes.
1044 		 */
1045 #if 0
1046 		/* Ack the last byte read. */
1047 		/*(void) bus_space_read_1(iot, ioh, DREG);*/
1048 		while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0)
1049 			;
1050 #endif
1051 	}
1052 
1053 	SPC_MISC(("n=%d imess=0x%02x  ", n, sc->sc_imess[0]));
1054 
1055 	/* We now have a complete message.  Parse it. */
1056 	switch (sc->sc_state) {
1057 		struct spc_acb *acb;
1058 		struct scsipi_link *sc_link;
1059 		struct spc_tinfo *ti;
1060 
1061 	case SPC_CONNECTED:
1062 		SPC_ASSERT(sc->sc_nexus != NULL);
1063 		acb = sc->sc_nexus;
1064 		ti = &sc->sc_tinfo[acb->xs->sc_link->scsipi_scsi.target];
1065 
1066 		switch (sc->sc_imess[0]) {
1067 		case MSG_CMDCOMPLETE:
1068 			if (sc->sc_dleft < 0) {
1069 				sc_link = acb->xs->sc_link;
1070 				printf("%s: %d extra bytes from %d:%d\n",
1071 				    sc->sc_dev.dv_xname, -sc->sc_dleft,
1072 				    sc_link->scsipi_scsi.target, sc_link->scsipi_scsi.lun);
1073 				acb->data_length = 0;
1074 			}
1075 			acb->xs->resid = acb->data_length = sc->sc_dleft;
1076 			sc->sc_state = SPC_CMDCOMPLETE;
1077 			break;
1078 
1079 		case MSG_PARITY_ERROR:
1080 			/* Resend the last message. */
1081 			spc_sched_msgout(sc, sc->sc_lastmsg);
1082 			break;
1083 
1084 		case MSG_MESSAGE_REJECT:
1085 			SPC_MISC(("message rejected %02x  ", sc->sc_lastmsg));
1086 			switch (sc->sc_lastmsg) {
1087 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE
1088 			case SEND_IDENTIFY:
1089 				ti->flags &= ~(DO_SYNC | DO_WIDE);
1090 				ti->period = ti->offset = 0;
1091 				spc_setsync(sc, ti);
1092 				ti->width = 0;
1093 				break;
1094 #endif
1095 #if SPC_USE_SYNCHRONOUS
1096 			case SEND_SDTR:
1097 				ti->flags &= ~DO_SYNC;
1098 				ti->period = ti->offset = 0;
1099 				spc_setsync(sc, ti);
1100 				break;
1101 #endif
1102 #if SPC_USE_WIDE
1103 			case SEND_WDTR:
1104 				ti->flags &= ~DO_WIDE;
1105 				ti->width = 0;
1106 				break;
1107 #endif
1108 			case SEND_INIT_DET_ERR:
1109 				spc_sched_msgout(sc, SEND_ABORT);
1110 				break;
1111 			}
1112 			break;
1113 
1114 		case MSG_NOOP:
1115 			break;
1116 
1117 		case MSG_DISCONNECT:
1118 			ti->dconns++;
1119 			sc->sc_state = SPC_DISCONNECT;
1120 			break;
1121 
1122 		case MSG_SAVEDATAPOINTER:
1123 			acb->data_addr = sc->sc_dp;
1124 			acb->data_length = sc->sc_dleft;
1125 			break;
1126 
1127 		case MSG_RESTOREPOINTERS:
1128 			sc->sc_dp = acb->data_addr;
1129 			sc->sc_dleft = acb->data_length;
1130 			sc->sc_cp = (u_char *)&acb->scsipi_cmd;
1131 			sc->sc_cleft = acb->scsipi_cmd_length;
1132 			break;
1133 
1134 		case MSG_EXTENDED:
1135 			switch (sc->sc_imess[2]) {
1136 #if SPC_USE_SYNCHRONOUS
1137 			case MSG_EXT_SDTR:
1138 				if (sc->sc_imess[1] != 3)
1139 					goto reject;
1140 				ti->period = sc->sc_imess[3];
1141 				ti->offset = sc->sc_imess[4];
1142 				ti->flags &= ~DO_SYNC;
1143 				if (ti->offset == 0) {
1144 				} else if (ti->period < sc->sc_minsync ||
1145 					   ti->period > sc->sc_maxsync ||
1146 					   ti->offset > 8) {
1147 					ti->period = ti->offset = 0;
1148 					spc_sched_msgout(sc, SEND_SDTR);
1149 				} else {
1150 					scsi_print_addr(acb->xs->sc_link);
1151 					printf("sync, offset %d, period %dnsec\n",
1152 					    ti->offset, ti->period * 4);
1153 				}
1154 				spc_setsync(sc, ti);
1155 				break;
1156 #endif
1157 
1158 #if SPC_USE_WIDE
1159 			case MSG_EXT_WDTR:
1160 				if (sc->sc_imess[1] != 2)
1161 					goto reject;
1162 				ti->width = sc->sc_imess[3];
1163 				ti->flags &= ~DO_WIDE;
1164 				if (ti->width == 0) {
1165 				} else if (ti->width > SPC_MAX_WIDTH) {
1166 					ti->width = 0;
1167 					spc_sched_msgout(sc, SEND_WDTR);
1168 				} else {
1169 					scsi_print_addr(acb->xs->sc_link);
1170 					printf("wide, width %d\n",
1171 					    1 << (3 + ti->width));
1172 				}
1173 				break;
1174 #endif
1175 
1176 			default:
1177 				printf("%s: unrecognized MESSAGE EXTENDED; sending REJECT\n",
1178 				    sc->sc_dev.dv_xname);
1179 				SPC_BREAK();
1180 				goto reject;
1181 			}
1182 			break;
1183 
1184 		default:
1185 			printf("%s: unrecognized MESSAGE; sending REJECT\n",
1186 			    sc->sc_dev.dv_xname);
1187 			SPC_BREAK();
1188 		reject:
1189 			spc_sched_msgout(sc, SEND_REJECT);
1190 			break;
1191 		}
1192 		break;
1193 
1194 	case SPC_RESELECTED:
1195 		if (!MSG_ISIDENTIFY(sc->sc_imess[0])) {
1196 			printf("%s: reselect without IDENTIFY; sending DEVICE RESET\n",
1197 			    sc->sc_dev.dv_xname);
1198 			SPC_BREAK();
1199 			goto reset;
1200 		}
1201 
1202 		(void) spc_reselect(sc, sc->sc_imess[0]);
1203 		break;
1204 
1205 	default:
1206 		printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n",
1207 		    sc->sc_dev.dv_xname);
1208 		SPC_BREAK();
1209 	reset:
1210 		spc_sched_msgout(sc, SEND_DEV_RESET);
1211 		break;
1212 
1213 #ifdef notdef
1214 	abort:
1215 		spc_sched_msgout(sc, SEND_ABORT);
1216 		break;
1217 #endif
1218 	}
1219 
1220 	/* Ack the last message byte. */
1221 #if 0 /* XXX? */
1222 	(void) bus_space_read_1(iot, ioh, DREG);
1223 	while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0)
1224 		;
1225 #endif
1226 
1227 	/* Go get the next message, if any. */
1228 	goto nextmsg;
1229 
1230 out:
1231 	bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK);
1232 	SPC_MISC(("n=%d imess=0x%02x  ", n, sc->sc_imess[0]));
1233 }
1234 
1235 /*
1236  * Send the highest priority, scheduled message.
1237  */
1238 void
1239 spc_msgout(sc)
1240 	struct spc_softc *sc;
1241 {
1242 	bus_space_tag_t iot = sc->sc_iot;
1243 	bus_space_handle_t ioh = sc->sc_ioh;
1244 #if SPC_USE_SYNCHRONOUS
1245 	struct spc_tinfo *ti;
1246 #endif
1247 	int n;
1248 
1249 	SPC_TRACE(("spc_msgout  "));
1250 
1251 	if (sc->sc_prevphase == PH_MSGOUT) {
1252 		if (sc->sc_omp == sc->sc_omess) {
1253 			/*
1254 			 * This is a retransmission.
1255 			 *
1256 			 * We get here if the target stayed in MESSAGE OUT
1257 			 * phase.  Section 5.1.9.2 of the SCSI 2 spec indicates
1258 			 * that all of the previously transmitted messages must
1259 			 * be sent again, in the same order.  Therefore, we
1260 			 * requeue all the previously transmitted messages, and
1261 			 * start again from the top.  Our simple priority
1262 			 * scheme keeps the messages in the right order.
1263 			 */
1264 			SPC_MISC(("retransmitting  "));
1265 			sc->sc_msgpriq |= sc->sc_msgoutq;
1266 			/*
1267 			 * Set ATN.  If we're just sending a trivial 1-byte
1268 			 * message, we'll clear ATN later on anyway.
1269 			 */
1270 			bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN); /* XXX? */
1271 		} else {
1272 			/* This is a continuation of the previous message. */
1273 			n = sc->sc_omp - sc->sc_omess;
1274 			goto nextbyte;
1275 		}
1276 	}
1277 
1278 	/* No messages transmitted so far. */
1279 	sc->sc_msgoutq = 0;
1280 	sc->sc_lastmsg = 0;
1281 
1282 nextmsg:
1283 	/* Pick up highest priority message. */
1284 	sc->sc_currmsg = sc->sc_msgpriq & -sc->sc_msgpriq;
1285 	sc->sc_msgpriq &= ~sc->sc_currmsg;
1286 	sc->sc_msgoutq |= sc->sc_currmsg;
1287 
1288 	/* Build the outgoing message data. */
1289 	switch (sc->sc_currmsg) {
1290 	case SEND_IDENTIFY:
1291 		SPC_ASSERT(sc->sc_nexus != NULL);
1292 		sc->sc_omess[0] =
1293 		    MSG_IDENTIFY(sc->sc_nexus->xs->sc_link->scsipi_scsi.lun, 1);
1294 		n = 1;
1295 		break;
1296 
1297 #if SPC_USE_SYNCHRONOUS
1298 	case SEND_SDTR:
1299 		SPC_ASSERT(sc->sc_nexus != NULL);
1300 		ti = &sc->sc_tinfo[sc->sc_nexus->xs->sc_link->scsipi_scsi.target];
1301 		sc->sc_omess[4] = MSG_EXTENDED;
1302 		sc->sc_omess[3] = 3;
1303 		sc->sc_omess[2] = MSG_EXT_SDTR;
1304 		sc->sc_omess[1] = ti->period >> 2;
1305 		sc->sc_omess[0] = ti->offset;
1306 		n = 5;
1307 		break;
1308 #endif
1309 
1310 #if SPC_USE_WIDE
1311 	case SEND_WDTR:
1312 		SPC_ASSERT(sc->sc_nexus != NULL);
1313 		ti = &sc->sc_tinfo[sc->sc_nexus->xs->sc_link->scsipi_scsi.target];
1314 		sc->sc_omess[3] = MSG_EXTENDED;
1315 		sc->sc_omess[2] = 2;
1316 		sc->sc_omess[1] = MSG_EXT_WDTR;
1317 		sc->sc_omess[0] = ti->width;
1318 		n = 4;
1319 		break;
1320 #endif
1321 
1322 	case SEND_DEV_RESET:
1323 		sc->sc_flags |= SPC_ABORTING;
1324 		sc->sc_omess[0] = MSG_BUS_DEV_RESET;
1325 		n = 1;
1326 		break;
1327 
1328 	case SEND_REJECT:
1329 		sc->sc_omess[0] = MSG_MESSAGE_REJECT;
1330 		n = 1;
1331 		break;
1332 
1333 	case SEND_PARITY_ERROR:
1334 		sc->sc_omess[0] = MSG_PARITY_ERROR;
1335 		n = 1;
1336 		break;
1337 
1338 	case SEND_INIT_DET_ERR:
1339 		sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
1340 		n = 1;
1341 		break;
1342 
1343 	case SEND_ABORT:
1344 		sc->sc_flags |= SPC_ABORTING;
1345 		sc->sc_omess[0] = MSG_ABORT;
1346 		n = 1;
1347 		break;
1348 
1349 	default:
1350 		printf("%s: unexpected MESSAGE OUT; sending NOOP\n",
1351 		    sc->sc_dev.dv_xname);
1352 		SPC_BREAK();
1353 		sc->sc_omess[0] = MSG_NOOP;
1354 		n = 1;
1355 		break;
1356 	}
1357 	sc->sc_omp = &sc->sc_omess[n];
1358 
1359 nextbyte:
1360 	/* Send message bytes. */
1361 	/* send TRANSFER command. */
1362 	bus_space_write_1(iot, ioh, TCH, n >> 16);
1363 	bus_space_write_1(iot, ioh, TCM, n >> 8);
1364 	bus_space_write_1(iot, ioh, TCL, n);
1365 	bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB);
1366 #ifdef x68k
1367 	bus_space_write_1(iot, ioh, SCMD, SCMD_XFR);	/* XXX */
1368 #else
1369 	bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR | SCMD_ICPT_XFR);
1370 #endif
1371 	for (;;) {
1372 		if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0)
1373 			break;
1374 		if (bus_space_read_1(iot, ioh, INTS) != 0)
1375 			goto out;
1376 	}
1377 	for (;;) {
1378 #if 0
1379 		for (;;) {
1380 			if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0)
1381 				break;
1382 			/* Wait for REQINIT.  XXX Need timeout. */
1383 		}
1384 #endif
1385 		if (bus_space_read_1(iot, ioh, INTS) != 0) {
1386 			/*
1387 			 * Target left MESSAGE OUT, possibly to reject
1388 			 * our message.
1389 			 *
1390 			 * If this is the last message being sent, then we
1391 			 * deassert ATN, since either the target is going to
1392 			 * ignore this message, or it's going to ask for a
1393 			 * retransmission via MESSAGE PARITY ERROR (in which
1394 			 * case we reassert ATN anyway).
1395 			 */
1396 #if 0
1397 			if (sc->sc_msgpriq == 0)
1398 				bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN);
1399 #endif
1400 			goto out;
1401 		}
1402 
1403 #if 0
1404 		/* Clear ATN before last byte if this is the last message. */
1405 		if (n == 1 && sc->sc_msgpriq == 0)
1406 			bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN);
1407 #endif
1408 
1409 		while ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_FULL) != 0)
1410 			;
1411 		/* Send message byte. */
1412 		bus_space_write_1(iot, ioh, DREG, *--sc->sc_omp);
1413 		--n;
1414 		/* Keep track of the last message we've sent any bytes of. */
1415 		sc->sc_lastmsg = sc->sc_currmsg;
1416 #if 0
1417 		/* Wait for ACK to be negated.  XXX Need timeout. */
1418 		while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0)
1419 			;
1420 #endif
1421 
1422 		if (n == 0)
1423 			break;
1424 	}
1425 
1426 	/* We get here only if the entire message has been transmitted. */
1427 	if (sc->sc_msgpriq != 0) {
1428 		/* There are more outgoing messages. */
1429 		goto nextmsg;
1430 	}
1431 
1432 	/*
1433 	 * The last message has been transmitted.  We need to remember the last
1434 	 * message transmitted (in case the target switches to MESSAGE IN phase
1435 	 * and sends a MESSAGE REJECT), and the list of messages transmitted
1436 	 * this time around (in case the target stays in MESSAGE OUT phase to
1437 	 * request a retransmit).
1438 	 */
1439 
1440 out:
1441 	/* Disable REQ/ACK protocol. */
1442 }
1443 
1444 /*
1445  * spc_dataout_pio: perform a data transfer using the FIFO datapath in the spc
1446  * Precondition: The SCSI bus should be in the DOUT phase, with REQ asserted
1447  * and ACK deasserted (i.e. waiting for a data byte)
1448  *
1449  * This new revision has been optimized (I tried) to make the common case fast,
1450  * and the rarer cases (as a result) somewhat more comlex
1451  */
1452 int
1453 spc_dataout_pio(sc, p, n)
1454 	struct spc_softc *sc;
1455 	u_char *p;
1456 	int n;
1457 {
1458 	bus_space_tag_t iot = sc->sc_iot;
1459 	bus_space_handle_t ioh = sc->sc_ioh;
1460 	u_char intstat = 0;
1461 	int out = 0;
1462 #define DOUTAMOUNT 8		/* Full FIFO */
1463 
1464 	SPC_TRACE(("spc_dataout_pio  "));
1465 	/* send TRANSFER command. */
1466 	bus_space_write_1(iot, ioh, TCH, n >> 16);
1467 	bus_space_write_1(iot, ioh, TCM, n >> 8);
1468 	bus_space_write_1(iot, ioh, TCL, n);
1469 	bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB);
1470 #ifdef x68k
1471 	bus_space_write_1(iot, ioh, SCMD, SCMD_XFR);	/* XXX */
1472 #else
1473 	bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR | SCMD_ICPT_XFR);	/* XXX */
1474 #endif
1475 	for (;;) {
1476 		if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0)
1477 			break;
1478 		if (bus_space_read_1(iot, ioh, INTS) != 0)
1479 			break;
1480 	}
1481 
1482 	/*
1483 	 * I have tried to make the main loop as tight as possible.  This
1484 	 * means that some of the code following the loop is a bit more
1485 	 * complex than otherwise.
1486 	 */
1487 	while (n > 0) {
1488 		int xfer;
1489 
1490 		for (;;) {
1491 			intstat = bus_space_read_1(iot, ioh, INTS);
1492 			/* Wait till buffer is empty. */
1493 			if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) != 0)
1494 				break;
1495 			/* Break on interrupt. */
1496 			if (intstat != 0)
1497 				goto phasechange;
1498 		}
1499 
1500 		xfer = min(DOUTAMOUNT, n);
1501 
1502 		SPC_MISC(("%d> ", xfer));
1503 
1504 		n -= xfer;
1505 		out += xfer;
1506 
1507 		while (xfer-- > 0) {
1508 			bus_space_write_1(iot, ioh, DREG, *p++);
1509 		}
1510 	}
1511 
1512 	if (out == 0) {
1513 		for (;;) {
1514 			if (bus_space_read_1(iot, ioh, INTS) != 0)
1515 				break;
1516 		}
1517 		SPC_MISC(("extra data  "));
1518 	} else {
1519 		/* See the bytes off chip */
1520 		for (;;) {
1521 			/* Wait till buffer is empty. */
1522 			if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) != 0)
1523 				break;
1524 			intstat = bus_space_read_1(iot, ioh, INTS);
1525 			/* Break on interrupt. */
1526 			if (intstat != 0)
1527 				goto phasechange;
1528 		}
1529 	}
1530 
1531 phasechange:
1532 	/* Stop the FIFO data path. */
1533 
1534 	if (intstat != 0) {
1535 		/* Some sort of phase change. */
1536 		int amount;
1537 
1538 		amount = ((bus_space_read_1(iot, ioh, TCH) << 16) |
1539 			  (bus_space_read_1(iot, ioh, TCM) << 8) |
1540 			  bus_space_read_1(iot, ioh, TCL));
1541 		if (amount > 0) {
1542 			out -= amount;
1543 			SPC_MISC(("+%d ", amount));
1544 		}
1545 	}
1546 
1547 	/* Turn on ENREQINIT again. */
1548 
1549 	return out;
1550 }
1551 
1552 /*
1553  * spc_datain_pio: perform data transfers using the FIFO datapath in the spc
1554  * Precondition: The SCSI bus should be in the DIN phase, with REQ asserted
1555  * and ACK deasserted (i.e. at least one byte is ready).
1556  *
1557  * For now, uses a pretty dumb algorithm, hangs around until all data has been
1558  * transferred.  This, is OK for fast targets, but not so smart for slow
1559  * targets which don't disconnect or for huge transfers.
1560  */
1561 int
1562 spc_datain_pio(sc, p, n)
1563 	struct spc_softc *sc;
1564 	u_char *p;
1565 	int n;
1566 {
1567 	bus_space_tag_t iot = sc->sc_iot;
1568 	bus_space_handle_t ioh = sc->sc_ioh;
1569 	u_short intstat;
1570 	int in = 0;
1571 #define DINAMOUNT 8		/* Full FIFO */
1572 
1573 	SPC_TRACE(("spc_datain_pio  "));
1574 	/* send TRANSFER command. */
1575 	bus_space_write_1(iot, ioh, TCH, n >> 16);
1576 	bus_space_write_1(iot, ioh, TCM, n >> 8);
1577 	bus_space_write_1(iot, ioh, TCL, n);
1578 	bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB);
1579 #ifdef x68k
1580 	bus_space_write_1(iot, ioh, SCMD, SCMD_XFR);	/* XXX */
1581 #else
1582 	bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR);	/* XXX */
1583 #endif
1584 	for (;;) {
1585 		if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0)
1586 			break;
1587 		if (bus_space_read_1(iot, ioh, INTS) != 0)
1588 			goto phasechange;
1589 	}
1590 
1591 	/*
1592 	 * We leave this loop if one or more of the following is true:
1593 	 * a) phase != PH_DATAIN && FIFOs are empty
1594 	 * b) reset has occurred or busfree is detected.
1595 	 */
1596 	while (n > 0) {
1597 		int xfer;
1598 
1599 #define INTSMASK 0xff
1600 		/* Wait for fifo half full or phase mismatch */
1601 		for (;;) {
1602 			intstat = ((bus_space_read_1(iot, ioh, SSTS) << 8) |
1603 				   bus_space_read_1(iot, ioh, INTS));
1604 			if ((intstat & (INTSMASK | (SSTS_DREG_FULL << 8))) !=
1605 			    0)
1606 				break;
1607 			if ((intstat & (SSTS_DREG_EMPTY << 8)) == 0)
1608 				break;
1609 		}
1610 
1611 #if 1
1612 		if ((intstat & INTSMASK) != 0)
1613 			goto phasechange;
1614 #else
1615 		if ((intstat & INTSMASK) != 0 &&
1616 		    (intstat & (SSTS_DREG_EMPTY << 8)))
1617 			goto phasechange;
1618 #endif
1619 		if ((intstat & (SSTS_DREG_FULL << 8)) != 0)
1620 			xfer = min(DINAMOUNT, n);
1621 		else
1622 			xfer = min(1, n);
1623 
1624 		SPC_MISC((">%d ", xfer));
1625 
1626 		n -= xfer;
1627 		in += xfer;
1628 
1629 		while (xfer-- > 0) {
1630 			*p++ = bus_space_read_1(iot, ioh, DREG);
1631 		}
1632 
1633 		if ((intstat & INTSMASK) != 0)
1634 			goto phasechange;
1635 	}
1636 
1637 	/*
1638 	 * Some SCSI-devices are rude enough to transfer more data than what
1639 	 * was requested, e.g. 2048 bytes from a CD-ROM instead of the
1640 	 * requested 512.  Test for progress, i.e. real transfers.  If no real
1641 	 * transfers have been performed (n is probably already zero) and the
1642 	 * FIFO is not empty, waste some bytes....
1643 	 */
1644 	if (in == 0) {
1645 		for (;;) {
1646 			if (bus_space_read_1(iot, ioh, INTS) != 0)
1647 				break;
1648 		}
1649 		SPC_MISC(("extra data  "));
1650 	}
1651 
1652 phasechange:
1653 	/* Stop the FIFO data path. */
1654 
1655 	/* Turn on ENREQINIT again. */
1656 
1657 	return in;
1658 }
1659 
1660 /*
1661  * Catch an interrupt from the adaptor
1662  */
1663 /*
1664  * This is the workhorse routine of the driver.
1665  * Deficiencies (for now):
1666  * 1) always uses programmed I/O
1667  */
1668 int
1669 spcintr(arg)
1670 	void *arg;
1671 {
1672 	struct spc_softc *sc = arg;
1673 	bus_space_tag_t iot = sc->sc_iot;
1674 	bus_space_handle_t ioh = sc->sc_ioh;
1675 	u_char ints;
1676 	struct spc_acb *acb;
1677 	struct scsipi_link *sc_link;
1678 	struct spc_tinfo *ti;
1679 	int n;
1680 
1681 	/*
1682 	 * Disable interrupt.
1683 	 */
1684 	bus_space_write_1(iot, ioh, SCTL, bus_space_read_1(iot, ioh, SCTL) & ~SCTL_INTR_ENAB);
1685 
1686 	SPC_TRACE(("spcintr  "));
1687 
1688 loop:
1689 	/*
1690 	 * Loop until transfer completion.
1691 	 */
1692 	/*
1693 	 * First check for abnormal conditions, such as reset.
1694 	 */
1695 #ifdef x68k			/* XXX? */
1696 	while ((ints = bus_space_read_1(iot, ioh, INTS)) == 0)
1697 		delay(1);
1698 	SPC_MISC(("ints = 0x%x  ", ints));
1699 #else
1700 	ints = bus_space_read_1(iot, ioh, INTS);
1701 	SPC_MISC(("ints = 0x%x  ", ints));
1702 #endif
1703 
1704 	if ((ints & INTS_RST) != 0) {
1705 		printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname);
1706 		goto reset;
1707 	}
1708 
1709 	/*
1710 	 * Check for less serious errors.
1711 	 */
1712 	if ((bus_space_read_1(iot, ioh, SERR) & (SERR_SCSI_PAR|SERR_SPC_PAR)) != 0) {
1713 		printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname);
1714 		if (sc->sc_prevphase == PH_MSGIN) {
1715 			sc->sc_flags |= SPC_DROP_MSGIN;
1716 			spc_sched_msgout(sc, SEND_PARITY_ERROR);
1717 		} else
1718 			spc_sched_msgout(sc, SEND_INIT_DET_ERR);
1719 	}
1720 
1721 	/*
1722 	 * If we're not already busy doing something test for the following
1723 	 * conditions:
1724 	 * 1) We have been reselected by something
1725 	 * 2) We have selected something successfully
1726 	 * 3) Our selection process has timed out
1727 	 * 4) This is really a bus free interrupt just to get a new command
1728 	 *    going?
1729 	 * 5) Spurious interrupt?
1730 	 */
1731 	switch (sc->sc_state) {
1732 	case SPC_IDLE:
1733 	case SPC_SELECTING:
1734 		SPC_MISC(("ints:0x%02x ", ints));
1735 
1736 		if ((ints & INTS_SEL) != 0) {
1737 			/*
1738 			 * We don't currently support target mode.
1739 			 */
1740 			printf("%s: target mode selected; going to BUS FREE\n",
1741 			    sc->sc_dev.dv_xname);
1742 
1743 			goto sched;
1744 		} else if ((ints & INTS_RESEL) != 0) {
1745 			SPC_MISC(("reselected  "));
1746 
1747 			/*
1748 			 * If we're trying to select a target ourselves,
1749 			 * push our command back into the ready list.
1750 			 */
1751 			if (sc->sc_state == SPC_SELECTING) {
1752 				SPC_MISC(("backoff selector  "));
1753 				SPC_ASSERT(sc->sc_nexus != NULL);
1754 				acb = sc->sc_nexus;
1755 				sc->sc_nexus = NULL;
1756 				TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
1757 			}
1758 
1759 			/* Save reselection ID. */
1760 			sc->sc_selid = bus_space_read_1(iot, ioh, TEMP);
1761 
1762 			sc->sc_state = SPC_RESELECTED;
1763 		} else if ((ints & INTS_CMD_DONE) != 0) {
1764 			SPC_MISC(("selected  "));
1765 
1766 			/*
1767 			 * We have selected a target. Things to do:
1768 			 * a) Determine what message(s) to send.
1769 			 * b) Verify that we're still selecting the target.
1770 			 * c) Mark device as busy.
1771 			 */
1772 			if (sc->sc_state != SPC_SELECTING) {
1773 				printf("%s: selection out while idle; resetting\n",
1774 				    sc->sc_dev.dv_xname);
1775 				SPC_BREAK();
1776 				goto reset;
1777 			}
1778 			SPC_ASSERT(sc->sc_nexus != NULL);
1779 			acb = sc->sc_nexus;
1780 			sc_link = acb->xs->sc_link;
1781 			ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
1782 
1783 			sc->sc_msgpriq = SEND_IDENTIFY;
1784 			if (acb->flags & ACB_RESET)
1785 				sc->sc_msgpriq |= SEND_DEV_RESET;
1786 			else if (acb->flags & ACB_ABORT)
1787 				sc->sc_msgpriq |= SEND_ABORT;
1788 			else {
1789 #if SPC_USE_SYNCHRONOUS
1790 				if ((ti->flags & DO_SYNC) != 0)
1791 					sc->sc_msgpriq |= SEND_SDTR;
1792 #endif
1793 #if SPC_USE_WIDE
1794 				if ((ti->flags & DO_WIDE) != 0)
1795 					sc->sc_msgpriq |= SEND_WDTR;
1796 #endif
1797 			}
1798 
1799 			acb->flags |= ACB_NEXUS;
1800 			ti->lubusy |= (1 << sc_link->scsipi_scsi.lun);
1801 
1802 			/* Do an implicit RESTORE POINTERS. */
1803 			sc->sc_dp = acb->data_addr;
1804 			sc->sc_dleft = acb->data_length;
1805 			sc->sc_cp = (u_char *)&acb->scsipi_cmd;
1806 			sc->sc_cleft = acb->scsipi_cmd_length;
1807 
1808 			/* On our first connection, schedule a timeout. */
1809 			if ((acb->xs->xs_control & XS_CTL_POLL) == 0)
1810 				callout_reset(&acb->xs->xs_callout,
1811 				    (acb->timeout * hz) / 1000,
1812 				    spc_timeout, acb);
1813 
1814 			sc->sc_state = SPC_CONNECTED;
1815 		} else if ((ints & INTS_TIMEOUT) != 0) {
1816 			SPC_MISC(("selection timeout  "));
1817 
1818 			if (sc->sc_state != SPC_SELECTING) {
1819 				printf("%s: selection timeout while idle; resetting\n",
1820 				    sc->sc_dev.dv_xname);
1821 				SPC_BREAK();
1822 				goto reset;
1823 			}
1824 			SPC_ASSERT(sc->sc_nexus != NULL);
1825 			acb = sc->sc_nexus;
1826 
1827 			delay(250);
1828 
1829 			acb->xs->error = XS_SELTIMEOUT;
1830 			goto finish;
1831 		} else {
1832 			if (sc->sc_state != SPC_IDLE) {
1833 				printf("%s: BUS FREE while not idle; state=%d\n",
1834 				    sc->sc_dev.dv_xname, sc->sc_state);
1835 				SPC_BREAK();
1836 				goto out;
1837 			}
1838 
1839 			goto sched;
1840 		}
1841 
1842 		/*
1843 		 * Turn off selection stuff, and prepare to catch bus free
1844 		 * interrupts, parity errors, and phase changes.
1845 		 */
1846 
1847 		sc->sc_flags = 0;
1848 		sc->sc_prevphase = PH_INVALID;
1849 		goto dophase;
1850 	}
1851 
1852 	if ((ints & INTS_DISCON) != 0) {
1853 		/* We've gone to BUS FREE phase. */
1854 		bus_space_write_1(iot, ioh, PCTL,
1855 		    bus_space_read_1(iot, ioh, PCTL) & ~PCTL_BFINT_ENAB);
1856 				/* disable disconnect interrupt */
1857 		bus_space_write_1(iot, ioh, INTS, ints);
1858 				/* XXX reset interrput */
1859 
1860 		switch (sc->sc_state) {
1861 		case SPC_RESELECTED:
1862 			goto sched;
1863 
1864 		case SPC_CONNECTED:
1865 			SPC_ASSERT(sc->sc_nexus != NULL);
1866 			acb = sc->sc_nexus;
1867 
1868 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE
1869 			if (sc->sc_prevphase == PH_MSGOUT) {
1870 				/*
1871 				 * If the target went to BUS FREE phase during
1872 				 * or immediately after sending a SDTR or WDTR
1873 				 * message, disable negotiation.
1874 				 */
1875 				sc_link = acb->xs->sc_link;
1876 				ti = &sc->sc_tinfo[sc_link->scsipi_scsi.target];
1877 				switch (sc->sc_lastmsg) {
1878 #if SPC_USE_SYNCHRONOUS
1879 				case SEND_SDTR:
1880 					ti->flags &= ~DO_SYNC;
1881 					ti->period = ti->offset = 0;
1882 					break;
1883 #endif
1884 #if SPC_USE_WIDE
1885 				case SEND_WDTR:
1886 					ti->flags &= ~DO_WIDE;
1887 					ti->width = 0;
1888 					break;
1889 #endif
1890 				}
1891 			}
1892 #endif
1893 
1894 			if ((sc->sc_flags & SPC_ABORTING) == 0) {
1895 				/*
1896 				 * Section 5.1.1 of the SCSI 2 spec suggests
1897 				 * issuing a REQUEST SENSE following an
1898 				 * unexpected disconnect.  Some devices go into
1899 				 * a contingent allegiance condition when
1900 				 * disconnecting, and this is necessary to
1901 				 * clean up their state.
1902 				 */
1903 				printf("%s: unexpected disconnect; sending REQUEST SENSE\n",
1904 				    sc->sc_dev.dv_xname);
1905 				SPC_BREAK();
1906 				spc_sense(sc, acb);
1907 				goto out;
1908 			}
1909 
1910 			acb->xs->error = XS_DRIVER_STUFFUP;
1911 			goto finish;
1912 
1913 		case SPC_DISCONNECT:
1914 			SPC_ASSERT(sc->sc_nexus != NULL);
1915 			acb = sc->sc_nexus;
1916 			TAILQ_INSERT_HEAD(&sc->nexus_list, acb, chain);
1917 			sc->sc_nexus = NULL;
1918 			goto sched;
1919 
1920 		case SPC_CMDCOMPLETE:
1921 			SPC_ASSERT(sc->sc_nexus != NULL);
1922 			acb = sc->sc_nexus;
1923 			goto finish;
1924 		}
1925 	}
1926 	else if ((ints & INTS_CMD_DONE) != 0 &&
1927 		 sc->sc_prevphase == PH_MSGIN && sc->sc_state != SPC_CONNECTED)
1928 		goto out;
1929 
1930 dophase:
1931 #if 0
1932 	if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) {
1933 		/* Wait for REQINIT. */
1934 		goto out;
1935 	}
1936 #else
1937 	bus_space_write_1(iot, ioh, INTS, ints);
1938 	ints = 0;
1939 	while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0)
1940 		delay(1);	/* need timeout XXX */
1941 #endif
1942 
1943 	/*
1944 	 * State transition.
1945 	 */
1946 	sc->sc_phase = bus_space_read_1(iot, ioh, PSNS) & PH_MASK;
1947 /*	bus_space_write_1(iot, ioh, PCTL, sc->sc_phase);*/
1948 
1949 	SPC_MISC(("phase=%d\n", sc->sc_phase));
1950 	switch (sc->sc_phase) {
1951 	case PH_MSGOUT:
1952 		if (sc->sc_state != SPC_CONNECTED &&
1953 		    sc->sc_state != SPC_RESELECTED)
1954 			break;
1955 		spc_msgout(sc);
1956 		sc->sc_prevphase = PH_MSGOUT;
1957 		goto loop;
1958 
1959 	case PH_MSGIN:
1960 		if (sc->sc_state != SPC_CONNECTED &&
1961 		    sc->sc_state != SPC_RESELECTED)
1962 			break;
1963 		spc_msgin(sc);
1964 		sc->sc_prevphase = PH_MSGIN;
1965 		goto loop;
1966 
1967 	case PH_CMD:
1968 		if (sc->sc_state != SPC_CONNECTED)
1969 			break;
1970 #if SPC_DEBUG
1971 		if ((spc_debug & SPC_SHOWMISC) != 0) {
1972 			SPC_ASSERT(sc->sc_nexus != NULL);
1973 			acb = sc->sc_nexus;
1974 			printf("cmd=0x%02x+%d  ",
1975 			    acb->scsipi_cmd.opcode, acb->scsipi_cmd_length-1);
1976 		}
1977 #endif
1978 		n = spc_dataout_pio(sc, sc->sc_cp, sc->sc_cleft);
1979 		sc->sc_cp += n;
1980 		sc->sc_cleft -= n;
1981 		sc->sc_prevphase = PH_CMD;
1982 		goto loop;
1983 
1984 	case PH_DATAOUT:
1985 		if (sc->sc_state != SPC_CONNECTED)
1986 			break;
1987 		SPC_MISC(("dataout dleft=%d  ", sc->sc_dleft));
1988 		n = spc_dataout_pio(sc, sc->sc_dp, sc->sc_dleft);
1989 		sc->sc_dp += n;
1990 		sc->sc_dleft -= n;
1991 		sc->sc_prevphase = PH_DATAOUT;
1992 		goto loop;
1993 
1994 	case PH_DATAIN:
1995 		if (sc->sc_state != SPC_CONNECTED)
1996 			break;
1997 		SPC_MISC(("datain  "));
1998 		n = spc_datain_pio(sc, sc->sc_dp, sc->sc_dleft);
1999 		sc->sc_dp += n;
2000 		sc->sc_dleft -= n;
2001 		sc->sc_prevphase = PH_DATAIN;
2002 		goto loop;
2003 
2004 	case PH_STAT:
2005 		if (sc->sc_state != SPC_CONNECTED)
2006 			break;
2007 		SPC_ASSERT(sc->sc_nexus != NULL);
2008 		acb = sc->sc_nexus;
2009 		/*acb->target_stat = bus_space_read_1(iot, ioh, DREG);*/
2010 		spc_datain_pio(sc, &acb->target_stat, 1);
2011 		SPC_MISC(("target_stat=0x%02x  ", acb->target_stat));
2012 		sc->sc_prevphase = PH_STAT;
2013 		goto loop;
2014 	}
2015 
2016 	printf("%s: unexpected bus phase; resetting\n", sc->sc_dev.dv_xname);
2017 	SPC_BREAK();
2018 reset:
2019 	spc_init(sc);
2020 	return 1;
2021 
2022 finish:
2023 	callout_stop(&acb->xs->xs_callout);
2024 	bus_space_write_1(iot, ioh, INTS, ints);
2025 	ints = 0;
2026 	spc_done(sc, acb);
2027 	goto out;
2028 
2029 sched:
2030 	sc->sc_state = SPC_IDLE;
2031 	spc_sched(sc);
2032 	goto out;
2033 
2034 out:
2035 	if (ints)
2036 		bus_space_write_1(iot, ioh, INTS, ints);
2037 	bus_space_write_1(iot, ioh, SCTL,
2038 	    bus_space_read_1(iot, ioh, SCTL) | SCTL_INTR_ENAB);
2039 	return 1;
2040 }
2041 
2042 void
2043 spc_abort(sc, acb)
2044 	struct spc_softc *sc;
2045 	struct spc_acb *acb;
2046 {
2047 
2048 	/* 2 secs for the abort */
2049 	acb->timeout = SPC_ABORT_TIMEOUT;
2050 	acb->flags |= ACB_ABORT;
2051 
2052 	if (acb == sc->sc_nexus) {
2053 		/*
2054 		 * If we're still selecting, the message will be scheduled
2055 		 * after selection is complete.
2056 		 */
2057 		if (sc->sc_state == SPC_CONNECTED)
2058 			spc_sched_msgout(sc, SEND_ABORT);
2059 	} else {
2060 		spc_dequeue(sc, acb);
2061 		TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
2062 		if (sc->sc_state == SPC_IDLE)
2063 			spc_sched(sc);
2064 	}
2065 }
2066 
2067 void
2068 spc_timeout(arg)
2069 	void *arg;
2070 {
2071 	struct spc_acb *acb = arg;
2072 	struct scsipi_xfer *xs = acb->xs;
2073 	struct scsipi_link *sc_link = xs->sc_link;
2074 	struct spc_softc *sc = sc_link->adapter_softc;
2075 	int s;
2076 
2077 	scsi_print_addr(sc_link);
2078 	printf("timed out");
2079 
2080 	s = splbio();
2081 
2082 	if (acb->flags & ACB_ABORT) {
2083 		/* abort timed out */
2084 		printf(" AGAIN\n");
2085 		/* XXX Must reset! */
2086 	} else {
2087 		/* abort the operation that has timed out */
2088 		printf("\n");
2089 		acb->xs->error = XS_TIMEOUT;
2090 		spc_abort(sc, acb);
2091 	}
2092 
2093 	splx(s);
2094 }
2095 
2096 #ifdef SPC_DEBUG
2097 /*
2098  * The following functions are mostly used for debugging purposes, either
2099  * directly called from the driver or from the kernel debugger.
2100  */
2101 
2102 void
2103 spc_show_scsi_cmd(acb)
2104 	struct spc_acb *acb;
2105 {
2106 	u_char  *b = (u_char *)&acb->scsipi_cmd;
2107 	struct scsipi_link *sc_link = acb->xs->sc_link;
2108 	int i;
2109 
2110 	scsi_print_addr(sc_link);
2111 	if ((acb->xs->xs_control & XS_CTL_RESET) == 0) {
2112 		for (i = 0; i < acb->scsipi_cmd_length; i++) {
2113 			if (i)
2114 				printf(",");
2115 			printf("%x", b[i]);
2116 		}
2117 		printf("\n");
2118 	} else
2119 		printf("RESET\n");
2120 }
2121 
2122 void
2123 spc_print_acb(acb)
2124 	struct spc_acb *acb;
2125 {
2126 
2127 	printf("acb@%p xs=%p flags=%x", acb, acb->xs, acb->flags);
2128 	printf(" dp=%p dleft=%d target_stat=%x\n",
2129 	       acb->data_addr, acb->data_length, acb->target_stat);
2130 	spc_show_scsi_cmd(acb);
2131 }
2132 
2133 void
2134 spc_print_active_acb()
2135 {
2136 	struct spc_acb *acb;
2137 	struct spc_softc *sc = spc_cd.cd_devs[0]; /* XXX */
2138 
2139 	printf("ready list:\n");
2140 	for (acb = sc->ready_list.tqh_first; acb != NULL;
2141 	    acb = acb->chain.tqe_next)
2142 		spc_print_acb(acb);
2143 	printf("nexus:\n");
2144 	if (sc->sc_nexus != NULL)
2145 		spc_print_acb(sc->sc_nexus);
2146 	printf("nexus list:\n");
2147 	for (acb = sc->nexus_list.tqh_first; acb != NULL;
2148 	    acb = acb->chain.tqe_next)
2149 		spc_print_acb(acb);
2150 }
2151 
2152 void
2153 spc_dump89352(sc)
2154 	struct spc_softc *sc;
2155 {
2156 	bus_space_tag_t iot = sc->sc_iot;
2157 	bus_space_handle_t ioh = sc->sc_ioh;
2158 
2159 	printf("mb89352: BDID=%x SCTL=%x SCMD=%x TMOD=%x\n",
2160 	    bus_space_read_1(iot, ioh, BDID),
2161 	    bus_space_read_1(iot, ioh, SCTL),
2162 	    bus_space_read_1(iot, ioh, SCMD),
2163 	    bus_space_read_1(iot, ioh, TMOD));
2164 	printf("         INTS=%x PSNS=%x SSTS=%x SERR=%x PCTL=%x\n",
2165 	    bus_space_read_1(iot, ioh, INTS),
2166 	    bus_space_read_1(iot, ioh, PSNS),
2167 	    bus_space_read_1(iot, ioh, SSTS),
2168 	    bus_space_read_1(iot, ioh, SERR),
2169 	    bus_space_read_1(iot, ioh, PCTL));
2170 	printf("         MBC=%x DREG=%x TEMP=%x TCH=%x TCM=%x\n",
2171 	    bus_space_read_1(iot, ioh, MBC),
2172 #if 0
2173 	    bus_space_read_1(iot, ioh, DREG),
2174 #else
2175 	    0,
2176 #endif
2177 	    bus_space_read_1(iot, ioh, TEMP),
2178 	    bus_space_read_1(iot, ioh, TCH),
2179 	    bus_space_read_1(iot, ioh, TCM));
2180 	printf("         TCL=%x EXBF=%x\n",
2181 	    bus_space_read_1(iot, ioh, TCL),
2182 	    bus_space_read_1(iot, ioh, EXBF));
2183 }
2184 
2185 void
2186 spc_dump_driver(sc)
2187 	struct spc_softc *sc;
2188 {
2189 	struct spc_tinfo *ti;
2190 	int i;
2191 
2192 	printf("nexus=%p prevphase=%x\n", sc->sc_nexus, sc->sc_prevphase);
2193 	printf("state=%x msgin=%x msgpriq=%x msgoutq=%x lastmsg=%x currmsg=%x\n",
2194 	    sc->sc_state, sc->sc_imess[0],
2195 	    sc->sc_msgpriq, sc->sc_msgoutq, sc->sc_lastmsg, sc->sc_currmsg);
2196 	for (i = 0; i < 7; i++) {
2197 		ti = &sc->sc_tinfo[i];
2198 		printf("tinfo%d: %d cmds %d disconnects %d timeouts",
2199 		    i, ti->cmds, ti->dconns, ti->touts);
2200 		printf(" %d senses flags=%x\n", ti->senses, ti->flags);
2201 	}
2202 }
2203 #endif
2204