xref: /netbsd-src/sys/dev/ic/mb89352.c (revision 404fbe5fb94ca1e054339640cabb2801ce52dd30)
1 /*	$NetBSD: mb89352.c,v 1.49 2008/06/12 22:30:30 cegger Exp $	*/
2 /*	NecBSD: mb89352.c,v 1.4 1998/03/14 07:31:20 kmatsuda Exp	*/
3 
4 /*-
5  * Copyright (c) 1996-1999,2004 The NetBSD Foundation, Inc.
6  * All rights reserved.
7  *
8  * This code is derived from software contributed to The NetBSD Foundation
9  * by Charles M. Hannum, Masaru Oki and Kouichi Matsuda.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30  * POSSIBILITY OF SUCH DAMAGE.
31  *
32  * Copyright (c) 1994 Jarle Greipsland
33  * All rights reserved.
34  *
35  * Redistribution and use in source and binary forms, with or without
36  * modification, are permitted provided that the following conditions
37  * are met:
38  * 1. Redistributions of source code must retain the above copyright
39  *    notice, this list of conditions and the following disclaimer.
40  * 2. Redistributions in binary form must reproduce the above copyright
41  *    notice, this list of conditions and the following disclaimer in the
42  *    documentation and/or other materials provided with the distribution.
43  * 3. The name of the author may not be used to endorse or promote products
44  *    derived from this software without specific prior written permission.
45  *
46  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
47  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
48  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
49  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
50  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
51  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
52  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
53  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
54  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
55  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
56  * POSSIBILITY OF SUCH DAMAGE.
57  */
58 /*
59  * [NetBSD for NEC PC-98 series]
60  *  Copyright (c) 1996, 1997, 1998
61  *	NetBSD/pc98 porting staff. All rights reserved.
62  *  Copyright (c) 1996, 1997, 1998
63  *	Kouichi Matsuda. All rights reserved.
64  */
65 
66 /*
67  * Acknowledgements: Many of the algorithms used in this driver are
68  * inspired by the work of Julian Elischer (julian@tfs.com) and
69  * Charles Hannum (mycroft@duality.gnu.ai.mit.edu).  Thanks a million!
70  */
71 
72 /* TODO list:
73  * 1) Get the DMA stuff working.
74  * 2) Get the iov/uio stuff working. Is this a good thing ???
75  * 3) Get the synch stuff working.
76  * 4) Rewrite it to use malloc for the acb structs instead of static alloc.?
77  */
78 
79 #include <sys/cdefs.h>
80 __KERNEL_RCSID(0, "$NetBSD: mb89352.c,v 1.49 2008/06/12 22:30:30 cegger Exp $");
81 
82 #ifdef DDB
83 #define	integrate
84 #else
85 #define	integrate	inline static
86 #endif
87 
88 /*
89  * A few customizable items:
90  */
91 
92 /* Synchronous data transfers? */
93 #define SPC_USE_SYNCHRONOUS	0
94 #define SPC_SYNC_REQ_ACK_OFS 	8
95 
96 /* Wide data transfers? */
97 #define	SPC_USE_WIDE		0
98 #define	SPC_MAX_WIDTH		0
99 
100 /* Max attempts made to transmit a message */
101 #define SPC_MSG_MAX_ATTEMPT	3 /* Not used now XXX */
102 
103 /*
104  * Some spin loop parameters (essentially how long to wait some places)
105  * The problem(?) is that sometimes we expect either to be able to transmit a
106  * byte or to get a new one from the SCSI bus pretty soon.  In order to avoid
107  * returning from the interrupt just to get yanked back for the next byte we
108  * may spin in the interrupt routine waiting for this byte to come.  How long?
109  * This is really (SCSI) device and processor dependent.  Tuneable, I guess.
110  */
111 #define SPC_MSGIN_SPIN	1 	/* Will spinwait upto ?ms for a new msg byte */
112 #define SPC_MSGOUT_SPIN	1
113 
114 /*
115  * Include debug functions?  At the end of this file there are a bunch of
116  * functions that will print out various information regarding queued SCSI
117  * commands, driver state and chip contents.  You can call them from the
118  * kernel debugger.  If you set SPC_DEBUG to 0 they are not included (the
119  * kernel uses less memory) but you lose the debugging facilities.
120  */
121 #if 0
122 #define SPC_DEBUG		1
123 #endif
124 
125 #define	SPC_ABORT_TIMEOUT	2000	/* time to wait for abort */
126 
127 /* threshold length for DMA transfer */
128 #define SPC_MIN_DMA_LEN	32
129 
130 #ifdef x68k	/* XXX it seems x68k SPC SCSI hardware has some quirks */
131 #define NEED_DREQ_ON_HARDWARE_XFER
132 #define NO_MANUAL_XFER
133 #endif
134 
135 /* End of customizable parameters */
136 
137 /*
138  * MB89352 SCSI Protocol Controller (SPC) routines.
139  */
140 
141 #include "opt_ddb.h"
142 
143 #include <sys/param.h>
144 #include <sys/systm.h>
145 #include <sys/kernel.h>
146 #include <sys/errno.h>
147 #include <sys/ioctl.h>
148 #include <sys/device.h>
149 #include <sys/buf.h>
150 #include <sys/proc.h>
151 #include <sys/user.h>
152 #include <sys/queue.h>
153 
154 #include <sys/intr.h>
155 #include <sys/bus.h>
156 
157 #include <dev/scsipi/scsi_all.h>
158 #include <dev/scsipi/scsipi_all.h>
159 #include <dev/scsipi/scsi_message.h>
160 #include <dev/scsipi/scsiconf.h>
161 
162 #include <dev/ic/mb89352reg.h>
163 #include <dev/ic/mb89352var.h>
164 
165 #ifndef DDB
166 #define	Debugger() panic("should call debugger here (mb89352.c)")
167 #endif /* ! DDB */
168 
169 #if SPC_DEBUG
170 int spc_debug = 0x00; /* SPC_SHOWSTART|SPC_SHOWMISC|SPC_SHOWTRACE; */
171 #endif
172 
173 void	spc_done(struct spc_softc *, struct spc_acb *);
174 void	spc_dequeue(struct spc_softc *, struct spc_acb *);
175 void	spc_scsipi_request(struct scsipi_channel *, scsipi_adapter_req_t,
176     void *);
177 int	spc_poll(struct spc_softc *, struct scsipi_xfer *, int);
178 integrate void	spc_sched_msgout(struct spc_softc *, uint8_t);
179 integrate void	spc_setsync(struct spc_softc *, struct spc_tinfo *);
180 void	spc_select(struct spc_softc *, struct spc_acb *);
181 void	spc_timeout(void *);
182 void	spc_scsi_reset(struct spc_softc *);
183 void	spc_reset(struct spc_softc *);
184 void	spc_free_acb(struct spc_softc *, struct spc_acb *, int);
185 struct spc_acb* spc_get_acb(struct spc_softc *);
186 int	spc_reselect(struct spc_softc *, int);
187 void	spc_msgin(struct spc_softc *);
188 void	spc_abort(struct spc_softc *, struct spc_acb *);
189 void	spc_msgout(struct spc_softc *);
190 int	spc_dataout_pio(struct spc_softc *, uint8_t *, int);
191 int	spc_datain_pio(struct spc_softc *, uint8_t *, int);
192 #if SPC_DEBUG
193 void	spc_print_acb(struct spc_acb *);
194 void	spc_dump_driver(struct spc_softc *);
195 void	spc_dump89352(struct spc_softc *);
196 void	spc_show_scsi_cmd(struct spc_acb *);
197 void	spc_print_active_acb(void);
198 #endif
199 
200 extern struct cfdriver spc_cd;
201 
202 /*
203  * INITIALIZATION ROUTINES (probe, attach ++)
204  */
205 
206 /*
207  * Do the real search-for-device.
208  * Prerequisite: sc->sc_iobase should be set to the proper value
209  */
210 int
211 spc_find(bus_space_tag_t iot, bus_space_handle_t ioh, int bdid)
212 {
213 	long timeout = SPC_ABORT_TIMEOUT;
214 
215 	SPC_TRACE(("spc: probing for spc-chip\n"));
216 	/*
217 	 * Disable interrupts then reset the FUJITSU chip.
218 	 */
219 	bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST);
220 	bus_space_write_1(iot, ioh, SCMD, 0);
221 	bus_space_write_1(iot, ioh, PCTL, 0);
222 	bus_space_write_1(iot, ioh, TEMP, 0);
223 	bus_space_write_1(iot, ioh, TCH, 0);
224 	bus_space_write_1(iot, ioh, TCM, 0);
225 	bus_space_write_1(iot, ioh, TCL, 0);
226 	bus_space_write_1(iot, ioh, INTS, 0);
227 	bus_space_write_1(iot, ioh, SCTL,
228 	    SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB);
229 	bus_space_write_1(iot, ioh, BDID, bdid);
230 	delay(400);
231 	bus_space_write_1(iot, ioh, SCTL,
232 	    bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE);
233 
234 	/* The following detection is derived from spc.c
235 	 * (by Takahide Matsutsuka) in FreeBSD/pccard-test.
236 	 */
237 	while (bus_space_read_1(iot, ioh, PSNS) && timeout) {
238 		timeout--;
239 		DELAY(1);
240 	}
241 	if (timeout == 0) {
242 		printf("spc: find failed\n");
243 		return 0;
244 	}
245 
246 	SPC_START(("SPC found"));
247 	return 1;
248 }
249 
250 void
251 spc_attach(struct spc_softc *sc)
252 {
253 	struct scsipi_adapter *adapt = &sc->sc_adapter;
254 	struct scsipi_channel *chan = &sc->sc_channel;
255 
256 	SPC_TRACE(("spc_attach  "));
257 	sc->sc_state = SPC_INIT;
258 
259 	sc->sc_freq = 20;	/* XXXX Assume 20 MHz. */
260 
261 #if SPC_USE_SYNCHRONOUS
262 	/*
263 	 * These are the bounds of the sync period, based on the frequency of
264 	 * the chip's clock input and the size and offset of the sync period
265 	 * register.
266 	 *
267 	 * For a 20MHz clock, this gives us 25, or 100ns, or 10MB/s, as a
268 	 * maximum transfer rate, and 112.5, or 450ns, or 2.22MB/s, as a
269 	 * minimum transfer rate.
270 	 */
271 	sc->sc_minsync = (2 * 250) / sc->sc_freq;
272 	sc->sc_maxsync = (9 * 250) / sc->sc_freq;
273 #endif
274 
275 	/*
276 	 * Fill in the adapter.
277 	 */
278 	adapt->adapt_dev = sc->sc_dev;
279 	adapt->adapt_nchannels = 1;
280 	adapt->adapt_openings = 7;
281 	adapt->adapt_max_periph = 1;
282 	adapt->adapt_request = spc_scsipi_request;
283 	adapt->adapt_minphys = minphys;
284 
285 	chan->chan_adapter = &sc->sc_adapter;
286 	chan->chan_bustype = &scsi_bustype;
287 	chan->chan_channel = 0;
288 	chan->chan_ntargets = 8;
289 	chan->chan_nluns = 8;
290 	chan->chan_id = sc->sc_initiator;
291 
292 	/*
293 	 * Add reference to adapter so that we drop the reference after
294 	 * config_found() to make sure the adatper is disabled.
295 	 */
296 	if (scsipi_adapter_addref(adapt) != 0) {
297 		aprint_error_dev(sc->sc_dev, "unable to enable controller\n");
298 		return;
299 	}
300 
301 	spc_init(sc, 1);	/* Init chip and driver */
302 
303 	/*
304 	 * ask the adapter what subunits are present
305 	 */
306 	sc->sc_child = config_found(sc->sc_dev, chan, scsiprint);
307 	scsipi_adapter_delref(adapt);
308 }
309 
310 int
311 spc_activate(device_t self, enum devact act)
312 {
313 	struct spc_softc *sc = device_private(self);
314 	int s, rv = 0;
315 
316 	s = splhigh();
317 	switch (act) {
318 	case DVACT_ACTIVATE:
319 		rv = EOPNOTSUPP;
320 		break;
321 
322 	case DVACT_DEACTIVATE:
323 		if (sc->sc_child != NULL)
324 			rv = config_deactivate(sc->sc_child);
325 		break;
326 	}
327 	splx(s);
328 
329 	return (rv);
330 }
331 
332 int
333 spc_detach(device_t self, int flags)
334 {
335 	struct spc_softc *sc = device_private(self);
336 	int rv = 0;
337 
338 	if (sc->sc_child != NULL)
339 		rv = config_detach(sc->sc_child, flags);
340 
341 	return (rv);
342 }
343 
344 /*
345  * Initialize MB89352 chip itself
346  * The following conditions should hold:
347  * spc_isa_probe should have succeeded, i.e. the iobase address in spc_softc
348  * must be valid.
349  */
350 void
351 spc_reset(struct spc_softc *sc)
352 {
353 	bus_space_tag_t iot = sc->sc_iot;
354 	bus_space_handle_t ioh = sc->sc_ioh;
355 
356 	SPC_TRACE(("spc_reset  "));
357 	/*
358 	 * Disable interrupts then reset the FUJITSU chip.
359 	 */
360 	bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST);
361 	bus_space_write_1(iot, ioh, SCMD, 0);
362 	bus_space_write_1(iot, ioh, TMOD, 0);
363 	bus_space_write_1(iot, ioh, PCTL, 0);
364 	bus_space_write_1(iot, ioh, TEMP, 0);
365 	bus_space_write_1(iot, ioh, TCH, 0);
366 	bus_space_write_1(iot, ioh, TCM, 0);
367 	bus_space_write_1(iot, ioh, TCL, 0);
368 	bus_space_write_1(iot, ioh, INTS, 0);
369 	bus_space_write_1(iot, ioh, SCTL,
370 	    SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB);
371 	bus_space_write_1(iot, ioh, BDID, sc->sc_initiator);
372 	delay(400);
373 	bus_space_write_1(iot, ioh, SCTL,
374 	    bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE);
375 }
376 
377 
378 /*
379  * Pull the SCSI RST line for 500us.
380  */
381 void
382 spc_scsi_reset(struct spc_softc *sc)
383 {
384 	bus_space_tag_t iot = sc->sc_iot;
385 	bus_space_handle_t ioh = sc->sc_ioh;
386 
387 	SPC_TRACE(("spc_scsi_reset  "));
388 	bus_space_write_1(iot, ioh, SCMD,
389 	    bus_space_read_1(iot, ioh, SCMD) | SCMD_RST);
390 	delay(500);
391 	bus_space_write_1(iot, ioh, SCMD,
392 	    bus_space_read_1(iot, ioh, SCMD) & ~SCMD_RST);
393 	delay(50);
394 }
395 
396 /*
397  * Initialize spc SCSI driver.
398  */
399 void
400 spc_init(struct spc_softc *sc, int bus_reset)
401 {
402 	struct spc_acb *acb;
403 	int r;
404 
405 	SPC_TRACE(("spc_init  "));
406 	if (bus_reset) {
407 		spc_reset(sc);
408 		spc_scsi_reset(sc);
409 	}
410 	spc_reset(sc);
411 
412 	if (sc->sc_state == SPC_INIT) {
413 		/* First time through; initialize. */
414 		TAILQ_INIT(&sc->ready_list);
415 		TAILQ_INIT(&sc->nexus_list);
416 		TAILQ_INIT(&sc->free_list);
417 		sc->sc_nexus = NULL;
418 		acb = sc->sc_acb;
419 		memset(acb, 0, sizeof(sc->sc_acb));
420 		for (r = 0; r < sizeof(sc->sc_acb) / sizeof(*acb); r++) {
421 			TAILQ_INSERT_TAIL(&sc->free_list, acb, chain);
422 			acb++;
423 		}
424 		memset(&sc->sc_tinfo, 0, sizeof(sc->sc_tinfo));
425 	} else {
426 		/* Cancel any active commands. */
427 		sc->sc_state = SPC_CLEANING;
428 		if ((acb = sc->sc_nexus) != NULL) {
429 			acb->xs->error = XS_DRIVER_STUFFUP;
430 			callout_stop(&acb->xs->xs_callout);
431 			spc_done(sc, acb);
432 		}
433 		while ((acb = TAILQ_FIRST(&sc->nexus_list)) != NULL) {
434 			acb->xs->error = XS_DRIVER_STUFFUP;
435 			callout_stop(&acb->xs->xs_callout);
436 			spc_done(sc, acb);
437 		}
438 	}
439 
440 	sc->sc_prevphase = PH_INVALID;
441 	for (r = 0; r < 8; r++) {
442 		struct spc_tinfo *ti = &sc->sc_tinfo[r];
443 
444 		ti->flags = 0;
445 #if SPC_USE_SYNCHRONOUS
446 		ti->flags |= DO_SYNC;
447 		ti->period = sc->sc_minsync;
448 		ti->offset = SPC_SYNC_REQ_ACK_OFS;
449 #else
450 		ti->period = ti->offset = 0;
451 #endif
452 #if SPC_USE_WIDE
453 		ti->flags |= DO_WIDE;
454 		ti->width = SPC_MAX_WIDTH;
455 #else
456 		ti->width = 0;
457 #endif
458 	}
459 
460 	sc->sc_state = SPC_IDLE;
461 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, SCTL,
462 	    bus_space_read_1(sc->sc_iot, sc->sc_ioh, SCTL) | SCTL_INTR_ENAB);
463 }
464 
465 void
466 spc_free_acb(struct spc_softc *sc, struct spc_acb *acb, int flags)
467 {
468 	int s;
469 
470 	SPC_TRACE(("spc_free_acb  "));
471 	s = splbio();
472 
473 	acb->flags = 0;
474 	TAILQ_INSERT_HEAD(&sc->free_list, acb, chain);
475 	splx(s);
476 }
477 
478 struct spc_acb *
479 spc_get_acb(struct spc_softc *sc)
480 {
481 	struct spc_acb *acb;
482 	int s;
483 
484 	SPC_TRACE(("spc_get_acb  "));
485 	s = splbio();
486 	acb = TAILQ_FIRST(&sc->free_list);
487 	if (acb != NULL) {
488 		TAILQ_REMOVE(&sc->free_list, acb, chain);
489 		acb->flags |= ACB_ALLOC;
490 	}
491 	splx(s);
492 	return acb;
493 }
494 
495 /*
496  * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS
497  */
498 
499 /*
500  * Expected sequence:
501  * 1) Command inserted into ready list
502  * 2) Command selected for execution
503  * 3) Command won arbitration and has selected target device
504  * 4) Send message out (identify message, eventually also sync.negotiations)
505  * 5) Send command
506  * 5a) Receive disconnect message, disconnect.
507  * 5b) Reselected by target
508  * 5c) Receive identify message from target.
509  * 6) Send or receive data
510  * 7) Receive status
511  * 8) Receive message (command complete etc.)
512  */
513 
514 /*
515  * Start a SCSI-command
516  * This function is called by the higher level SCSI-driver to queue/run
517  * SCSI-commands.
518  */
519 void
520 spc_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req,
521     void *arg)
522 {
523 	struct scsipi_xfer *xs;
524 	struct scsipi_periph *periph;
525 	struct spc_softc *sc = device_private(chan->chan_adapter->adapt_dev);
526 	struct spc_acb *acb;
527 	int s, flags;
528 
529 	switch (req) {
530 	case ADAPTER_REQ_RUN_XFER:
531 		xs = arg;
532 		periph = xs->xs_periph;
533 		SPC_TRACE(("spc_scsipi_request  "));
534 		SPC_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen,
535 		    periph->periph_target));
536 
537 		flags = xs->xs_control;
538 		acb = spc_get_acb(sc);
539 #ifdef DIAGNOSTIC
540 		/*
541 		 * This should nerver happen as we track the resources
542 		 * in the mid-layer.
543 		 */
544 		if (acb == NULL) {
545 			scsipi_printaddr(periph);
546 			printf("unable to allocate acb\n");
547 			panic("spc_scsipi_request");
548 		}
549 #endif
550 
551 		/* Initialize acb */
552 		acb->xs = xs;
553 		acb->timeout = xs->timeout;
554 
555 		if (xs->xs_control & XS_CTL_RESET) {
556 			acb->flags |= ACB_RESET;
557 			acb->scsipi_cmd_length = 0;
558 			acb->data_length = 0;
559 		} else {
560 			memcpy(&acb->scsipi_cmd, xs->cmd, xs->cmdlen);
561 			acb->scsipi_cmd_length = xs->cmdlen;
562 			acb->data_addr = xs->data;
563 			acb->data_length = xs->datalen;
564 		}
565 		acb->target_stat = 0;
566 
567 		s = splbio();
568 
569 		TAILQ_INSERT_TAIL(&sc->ready_list, acb, chain);
570 		/*
571 		 * Start scheduling unless a queue process is in progress.
572 		 */
573 		if (sc->sc_state == SPC_IDLE)
574 			spc_sched(sc);
575 		/*
576 		 * After successful sending, check if we should return just now.
577 		 * If so, return SUCCESSFULLY_QUEUED.
578 		 */
579 
580 		splx(s);
581 
582 		if ((flags & XS_CTL_POLL) == 0)
583 			return;
584 
585 		/* Not allowed to use interrupts, use polling instead */
586 		s = splbio();
587 		if (spc_poll(sc, xs, acb->timeout)) {
588 			spc_timeout(acb);
589 			if (spc_poll(sc, xs, acb->timeout))
590 				spc_timeout(acb);
591 		}
592 		splx(s);
593 		return;
594 	case ADAPTER_REQ_GROW_RESOURCES:
595 		/* XXX Not supported. */
596 		return;
597 	case ADAPTER_REQ_SET_XFER_MODE:
598 	    {
599 		/*
600 		 * We don't support Sync, Wide, or Tagged Command Queuing.
601 		 * Just callback now, to report this.
602 		 */
603 		struct scsipi_xfer_mode *xm = arg;
604 
605 		xm->xm_mode = 0;
606 		xm->xm_period = 0;
607 		xm->xm_offset = 0;
608 		scsipi_async_event(chan, ASYNC_EVENT_XFER_MODE, xm);
609 		return;
610 	    }
611 	}
612 }
613 
614 /*
615  * Used when interrupt driven I/O isn't allowed, e.g. during boot.
616  */
617 int
618 spc_poll(struct spc_softc *sc, struct scsipi_xfer *xs, int count)
619 {
620 	bus_space_tag_t iot = sc->sc_iot;
621 	bus_space_handle_t ioh = sc->sc_ioh;
622 
623 	SPC_TRACE(("spc_poll  "));
624 	while (count) {
625 		/*
626 		 * If we had interrupts enabled, would we
627 		 * have got an interrupt?
628 		 */
629 		if (bus_space_read_1(iot, ioh, INTS) != 0)
630 			spc_intr(sc);
631 		if ((xs->xs_status & XS_STS_DONE) != 0)
632 			return 0;
633 		delay(1000);
634 		count--;
635 	}
636 	return 1;
637 }
638 
639 /*
640  * LOW LEVEL SCSI UTILITIES
641  */
642 
643 integrate void
644 spc_sched_msgout(struct spc_softc *sc, uint8_t m)
645 {
646 	bus_space_tag_t iot = sc->sc_iot;
647 	bus_space_handle_t ioh = sc->sc_ioh;
648 
649 	SPC_TRACE(("spc_sched_msgout  "));
650 	if (sc->sc_msgpriq == 0)
651 		bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN);
652 	sc->sc_msgpriq |= m;
653 }
654 
655 /*
656  * Set synchronous transfer offset and period.
657  */
658 integrate void
659 spc_setsync(struct spc_softc *sc, struct spc_tinfo *ti)
660 {
661 #if SPC_USE_SYNCHRONOUS
662 	bus_space_tag_t iot = sc->sc_iot;
663 	bus_space_handle_t ioh = sc->sc_ioh;
664 
665 	SPC_TRACE(("spc_setsync  "));
666 	if (ti->offset != 0)
667 		bus_space_write_1(iot, ioh, TMOD,
668 		    ((ti->period * sc->sc_freq) / 250 - 2) << 4 | ti->offset);
669 	else
670 		bus_space_write_1(iot, ioh, TMOD, 0);
671 #endif
672 }
673 
674 /*
675  * Start a selection.  This is used by spc_sched() to select an idle target.
676  */
677 void
678 spc_select(struct spc_softc *sc, struct spc_acb *acb)
679 {
680 	struct scsipi_periph *periph = acb->xs->xs_periph;
681 	int target = periph->periph_target;
682 	struct spc_tinfo *ti = &sc->sc_tinfo[target];
683 	bus_space_tag_t iot = sc->sc_iot;
684 	bus_space_handle_t ioh = sc->sc_ioh;
685 
686 	SPC_TRACE(("spc_select  "));
687 	spc_setsync(sc, ti);
688 
689 #if 0
690 	bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN);
691 #endif
692 
693 	bus_space_write_1(iot, ioh, PCTL, 0);
694 	bus_space_write_1(iot, ioh, TEMP,
695 	    (1 << sc->sc_initiator) | (1 << target));
696 	/*
697 	 * Setup BSY timeout (selection timeout).
698 	 * 250ms according to the SCSI specification.
699 	 * T = (X * 256 + 15) * Tclf * 2  (Tclf = 200ns on x68k)
700 	 * To setup 256ms timeout,
701 	 * 128000ns/200ns = X * 256 + 15
702 	 * 640 - 15 = X * 256
703 	 * X = 625 / 256
704 	 * X = 2 + 113 / 256
705 	 *  ==> tch = 2, tcm = 113 (correct?)
706 	 */
707 	/* Time to the information transfer phase start. */
708 	/* XXX These values should be calculated from sc_freq */
709 	bus_space_write_1(iot, ioh, TCH, 2);
710 	bus_space_write_1(iot, ioh, TCM, 113);
711 	bus_space_write_1(iot, ioh, TCL, 3);
712 	bus_space_write_1(iot, ioh, SCMD, SCMD_SELECT);
713 
714 	sc->sc_state = SPC_SELECTING;
715 }
716 
717 int
718 spc_reselect(struct spc_softc *sc, int message)
719 {
720 	uint8_t selid, target, lun;
721 	struct spc_acb *acb;
722 	struct scsipi_periph *periph;
723 	struct spc_tinfo *ti;
724 
725 	SPC_TRACE(("spc_reselect  "));
726 	/*
727 	 * The SCSI chip made a snapshot of the data bus while the reselection
728 	 * was being negotiated.  This enables us to determine which target did
729 	 * the reselect.
730 	 */
731 	selid = sc->sc_selid & ~(1 << sc->sc_initiator);
732 	if (selid & (selid - 1)) {
733 		printf("%s: reselect with invalid selid %02x; "
734 		    "sending DEVICE RESET\n", device_xname(sc->sc_dev), selid);
735 		SPC_BREAK();
736 		goto reset;
737 	}
738 
739 	/*
740 	 * Search wait queue for disconnected cmd
741 	 * The list should be short, so I haven't bothered with
742 	 * any more sophisticated structures than a simple
743 	 * singly linked list.
744 	 */
745 	target = ffs(selid) - 1;
746 	lun = message & 0x07;
747 	TAILQ_FOREACH(acb, &sc->nexus_list, chain) {
748 		periph = acb->xs->xs_periph;
749 		if (periph->periph_target == target &&
750 		    periph->periph_lun == lun)
751 			break;
752 	}
753 	if (acb == NULL) {
754 		printf("%s: reselect from target %d lun %d with no nexus; "
755 		    "sending ABORT\n", device_xname(sc->sc_dev), target, lun);
756 		SPC_BREAK();
757 		goto abort;
758 	}
759 
760 	/* Make this nexus active again. */
761 	TAILQ_REMOVE(&sc->nexus_list, acb, chain);
762 	sc->sc_state = SPC_CONNECTED;
763 	sc->sc_nexus = acb;
764 	ti = &sc->sc_tinfo[target];
765 	ti->lubusy |= (1 << lun);
766 	spc_setsync(sc, ti);
767 
768 	if (acb->flags & ACB_RESET)
769 		spc_sched_msgout(sc, SEND_DEV_RESET);
770 	else if (acb->flags & ACB_ABORT)
771 		spc_sched_msgout(sc, SEND_ABORT);
772 
773 	/* Do an implicit RESTORE POINTERS. */
774 	sc->sc_dp = acb->data_addr;
775 	sc->sc_dleft = acb->data_length;
776 	sc->sc_cp = (uint8_t *)&acb->scsipi_cmd;
777 	sc->sc_cleft = acb->scsipi_cmd_length;
778 
779 	return (0);
780 
781 reset:
782 	spc_sched_msgout(sc, SEND_DEV_RESET);
783 	return (1);
784 
785 abort:
786 	spc_sched_msgout(sc, SEND_ABORT);
787 	return (1);
788 }
789 
790 /*
791  * Schedule a SCSI operation.  This has now been pulled out of the interrupt
792  * handler so that we may call it from spc_scsi_cmd and spc_done.  This may
793  * save us an unnecessary interrupt just to get things going.  Should only be
794  * called when state == SPC_IDLE and at bio pl.
795  */
796 void
797 spc_sched(struct spc_softc *sc)
798 {
799 	struct spc_acb *acb;
800 	struct scsipi_periph *periph;
801 	struct spc_tinfo *ti;
802 
803 	/* missing the hw, just return and wait for our hw */
804 	if (sc->sc_flags & SPC_INACTIVE)
805 		return;
806 	SPC_TRACE(("spc_sched  "));
807 	/*
808 	 * Find first acb in ready queue that is for a target/lunit pair that
809 	 * is not busy.
810 	 */
811 	TAILQ_FOREACH(acb, &sc->ready_list, chain) {
812 		periph = acb->xs->xs_periph;
813 		ti = &sc->sc_tinfo[periph->periph_target];
814 		if ((ti->lubusy & (1 << periph->periph_lun)) == 0) {
815 			SPC_MISC(("selecting %d:%d  ",
816 			    periph->periph_target, periph->periph_lun));
817 			TAILQ_REMOVE(&sc->ready_list, acb, chain);
818 			sc->sc_nexus = acb;
819 			spc_select(sc, acb);
820 			return;
821 		} else {
822 			SPC_MISC(("%d:%d busy\n",
823 			    periph->periph_target, periph->periph_lun));
824 		}
825 	}
826 	SPC_MISC(("idle  "));
827 	/* Nothing to start; just enable reselections and wait. */
828 }
829 
830 /*
831  * POST PROCESSING OF SCSI_CMD (usually current)
832  */
833 void
834 spc_done(struct spc_softc *sc, struct spc_acb *acb)
835 {
836 	struct scsipi_xfer *xs = acb->xs;
837 	struct scsipi_periph *periph = xs->xs_periph;
838 	struct spc_tinfo *ti = &sc->sc_tinfo[periph->periph_target];
839 
840 	SPC_TRACE(("spc_done  "));
841 
842 	if (xs->error == XS_NOERROR) {
843 		if (acb->flags & ACB_ABORT) {
844 			xs->error = XS_DRIVER_STUFFUP;
845 		} else {
846 			switch (acb->target_stat) {
847 			case SCSI_CHECK:
848 				/* First, save the return values */
849 				xs->resid = acb->data_length;
850 				/* FALLTHROUGH */
851 			case SCSI_BUSY:
852 				xs->status = acb->target_stat;
853 				xs->error = XS_BUSY;
854 				break;
855 			case SCSI_OK:
856 				xs->resid = acb->data_length;
857 				break;
858 			default:
859 				xs->error = XS_DRIVER_STUFFUP;
860 #if SPC_DEBUG
861 				printf("%s: spc_done: bad stat 0x%x\n",
862 				    device_xname(sc->sc_dev), acb->target_stat);
863 #endif
864 				break;
865 			}
866 		}
867 	}
868 
869 #if SPC_DEBUG
870 	if ((spc_debug & SPC_SHOWMISC) != 0) {
871 		if (xs->resid != 0)
872 			printf("resid=%d ", xs->resid);
873 		else
874 			printf("error=%d\n", xs->error);
875 	}
876 #endif
877 
878 	/*
879 	 * Remove the ACB from whatever queue it happens to be on.
880 	 */
881 	if (acb->flags & ACB_NEXUS)
882 		ti->lubusy &= ~(1 << periph->periph_lun);
883 	if (acb == sc->sc_nexus) {
884 		sc->sc_nexus = NULL;
885 		sc->sc_state = SPC_IDLE;
886 		spc_sched(sc);
887 	} else
888 		spc_dequeue(sc, acb);
889 
890 	spc_free_acb(sc, acb, xs->xs_control);
891 	ti->cmds++;
892 	scsipi_done(xs);
893 }
894 
895 void
896 spc_dequeue(struct spc_softc *sc, struct spc_acb *acb)
897 {
898 
899 	SPC_TRACE(("spc_dequeue  "));
900 	if (acb->flags & ACB_NEXUS)
901 		TAILQ_REMOVE(&sc->nexus_list, acb, chain);
902 	else
903 		TAILQ_REMOVE(&sc->ready_list, acb, chain);
904 }
905 
906 /*
907  * INTERRUPT/PROTOCOL ENGINE
908  */
909 
910 /*
911  * Precondition:
912  * The SCSI bus is already in the MSGI phase and there is a message byte
913  * on the bus, along with an asserted REQ signal.
914  */
915 void
916 spc_msgin(struct spc_softc *sc)
917 {
918 	bus_space_tag_t iot = sc->sc_iot;
919 	bus_space_handle_t ioh = sc->sc_ioh;
920 	int n;
921 	uint8_t msg;
922 
923 	SPC_TRACE(("spc_msgin  "));
924 
925 	if (sc->sc_prevphase == PH_MSGIN) {
926 		/* This is a continuation of the previous message. */
927 		n = sc->sc_imp - sc->sc_imess;
928 		goto nextbyte;
929 	}
930 
931 	/* This is a new MESSAGE IN phase.  Clean up our state. */
932 	sc->sc_flags &= ~SPC_DROP_MSGIN;
933 
934 nextmsg:
935 	n = 0;
936 	sc->sc_imp = &sc->sc_imess[n];
937 
938 nextbyte:
939 	/*
940 	 * Read a whole message, but don't ack the last byte.  If we reject the
941 	 * message, we have to assert ATN during the message transfer phase
942 	 * itself.
943 	 */
944 	for (;;) {
945 #ifdef NO_MANUAL_XFER /* XXX */
946 		if (bus_space_read_1(iot, ioh, INTS) != 0) {
947 			/*
948 			 * Target left MESSAGE IN, probably because it
949 			 * a) noticed our ATN signal, or
950 			 * b) ran out of messages.
951 			 */
952 			goto out;
953 		}
954 #endif
955 		/* If parity error, just dump everything on the floor. */
956 		if ((bus_space_read_1(iot, ioh, SERR) &
957 		     (SERR_SCSI_PAR|SERR_SPC_PAR)) != 0) {
958 			sc->sc_flags |= SPC_DROP_MSGIN;
959 			spc_sched_msgout(sc, SEND_PARITY_ERROR);
960 		}
961 
962 #ifdef NO_MANUAL_XFER /* XXX */
963 		/* send TRANSFER command. */
964 		bus_space_write_1(iot, ioh, TCH, 0);
965 		bus_space_write_1(iot, ioh, TCM, 0);
966 		bus_space_write_1(iot, ioh, TCL, 1);
967 		bus_space_write_1(iot, ioh, PCTL,
968 		    sc->sc_phase | PCTL_BFINT_ENAB);
969 #ifdef NEED_DREQ_ON_HARDWARE_XFER
970 		bus_space_write_1(iot, ioh, SCMD, SCMD_XFR);
971 #else
972 		bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR);
973 #endif
974 		for (;;) {
975 			if ((bus_space_read_1(iot, ioh, SSTS) &
976 			    SSTS_DREG_EMPTY) == 0)
977 				break;
978 			if (bus_space_read_1(iot, ioh, INTS) != 0)
979 				goto out;
980 		}
981 		msg = bus_space_read_1(iot, ioh, DREG);
982 #else
983 		if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_ATN) != 0)
984 			bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN);
985 		bus_space_write_1(iot, ioh, PCTL, PCTL_BFINT_ENAB | PH_MSGIN);
986 
987 		while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) {
988 			if ((bus_space_read_1(iot, ioh, PSNS) & PH_MASK)
989 			    != PH_MSGIN ||
990 			    bus_space_read_1(iot, ioh, INTS) != 0)
991 				/*
992 				 * Target left MESSAGE IN, probably because it
993 				 * a) noticed our ATN signal, or
994 				 * b) ran out of messages.
995 				 */
996 				goto out;
997 			DELAY(1);	/* XXX needs timeout */
998 		}
999 
1000 		msg = bus_space_read_1(iot, ioh, TEMP);
1001 #endif
1002 
1003 		/* Gather incoming message bytes if needed. */
1004 		if ((sc->sc_flags & SPC_DROP_MSGIN) == 0) {
1005 			if (n >= SPC_MAX_MSG_LEN) {
1006 				sc->sc_flags |= SPC_DROP_MSGIN;
1007 				spc_sched_msgout(sc, SEND_REJECT);
1008 			} else {
1009 				*sc->sc_imp++ = msg;
1010 				n++;
1011 				/*
1012 				 * This testing is suboptimal, but most
1013 				 * messages will be of the one byte variety, so
1014 				 * it should not affect performance
1015 				 * significantly.
1016 				 */
1017 				if (n == 1 && MSG_IS1BYTE(sc->sc_imess[0]))
1018 					break;
1019 				if (n == 2 && MSG_IS2BYTE(sc->sc_imess[0]))
1020 					break;
1021 				if (n >= 3 && MSG_ISEXTENDED(sc->sc_imess[0]) &&
1022 				    n == sc->sc_imess[1] + 2)
1023 					break;
1024 			}
1025 		}
1026 		/*
1027 		 * If we reach this spot we're either:
1028 		 * a) in the middle of a multi-byte message, or
1029 		 * b) dropping bytes.
1030 		 */
1031 
1032 #ifndef NO_MANUAL_XFER /* XXX */
1033 		/* Ack the last byte read. */
1034 		bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ACK);
1035 		while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0)
1036 			DELAY(1);	/* XXX needs timeout */
1037 		bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK);
1038 #endif
1039 	}
1040 
1041 	SPC_MISC(("n=%d imess=0x%02x  ", n, sc->sc_imess[0]));
1042 
1043 	/* We now have a complete message.  Parse it. */
1044 	switch (sc->sc_state) {
1045 		struct spc_acb *acb;
1046 		struct spc_tinfo *ti;
1047 
1048 	case SPC_CONNECTED:
1049 		SPC_ASSERT(sc->sc_nexus != NULL);
1050 		acb = sc->sc_nexus;
1051 		ti = &sc->sc_tinfo[acb->xs->xs_periph->periph_target];
1052 
1053 		switch (sc->sc_imess[0]) {
1054 		case MSG_CMDCOMPLETE:
1055 #if 0
1056 			if (sc->sc_dleft < 0) {
1057 				periph = acb->xs->xs_periph;
1058 				printf("%s: %ld extra bytes from %d:%d\n",
1059 				    device_xname(sc->sc_dev),
1060 				    (long)-sc->sc_dleft,
1061 				    periph->periph_target, periph->periph_lun);
1062 				sc->sc_dleft = 0;
1063 			}
1064 #endif
1065 			acb->xs->resid = acb->data_length = sc->sc_dleft;
1066 			sc->sc_state = SPC_CMDCOMPLETE;
1067 			break;
1068 
1069 		case MSG_PARITY_ERROR:
1070 			/* Resend the last message. */
1071 			spc_sched_msgout(sc, sc->sc_lastmsg);
1072 			break;
1073 
1074 		case MSG_MESSAGE_REJECT:
1075 			SPC_MISC(("message rejected %02x  ", sc->sc_lastmsg));
1076 			switch (sc->sc_lastmsg) {
1077 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE
1078 			case SEND_IDENTIFY:
1079 				ti->flags &= ~(DO_SYNC | DO_WIDE);
1080 				ti->period = ti->offset = 0;
1081 				spc_setsync(sc, ti);
1082 				ti->width = 0;
1083 				break;
1084 #endif
1085 #if SPC_USE_SYNCHRONOUS
1086 			case SEND_SDTR:
1087 				ti->flags &= ~DO_SYNC;
1088 				ti->period = ti->offset = 0;
1089 				spc_setsync(sc, ti);
1090 				break;
1091 #endif
1092 #if SPC_USE_WIDE
1093 			case SEND_WDTR:
1094 				ti->flags &= ~DO_WIDE;
1095 				ti->width = 0;
1096 				break;
1097 #endif
1098 			case SEND_INIT_DET_ERR:
1099 				spc_sched_msgout(sc, SEND_ABORT);
1100 				break;
1101 			}
1102 			break;
1103 
1104 		case MSG_NOOP:
1105 			break;
1106 
1107 		case MSG_DISCONNECT:
1108 			ti->dconns++;
1109 			sc->sc_state = SPC_DISCONNECT;
1110 			break;
1111 
1112 		case MSG_SAVEDATAPOINTER:
1113 			acb->data_addr = sc->sc_dp;
1114 			acb->data_length = sc->sc_dleft;
1115 			break;
1116 
1117 		case MSG_RESTOREPOINTERS:
1118 			sc->sc_dp = acb->data_addr;
1119 			sc->sc_dleft = acb->data_length;
1120 			sc->sc_cp = (uint8_t *)&acb->scsipi_cmd;
1121 			sc->sc_cleft = acb->scsipi_cmd_length;
1122 			break;
1123 
1124 		case MSG_EXTENDED:
1125 			switch (sc->sc_imess[2]) {
1126 #if SPC_USE_SYNCHRONOUS
1127 			case MSG_EXT_SDTR:
1128 				if (sc->sc_imess[1] != 3)
1129 					goto reject;
1130 				ti->period = sc->sc_imess[3];
1131 				ti->offset = sc->sc_imess[4];
1132 				ti->flags &= ~DO_SYNC;
1133 				if (ti->offset == 0) {
1134 				} else if (ti->period < sc->sc_minsync ||
1135 				    ti->period > sc->sc_maxsync ||
1136 				    ti->offset > 8) {
1137 					ti->period = ti->offset = 0;
1138 					spc_sched_msgout(sc, SEND_SDTR);
1139 				} else {
1140 					scsipi_printaddr(acb->xs->xs_periph);
1141 					printf("sync, offset %d, "
1142 					    "period %dnsec\n",
1143 					    ti->offset, ti->period * 4);
1144 				}
1145 				spc_setsync(sc, ti);
1146 				break;
1147 #endif
1148 
1149 #if SPC_USE_WIDE
1150 			case MSG_EXT_WDTR:
1151 				if (sc->sc_imess[1] != 2)
1152 					goto reject;
1153 				ti->width = sc->sc_imess[3];
1154 				ti->flags &= ~DO_WIDE;
1155 				if (ti->width == 0) {
1156 				} else if (ti->width > SPC_MAX_WIDTH) {
1157 					ti->width = 0;
1158 					spc_sched_msgout(sc, SEND_WDTR);
1159 				} else {
1160 					scsipi_printaddr(acb->xs->xs_periph);
1161 					printf("wide, width %d\n",
1162 					    1 << (3 + ti->width));
1163 				}
1164 				break;
1165 #endif
1166 
1167 			default:
1168 				printf("%s: unrecognized MESSAGE EXTENDED; "
1169 				    "sending REJECT\n",
1170 				    device_xname(sc->sc_dev));
1171 				SPC_BREAK();
1172 				goto reject;
1173 			}
1174 			break;
1175 
1176 		default:
1177 			printf("%s: unrecognized MESSAGE; sending REJECT\n",
1178 			    device_xname(sc->sc_dev));
1179 			SPC_BREAK();
1180 		reject:
1181 			spc_sched_msgout(sc, SEND_REJECT);
1182 			break;
1183 		}
1184 		break;
1185 
1186 	case SPC_RESELECTED:
1187 		if (!MSG_ISIDENTIFY(sc->sc_imess[0])) {
1188 			printf("%s: reselect without IDENTIFY; "
1189 			    "sending DEVICE RESET\n", device_xname(sc->sc_dev));
1190 			SPC_BREAK();
1191 			goto reset;
1192 		}
1193 
1194 		(void) spc_reselect(sc, sc->sc_imess[0]);
1195 		break;
1196 
1197 	default:
1198 		printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n",
1199 		    device_xname(sc->sc_dev));
1200 		SPC_BREAK();
1201 	reset:
1202 		spc_sched_msgout(sc, SEND_DEV_RESET);
1203 		break;
1204 
1205 #ifdef notdef
1206 	abort:
1207 		spc_sched_msgout(sc, SEND_ABORT);
1208 		break;
1209 #endif
1210 	}
1211 
1212 #ifndef NO_MANUAL_XFER /* XXX */
1213 	/* Ack the last message byte. */
1214 	bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ACK);
1215 	while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0)
1216 		DELAY(1);	/* XXX needs timeout */
1217 	bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK);
1218 #endif
1219 
1220 	/* Go get the next message, if any. */
1221 	goto nextmsg;
1222 
1223 out:
1224 #ifdef NO_MANUAL_XFER /* XXX */
1225 	/* Ack the last message byte. */
1226 	bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK);
1227 #endif
1228 	SPC_MISC(("n=%d imess=0x%02x  ", n, sc->sc_imess[0]));
1229 }
1230 
1231 /*
1232  * Send the highest priority, scheduled message.
1233  */
1234 void
1235 spc_msgout(struct spc_softc *sc)
1236 {
1237 	bus_space_tag_t iot = sc->sc_iot;
1238 	bus_space_handle_t ioh = sc->sc_ioh;
1239 #if SPC_USE_SYNCHRONOUS
1240 	struct spc_tinfo *ti;
1241 #endif
1242 	int n;
1243 
1244 	SPC_TRACE(("spc_msgout  "));
1245 
1246 	if (sc->sc_prevphase == PH_MSGOUT) {
1247 		if (sc->sc_omp == sc->sc_omess) {
1248 			/*
1249 			 * This is a retransmission.
1250 			 *
1251 			 * We get here if the target stayed in MESSAGE OUT
1252 			 * phase.  Section 5.1.9.2 of the SCSI 2 spec indicates
1253 			 * that all of the previously transmitted messages must
1254 			 * be sent again, in the same order.  Therefore, we
1255 			 * requeue all the previously transmitted messages, and
1256 			 * start again from the top.  Our simple priority
1257 			 * scheme keeps the messages in the right order.
1258 			 */
1259 			SPC_MISC(("retransmitting  "));
1260 			sc->sc_msgpriq |= sc->sc_msgoutq;
1261 			/*
1262 			 * Set ATN.  If we're just sending a trivial 1-byte
1263 			 * message, we'll clear ATN later on anyway.
1264 			 */
1265 			bus_space_write_1(iot, ioh, SCMD,
1266 			    SCMD_SET_ATN);	/* XXX? */
1267 		} else {
1268 			/* This is a continuation of the previous message. */
1269 			n = sc->sc_omp - sc->sc_omess;
1270 			goto nextbyte;
1271 		}
1272 	}
1273 
1274 	/* No messages transmitted so far. */
1275 	sc->sc_msgoutq = 0;
1276 	sc->sc_lastmsg = 0;
1277 
1278 nextmsg:
1279 	/* Pick up highest priority message. */
1280 	sc->sc_currmsg = sc->sc_msgpriq & -sc->sc_msgpriq;
1281 	sc->sc_msgpriq &= ~sc->sc_currmsg;
1282 	sc->sc_msgoutq |= sc->sc_currmsg;
1283 
1284 	/* Build the outgoing message data. */
1285 	switch (sc->sc_currmsg) {
1286 	case SEND_IDENTIFY:
1287 		SPC_ASSERT(sc->sc_nexus != NULL);
1288 		sc->sc_omess[0] =
1289 		    MSG_IDENTIFY(sc->sc_nexus->xs->xs_periph->periph_lun, 1);
1290 		n = 1;
1291 		break;
1292 
1293 #if SPC_USE_SYNCHRONOUS
1294 	case SEND_SDTR:
1295 		SPC_ASSERT(sc->sc_nexus != NULL);
1296 		ti = &sc->sc_tinfo[sc->sc_nexus->xs->xs_periph->periph_target];
1297 		sc->sc_omess[4] = MSG_EXTENDED;
1298 		sc->sc_omess[3] = MSG_EXT_SDTR_LEN;
1299 		sc->sc_omess[2] = MSG_EXT_SDTR;
1300 		sc->sc_omess[1] = ti->period >> 2;
1301 		sc->sc_omess[0] = ti->offset;
1302 		n = 5;
1303 		break;
1304 #endif
1305 
1306 #if SPC_USE_WIDE
1307 	case SEND_WDTR:
1308 		SPC_ASSERT(sc->sc_nexus != NULL);
1309 		ti = &sc->sc_tinfo[sc->sc_nexus->xs->xs_periph->periph_target];
1310 		sc->sc_omess[3] = MSG_EXTENDED;
1311 		sc->sc_omess[2] = MSG_EXT_WDTR_LEN;
1312 		sc->sc_omess[1] = MSG_EXT_WDTR;
1313 		sc->sc_omess[0] = ti->width;
1314 		n = 4;
1315 		break;
1316 #endif
1317 
1318 	case SEND_DEV_RESET:
1319 		sc->sc_flags |= SPC_ABORTING;
1320 		sc->sc_omess[0] = MSG_BUS_DEV_RESET;
1321 		n = 1;
1322 		break;
1323 
1324 	case SEND_REJECT:
1325 		sc->sc_omess[0] = MSG_MESSAGE_REJECT;
1326 		n = 1;
1327 		break;
1328 
1329 	case SEND_PARITY_ERROR:
1330 		sc->sc_omess[0] = MSG_PARITY_ERROR;
1331 		n = 1;
1332 		break;
1333 
1334 	case SEND_INIT_DET_ERR:
1335 		sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
1336 		n = 1;
1337 		break;
1338 
1339 	case SEND_ABORT:
1340 		sc->sc_flags |= SPC_ABORTING;
1341 		sc->sc_omess[0] = MSG_ABORT;
1342 		n = 1;
1343 		break;
1344 
1345 	default:
1346 		printf("%s: unexpected MESSAGE OUT; sending NOOP\n",
1347 		    device_xname(sc->sc_dev));
1348 		SPC_BREAK();
1349 		sc->sc_omess[0] = MSG_NOOP;
1350 		n = 1;
1351 		break;
1352 	}
1353 	sc->sc_omp = &sc->sc_omess[n];
1354 
1355 nextbyte:
1356 	/* Send message bytes. */
1357 	/* send TRANSFER command. */
1358 	bus_space_write_1(iot, ioh, TCH, n >> 16);
1359 	bus_space_write_1(iot, ioh, TCM, n >> 8);
1360 	bus_space_write_1(iot, ioh, TCL, n);
1361 	bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB);
1362 #ifdef NEED_DREQ_ON_HARDWARE_XFER
1363 	bus_space_write_1(iot, ioh, SCMD, SCMD_XFR);	/* XXX */
1364 #else
1365 	bus_space_write_1(iot, ioh, SCMD,
1366 	    SCMD_XFR | SCMD_PROG_XFR);
1367 #endif
1368 	for (;;) {
1369 		if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0)
1370 			break;
1371 		if (bus_space_read_1(iot, ioh, INTS) != 0)
1372 			goto out;
1373 	}
1374 	for (;;) {
1375 #if 0
1376 		for (;;) {
1377 			if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0)
1378 				break;
1379 			/* Wait for REQINIT.  XXX Need timeout. */
1380 		}
1381 #endif
1382 		if (bus_space_read_1(iot, ioh, INTS) != 0) {
1383 			/*
1384 			 * Target left MESSAGE OUT, possibly to reject
1385 			 * our message.
1386 			 *
1387 			 * If this is the last message being sent, then we
1388 			 * deassert ATN, since either the target is going to
1389 			 * ignore this message, or it's going to ask for a
1390 			 * retransmission via MESSAGE PARITY ERROR (in which
1391 			 * case we reassert ATN anyway).
1392 			 */
1393 #if 0
1394 			if (sc->sc_msgpriq == 0)
1395 				bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN);
1396 #endif
1397 			goto out;
1398 		}
1399 
1400 #if 0
1401 		/* Clear ATN before last byte if this is the last message. */
1402 		if (n == 1 && sc->sc_msgpriq == 0)
1403 			bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN);
1404 #endif
1405 
1406 		while ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_FULL) != 0)
1407 			DELAY(1);
1408 		/* Send message byte. */
1409 		bus_space_write_1(iot, ioh, DREG, *--sc->sc_omp);
1410 		--n;
1411 		/* Keep track of the last message we've sent any bytes of. */
1412 		sc->sc_lastmsg = sc->sc_currmsg;
1413 #if 0
1414 		/* Wait for ACK to be negated.  XXX Need timeout. */
1415 		while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0)
1416 			;
1417 #endif
1418 
1419 		if (n == 0)
1420 			break;
1421 	}
1422 
1423 	/* We get here only if the entire message has been transmitted. */
1424 	if (sc->sc_msgpriq != 0) {
1425 		/* There are more outgoing messages. */
1426 		goto nextmsg;
1427 	}
1428 
1429 	/*
1430 	 * The last message has been transmitted.  We need to remember the last
1431 	 * message transmitted (in case the target switches to MESSAGE IN phase
1432 	 * and sends a MESSAGE REJECT), and the list of messages transmitted
1433 	 * this time around (in case the target stays in MESSAGE OUT phase to
1434 	 * request a retransmit).
1435 	 */
1436 
1437 out:
1438 	/* Disable REQ/ACK protocol. */
1439 	return;
1440 }
1441 
1442 /*
1443  * spc_dataout_pio: perform a data transfer using the FIFO datapath in the spc
1444  * Precondition: The SCSI bus should be in the DOUT phase, with REQ asserted
1445  * and ACK deasserted (i.e. waiting for a data byte)
1446  *
1447  * This new revision has been optimized (I tried) to make the common case fast,
1448  * and the rarer cases (as a result) somewhat more comlex
1449  */
1450 int
1451 spc_dataout_pio(struct spc_softc *sc, uint8_t *p, int n)
1452 {
1453 	bus_space_tag_t iot = sc->sc_iot;
1454 	bus_space_handle_t ioh = sc->sc_ioh;
1455 	uint8_t intstat = 0;
1456 	int out = 0;
1457 #define DOUTAMOUNT 8		/* Full FIFO */
1458 
1459 	SPC_TRACE(("spc_dataout_pio  "));
1460 	/* send TRANSFER command. */
1461 	bus_space_write_1(iot, ioh, TCH, n >> 16);
1462 	bus_space_write_1(iot, ioh, TCM, n >> 8);
1463 	bus_space_write_1(iot, ioh, TCL, n);
1464 	bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB);
1465 #ifdef NEED_DREQ_ON_HARDWARE_XFER
1466 	bus_space_write_1(iot, ioh, SCMD, SCMD_XFR);	/* XXX */
1467 #else
1468 	bus_space_write_1(iot, ioh, SCMD,
1469 	    SCMD_XFR | SCMD_PROG_XFR);	/* XXX */
1470 #endif
1471 	for (;;) {
1472 		if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0)
1473 			break;
1474 		if (bus_space_read_1(iot, ioh, INTS) != 0)
1475 			break;
1476 	}
1477 
1478 	/*
1479 	 * I have tried to make the main loop as tight as possible.  This
1480 	 * means that some of the code following the loop is a bit more
1481 	 * complex than otherwise.
1482 	 */
1483 	while (n > 0) {
1484 		int xfer;
1485 
1486 		for (;;) {
1487 			intstat = bus_space_read_1(iot, ioh, INTS);
1488 			/* Wait till buffer is empty. */
1489 			if ((bus_space_read_1(iot, ioh, SSTS) &
1490 			    SSTS_DREG_EMPTY) != 0)
1491 				break;
1492 			/* Break on interrupt. */
1493 			if (intstat != 0)
1494 				goto phasechange;
1495 			DELAY(1);
1496 		}
1497 
1498 		xfer = min(DOUTAMOUNT, n);
1499 
1500 		SPC_MISC(("%d> ", xfer));
1501 
1502 		n -= xfer;
1503 		out += xfer;
1504 
1505 		bus_space_write_multi_1(iot, ioh, DREG, p, xfer);
1506 		p += xfer;
1507 	}
1508 
1509 	if (out == 0) {
1510 		for (;;) {
1511 			if (bus_space_read_1(iot, ioh, INTS) != 0)
1512 				break;
1513 			DELAY(1);
1514 		}
1515 		SPC_MISC(("extra data  "));
1516 	} else {
1517 		/* See the bytes off chip */
1518 		for (;;) {
1519 			/* Wait till buffer is empty. */
1520 			if ((bus_space_read_1(iot, ioh, SSTS) &
1521 			    SSTS_DREG_EMPTY) != 0)
1522 				break;
1523 			intstat = bus_space_read_1(iot, ioh, INTS);
1524 			/* Break on interrupt. */
1525 			if (intstat != 0)
1526 				goto phasechange;
1527 			DELAY(1);
1528 		}
1529 	}
1530 
1531 phasechange:
1532 	/* Stop the FIFO data path. */
1533 
1534 	if (intstat != 0) {
1535 		/* Some sort of phase change. */
1536 		int amount;
1537 
1538 		amount = (bus_space_read_1(iot, ioh, TCH) << 16) |
1539 		    (bus_space_read_1(iot, ioh, TCM) << 8) |
1540 		    bus_space_read_1(iot, ioh, TCL);
1541 		if (amount > 0) {
1542 			out -= amount;
1543 			SPC_MISC(("+%d ", amount));
1544 		}
1545 	}
1546 
1547 	return out;
1548 }
1549 
1550 /*
1551  * spc_datain_pio: perform data transfers using the FIFO datapath in the spc
1552  * Precondition: The SCSI bus should be in the DIN phase, with REQ asserted
1553  * and ACK deasserted (i.e. at least one byte is ready).
1554  *
1555  * For now, uses a pretty dumb algorithm, hangs around until all data has been
1556  * transferred.  This, is OK for fast targets, but not so smart for slow
1557  * targets which don't disconnect or for huge transfers.
1558  */
1559 int
1560 spc_datain_pio(struct spc_softc *sc, uint8_t *p, int n)
1561 {
1562 	bus_space_tag_t iot = sc->sc_iot;
1563 	bus_space_handle_t ioh = sc->sc_ioh;
1564 	int in = 0;
1565 	uint8_t intstat, sstat;
1566 #define DINAMOUNT 8		/* Full FIFO */
1567 
1568 	SPC_TRACE(("spc_datain_pio  "));
1569 	/* send TRANSFER command. */
1570 	bus_space_write_1(iot, ioh, TCH, n >> 16);
1571 	bus_space_write_1(iot, ioh, TCM, n >> 8);
1572 	bus_space_write_1(iot, ioh, TCL, n);
1573 	bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB);
1574 #ifdef NEED_DREQ_ON_HARDWARE_XFER
1575 	bus_space_write_1(iot, ioh, SCMD, SCMD_XFR);	/* XXX */
1576 #else
1577 	bus_space_write_1(iot, ioh, SCMD,
1578 	    SCMD_XFR | SCMD_PROG_XFR);	/* XXX */
1579 #endif
1580 
1581 	/*
1582 	 * We leave this loop if one or more of the following is true:
1583 	 * a) phase != PH_DATAIN && FIFOs are empty
1584 	 * b) reset has occurred or busfree is detected.
1585 	 */
1586 	intstat = 0;
1587 	while (n > 0) {
1588 		sstat = bus_space_read_1(iot, ioh, SSTS);
1589 		if ((sstat & SSTS_DREG_FULL) != 0) {
1590 			n -= DINAMOUNT;
1591 			in += DINAMOUNT;
1592 			bus_space_read_multi_1(iot, ioh, DREG, p, DINAMOUNT);
1593 			p += DINAMOUNT;
1594 		} else if ((sstat & SSTS_DREG_EMPTY) == 0) {
1595 			n--;
1596 			in++;
1597 			*p++ = bus_space_read_1(iot, ioh, DREG);
1598 		} else {
1599 			if (intstat != 0)
1600 				goto phasechange;
1601 			intstat = bus_space_read_1(iot, ioh, INTS);
1602 		}
1603 	}
1604 
1605 	/*
1606 	 * Some SCSI-devices are rude enough to transfer more data than what
1607 	 * was requested, e.g. 2048 bytes from a CD-ROM instead of the
1608 	 * requested 512.  Test for progress, i.e. real transfers.  If no real
1609 	 * transfers have been performed (n is probably already zero) and the
1610 	 * FIFO is not empty, waste some bytes....
1611 	 */
1612 	if (in == 0) {
1613 		for (;;) {
1614 			sstat = bus_space_read_1(iot, ioh, SSTS);
1615 			if ((sstat & SSTS_DREG_EMPTY) == 0) {
1616 				(void) bus_space_read_1(iot, ioh, DREG);
1617 			} else {
1618 				if (intstat != 0)
1619 					goto phasechange;
1620 				intstat = bus_space_read_1(iot, ioh, INTS);
1621 			}
1622 			DELAY(1);
1623 		}
1624 		SPC_MISC(("extra data  "));
1625 	}
1626 
1627 phasechange:
1628 	/* Stop the FIFO data path. */
1629 
1630 	return in;
1631 }
1632 
1633 /*
1634  * Catch an interrupt from the adaptor
1635  */
1636 /*
1637  * This is the workhorse routine of the driver.
1638  * Deficiencies (for now):
1639  * 1) always uses programmed I/O
1640  */
1641 int
1642 spc_intr(void *arg)
1643 {
1644 	struct spc_softc *sc = arg;
1645 	bus_space_tag_t iot = sc->sc_iot;
1646 	bus_space_handle_t ioh = sc->sc_ioh;
1647 	uint8_t ints;
1648 	struct spc_acb *acb;
1649 	struct scsipi_periph *periph;
1650 	struct spc_tinfo *ti;
1651 	int n;
1652 
1653 	SPC_TRACE(("spc_intr  "));
1654 
1655 	ints = bus_space_read_1(iot, ioh, INTS);
1656 	if (ints == 0)
1657 		return 0;
1658 
1659 	/*
1660 	 * Disable interrupt.
1661 	 */
1662 	bus_space_write_1(iot, ioh, SCTL,
1663 	    bus_space_read_1(iot, ioh, SCTL) & ~SCTL_INTR_ENAB);
1664 
1665 	if (sc->sc_dma_done != NULL &&
1666 	    sc->sc_state == SPC_CONNECTED &&
1667 	    (sc->sc_flags & SPC_DOINGDMA) != 0 &&
1668 	    (sc->sc_phase == PH_DATAOUT || sc->sc_phase == PH_DATAIN)) {
1669 		(*sc->sc_dma_done)(sc);
1670 	}
1671 
1672 loop:
1673 	/*
1674 	 * Loop until transfer completion.
1675 	 */
1676 	/*
1677 	 * First check for abnormal conditions, such as reset.
1678 	 */
1679 	ints = bus_space_read_1(iot, ioh, INTS);
1680 	SPC_MISC(("ints = 0x%x  ", ints));
1681 
1682 	if ((ints & INTS_RST) != 0) {
1683 		printf("%s: SCSI bus reset\n", device_xname(sc->sc_dev));
1684 		goto reset;
1685 	}
1686 
1687 	/*
1688 	 * Check for less serious errors.
1689 	 */
1690 	if ((bus_space_read_1(iot, ioh, SERR) & (SERR_SCSI_PAR|SERR_SPC_PAR))
1691 	    != 0) {
1692 		printf("%s: SCSI bus parity error\n", device_xname(sc->sc_dev));
1693 		if (sc->sc_prevphase == PH_MSGIN) {
1694 			sc->sc_flags |= SPC_DROP_MSGIN;
1695 			spc_sched_msgout(sc, SEND_PARITY_ERROR);
1696 		} else
1697 			spc_sched_msgout(sc, SEND_INIT_DET_ERR);
1698 	}
1699 
1700 	/*
1701 	 * If we're not already busy doing something test for the following
1702 	 * conditions:
1703 	 * 1) We have been reselected by something
1704 	 * 2) We have selected something successfully
1705 	 * 3) Our selection process has timed out
1706 	 * 4) This is really a bus free interrupt just to get a new command
1707 	 *    going?
1708 	 * 5) Spurious interrupt?
1709 	 */
1710 	switch (sc->sc_state) {
1711 	case SPC_IDLE:
1712 	case SPC_SELECTING:
1713 		SPC_MISC(("ints:0x%02x ", ints));
1714 
1715 		if ((ints & INTS_SEL) != 0) {
1716 			/*
1717 			 * We don't currently support target mode.
1718 			 */
1719 			printf("%s: target mode selected; going to BUS FREE\n",
1720 			    device_xname(sc->sc_dev));
1721 
1722 			goto sched;
1723 		} else if ((ints & INTS_RESEL) != 0) {
1724 			SPC_MISC(("reselected  "));
1725 
1726 			/*
1727 			 * If we're trying to select a target ourselves,
1728 			 * push our command back into the ready list.
1729 			 */
1730 			if (sc->sc_state == SPC_SELECTING) {
1731 				SPC_MISC(("backoff selector  "));
1732 				SPC_ASSERT(sc->sc_nexus != NULL);
1733 				acb = sc->sc_nexus;
1734 				sc->sc_nexus = NULL;
1735 				TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
1736 			}
1737 
1738 			/* Save reselection ID. */
1739 			sc->sc_selid = bus_space_read_1(iot, ioh, TEMP);
1740 
1741 			sc->sc_state = SPC_RESELECTED;
1742 		} else if ((ints & INTS_CMD_DONE) != 0) {
1743 			SPC_MISC(("selected  "));
1744 
1745 			/*
1746 			 * We have selected a target. Things to do:
1747 			 * a) Determine what message(s) to send.
1748 			 * b) Verify that we're still selecting the target.
1749 			 * c) Mark device as busy.
1750 			 */
1751 			if (sc->sc_state != SPC_SELECTING) {
1752 				printf("%s: selection out while idle; "
1753 				    "resetting\n", device_xname(sc->sc_dev));
1754 				SPC_BREAK();
1755 				goto reset;
1756 			}
1757 			SPC_ASSERT(sc->sc_nexus != NULL);
1758 			acb = sc->sc_nexus;
1759 			periph = acb->xs->xs_periph;
1760 			ti = &sc->sc_tinfo[periph->periph_target];
1761 
1762 			sc->sc_msgpriq = SEND_IDENTIFY;
1763 			if (acb->flags & ACB_RESET)
1764 				sc->sc_msgpriq |= SEND_DEV_RESET;
1765 			else if (acb->flags & ACB_ABORT)
1766 				sc->sc_msgpriq |= SEND_ABORT;
1767 			else {
1768 #if SPC_USE_SYNCHRONOUS
1769 				if ((ti->flags & DO_SYNC) != 0)
1770 					sc->sc_msgpriq |= SEND_SDTR;
1771 #endif
1772 #if SPC_USE_WIDE
1773 				if ((ti->flags & DO_WIDE) != 0)
1774 					sc->sc_msgpriq |= SEND_WDTR;
1775 #endif
1776 			}
1777 
1778 			acb->flags |= ACB_NEXUS;
1779 			ti->lubusy |= (1 << periph->periph_lun);
1780 
1781 			/* Do an implicit RESTORE POINTERS. */
1782 			sc->sc_dp = acb->data_addr;
1783 			sc->sc_dleft = acb->data_length;
1784 			sc->sc_cp = (uint8_t *)&acb->scsipi_cmd;
1785 			sc->sc_cleft = acb->scsipi_cmd_length;
1786 
1787 			/* On our first connection, schedule a timeout. */
1788 			if ((acb->xs->xs_control & XS_CTL_POLL) == 0)
1789 				callout_reset(&acb->xs->xs_callout,
1790 				    mstohz(acb->timeout), spc_timeout, acb);
1791 
1792 			sc->sc_state = SPC_CONNECTED;
1793 		} else if ((ints & INTS_TIMEOUT) != 0) {
1794 			SPC_MISC(("selection timeout  "));
1795 
1796 			if (sc->sc_state != SPC_SELECTING) {
1797 				printf("%s: selection timeout while idle; "
1798 				    "resetting\n", device_xname(sc->sc_dev));
1799 				SPC_BREAK();
1800 				goto reset;
1801 			}
1802 			SPC_ASSERT(sc->sc_nexus != NULL);
1803 			acb = sc->sc_nexus;
1804 
1805 			delay(250);
1806 
1807 			acb->xs->error = XS_SELTIMEOUT;
1808 			goto finish;
1809 		} else {
1810 			if (sc->sc_state != SPC_IDLE) {
1811 				printf("%s: BUS FREE while not idle; "
1812 				    "state=%d\n",
1813 				    device_xname(sc->sc_dev), sc->sc_state);
1814 				SPC_BREAK();
1815 				goto out;
1816 			}
1817 
1818 			goto sched;
1819 		}
1820 
1821 		/*
1822 		 * Turn off selection stuff, and prepare to catch bus free
1823 		 * interrupts, parity errors, and phase changes.
1824 		 */
1825 
1826 		sc->sc_flags = 0;
1827 		sc->sc_prevphase = PH_INVALID;
1828 		goto dophase;
1829 	}
1830 
1831 	if ((ints & INTS_DISCON) != 0) {
1832 		/* We've gone to BUS FREE phase. */
1833 		/* disable disconnect interrupt */
1834 		bus_space_write_1(iot, ioh, PCTL,
1835 		    bus_space_read_1(iot, ioh, PCTL) & ~PCTL_BFINT_ENAB);
1836 		/* XXX reset interrput */
1837 		bus_space_write_1(iot, ioh, INTS, ints);
1838 
1839 		switch (sc->sc_state) {
1840 		case SPC_RESELECTED:
1841 			goto sched;
1842 
1843 		case SPC_CONNECTED:
1844 			SPC_ASSERT(sc->sc_nexus != NULL);
1845 			acb = sc->sc_nexus;
1846 
1847 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE
1848 			if (sc->sc_prevphase == PH_MSGOUT) {
1849 				/*
1850 				 * If the target went to BUS FREE phase during
1851 				 * or immediately after sending a SDTR or WDTR
1852 				 * message, disable negotiation.
1853 				 */
1854 				periph = acb->xs->xs_periph;
1855 				ti = &sc->sc_tinfo[periph->periph_target];
1856 				switch (sc->sc_lastmsg) {
1857 #if SPC_USE_SYNCHRONOUS
1858 				case SEND_SDTR:
1859 					ti->flags &= ~DO_SYNC;
1860 					ti->period = ti->offset = 0;
1861 					break;
1862 #endif
1863 #if SPC_USE_WIDE
1864 				case SEND_WDTR:
1865 					ti->flags &= ~DO_WIDE;
1866 					ti->width = 0;
1867 					break;
1868 #endif
1869 				}
1870 			}
1871 #endif
1872 
1873 			if ((sc->sc_flags & SPC_ABORTING) == 0) {
1874 				/*
1875 				 * Section 5.1.1 of the SCSI 2 spec suggests
1876 				 * issuing a REQUEST SENSE following an
1877 				 * unexpected disconnect.  Some devices go into
1878 				 * a contingent allegiance condition when
1879 				 * disconnecting, and this is necessary to
1880 				 * clean up their state.
1881 				 */
1882 				printf("%s: unexpected disconnect; "
1883 				    "sending REQUEST SENSE\n",
1884 				    device_xname(sc->sc_dev));
1885 				SPC_BREAK();
1886 				acb->target_stat = SCSI_CHECK;
1887 				acb->xs->error = XS_NOERROR;
1888 				goto finish;
1889 			}
1890 
1891 			acb->xs->error = XS_DRIVER_STUFFUP;
1892 			goto finish;
1893 
1894 		case SPC_DISCONNECT:
1895 			SPC_ASSERT(sc->sc_nexus != NULL);
1896 			acb = sc->sc_nexus;
1897 			TAILQ_INSERT_HEAD(&sc->nexus_list, acb, chain);
1898 			sc->sc_nexus = NULL;
1899 			goto sched;
1900 
1901 		case SPC_CMDCOMPLETE:
1902 			SPC_ASSERT(sc->sc_nexus != NULL);
1903 			acb = sc->sc_nexus;
1904 			goto finish;
1905 		}
1906 	}
1907 	else if ((ints & INTS_CMD_DONE) != 0 &&
1908 	    sc->sc_prevphase == PH_MSGIN &&
1909 	    sc->sc_state != SPC_CONNECTED)
1910 		goto out;
1911 
1912 dophase:
1913 #if 0
1914 	if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) {
1915 		/* Wait for REQINIT. */
1916 		goto out;
1917 	}
1918 #else
1919 	bus_space_write_1(iot, ioh, INTS, ints);
1920 	ints = 0;
1921 	while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0)
1922 		delay(1);	/* need timeout XXX */
1923 #endif
1924 
1925 	/*
1926 	 * State transition.
1927 	 */
1928 	sc->sc_phase = bus_space_read_1(iot, ioh, PSNS) & PH_MASK;
1929 #if 0
1930 	bus_space_write_1(iot, ioh, PCTL, sc->sc_phase);
1931 #endif
1932 
1933 	SPC_MISC(("phase=%d\n", sc->sc_phase));
1934 	switch (sc->sc_phase) {
1935 	case PH_MSGOUT:
1936 		if (sc->sc_state != SPC_CONNECTED &&
1937 		    sc->sc_state != SPC_RESELECTED)
1938 			break;
1939 		spc_msgout(sc);
1940 		sc->sc_prevphase = PH_MSGOUT;
1941 		goto loop;
1942 
1943 	case PH_MSGIN:
1944 		if (sc->sc_state != SPC_CONNECTED &&
1945 		    sc->sc_state != SPC_RESELECTED)
1946 			break;
1947 		spc_msgin(sc);
1948 		sc->sc_prevphase = PH_MSGIN;
1949 		goto loop;
1950 
1951 	case PH_CMD:
1952 		if (sc->sc_state != SPC_CONNECTED)
1953 			break;
1954 #if SPC_DEBUG
1955 		if ((spc_debug & SPC_SHOWMISC) != 0) {
1956 			SPC_ASSERT(sc->sc_nexus != NULL);
1957 			acb = sc->sc_nexus;
1958 			printf("cmd=0x%02x+%d  ",
1959 			    acb->scsipi_cmd.opcode, acb->scsipi_cmd_length - 1);
1960 		}
1961 #endif
1962 		n = spc_dataout_pio(sc, sc->sc_cp, sc->sc_cleft);
1963 		sc->sc_cp += n;
1964 		sc->sc_cleft -= n;
1965 		sc->sc_prevphase = PH_CMD;
1966 		goto loop;
1967 
1968 	case PH_DATAOUT:
1969 		if (sc->sc_state != SPC_CONNECTED)
1970 			break;
1971 		SPC_MISC(("dataout dleft=%d  ", sc->sc_dleft));
1972 		if (sc->sc_dma_start != NULL &&
1973 		    sc->sc_dleft > SPC_MIN_DMA_LEN) {
1974 			(*sc->sc_dma_start)(sc, sc->sc_dp, sc->sc_dleft, 0);
1975 			sc->sc_prevphase = PH_DATAOUT;
1976 			goto out;
1977 		}
1978 		n = spc_dataout_pio(sc, sc->sc_dp, sc->sc_dleft);
1979 		sc->sc_dp += n;
1980 		sc->sc_dleft -= n;
1981 		sc->sc_prevphase = PH_DATAOUT;
1982 		goto loop;
1983 
1984 	case PH_DATAIN:
1985 		if (sc->sc_state != SPC_CONNECTED)
1986 			break;
1987 		SPC_MISC(("datain  "));
1988 		if (sc->sc_dma_start != NULL &&
1989 		    sc->sc_dleft > SPC_MIN_DMA_LEN) {
1990 			(*sc->sc_dma_start)(sc, sc->sc_dp, sc->sc_dleft, 1);
1991 			sc->sc_prevphase = PH_DATAIN;
1992 			goto out;
1993 		}
1994 		n = spc_datain_pio(sc, sc->sc_dp, sc->sc_dleft);
1995 		sc->sc_dp += n;
1996 		sc->sc_dleft -= n;
1997 		sc->sc_prevphase = PH_DATAIN;
1998 		goto loop;
1999 
2000 	case PH_STAT:
2001 		if (sc->sc_state != SPC_CONNECTED)
2002 			break;
2003 		SPC_ASSERT(sc->sc_nexus != NULL);
2004 		acb = sc->sc_nexus;
2005 
2006 		if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_ATN) != 0)
2007 			bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN);
2008 		bus_space_write_1(iot, ioh, PCTL, PCTL_BFINT_ENAB | PH_STAT);
2009 		while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0)
2010 			DELAY(1);	/* XXX needs timeout */
2011 		acb->target_stat = bus_space_read_1(iot, ioh, TEMP);
2012 		bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ACK);
2013 		while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0)
2014 			DELAY(1);	/* XXX needs timeout */
2015 		bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK);
2016 
2017 		SPC_MISC(("target_stat=0x%02x  ", acb->target_stat));
2018 		sc->sc_prevphase = PH_STAT;
2019 		goto loop;
2020 	}
2021 
2022 	printf("%s: unexpected bus phase; resetting\n",
2023 	    device_xname(sc->sc_dev));
2024 	SPC_BREAK();
2025 reset:
2026 	spc_init(sc, 1);
2027 	return 1;
2028 
2029 finish:
2030 	callout_stop(&acb->xs->xs_callout);
2031 	bus_space_write_1(iot, ioh, INTS, ints);
2032 	ints = 0;
2033 	spc_done(sc, acb);
2034 	goto out;
2035 
2036 sched:
2037 	sc->sc_state = SPC_IDLE;
2038 	spc_sched(sc);
2039 	goto out;
2040 
2041 out:
2042 	if (ints)
2043 		bus_space_write_1(iot, ioh, INTS, ints);
2044 	bus_space_write_1(iot, ioh, SCTL,
2045 	    bus_space_read_1(iot, ioh, SCTL) | SCTL_INTR_ENAB);
2046 	return 1;
2047 }
2048 
2049 void
2050 spc_abort(struct spc_softc *sc, struct spc_acb *acb)
2051 {
2052 
2053 	/* 2 secs for the abort */
2054 	acb->timeout = SPC_ABORT_TIMEOUT;
2055 	acb->flags |= ACB_ABORT;
2056 
2057 	if (acb == sc->sc_nexus) {
2058 		/*
2059 		 * If we're still selecting, the message will be scheduled
2060 		 * after selection is complete.
2061 		 */
2062 		if (sc->sc_state == SPC_CONNECTED)
2063 			spc_sched_msgout(sc, SEND_ABORT);
2064 	} else {
2065 		spc_dequeue(sc, acb);
2066 		TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
2067 		if (sc->sc_state == SPC_IDLE)
2068 			spc_sched(sc);
2069 	}
2070 }
2071 
2072 void
2073 spc_timeout(void *arg)
2074 {
2075 	struct spc_acb *acb = arg;
2076 	struct scsipi_xfer *xs = acb->xs;
2077 	struct scsipi_periph *periph = xs->xs_periph;
2078 	struct spc_softc *sc;
2079 	int s;
2080 
2081 	sc = device_private(periph->periph_channel->chan_adapter->adapt_dev);
2082 	scsipi_printaddr(periph);
2083 	printf("timed out");
2084 
2085 	s = splbio();
2086 
2087 	if (acb->flags & ACB_ABORT) {
2088 		/* abort timed out */
2089 		printf(" AGAIN\n");
2090 		/* XXX Must reset! */
2091 	} else {
2092 		/* abort the operation that has timed out */
2093 		printf("\n");
2094 		acb->xs->error = XS_TIMEOUT;
2095 		spc_abort(sc, acb);
2096 	}
2097 
2098 	splx(s);
2099 }
2100 
2101 #ifdef SPC_DEBUG
2102 /*
2103  * The following functions are mostly used for debugging purposes, either
2104  * directly called from the driver or from the kernel debugger.
2105  */
2106 
2107 void
2108 spc_show_scsi_cmd(struct spc_acb *acb)
2109 {
2110 	uint8_t  *b = (uint8_t *)&acb->scsipi_cmd;
2111 	int i;
2112 
2113 	scsipi_printaddr(acb->xs->xs_periph);
2114 	if ((acb->xs->xs_control & XS_CTL_RESET) == 0) {
2115 		for (i = 0; i < acb->scsipi_cmd_length; i++) {
2116 			if (i)
2117 				printf(",");
2118 			printf("%x", b[i]);
2119 		}
2120 		printf("\n");
2121 	} else
2122 		printf("RESET\n");
2123 }
2124 
2125 void
2126 spc_print_acb(struct spc_acb *acb)
2127 {
2128 
2129 	printf("acb@%p xs=%p flags=%x", acb, acb->xs, acb->flags);
2130 	printf(" dp=%p dleft=%d target_stat=%x\n",
2131 	    acb->data_addr, acb->data_length, acb->target_stat);
2132 	spc_show_scsi_cmd(acb);
2133 }
2134 
2135 void
2136 spc_print_active_acb(void)
2137 {
2138 	struct spc_acb *acb;
2139 	struct spc_softc *sc = device_lookup_private(&spc_cd, 0); /* XXX */
2140 
2141 	printf("ready list:\n");
2142 	TAILQ_FOREACH(acb, &sc->ready_list, chain)
2143 		spc_print_acb(acb);
2144 	printf("nexus:\n");
2145 	if (sc->sc_nexus != NULL)
2146 		spc_print_acb(sc->sc_nexus);
2147 	printf("nexus list:\n");
2148 	TAILQ_FOREACH(acb, &sc->nexus_list, chain)
2149 		spc_print_acb(acb);
2150 }
2151 
2152 void
2153 spc_dump89352(struct spc_softc *sc)
2154 {
2155 	bus_space_tag_t iot = sc->sc_iot;
2156 	bus_space_handle_t ioh = sc->sc_ioh;
2157 
2158 	printf("mb89352: BDID=%x SCTL=%x SCMD=%x TMOD=%x\n",
2159 	    bus_space_read_1(iot, ioh, BDID),
2160 	    bus_space_read_1(iot, ioh, SCTL),
2161 	    bus_space_read_1(iot, ioh, SCMD),
2162 	    bus_space_read_1(iot, ioh, TMOD));
2163 	printf("         INTS=%x PSNS=%x SSTS=%x SERR=%x PCTL=%x\n",
2164 	    bus_space_read_1(iot, ioh, INTS),
2165 	    bus_space_read_1(iot, ioh, PSNS),
2166 	    bus_space_read_1(iot, ioh, SSTS),
2167 	    bus_space_read_1(iot, ioh, SERR),
2168 	    bus_space_read_1(iot, ioh, PCTL));
2169 	printf("         MBC=%x DREG=%x TEMP=%x TCH=%x TCM=%x\n",
2170 	    bus_space_read_1(iot, ioh, MBC),
2171 #if 0
2172 	    bus_space_read_1(iot, ioh, DREG),
2173 #else
2174 	    0,
2175 #endif
2176 	    bus_space_read_1(iot, ioh, TEMP),
2177 	    bus_space_read_1(iot, ioh, TCH),
2178 	    bus_space_read_1(iot, ioh, TCM));
2179 	printf("         TCL=%x EXBF=%x\n",
2180 	    bus_space_read_1(iot, ioh, TCL),
2181 	    bus_space_read_1(iot, ioh, EXBF));
2182 }
2183 
2184 void
2185 spc_dump_driver(struct spc_softc *sc)
2186 {
2187 	struct spc_tinfo *ti;
2188 	int i;
2189 
2190 	printf("nexus=%p prevphase=%x\n", sc->sc_nexus, sc->sc_prevphase);
2191 	printf("state=%x msgin=%x msgpriq=%x msgoutq=%x lastmsg=%x "
2192 	    "currmsg=%x\n", sc->sc_state, sc->sc_imess[0],
2193 	    sc->sc_msgpriq, sc->sc_msgoutq, sc->sc_lastmsg, sc->sc_currmsg);
2194 	for (i = 0; i < 7; i++) {
2195 		ti = &sc->sc_tinfo[i];
2196 		printf("tinfo%d: %d cmds %d disconnects %d timeouts",
2197 		    i, ti->cmds, ti->dconns, ti->touts);
2198 		printf(" %d senses flags=%x\n", ti->senses, ti->flags);
2199 	}
2200 }
2201 #endif
2202