xref: /netbsd-src/sys/dev/ic/mb89352.c (revision 3b01aba77a7a698587faaae455bbfe740923c1f5)
1 /*	$NetBSD: mb89352.c,v 1.8 2001/07/07 16:13:49 thorpej Exp $	*/
2 /*	NecBSD: mb89352.c,v 1.4 1998/03/14 07:31:20 kmatsuda Exp	*/
3 
4 #ifdef DDB
5 #define	integrate
6 #else
7 #define	integrate	__inline static
8 #endif
9 
10 /*-
11  * Copyright (c) 1996,97,98,99 The NetBSD Foundation, Inc.
12  * All rights reserved.
13  *
14  * This code is derived from software contributed to The NetBSD Foundation
15  * by Charles M. Hannum, Masaru Oki and Kouichi Matsuda.
16  *
17  * Redistribution and use in source and binary forms, with or without
18  * modification, are permitted provided that the following conditions
19  * are met:
20  * 1. Redistributions of source code must retain the above copyright
21  *    notice, this list of conditions and the following disclaimer.
22  * 2. Redistributions in binary form must reproduce the above copyright
23  *    notice, this list of conditions and the following disclaimer in the
24  *    documentation and/or other materials provided with the distribution.
25  * 3. All advertising materials mentioning features or use of this software
26  *    must display the following acknowledgement:
27  *	This product includes software developed by Charles M. Hannum.
28  * 4. The name of the author may not be used to endorse or promote products
29  *    derived from this software without specific prior written permission.
30  *
31  * Copyright (c) 1994 Jarle Greipsland
32  * All rights reserved.
33  *
34  * Redistribution and use in source and binary forms, with or without
35  * modification, are permitted provided that the following conditions
36  * are met:
37  * 1. Redistributions of source code must retain the above copyright
38  *    notice, this list of conditions and the following disclaimer.
39  * 2. Redistributions in binary form must reproduce the above copyright
40  *    notice, this list of conditions and the following disclaimer in the
41  *    documentation and/or other materials provided with the distribution.
42  * 3. The name of the author may not be used to endorse or promote products
43  *    derived from this software without specific prior written permission.
44  *
45  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
46  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
47  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
48  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
49  * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
50  * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
51  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
52  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
53  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
54  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
55  * POSSIBILITY OF SUCH DAMAGE.
56  */
57 /*
58  * [NetBSD for NEC PC-98 series]
59  *  Copyright (c) 1996, 1997, 1998
60  *	NetBSD/pc98 porting staff. All rights reserved.
61  *  Copyright (c) 1996, 1997, 1998
62  *	Kouichi Matsuda. All rights reserved.
63  */
64 
65 /*
66  * Acknowledgements: Many of the algorithms used in this driver are
67  * inspired by the work of Julian Elischer (julian@tfs.com) and
68  * Charles Hannum (mycroft@duality.gnu.ai.mit.edu).  Thanks a million!
69  */
70 
71 /* TODO list:
72  * 1) Get the DMA stuff working.
73  * 2) Get the iov/uio stuff working. Is this a good thing ???
74  * 3) Get the synch stuff working.
75  * 4) Rewrite it to use malloc for the acb structs instead of static alloc.?
76  */
77 
78 /*
79  * A few customizable items:
80  */
81 
82 /* Use doubleword transfers to/from SCSI chip.  Note: This requires
83  * motherboard support.  Basicly, some motherboard chipsets are able to
84  * split a 32 bit I/O operation into two 16 bit I/O operations,
85  * transparently to the processor.  This speeds up some things, notably long
86  * data transfers.
87  */
88 #define SPC_USE_DWORDS		0
89 
90 /* Synchronous data transfers? */
91 #define SPC_USE_SYNCHRONOUS	0
92 #define SPC_SYNC_REQ_ACK_OFS 	8
93 
94 /* Wide data transfers? */
95 #define	SPC_USE_WIDE		0
96 #define	SPC_MAX_WIDTH		0
97 
98 /* Max attempts made to transmit a message */
99 #define SPC_MSG_MAX_ATTEMPT	3 /* Not used now XXX */
100 
101 /*
102  * Some spin loop parameters (essentially how long to wait some places)
103  * The problem(?) is that sometimes we expect either to be able to transmit a
104  * byte or to get a new one from the SCSI bus pretty soon.  In order to avoid
105  * returning from the interrupt just to get yanked back for the next byte we
106  * may spin in the interrupt routine waiting for this byte to come.  How long?
107  * This is really (SCSI) device and processor dependent.  Tuneable, I guess.
108  */
109 #define SPC_MSGIN_SPIN	1 	/* Will spinwait upto ?ms for a new msg byte */
110 #define SPC_MSGOUT_SPIN	1
111 
112 /* Include debug functions?  At the end of this file there are a bunch of
113  * functions that will print out various information regarding queued SCSI
114  * commands, driver state and chip contents.  You can call them from the
115  * kernel debugger.  If you set SPC_DEBUG to 0 they are not included (the
116  * kernel uses less memory) but you lose the debugging facilities.
117  */
118 #define SPC_DEBUG		1
119 
120 #define	SPC_ABORT_TIMEOUT	2000	/* time to wait for abort */
121 
122 /* End of customizable parameters */
123 
124 /*
125  * MB89352 SCSI Protocol Controller (SPC) routines.
126  */
127 
128 #include "opt_ddb.h"
129 
130 #include <sys/types.h>
131 #include <sys/param.h>
132 #include <sys/systm.h>
133 #include <sys/kernel.h>
134 #include <sys/errno.h>
135 #include <sys/ioctl.h>
136 #include <sys/device.h>
137 #include <sys/buf.h>
138 #include <sys/proc.h>
139 #include <sys/user.h>
140 #include <sys/queue.h>
141 
142 #include <machine/intr.h>
143 #include <machine/bus.h>
144 
145 #include <dev/scsipi/scsi_all.h>
146 #include <dev/scsipi/scsipi_all.h>
147 #include <dev/scsipi/scsi_message.h>
148 #include <dev/scsipi/scsiconf.h>
149 
150 #include <dev/ic/mb89352reg.h>
151 #include <dev/ic/mb89352var.h>
152 
153 #ifndef DDB
154 #define	Debugger() panic("should call debugger here (mb89352.c)")
155 #endif /* ! DDB */
156 
157 #if SPC_DEBUG
158 int spc_debug = 0x00; /* SPC_SHOWSTART|SPC_SHOWMISC|SPC_SHOWTRACE; */
159 #endif
160 
161 void	spc_minphys	__P((struct buf *));
162 void	spc_done	__P((struct spc_softc *, struct spc_acb *));
163 void	spc_dequeue	__P((struct spc_softc *, struct spc_acb *));
164 void	spc_scsipi_request __P((struct scsipi_channel *,
165 				scsipi_adapter_req_t, void *));
166 int	spc_poll	__P((struct spc_softc *, struct scsipi_xfer *, int));
167 integrate void	spc_sched_msgout __P((struct spc_softc *, u_char));
168 integrate void	spc_setsync	__P((struct spc_softc *, struct spc_tinfo *));
169 void	spc_select	__P((struct spc_softc *, struct spc_acb *));
170 void	spc_timeout	__P((void *));
171 void	spc_scsi_reset	__P((struct spc_softc *));
172 void	spc_reset	__P((struct spc_softc *));
173 void	spc_free_acb	__P((struct spc_softc *, struct spc_acb *, int));
174 struct spc_acb* spc_get_acb __P((struct spc_softc *));
175 int	spc_reselect	__P((struct spc_softc *, int));
176 void	spc_msgin	__P((struct spc_softc *));
177 void	spc_abort	__P((struct spc_softc *, struct spc_acb *));
178 void	spc_msgout	__P((struct spc_softc *));
179 int	spc_dataout_pio	__P((struct spc_softc *, u_char *, int));
180 int	spc_datain_pio	__P((struct spc_softc *, u_char *, int));
181 #if SPC_DEBUG
182 void	spc_print_acb	__P((struct spc_acb *));
183 void	spc_dump_driver __P((struct spc_softc *));
184 void	spc_dump89352	__P((struct spc_softc *));
185 void	spc_show_scsi_cmd __P((struct spc_acb *));
186 void	spc_print_active_acb __P((void));
187 #endif
188 
189 extern struct cfdriver spc_cd;
190 
191 
192 /*
193  * INITIALIZATION ROUTINES (probe, attach ++)
194  */
195 
196 /*
197  * Do the real search-for-device.
198  * Prerequisite: sc->sc_iobase should be set to the proper value
199  */
200 int
201 spc_find(iot, ioh, bdid)
202 	bus_space_tag_t iot;
203 	bus_space_handle_t ioh;
204 	int bdid;
205 {
206 	long timeout = SPC_ABORT_TIMEOUT;
207 
208 	SPC_TRACE(("spc: probing for spc-chip\n"));
209 	/*
210 	 * Disable interrupts then reset the FUJITSU chip.
211 	 */
212 	bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST);
213 	bus_space_write_1(iot, ioh, SCMD, 0);
214 	bus_space_write_1(iot, ioh, PCTL, 0);
215 	bus_space_write_1(iot, ioh, TEMP, 0);
216 	bus_space_write_1(iot, ioh, TCH, 0);
217 	bus_space_write_1(iot, ioh, TCM, 0);
218 	bus_space_write_1(iot, ioh, TCL, 0);
219 	bus_space_write_1(iot, ioh, INTS, 0);
220 	bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB);
221 	bus_space_write_1(iot, ioh, BDID, bdid);
222 	delay(400);
223 	bus_space_write_1(iot, ioh, SCTL, bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE);
224 
225 	/* The following detection is derived from spc.c
226 	 * (by Takahide Matsutsuka) in FreeBSD/pccard-test.
227 	 */
228 	while (bus_space_read_1(iot, ioh, PSNS) && timeout)
229 		timeout--;
230 	if (!timeout) {
231 		printf("spc: find failed\n");
232 		return 0;
233 	}
234 
235 	SPC_START(("SPC found"));
236 	return 1;
237 }
238 
239 void
240 spcattach(sc)
241 	struct spc_softc *sc;
242 {
243 
244 	SPC_TRACE(("spcattach  "));
245 	sc->sc_state = SPC_INIT;
246 
247 	sc->sc_freq = 20;	/* XXXX Assume 20 MHz. */
248 
249 #if SPC_USE_SYNCHRONOUS
250 	/*
251 	 * These are the bounds of the sync period, based on the frequency of
252 	 * the chip's clock input and the size and offset of the sync period
253 	 * register.
254 	 *
255 	 * For a 20Mhz clock, this gives us 25, or 100nS, or 10MB/s, as a
256 	 * maximum transfer rate, and 112.5, or 450nS, or 2.22MB/s, as a
257 	 * minimum transfer rate.
258 	 */
259 	sc->sc_minsync = (2 * 250) / sc->sc_freq;
260 	sc->sc_maxsync = (9 * 250) / sc->sc_freq;
261 #endif
262 
263 	spc_init(sc);	/* Init chip and driver */
264 
265 	/*
266 	 * Fill in the adapter.
267 	 */
268 	sc->sc_adapter.adapt_dev = &sc->sc_dev;
269 	sc->sc_adapter.adapt_nchannels = 1;
270 	sc->sc_adapter.adapt_openings = 7;
271 	sc->sc_adapter.adapt_max_periph = 1;
272 	sc->sc_adapter.adapt_minphys = spc_minphys;
273 	sc->sc_adapter.adapt_request = spc_scsipi_request;
274 
275 	sc->sc_channel.chan_adapter = &sc->sc_adapter;
276 	sc->sc_channel.chan_bustype = &scsi_bustype;
277 	sc->sc_channel.chan_channel = 0;
278 	sc->sc_channel.chan_ntargets = 8;
279 	sc->sc_channel.chan_nluns = 8;
280 	sc->sc_channel.chan_id = sc->sc_initiator;
281 
282 	/*
283 	 * ask the adapter what subunits are present
284 	 */
285 	config_found((struct device*)sc, &sc->sc_channel, scsiprint);
286 }
287 
288 /*
289  * Initialize MB89352 chip itself
290  * The following conditions should hold:
291  * spc_isa_probe should have succeeded, i.e. the iobase address in spc_softc
292  * must be valid.
293  */
294 void
295 spc_reset(sc)
296 	struct spc_softc *sc;
297 {
298 	bus_space_tag_t iot = sc->sc_iot;
299 	bus_space_handle_t ioh = sc->sc_ioh;
300 
301 	SPC_TRACE(("spc_reset  "));
302 	/*
303 	 * Disable interrupts then reset the FUJITSU chip.
304 	 */
305 	bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST);
306 	bus_space_write_1(iot, ioh, SCMD, 0);
307 	bus_space_write_1(iot, ioh, PCTL, 0);
308 	bus_space_write_1(iot, ioh, TEMP, 0);
309 	bus_space_write_1(iot, ioh, TCH, 0);
310 	bus_space_write_1(iot, ioh, TCM, 0);
311 	bus_space_write_1(iot, ioh, TCL, 0);
312 	bus_space_write_1(iot, ioh, INTS, 0);
313 	bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB);
314 	bus_space_write_1(iot, ioh, BDID, sc->sc_initiator);
315 	delay(400);
316 	bus_space_write_1(iot, ioh, SCTL, bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE);
317 }
318 
319 
320 /*
321  * Pull the SCSI RST line for 500us.
322  */
323 void
324 spc_scsi_reset(sc)
325 	struct spc_softc *sc;
326 {
327 	bus_space_tag_t iot = sc->sc_iot;
328 	bus_space_handle_t ioh = sc->sc_ioh;
329 
330 	SPC_TRACE(("spc_scsi_reset  "));
331 	bus_space_write_1(iot, ioh, SCMD, bus_space_read_1(iot, ioh, SCMD) | SCMD_RST);
332 	delay(500);
333 	bus_space_write_1(iot, ioh, SCMD, bus_space_read_1(iot, ioh, SCMD) & ~SCMD_RST);
334 	delay(50);
335 }
336 
337 /*
338  * Initialize spc SCSI driver.
339  */
340 void
341 spc_init(sc)
342 	struct spc_softc *sc;
343 {
344 	struct spc_acb *acb;
345 	int r;
346 
347 	SPC_TRACE(("spc_init  "));
348 	spc_reset(sc);
349 	spc_scsi_reset(sc);
350 	spc_reset(sc);
351 
352 	if (sc->sc_state == SPC_INIT) {
353 		/* First time through; initialize. */
354 		TAILQ_INIT(&sc->ready_list);
355 		TAILQ_INIT(&sc->nexus_list);
356 		TAILQ_INIT(&sc->free_list);
357 		sc->sc_nexus = NULL;
358 		acb = sc->sc_acb;
359 		memset(acb, 0, sizeof(sc->sc_acb));
360 		for (r = 0; r < sizeof(sc->sc_acb) / sizeof(*acb); r++) {
361 			TAILQ_INSERT_TAIL(&sc->free_list, acb, chain);
362 			acb++;
363 		}
364 		memset(&sc->sc_tinfo, 0, sizeof(sc->sc_tinfo));
365 	} else {
366 		/* Cancel any active commands. */
367 		sc->sc_state = SPC_CLEANING;
368 		if ((acb = sc->sc_nexus) != NULL) {
369 			acb->xs->error = XS_DRIVER_STUFFUP;
370 			callout_stop(&acb->xs->xs_callout);
371 			spc_done(sc, acb);
372 		}
373 		while ((acb = sc->nexus_list.tqh_first) != NULL) {
374 			acb->xs->error = XS_DRIVER_STUFFUP;
375 			callout_stop(&acb->xs->xs_callout);
376 			spc_done(sc, acb);
377 		}
378 	}
379 
380 	sc->sc_prevphase = PH_INVALID;
381 	for (r = 0; r < 8; r++) {
382 		struct spc_tinfo *ti = &sc->sc_tinfo[r];
383 
384 		ti->flags = 0;
385 #if SPC_USE_SYNCHRONOUS
386 		ti->flags |= DO_SYNC;
387 		ti->period = sc->sc_minsync;
388 		ti->offset = SPC_SYNC_REQ_ACK_OFS;
389 #else
390 		ti->period = ti->offset = 0;
391 #endif
392 #if SPC_USE_WIDE
393 		ti->flags |= DO_WIDE;
394 		ti->width = SPC_MAX_WIDTH;
395 #else
396 		ti->width = 0;
397 #endif
398 	}
399 
400 	sc->sc_state = SPC_IDLE;
401 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, SCTL,
402 	    bus_space_read_1(sc->sc_iot, sc->sc_ioh, SCTL) | SCTL_INTR_ENAB);
403 }
404 
405 void
406 spc_free_acb(sc, acb, flags)
407 	struct spc_softc *sc;
408 	struct spc_acb *acb;
409 	int flags;
410 {
411 	int s;
412 
413 	SPC_TRACE(("spc_free_acb  "));
414 	s = splbio();
415 
416 	acb->flags = 0;
417 	TAILQ_INSERT_HEAD(&sc->free_list, acb, chain);
418 	splx(s);
419 }
420 
421 struct spc_acb *
422 spc_get_acb(sc)
423 	struct spc_softc *sc;
424 {
425 	struct spc_acb *acb;
426 	int s;
427 
428 	SPC_TRACE(("spc_get_acb  "));
429 	s = splbio();
430 	acb = TAILQ_FIRST(&sc->free_list);
431 	if (acb != NULL) {
432 		TAILQ_REMOVE(&sc->free_list, acb, chain);
433 		acb->flags |= ACB_ALLOC;
434 	}
435 	splx(s);
436 	return acb;
437 }
438 
439 /*
440  * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS
441  */
442 
443 /*
444  * Expected sequence:
445  * 1) Command inserted into ready list
446  * 2) Command selected for execution
447  * 3) Command won arbitration and has selected target device
448  * 4) Send message out (identify message, eventually also sync.negotiations)
449  * 5) Send command
450  * 5a) Receive disconnect message, disconnect.
451  * 5b) Reselected by target
452  * 5c) Receive identify message from target.
453  * 6) Send or receive data
454  * 7) Receive status
455  * 8) Receive message (command complete etc.)
456  */
457 
458 /*
459  * Start a SCSI-command
460  * This function is called by the higher level SCSI-driver to queue/run
461  * SCSI-commands.
462  */
463 void
464 spc_scsipi_request(chan, req, arg)
465 	struct scsipi_channel *chan;
466 	scsipi_adapter_req_t req;
467 	void *arg;
468 {
469 	struct scsipi_xfer *xs;
470 	struct scsipi_periph *periph;
471 	struct spc_softc *sc = (void *)chan->chan_adapter->adapt_dev;
472 	struct spc_acb *acb;
473 	int s, flags;
474 
475 	switch (req) {
476 	case ADAPTER_REQ_RUN_XFER:
477 		xs = arg;
478 		periph = xs->xs_periph;
479 		SPC_TRACE(("spc_scsipi_request  "));
480 		SPC_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen,
481 		    periph->periph_target));
482 
483 		flags = xs->xs_control;
484 		if ((acb = spc_get_acb(sc)) == NULL) {
485 			xs->error = XS_DRIVER_STUFFUP;
486 			scsipi_done(xs);
487 			return;
488 		}
489 
490 		/* Initialize acb */
491 		acb->xs = xs;
492 		acb->timeout = xs->timeout;
493 
494 		if (xs->xs_control & XS_CTL_RESET) {
495 			acb->flags |= ACB_RESET;
496 			acb->scsipi_cmd_length = 0;
497 			acb->data_length = 0;
498 		} else {
499 			memcpy(&acb->scsipi_cmd, xs->cmd, xs->cmdlen);
500 #if 1
501 			acb->scsipi_cmd.bytes[0] |= periph->periph_lun << 5; /* XXX? */
502 #endif
503 			acb->scsipi_cmd_length = xs->cmdlen;
504 			acb->data_addr = xs->data;
505 			acb->data_length = xs->datalen;
506 		}
507 		acb->target_stat = 0;
508 
509 		s = splbio();
510 
511 		TAILQ_INSERT_TAIL(&sc->ready_list, acb, chain);
512 		/*
513 		 * Start scheduling unless a queue process is in progress.
514 		 */
515 		if (sc->sc_state == SPC_IDLE)
516 			spc_sched(sc);
517 		/*
518 		 * After successful sending, check if we should return just now.
519 		 * If so, return SUCCESSFULLY_QUEUED.
520 		 */
521 
522 		splx(s);
523 
524 		if ((flags & XS_CTL_POLL) == 0)
525 			return;
526 
527 		/* Not allowed to use interrupts, use polling instead */
528 		s = splbio();
529 		if (spc_poll(sc, xs, acb->timeout)) {
530 			spc_timeout(acb);
531 			if (spc_poll(sc, xs, acb->timeout))
532 				spc_timeout(acb);
533 		}
534 		splx(s);
535 		return;
536 	case ADAPTER_REQ_GROW_RESOURCES:
537 		/* XXX Not supported. */
538 		return;
539 	case ADAPTER_REQ_SET_XFER_MODE:
540 		/* XXX Not supported. */
541 		return;
542 	}
543 }
544 
545 /*
546  * Adjust transfer size in buffer structure
547  */
548 void
549 spc_minphys(bp)
550 	struct buf *bp;
551 {
552 
553 	SPC_TRACE(("spc_minphys  "));
554 	minphys(bp);
555 }
556 
557 /*
558  * Used when interrupt driven I/O isn't allowed, e.g. during boot.
559  */
560 int
561 spc_poll(sc, xs, count)
562 	struct spc_softc *sc;
563 	struct scsipi_xfer *xs;
564 	int count;
565 {
566 	bus_space_tag_t iot = sc->sc_iot;
567 	bus_space_handle_t ioh = sc->sc_ioh;
568 
569 	SPC_TRACE(("spc_poll  "));
570 	while (count) {
571 		/*
572 		 * If we had interrupts enabled, would we
573 		 * have got an interrupt?
574 		 */
575 		if (bus_space_read_1(iot, ioh, INTS) != 0)
576 			spcintr(sc);
577 		if ((xs->xs_status & XS_STS_DONE) != 0)
578 			return 0;
579 		delay(1000);
580 		count--;
581 	}
582 	return 1;
583 }
584 
585 /*
586  * LOW LEVEL SCSI UTILITIES
587  */
588 
589 integrate void
590 spc_sched_msgout(sc, m)
591 	struct spc_softc *sc;
592 	u_char m;
593 {
594 	bus_space_tag_t iot = sc->sc_iot;
595 	bus_space_handle_t ioh = sc->sc_ioh;
596 
597 	SPC_TRACE(("spc_sched_msgout  "));
598 	if (sc->sc_msgpriq == 0)
599 		bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN);
600 	sc->sc_msgpriq |= m;
601 }
602 
603 /*
604  * Set synchronous transfer offset and period.
605  */
606 integrate void
607 spc_setsync(sc, ti)
608 	struct spc_softc *sc;
609 	struct spc_tinfo *ti;
610 {
611 #if SPC_USE_SYNCHRONOUS
612 	bus_space_tag_t iot = sc->sc_iot;
613 	bus_space_handle_t ioh = sc->sc_ioh;
614 
615 	SPC_TRACE(("spc_setsync  "));
616 	if (ti->offset != 0)
617 		bus_space_write_1(iot, ioh, TMOD,
618 		    ((ti->period * sc->sc_freq) / 250 - 2) << 4 | ti->offset);
619 	else
620 		bus_space_write_1(iot, ioh, TMOD, 0);
621 #endif
622 }
623 
624 /*
625  * Start a selection.  This is used by spc_sched() to select an idle target.
626  */
627 void
628 spc_select(sc, acb)
629 	struct spc_softc *sc;
630 	struct spc_acb *acb;
631 {
632 	struct scsipi_periph *periph = acb->xs->xs_periph;
633 	int target = periph->periph_target;
634 	struct spc_tinfo *ti = &sc->sc_tinfo[target];
635 	bus_space_tag_t iot = sc->sc_iot;
636 	bus_space_handle_t ioh = sc->sc_ioh;
637 
638 	SPC_TRACE(("spc_select  "));
639 	spc_setsync(sc, ti);
640 
641 #if 0
642 	bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN);
643 #endif
644 #ifdef x68k			/* XXX? */
645 	do {
646 		asm ("nop");
647 	} while (bus_space_read_1(iot, ioh, SSTS) &
648 		 (SSTS_ACTIVE|SSTS_TARGET|SSTS_BUSY));
649 #endif
650 
651 	bus_space_write_1(iot, ioh, PCTL, 0);
652 	bus_space_write_1(iot, ioh, TEMP, (1 << sc->sc_initiator) | (1 << target));
653 	/*
654 	 * Setup BSY timeout (selection timeout).
655 	 * 250ms according to the SCSI specification.
656 	 * T = (X * 256 + 15) * Tclf * 2  (Tclf = 200ns on x68k)
657 	 * To setup 256ms timeout,
658 	 * 128000ns/200ns = X * 256 + 15
659 	 * 640 - 15 = X * 256
660 	 * X = 625 / 256
661 	 * X = 2 + 113 / 256
662 	 *  ==> tch = 2, tcm = 113 (correct?)
663 	 */
664 	bus_space_write_1(iot, ioh, TCH, 2);
665 	bus_space_write_1(iot, ioh, TCM, 113);
666 	/* Time to the information transfer phase start. */
667 	bus_space_write_1(iot, ioh, TCL, 3);
668 	bus_space_write_1(iot, ioh, SCMD, SCMD_SELECT);
669 
670 	sc->sc_state = SPC_SELECTING;
671 }
672 
673 int
674 spc_reselect(sc, message)
675 	struct spc_softc *sc;
676 	int message;
677 {
678 	u_char selid, target, lun;
679 	struct spc_acb *acb;
680 	struct scsipi_periph *periph;
681 	struct spc_tinfo *ti;
682 
683 	SPC_TRACE(("spc_reselect  "));
684 	/*
685 	 * The SCSI chip made a snapshot of the data bus while the reselection
686 	 * was being negotiated.  This enables us to determine which target did
687 	 * the reselect.
688 	 */
689 	selid = sc->sc_selid & ~(1 << sc->sc_initiator);
690 	if (selid & (selid - 1)) {
691 		printf("%s: reselect with invalid selid %02x; sending DEVICE RESET\n",
692 		    sc->sc_dev.dv_xname, selid);
693 		SPC_BREAK();
694 		goto reset;
695 	}
696 
697 	/*
698 	 * Search wait queue for disconnected cmd
699 	 * The list should be short, so I haven't bothered with
700 	 * any more sophisticated structures than a simple
701 	 * singly linked list.
702 	 */
703 	target = ffs(selid) - 1;
704 	lun = message & 0x07;
705 	for (acb = sc->nexus_list.tqh_first; acb != NULL;
706 	     acb = acb->chain.tqe_next) {
707 		periph = acb->xs->xs_periph;
708 		if (periph->periph_target == target &&
709 		    periph->periph_lun == lun)
710 			break;
711 	}
712 	if (acb == NULL) {
713 		printf("%s: reselect from target %d lun %d with no nexus; sending ABORT\n",
714 		    sc->sc_dev.dv_xname, target, lun);
715 		SPC_BREAK();
716 		goto abort;
717 	}
718 
719 	/* Make this nexus active again. */
720 	TAILQ_REMOVE(&sc->nexus_list, acb, chain);
721 	sc->sc_state = SPC_CONNECTED;
722 	sc->sc_nexus = acb;
723 	ti = &sc->sc_tinfo[target];
724 	ti->lubusy |= (1 << lun);
725 	spc_setsync(sc, ti);
726 
727 	if (acb->flags & ACB_RESET)
728 		spc_sched_msgout(sc, SEND_DEV_RESET);
729 	else if (acb->flags & ACB_ABORT)
730 		spc_sched_msgout(sc, SEND_ABORT);
731 
732 	/* Do an implicit RESTORE POINTERS. */
733 	sc->sc_dp = acb->data_addr;
734 	sc->sc_dleft = acb->data_length;
735 	sc->sc_cp = (u_char *)&acb->scsipi_cmd;
736 	sc->sc_cleft = acb->scsipi_cmd_length;
737 
738 	return (0);
739 
740 reset:
741 	spc_sched_msgout(sc, SEND_DEV_RESET);
742 	return (1);
743 
744 abort:
745 	spc_sched_msgout(sc, SEND_ABORT);
746 	return (1);
747 }
748 
749 /*
750  * Schedule a SCSI operation.  This has now been pulled out of the interrupt
751  * handler so that we may call it from spc_scsi_cmd and spc_done.  This may
752  * save us an unecessary interrupt just to get things going.  Should only be
753  * called when state == SPC_IDLE and at bio pl.
754  */
755 void
756 spc_sched(sc)
757 	struct spc_softc *sc;
758 {
759 	struct spc_acb *acb;
760 	struct scsipi_periph *periph;
761 	struct spc_tinfo *ti;
762 
763 	/* missing the hw, just return and wait for our hw */
764 	if (sc->sc_flags & SPC_INACTIVE)
765 		return;
766 	SPC_TRACE(("spc_sched  "));
767 	/*
768 	 * Find first acb in ready queue that is for a target/lunit pair that
769 	 * is not busy.
770 	 */
771 	for (acb = sc->ready_list.tqh_first; acb != NULL;
772 	    acb = acb->chain.tqe_next) {
773 		periph = acb->xs->xs_periph;
774 		ti = &sc->sc_tinfo[periph->periph_target];
775 		if ((ti->lubusy & (1 << periph->periph_lun)) == 0) {
776 			SPC_MISC(("selecting %d:%d  ",
777 			    periph->periph_target, periph->periph_lun));
778 			TAILQ_REMOVE(&sc->ready_list, acb, chain);
779 			sc->sc_nexus = acb;
780 			spc_select(sc, acb);
781 			return;
782 		} else
783 			SPC_MISC(("%d:%d busy\n",
784 			    periph->periph_target, periph->periph_lun));
785 	}
786 	SPC_MISC(("idle  "));
787 	/* Nothing to start; just enable reselections and wait. */
788 }
789 
790 /*
791  * POST PROCESSING OF SCSI_CMD (usually current)
792  */
793 void
794 spc_done(sc, acb)
795 	struct spc_softc *sc;
796 	struct spc_acb *acb;
797 {
798 	struct scsipi_xfer *xs = acb->xs;
799 	struct scsipi_periph *periph = xs->xs_periph;
800 	struct spc_tinfo *ti = &sc->sc_tinfo[periph->periph_target];
801 
802 	SPC_TRACE(("spc_done  "));
803 
804 	if (xs->error == XS_NOERROR) {
805 		if (acb->flags & ACB_ABORT) {
806 			xs->error = XS_DRIVER_STUFFUP;
807 		} else {
808 			switch (acb->target_stat) {
809 			case SCSI_CHECK:
810 				/* First, save the return values */
811 				xs->resid = acb->data_length;
812 				/* FALLBACK */
813 			case SCSI_BUSY:
814 				xs->status = acb->target_stat;
815 				xs->error = XS_BUSY;
816 				break;
817 			case SCSI_OK:
818 				xs->resid = acb->data_length;
819 				break;
820 			default:
821 				xs->error = XS_DRIVER_STUFFUP;
822 #if SPC_DEBUG
823 				printf("%s: spc_done: bad stat 0x%x\n",
824 					sc->sc_dev.dv_xname, acb->target_stat);
825 #endif
826 				break;
827 			}
828 		}
829 	}
830 
831 #if SPC_DEBUG
832 	if ((spc_debug & SPC_SHOWMISC) != 0) {
833 		if (xs->resid != 0)
834 			printf("resid=%d ", xs->resid);
835 		else
836 			printf("error=%d\n", xs->error);
837 	}
838 #endif
839 
840 	/*
841 	 * Remove the ACB from whatever queue it happens to be on.
842 	 */
843 	if (acb->flags & ACB_NEXUS)
844 		ti->lubusy &= ~(1 << periph->periph_lun);
845 	if (acb == sc->sc_nexus) {
846 		sc->sc_nexus = NULL;
847 		sc->sc_state = SPC_IDLE;
848 		spc_sched(sc);
849 	} else
850 		spc_dequeue(sc, acb);
851 
852 	spc_free_acb(sc, acb, xs->xs_control);
853 	ti->cmds++;
854 	scsipi_done(xs);
855 }
856 
857 void
858 spc_dequeue(sc, acb)
859 	struct spc_softc *sc;
860 	struct spc_acb *acb;
861 {
862 
863 	SPC_TRACE(("spc_dequeue  "));
864 	if (acb->flags & ACB_NEXUS) {
865 		TAILQ_REMOVE(&sc->nexus_list, acb, chain);
866 	} else {
867 		TAILQ_REMOVE(&sc->ready_list, acb, chain);
868 	}
869 }
870 
871 /*
872  * INTERRUPT/PROTOCOL ENGINE
873  */
874 
875 #define IS1BYTEMSG(m) (((m) != 0x01 && (m) < 0x20) || (m) >= 0x80)
876 #define IS2BYTEMSG(m) (((m) & 0xf0) == 0x20)
877 #define ISEXTMSG(m) ((m) == 0x01)
878 
879 /*
880  * Precondition:
881  * The SCSI bus is already in the MSGI phase and there is a message byte
882  * on the bus, along with an asserted REQ signal.
883  */
884 void
885 spc_msgin(sc)
886 	struct spc_softc *sc;
887 {
888 	bus_space_tag_t iot = sc->sc_iot;
889 	bus_space_handle_t ioh = sc->sc_ioh;
890 	int n;
891 
892 	SPC_TRACE(("spc_msgin  "));
893 
894 	if (sc->sc_prevphase == PH_MSGIN) {
895 		/* This is a continuation of the previous message. */
896 		n = sc->sc_imp - sc->sc_imess;
897 		goto nextbyte;
898 	}
899 
900 	/* This is a new MESSAGE IN phase.  Clean up our state. */
901 	sc->sc_flags &= ~SPC_DROP_MSGIN;
902 
903 nextmsg:
904 	n = 0;
905 	sc->sc_imp = &sc->sc_imess[n];
906 
907 nextbyte:
908 	/*
909 	 * Read a whole message, but don't ack the last byte.  If we reject the
910 	 * message, we have to assert ATN during the message transfer phase
911 	 * itself.
912 	 */
913 	for (;;) {
914 #if 0
915 		for (;;) {
916 			if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0)
917 				break;
918 			/* Wait for REQINIT.  XXX Need timeout. */
919 		}
920 #endif
921 		if (bus_space_read_1(iot, ioh, INTS) != 0) {
922 			/*
923 			 * Target left MESSAGE IN, probably because it
924 			 * a) noticed our ATN signal, or
925 			 * b) ran out of messages.
926 			 */
927 			goto out;
928 		}
929 
930 		/* If parity error, just dump everything on the floor. */
931 		if ((bus_space_read_1(iot, ioh, SERR) &
932 		     (SERR_SCSI_PAR|SERR_SPC_PAR)) != 0) {
933 			sc->sc_flags |= SPC_DROP_MSGIN;
934 			spc_sched_msgout(sc, SEND_PARITY_ERROR);
935 		}
936 
937 		/* send TRANSFER command. */
938 		bus_space_write_1(iot, ioh, TCH, 0);
939 		bus_space_write_1(iot, ioh, TCM, 0);
940 		bus_space_write_1(iot, ioh, TCL, 1);
941 		bus_space_write_1(iot, ioh, PCTL,
942 				  sc->sc_phase | PCTL_BFINT_ENAB);
943 #ifdef x68k
944 		bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* | SCMD_PROG_XFR */
945 #else
946 		bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR);	/* XXX */
947 #endif
948 		for (;;) {
949 			/*if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0
950 				&& (bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) != 0)*/
951 			if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) == 0)
952 				break;
953 			if (bus_space_read_1(iot, ioh, INTS) != 0)
954 				goto out;
955 		}
956 
957 		/* Gather incoming message bytes if needed. */
958 		if ((sc->sc_flags & SPC_DROP_MSGIN) == 0) {
959 			if (n >= SPC_MAX_MSG_LEN) {
960 				(void) bus_space_read_1(iot, ioh, DREG);
961 				sc->sc_flags |= SPC_DROP_MSGIN;
962 				spc_sched_msgout(sc, SEND_REJECT);
963 			} else {
964 				*sc->sc_imp++ = bus_space_read_1(iot, ioh, DREG);
965 				n++;
966 				/*
967 				 * This testing is suboptimal, but most
968 				 * messages will be of the one byte variety, so
969 				 * it should not affect performance
970 				 * significantly.
971 				 */
972 				if (n == 1 && IS1BYTEMSG(sc->sc_imess[0]))
973 					break;
974 				if (n == 2 && IS2BYTEMSG(sc->sc_imess[0]))
975 					break;
976 				if (n >= 3 && ISEXTMSG(sc->sc_imess[0]) &&
977 				    n == sc->sc_imess[1] + 2)
978 					break;
979 			}
980 		} else
981 			(void) bus_space_read_1(iot, ioh, DREG);
982 
983 		/*
984 		 * If we reach this spot we're either:
985 		 * a) in the middle of a multi-byte message, or
986 		 * b) dropping bytes.
987 		 */
988 #if 0
989 		/* Ack the last byte read. */
990 		/*(void) bus_space_read_1(iot, ioh, DREG);*/
991 		while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0)
992 			;
993 #endif
994 	}
995 
996 	SPC_MISC(("n=%d imess=0x%02x  ", n, sc->sc_imess[0]));
997 
998 	/* We now have a complete message.  Parse it. */
999 	switch (sc->sc_state) {
1000 		struct spc_acb *acb;
1001 		struct scsipi_periph *periph;
1002 		struct spc_tinfo *ti;
1003 
1004 	case SPC_CONNECTED:
1005 		SPC_ASSERT(sc->sc_nexus != NULL);
1006 		acb = sc->sc_nexus;
1007 		ti = &sc->sc_tinfo[acb->xs->xs_periph->periph_target];
1008 
1009 		switch (sc->sc_imess[0]) {
1010 		case MSG_CMDCOMPLETE:
1011 			if (sc->sc_dleft < 0) {
1012 				periph = acb->xs->xs_periph;
1013 				printf("%s: %d extra bytes from %d:%d\n",
1014 				    sc->sc_dev.dv_xname, -sc->sc_dleft,
1015 				    periph->periph_target, periph->periph_lun);
1016 				acb->data_length = 0;
1017 			}
1018 			acb->xs->resid = acb->data_length = sc->sc_dleft;
1019 			sc->sc_state = SPC_CMDCOMPLETE;
1020 			break;
1021 
1022 		case MSG_PARITY_ERROR:
1023 			/* Resend the last message. */
1024 			spc_sched_msgout(sc, sc->sc_lastmsg);
1025 			break;
1026 
1027 		case MSG_MESSAGE_REJECT:
1028 			SPC_MISC(("message rejected %02x  ", sc->sc_lastmsg));
1029 			switch (sc->sc_lastmsg) {
1030 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE
1031 			case SEND_IDENTIFY:
1032 				ti->flags &= ~(DO_SYNC | DO_WIDE);
1033 				ti->period = ti->offset = 0;
1034 				spc_setsync(sc, ti);
1035 				ti->width = 0;
1036 				break;
1037 #endif
1038 #if SPC_USE_SYNCHRONOUS
1039 			case SEND_SDTR:
1040 				ti->flags &= ~DO_SYNC;
1041 				ti->period = ti->offset = 0;
1042 				spc_setsync(sc, ti);
1043 				break;
1044 #endif
1045 #if SPC_USE_WIDE
1046 			case SEND_WDTR:
1047 				ti->flags &= ~DO_WIDE;
1048 				ti->width = 0;
1049 				break;
1050 #endif
1051 			case SEND_INIT_DET_ERR:
1052 				spc_sched_msgout(sc, SEND_ABORT);
1053 				break;
1054 			}
1055 			break;
1056 
1057 		case MSG_NOOP:
1058 			break;
1059 
1060 		case MSG_DISCONNECT:
1061 			ti->dconns++;
1062 			sc->sc_state = SPC_DISCONNECT;
1063 			break;
1064 
1065 		case MSG_SAVEDATAPOINTER:
1066 			acb->data_addr = sc->sc_dp;
1067 			acb->data_length = sc->sc_dleft;
1068 			break;
1069 
1070 		case MSG_RESTOREPOINTERS:
1071 			sc->sc_dp = acb->data_addr;
1072 			sc->sc_dleft = acb->data_length;
1073 			sc->sc_cp = (u_char *)&acb->scsipi_cmd;
1074 			sc->sc_cleft = acb->scsipi_cmd_length;
1075 			break;
1076 
1077 		case MSG_EXTENDED:
1078 			switch (sc->sc_imess[2]) {
1079 #if SPC_USE_SYNCHRONOUS
1080 			case MSG_EXT_SDTR:
1081 				if (sc->sc_imess[1] != 3)
1082 					goto reject;
1083 				ti->period = sc->sc_imess[3];
1084 				ti->offset = sc->sc_imess[4];
1085 				ti->flags &= ~DO_SYNC;
1086 				if (ti->offset == 0) {
1087 				} else if (ti->period < sc->sc_minsync ||
1088 					   ti->period > sc->sc_maxsync ||
1089 					   ti->offset > 8) {
1090 					ti->period = ti->offset = 0;
1091 					spc_sched_msgout(sc, SEND_SDTR);
1092 				} else {
1093 					scsipi_printaddr(acb->xs->xs_periph);
1094 					printf("sync, offset %d, period %dnsec\n",
1095 					    ti->offset, ti->period * 4);
1096 				}
1097 				spc_setsync(sc, ti);
1098 				break;
1099 #endif
1100 
1101 #if SPC_USE_WIDE
1102 			case MSG_EXT_WDTR:
1103 				if (sc->sc_imess[1] != 2)
1104 					goto reject;
1105 				ti->width = sc->sc_imess[3];
1106 				ti->flags &= ~DO_WIDE;
1107 				if (ti->width == 0) {
1108 				} else if (ti->width > SPC_MAX_WIDTH) {
1109 					ti->width = 0;
1110 					spc_sched_msgout(sc, SEND_WDTR);
1111 				} else {
1112 					scsipi_printaddr(acb->xs->xs_periph);
1113 					printf("wide, width %d\n",
1114 					    1 << (3 + ti->width));
1115 				}
1116 				break;
1117 #endif
1118 
1119 			default:
1120 				printf("%s: unrecognized MESSAGE EXTENDED; sending REJECT\n",
1121 				    sc->sc_dev.dv_xname);
1122 				SPC_BREAK();
1123 				goto reject;
1124 			}
1125 			break;
1126 
1127 		default:
1128 			printf("%s: unrecognized MESSAGE; sending REJECT\n",
1129 			    sc->sc_dev.dv_xname);
1130 			SPC_BREAK();
1131 		reject:
1132 			spc_sched_msgout(sc, SEND_REJECT);
1133 			break;
1134 		}
1135 		break;
1136 
1137 	case SPC_RESELECTED:
1138 		if (!MSG_ISIDENTIFY(sc->sc_imess[0])) {
1139 			printf("%s: reselect without IDENTIFY; sending DEVICE RESET\n",
1140 			    sc->sc_dev.dv_xname);
1141 			SPC_BREAK();
1142 			goto reset;
1143 		}
1144 
1145 		(void) spc_reselect(sc, sc->sc_imess[0]);
1146 		break;
1147 
1148 	default:
1149 		printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n",
1150 		    sc->sc_dev.dv_xname);
1151 		SPC_BREAK();
1152 	reset:
1153 		spc_sched_msgout(sc, SEND_DEV_RESET);
1154 		break;
1155 
1156 #ifdef notdef
1157 	abort:
1158 		spc_sched_msgout(sc, SEND_ABORT);
1159 		break;
1160 #endif
1161 	}
1162 
1163 	/* Ack the last message byte. */
1164 #if 0 /* XXX? */
1165 	(void) bus_space_read_1(iot, ioh, DREG);
1166 	while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0)
1167 		;
1168 #endif
1169 
1170 	/* Go get the next message, if any. */
1171 	goto nextmsg;
1172 
1173 out:
1174 	bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK);
1175 	SPC_MISC(("n=%d imess=0x%02x  ", n, sc->sc_imess[0]));
1176 }
1177 
1178 /*
1179  * Send the highest priority, scheduled message.
1180  */
1181 void
1182 spc_msgout(sc)
1183 	struct spc_softc *sc;
1184 {
1185 	bus_space_tag_t iot = sc->sc_iot;
1186 	bus_space_handle_t ioh = sc->sc_ioh;
1187 #if SPC_USE_SYNCHRONOUS
1188 	struct spc_tinfo *ti;
1189 #endif
1190 	int n;
1191 
1192 	SPC_TRACE(("spc_msgout  "));
1193 
1194 	if (sc->sc_prevphase == PH_MSGOUT) {
1195 		if (sc->sc_omp == sc->sc_omess) {
1196 			/*
1197 			 * This is a retransmission.
1198 			 *
1199 			 * We get here if the target stayed in MESSAGE OUT
1200 			 * phase.  Section 5.1.9.2 of the SCSI 2 spec indicates
1201 			 * that all of the previously transmitted messages must
1202 			 * be sent again, in the same order.  Therefore, we
1203 			 * requeue all the previously transmitted messages, and
1204 			 * start again from the top.  Our simple priority
1205 			 * scheme keeps the messages in the right order.
1206 			 */
1207 			SPC_MISC(("retransmitting  "));
1208 			sc->sc_msgpriq |= sc->sc_msgoutq;
1209 			/*
1210 			 * Set ATN.  If we're just sending a trivial 1-byte
1211 			 * message, we'll clear ATN later on anyway.
1212 			 */
1213 			bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN); /* XXX? */
1214 		} else {
1215 			/* This is a continuation of the previous message. */
1216 			n = sc->sc_omp - sc->sc_omess;
1217 			goto nextbyte;
1218 		}
1219 	}
1220 
1221 	/* No messages transmitted so far. */
1222 	sc->sc_msgoutq = 0;
1223 	sc->sc_lastmsg = 0;
1224 
1225 nextmsg:
1226 	/* Pick up highest priority message. */
1227 	sc->sc_currmsg = sc->sc_msgpriq & -sc->sc_msgpriq;
1228 	sc->sc_msgpriq &= ~sc->sc_currmsg;
1229 	sc->sc_msgoutq |= sc->sc_currmsg;
1230 
1231 	/* Build the outgoing message data. */
1232 	switch (sc->sc_currmsg) {
1233 	case SEND_IDENTIFY:
1234 		SPC_ASSERT(sc->sc_nexus != NULL);
1235 		sc->sc_omess[0] =
1236 		    MSG_IDENTIFY(sc->sc_nexus->xs->xs_periph->periph_lun, 1);
1237 		n = 1;
1238 		break;
1239 
1240 #if SPC_USE_SYNCHRONOUS
1241 	case SEND_SDTR:
1242 		SPC_ASSERT(sc->sc_nexus != NULL);
1243 		ti = &sc->sc_tinfo[sc->sc_nexus->xs->xs_periph->periph_target];
1244 		sc->sc_omess[4] = MSG_EXTENDED;
1245 		sc->sc_omess[3] = 3;
1246 		sc->sc_omess[2] = MSG_EXT_SDTR;
1247 		sc->sc_omess[1] = ti->period >> 2;
1248 		sc->sc_omess[0] = ti->offset;
1249 		n = 5;
1250 		break;
1251 #endif
1252 
1253 #if SPC_USE_WIDE
1254 	case SEND_WDTR:
1255 		SPC_ASSERT(sc->sc_nexus != NULL);
1256 		ti = &sc->sc_tinfo[sc->sc_nexus->xs->xs_periph->periph_target];
1257 		sc->sc_omess[3] = MSG_EXTENDED;
1258 		sc->sc_omess[2] = 2;
1259 		sc->sc_omess[1] = MSG_EXT_WDTR;
1260 		sc->sc_omess[0] = ti->width;
1261 		n = 4;
1262 		break;
1263 #endif
1264 
1265 	case SEND_DEV_RESET:
1266 		sc->sc_flags |= SPC_ABORTING;
1267 		sc->sc_omess[0] = MSG_BUS_DEV_RESET;
1268 		n = 1;
1269 		break;
1270 
1271 	case SEND_REJECT:
1272 		sc->sc_omess[0] = MSG_MESSAGE_REJECT;
1273 		n = 1;
1274 		break;
1275 
1276 	case SEND_PARITY_ERROR:
1277 		sc->sc_omess[0] = MSG_PARITY_ERROR;
1278 		n = 1;
1279 		break;
1280 
1281 	case SEND_INIT_DET_ERR:
1282 		sc->sc_omess[0] = MSG_INITIATOR_DET_ERR;
1283 		n = 1;
1284 		break;
1285 
1286 	case SEND_ABORT:
1287 		sc->sc_flags |= SPC_ABORTING;
1288 		sc->sc_omess[0] = MSG_ABORT;
1289 		n = 1;
1290 		break;
1291 
1292 	default:
1293 		printf("%s: unexpected MESSAGE OUT; sending NOOP\n",
1294 		    sc->sc_dev.dv_xname);
1295 		SPC_BREAK();
1296 		sc->sc_omess[0] = MSG_NOOP;
1297 		n = 1;
1298 		break;
1299 	}
1300 	sc->sc_omp = &sc->sc_omess[n];
1301 
1302 nextbyte:
1303 	/* Send message bytes. */
1304 	/* send TRANSFER command. */
1305 	bus_space_write_1(iot, ioh, TCH, n >> 16);
1306 	bus_space_write_1(iot, ioh, TCM, n >> 8);
1307 	bus_space_write_1(iot, ioh, TCL, n);
1308 	bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB);
1309 #ifdef x68k
1310 	bus_space_write_1(iot, ioh, SCMD, SCMD_XFR);	/* XXX */
1311 #else
1312 	bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR | SCMD_ICPT_XFR);
1313 #endif
1314 	for (;;) {
1315 		if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0)
1316 			break;
1317 		if (bus_space_read_1(iot, ioh, INTS) != 0)
1318 			goto out;
1319 	}
1320 	for (;;) {
1321 #if 0
1322 		for (;;) {
1323 			if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0)
1324 				break;
1325 			/* Wait for REQINIT.  XXX Need timeout. */
1326 		}
1327 #endif
1328 		if (bus_space_read_1(iot, ioh, INTS) != 0) {
1329 			/*
1330 			 * Target left MESSAGE OUT, possibly to reject
1331 			 * our message.
1332 			 *
1333 			 * If this is the last message being sent, then we
1334 			 * deassert ATN, since either the target is going to
1335 			 * ignore this message, or it's going to ask for a
1336 			 * retransmission via MESSAGE PARITY ERROR (in which
1337 			 * case we reassert ATN anyway).
1338 			 */
1339 #if 0
1340 			if (sc->sc_msgpriq == 0)
1341 				bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN);
1342 #endif
1343 			goto out;
1344 		}
1345 
1346 #if 0
1347 		/* Clear ATN before last byte if this is the last message. */
1348 		if (n == 1 && sc->sc_msgpriq == 0)
1349 			bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN);
1350 #endif
1351 
1352 		while ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_FULL) != 0)
1353 			;
1354 		/* Send message byte. */
1355 		bus_space_write_1(iot, ioh, DREG, *--sc->sc_omp);
1356 		--n;
1357 		/* Keep track of the last message we've sent any bytes of. */
1358 		sc->sc_lastmsg = sc->sc_currmsg;
1359 #if 0
1360 		/* Wait for ACK to be negated.  XXX Need timeout. */
1361 		while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0)
1362 			;
1363 #endif
1364 
1365 		if (n == 0)
1366 			break;
1367 	}
1368 
1369 	/* We get here only if the entire message has been transmitted. */
1370 	if (sc->sc_msgpriq != 0) {
1371 		/* There are more outgoing messages. */
1372 		goto nextmsg;
1373 	}
1374 
1375 	/*
1376 	 * The last message has been transmitted.  We need to remember the last
1377 	 * message transmitted (in case the target switches to MESSAGE IN phase
1378 	 * and sends a MESSAGE REJECT), and the list of messages transmitted
1379 	 * this time around (in case the target stays in MESSAGE OUT phase to
1380 	 * request a retransmit).
1381 	 */
1382 
1383 out:
1384 	/* Disable REQ/ACK protocol. */
1385 }
1386 
1387 /*
1388  * spc_dataout_pio: perform a data transfer using the FIFO datapath in the spc
1389  * Precondition: The SCSI bus should be in the DOUT phase, with REQ asserted
1390  * and ACK deasserted (i.e. waiting for a data byte)
1391  *
1392  * This new revision has been optimized (I tried) to make the common case fast,
1393  * and the rarer cases (as a result) somewhat more comlex
1394  */
1395 int
1396 spc_dataout_pio(sc, p, n)
1397 	struct spc_softc *sc;
1398 	u_char *p;
1399 	int n;
1400 {
1401 	bus_space_tag_t iot = sc->sc_iot;
1402 	bus_space_handle_t ioh = sc->sc_ioh;
1403 	u_char intstat = 0;
1404 	int out = 0;
1405 #define DOUTAMOUNT 8		/* Full FIFO */
1406 
1407 	SPC_TRACE(("spc_dataout_pio  "));
1408 	/* send TRANSFER command. */
1409 	bus_space_write_1(iot, ioh, TCH, n >> 16);
1410 	bus_space_write_1(iot, ioh, TCM, n >> 8);
1411 	bus_space_write_1(iot, ioh, TCL, n);
1412 	bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB);
1413 #ifdef x68k
1414 	bus_space_write_1(iot, ioh, SCMD, SCMD_XFR);	/* XXX */
1415 #else
1416 	bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR | SCMD_ICPT_XFR);	/* XXX */
1417 #endif
1418 	for (;;) {
1419 		if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0)
1420 			break;
1421 		if (bus_space_read_1(iot, ioh, INTS) != 0)
1422 			break;
1423 	}
1424 
1425 	/*
1426 	 * I have tried to make the main loop as tight as possible.  This
1427 	 * means that some of the code following the loop is a bit more
1428 	 * complex than otherwise.
1429 	 */
1430 	while (n > 0) {
1431 		int xfer;
1432 
1433 		for (;;) {
1434 			intstat = bus_space_read_1(iot, ioh, INTS);
1435 			/* Wait till buffer is empty. */
1436 			if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) != 0)
1437 				break;
1438 			/* Break on interrupt. */
1439 			if (intstat != 0)
1440 				goto phasechange;
1441 		}
1442 
1443 		xfer = min(DOUTAMOUNT, n);
1444 
1445 		SPC_MISC(("%d> ", xfer));
1446 
1447 		n -= xfer;
1448 		out += xfer;
1449 
1450 		while (xfer-- > 0) {
1451 			bus_space_write_1(iot, ioh, DREG, *p++);
1452 		}
1453 	}
1454 
1455 	if (out == 0) {
1456 		for (;;) {
1457 			if (bus_space_read_1(iot, ioh, INTS) != 0)
1458 				break;
1459 		}
1460 		SPC_MISC(("extra data  "));
1461 	} else {
1462 		/* See the bytes off chip */
1463 		for (;;) {
1464 			/* Wait till buffer is empty. */
1465 			if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) != 0)
1466 				break;
1467 			intstat = bus_space_read_1(iot, ioh, INTS);
1468 			/* Break on interrupt. */
1469 			if (intstat != 0)
1470 				goto phasechange;
1471 		}
1472 	}
1473 
1474 phasechange:
1475 	/* Stop the FIFO data path. */
1476 
1477 	if (intstat != 0) {
1478 		/* Some sort of phase change. */
1479 		int amount;
1480 
1481 		amount = ((bus_space_read_1(iot, ioh, TCH) << 16) |
1482 			  (bus_space_read_1(iot, ioh, TCM) << 8) |
1483 			  bus_space_read_1(iot, ioh, TCL));
1484 		if (amount > 0) {
1485 			out -= amount;
1486 			SPC_MISC(("+%d ", amount));
1487 		}
1488 	}
1489 
1490 	/* Turn on ENREQINIT again. */
1491 
1492 	return out;
1493 }
1494 
1495 /*
1496  * spc_datain_pio: perform data transfers using the FIFO datapath in the spc
1497  * Precondition: The SCSI bus should be in the DIN phase, with REQ asserted
1498  * and ACK deasserted (i.e. at least one byte is ready).
1499  *
1500  * For now, uses a pretty dumb algorithm, hangs around until all data has been
1501  * transferred.  This, is OK for fast targets, but not so smart for slow
1502  * targets which don't disconnect or for huge transfers.
1503  */
1504 int
1505 spc_datain_pio(sc, p, n)
1506 	struct spc_softc *sc;
1507 	u_char *p;
1508 	int n;
1509 {
1510 	bus_space_tag_t iot = sc->sc_iot;
1511 	bus_space_handle_t ioh = sc->sc_ioh;
1512 	u_short intstat;
1513 	int in = 0;
1514 #define DINAMOUNT 8		/* Full FIFO */
1515 
1516 	SPC_TRACE(("spc_datain_pio  "));
1517 	/* send TRANSFER command. */
1518 	bus_space_write_1(iot, ioh, TCH, n >> 16);
1519 	bus_space_write_1(iot, ioh, TCM, n >> 8);
1520 	bus_space_write_1(iot, ioh, TCL, n);
1521 	bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB);
1522 #ifdef x68k
1523 	bus_space_write_1(iot, ioh, SCMD, SCMD_XFR);	/* XXX */
1524 #else
1525 	bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR);	/* XXX */
1526 #endif
1527 	for (;;) {
1528 		if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0)
1529 			break;
1530 		if (bus_space_read_1(iot, ioh, INTS) != 0)
1531 			goto phasechange;
1532 	}
1533 
1534 	/*
1535 	 * We leave this loop if one or more of the following is true:
1536 	 * a) phase != PH_DATAIN && FIFOs are empty
1537 	 * b) reset has occurred or busfree is detected.
1538 	 */
1539 	while (n > 0) {
1540 		int xfer;
1541 
1542 #define INTSMASK 0xff
1543 		/* Wait for fifo half full or phase mismatch */
1544 		for (;;) {
1545 			intstat = ((bus_space_read_1(iot, ioh, SSTS) << 8) |
1546 				   bus_space_read_1(iot, ioh, INTS));
1547 			if ((intstat & (INTSMASK | (SSTS_DREG_FULL << 8))) !=
1548 			    0)
1549 				break;
1550 			if ((intstat & (SSTS_DREG_EMPTY << 8)) == 0)
1551 				break;
1552 		}
1553 
1554 #if 1
1555 		if ((intstat & INTSMASK) != 0)
1556 			goto phasechange;
1557 #else
1558 		if ((intstat & INTSMASK) != 0 &&
1559 		    (intstat & (SSTS_DREG_EMPTY << 8)))
1560 			goto phasechange;
1561 #endif
1562 		if ((intstat & (SSTS_DREG_FULL << 8)) != 0)
1563 			xfer = min(DINAMOUNT, n);
1564 		else
1565 			xfer = min(1, n);
1566 
1567 		SPC_MISC((">%d ", xfer));
1568 
1569 		n -= xfer;
1570 		in += xfer;
1571 
1572 		while (xfer-- > 0) {
1573 			*p++ = bus_space_read_1(iot, ioh, DREG);
1574 		}
1575 
1576 		if ((intstat & INTSMASK) != 0)
1577 			goto phasechange;
1578 	}
1579 
1580 	/*
1581 	 * Some SCSI-devices are rude enough to transfer more data than what
1582 	 * was requested, e.g. 2048 bytes from a CD-ROM instead of the
1583 	 * requested 512.  Test for progress, i.e. real transfers.  If no real
1584 	 * transfers have been performed (n is probably already zero) and the
1585 	 * FIFO is not empty, waste some bytes....
1586 	 */
1587 	if (in == 0) {
1588 		for (;;) {
1589 			if (bus_space_read_1(iot, ioh, INTS) != 0)
1590 				break;
1591 		}
1592 		SPC_MISC(("extra data  "));
1593 	}
1594 
1595 phasechange:
1596 	/* Stop the FIFO data path. */
1597 
1598 	/* Turn on ENREQINIT again. */
1599 
1600 	return in;
1601 }
1602 
1603 /*
1604  * Catch an interrupt from the adaptor
1605  */
1606 /*
1607  * This is the workhorse routine of the driver.
1608  * Deficiencies (for now):
1609  * 1) always uses programmed I/O
1610  */
1611 int
1612 spcintr(arg)
1613 	void *arg;
1614 {
1615 	struct spc_softc *sc = arg;
1616 	bus_space_tag_t iot = sc->sc_iot;
1617 	bus_space_handle_t ioh = sc->sc_ioh;
1618 	u_char ints;
1619 	struct spc_acb *acb;
1620 	struct scsipi_periph *periph;
1621 	struct spc_tinfo *ti;
1622 	int n;
1623 
1624 	/*
1625 	 * Disable interrupt.
1626 	 */
1627 	bus_space_write_1(iot, ioh, SCTL, bus_space_read_1(iot, ioh, SCTL) & ~SCTL_INTR_ENAB);
1628 
1629 	SPC_TRACE(("spcintr  "));
1630 
1631 loop:
1632 	/*
1633 	 * Loop until transfer completion.
1634 	 */
1635 	/*
1636 	 * First check for abnormal conditions, such as reset.
1637 	 */
1638 #ifdef x68k			/* XXX? */
1639 	while ((ints = bus_space_read_1(iot, ioh, INTS)) == 0)
1640 		delay(1);
1641 	SPC_MISC(("ints = 0x%x  ", ints));
1642 #else
1643 	ints = bus_space_read_1(iot, ioh, INTS);
1644 	SPC_MISC(("ints = 0x%x  ", ints));
1645 #endif
1646 
1647 	if ((ints & INTS_RST) != 0) {
1648 		printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname);
1649 		goto reset;
1650 	}
1651 
1652 	/*
1653 	 * Check for less serious errors.
1654 	 */
1655 	if ((bus_space_read_1(iot, ioh, SERR) & (SERR_SCSI_PAR|SERR_SPC_PAR)) != 0) {
1656 		printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname);
1657 		if (sc->sc_prevphase == PH_MSGIN) {
1658 			sc->sc_flags |= SPC_DROP_MSGIN;
1659 			spc_sched_msgout(sc, SEND_PARITY_ERROR);
1660 		} else
1661 			spc_sched_msgout(sc, SEND_INIT_DET_ERR);
1662 	}
1663 
1664 	/*
1665 	 * If we're not already busy doing something test for the following
1666 	 * conditions:
1667 	 * 1) We have been reselected by something
1668 	 * 2) We have selected something successfully
1669 	 * 3) Our selection process has timed out
1670 	 * 4) This is really a bus free interrupt just to get a new command
1671 	 *    going?
1672 	 * 5) Spurious interrupt?
1673 	 */
1674 	switch (sc->sc_state) {
1675 	case SPC_IDLE:
1676 	case SPC_SELECTING:
1677 		SPC_MISC(("ints:0x%02x ", ints));
1678 
1679 		if ((ints & INTS_SEL) != 0) {
1680 			/*
1681 			 * We don't currently support target mode.
1682 			 */
1683 			printf("%s: target mode selected; going to BUS FREE\n",
1684 			    sc->sc_dev.dv_xname);
1685 
1686 			goto sched;
1687 		} else if ((ints & INTS_RESEL) != 0) {
1688 			SPC_MISC(("reselected  "));
1689 
1690 			/*
1691 			 * If we're trying to select a target ourselves,
1692 			 * push our command back into the ready list.
1693 			 */
1694 			if (sc->sc_state == SPC_SELECTING) {
1695 				SPC_MISC(("backoff selector  "));
1696 				SPC_ASSERT(sc->sc_nexus != NULL);
1697 				acb = sc->sc_nexus;
1698 				sc->sc_nexus = NULL;
1699 				TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
1700 			}
1701 
1702 			/* Save reselection ID. */
1703 			sc->sc_selid = bus_space_read_1(iot, ioh, TEMP);
1704 
1705 			sc->sc_state = SPC_RESELECTED;
1706 		} else if ((ints & INTS_CMD_DONE) != 0) {
1707 			SPC_MISC(("selected  "));
1708 
1709 			/*
1710 			 * We have selected a target. Things to do:
1711 			 * a) Determine what message(s) to send.
1712 			 * b) Verify that we're still selecting the target.
1713 			 * c) Mark device as busy.
1714 			 */
1715 			if (sc->sc_state != SPC_SELECTING) {
1716 				printf("%s: selection out while idle; resetting\n",
1717 				    sc->sc_dev.dv_xname);
1718 				SPC_BREAK();
1719 				goto reset;
1720 			}
1721 			SPC_ASSERT(sc->sc_nexus != NULL);
1722 			acb = sc->sc_nexus;
1723 			periph = acb->xs->xs_periph;
1724 			ti = &sc->sc_tinfo[periph->periph_target];
1725 
1726 			sc->sc_msgpriq = SEND_IDENTIFY;
1727 			if (acb->flags & ACB_RESET)
1728 				sc->sc_msgpriq |= SEND_DEV_RESET;
1729 			else if (acb->flags & ACB_ABORT)
1730 				sc->sc_msgpriq |= SEND_ABORT;
1731 			else {
1732 #if SPC_USE_SYNCHRONOUS
1733 				if ((ti->flags & DO_SYNC) != 0)
1734 					sc->sc_msgpriq |= SEND_SDTR;
1735 #endif
1736 #if SPC_USE_WIDE
1737 				if ((ti->flags & DO_WIDE) != 0)
1738 					sc->sc_msgpriq |= SEND_WDTR;
1739 #endif
1740 			}
1741 
1742 			acb->flags |= ACB_NEXUS;
1743 			ti->lubusy |= (1 << periph->periph_lun);
1744 
1745 			/* Do an implicit RESTORE POINTERS. */
1746 			sc->sc_dp = acb->data_addr;
1747 			sc->sc_dleft = acb->data_length;
1748 			sc->sc_cp = (u_char *)&acb->scsipi_cmd;
1749 			sc->sc_cleft = acb->scsipi_cmd_length;
1750 
1751 			/* On our first connection, schedule a timeout. */
1752 			if ((acb->xs->xs_control & XS_CTL_POLL) == 0)
1753 				callout_reset(&acb->xs->xs_callout,
1754 				    (acb->timeout * hz) / 1000,
1755 				    spc_timeout, acb);
1756 
1757 			sc->sc_state = SPC_CONNECTED;
1758 		} else if ((ints & INTS_TIMEOUT) != 0) {
1759 			SPC_MISC(("selection timeout  "));
1760 
1761 			if (sc->sc_state != SPC_SELECTING) {
1762 				printf("%s: selection timeout while idle; resetting\n",
1763 				    sc->sc_dev.dv_xname);
1764 				SPC_BREAK();
1765 				goto reset;
1766 			}
1767 			SPC_ASSERT(sc->sc_nexus != NULL);
1768 			acb = sc->sc_nexus;
1769 
1770 			delay(250);
1771 
1772 			acb->xs->error = XS_SELTIMEOUT;
1773 			goto finish;
1774 		} else {
1775 			if (sc->sc_state != SPC_IDLE) {
1776 				printf("%s: BUS FREE while not idle; state=%d\n",
1777 				    sc->sc_dev.dv_xname, sc->sc_state);
1778 				SPC_BREAK();
1779 				goto out;
1780 			}
1781 
1782 			goto sched;
1783 		}
1784 
1785 		/*
1786 		 * Turn off selection stuff, and prepare to catch bus free
1787 		 * interrupts, parity errors, and phase changes.
1788 		 */
1789 
1790 		sc->sc_flags = 0;
1791 		sc->sc_prevphase = PH_INVALID;
1792 		goto dophase;
1793 	}
1794 
1795 	if ((ints & INTS_DISCON) != 0) {
1796 		/* We've gone to BUS FREE phase. */
1797 		bus_space_write_1(iot, ioh, PCTL,
1798 		    bus_space_read_1(iot, ioh, PCTL) & ~PCTL_BFINT_ENAB);
1799 				/* disable disconnect interrupt */
1800 		bus_space_write_1(iot, ioh, INTS, ints);
1801 				/* XXX reset interrput */
1802 
1803 		switch (sc->sc_state) {
1804 		case SPC_RESELECTED:
1805 			goto sched;
1806 
1807 		case SPC_CONNECTED:
1808 			SPC_ASSERT(sc->sc_nexus != NULL);
1809 			acb = sc->sc_nexus;
1810 
1811 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE
1812 			if (sc->sc_prevphase == PH_MSGOUT) {
1813 				/*
1814 				 * If the target went to BUS FREE phase during
1815 				 * or immediately after sending a SDTR or WDTR
1816 				 * message, disable negotiation.
1817 				 */
1818 				periph = acb->xs->xs_periph;
1819 				ti = &sc->sc_tinfo[periph->periph_target];
1820 				switch (sc->sc_lastmsg) {
1821 #if SPC_USE_SYNCHRONOUS
1822 				case SEND_SDTR:
1823 					ti->flags &= ~DO_SYNC;
1824 					ti->period = ti->offset = 0;
1825 					break;
1826 #endif
1827 #if SPC_USE_WIDE
1828 				case SEND_WDTR:
1829 					ti->flags &= ~DO_WIDE;
1830 					ti->width = 0;
1831 					break;
1832 #endif
1833 				}
1834 			}
1835 #endif
1836 
1837 			if ((sc->sc_flags & SPC_ABORTING) == 0) {
1838 				/*
1839 				 * Section 5.1.1 of the SCSI 2 spec suggests
1840 				 * issuing a REQUEST SENSE following an
1841 				 * unexpected disconnect.  Some devices go into
1842 				 * a contingent allegiance condition when
1843 				 * disconnecting, and this is necessary to
1844 				 * clean up their state.
1845 				 */
1846 				printf("%s: unexpected disconnect; sending REQUEST SENSE\n",
1847 				    sc->sc_dev.dv_xname);
1848 				SPC_BREAK();
1849 				acb->target_stat = SCSI_CHECK;
1850 				acb->xs->error = XS_NOERROR;
1851 				goto finish;
1852 			}
1853 
1854 			acb->xs->error = XS_DRIVER_STUFFUP;
1855 			goto finish;
1856 
1857 		case SPC_DISCONNECT:
1858 			SPC_ASSERT(sc->sc_nexus != NULL);
1859 			acb = sc->sc_nexus;
1860 			TAILQ_INSERT_HEAD(&sc->nexus_list, acb, chain);
1861 			sc->sc_nexus = NULL;
1862 			goto sched;
1863 
1864 		case SPC_CMDCOMPLETE:
1865 			SPC_ASSERT(sc->sc_nexus != NULL);
1866 			acb = sc->sc_nexus;
1867 			goto finish;
1868 		}
1869 	}
1870 	else if ((ints & INTS_CMD_DONE) != 0 &&
1871 		 sc->sc_prevphase == PH_MSGIN && sc->sc_state != SPC_CONNECTED)
1872 		goto out;
1873 
1874 dophase:
1875 #if 0
1876 	if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) {
1877 		/* Wait for REQINIT. */
1878 		goto out;
1879 	}
1880 #else
1881 	bus_space_write_1(iot, ioh, INTS, ints);
1882 	ints = 0;
1883 	while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0)
1884 		delay(1);	/* need timeout XXX */
1885 #endif
1886 
1887 	/*
1888 	 * State transition.
1889 	 */
1890 	sc->sc_phase = bus_space_read_1(iot, ioh, PSNS) & PH_MASK;
1891 /*	bus_space_write_1(iot, ioh, PCTL, sc->sc_phase);*/
1892 
1893 	SPC_MISC(("phase=%d\n", sc->sc_phase));
1894 	switch (sc->sc_phase) {
1895 	case PH_MSGOUT:
1896 		if (sc->sc_state != SPC_CONNECTED &&
1897 		    sc->sc_state != SPC_RESELECTED)
1898 			break;
1899 		spc_msgout(sc);
1900 		sc->sc_prevphase = PH_MSGOUT;
1901 		goto loop;
1902 
1903 	case PH_MSGIN:
1904 		if (sc->sc_state != SPC_CONNECTED &&
1905 		    sc->sc_state != SPC_RESELECTED)
1906 			break;
1907 		spc_msgin(sc);
1908 		sc->sc_prevphase = PH_MSGIN;
1909 		goto loop;
1910 
1911 	case PH_CMD:
1912 		if (sc->sc_state != SPC_CONNECTED)
1913 			break;
1914 #if SPC_DEBUG
1915 		if ((spc_debug & SPC_SHOWMISC) != 0) {
1916 			SPC_ASSERT(sc->sc_nexus != NULL);
1917 			acb = sc->sc_nexus;
1918 			printf("cmd=0x%02x+%d  ",
1919 			    acb->scsipi_cmd.opcode, acb->scsipi_cmd_length-1);
1920 		}
1921 #endif
1922 		n = spc_dataout_pio(sc, sc->sc_cp, sc->sc_cleft);
1923 		sc->sc_cp += n;
1924 		sc->sc_cleft -= n;
1925 		sc->sc_prevphase = PH_CMD;
1926 		goto loop;
1927 
1928 	case PH_DATAOUT:
1929 		if (sc->sc_state != SPC_CONNECTED)
1930 			break;
1931 		SPC_MISC(("dataout dleft=%d  ", sc->sc_dleft));
1932 		n = spc_dataout_pio(sc, sc->sc_dp, sc->sc_dleft);
1933 		sc->sc_dp += n;
1934 		sc->sc_dleft -= n;
1935 		sc->sc_prevphase = PH_DATAOUT;
1936 		goto loop;
1937 
1938 	case PH_DATAIN:
1939 		if (sc->sc_state != SPC_CONNECTED)
1940 			break;
1941 		SPC_MISC(("datain  "));
1942 		n = spc_datain_pio(sc, sc->sc_dp, sc->sc_dleft);
1943 		sc->sc_dp += n;
1944 		sc->sc_dleft -= n;
1945 		sc->sc_prevphase = PH_DATAIN;
1946 		goto loop;
1947 
1948 	case PH_STAT:
1949 		if (sc->sc_state != SPC_CONNECTED)
1950 			break;
1951 		SPC_ASSERT(sc->sc_nexus != NULL);
1952 		acb = sc->sc_nexus;
1953 		/*acb->target_stat = bus_space_read_1(iot, ioh, DREG);*/
1954 		spc_datain_pio(sc, &acb->target_stat, 1);
1955 		SPC_MISC(("target_stat=0x%02x  ", acb->target_stat));
1956 		sc->sc_prevphase = PH_STAT;
1957 		goto loop;
1958 	}
1959 
1960 	printf("%s: unexpected bus phase; resetting\n", sc->sc_dev.dv_xname);
1961 	SPC_BREAK();
1962 reset:
1963 	spc_init(sc);
1964 	return 1;
1965 
1966 finish:
1967 	callout_stop(&acb->xs->xs_callout);
1968 	bus_space_write_1(iot, ioh, INTS, ints);
1969 	ints = 0;
1970 	spc_done(sc, acb);
1971 	goto out;
1972 
1973 sched:
1974 	sc->sc_state = SPC_IDLE;
1975 	spc_sched(sc);
1976 	goto out;
1977 
1978 out:
1979 	if (ints)
1980 		bus_space_write_1(iot, ioh, INTS, ints);
1981 	bus_space_write_1(iot, ioh, SCTL,
1982 	    bus_space_read_1(iot, ioh, SCTL) | SCTL_INTR_ENAB);
1983 	return 1;
1984 }
1985 
1986 void
1987 spc_abort(sc, acb)
1988 	struct spc_softc *sc;
1989 	struct spc_acb *acb;
1990 {
1991 
1992 	/* 2 secs for the abort */
1993 	acb->timeout = SPC_ABORT_TIMEOUT;
1994 	acb->flags |= ACB_ABORT;
1995 
1996 	if (acb == sc->sc_nexus) {
1997 		/*
1998 		 * If we're still selecting, the message will be scheduled
1999 		 * after selection is complete.
2000 		 */
2001 		if (sc->sc_state == SPC_CONNECTED)
2002 			spc_sched_msgout(sc, SEND_ABORT);
2003 	} else {
2004 		spc_dequeue(sc, acb);
2005 		TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain);
2006 		if (sc->sc_state == SPC_IDLE)
2007 			spc_sched(sc);
2008 	}
2009 }
2010 
2011 void
2012 spc_timeout(arg)
2013 	void *arg;
2014 {
2015 	struct spc_acb *acb = arg;
2016 	struct scsipi_xfer *xs = acb->xs;
2017 	struct scsipi_periph *periph = xs->xs_periph;
2018 	struct spc_softc *sc = (void*)periph->periph_channel->chan_adapter->adapt_dev;
2019 	int s;
2020 
2021 	scsipi_printaddr(periph);
2022 	printf("timed out");
2023 
2024 	s = splbio();
2025 
2026 	if (acb->flags & ACB_ABORT) {
2027 		/* abort timed out */
2028 		printf(" AGAIN\n");
2029 		/* XXX Must reset! */
2030 	} else {
2031 		/* abort the operation that has timed out */
2032 		printf("\n");
2033 		acb->xs->error = XS_TIMEOUT;
2034 		spc_abort(sc, acb);
2035 	}
2036 
2037 	splx(s);
2038 }
2039 
2040 #ifdef SPC_DEBUG
2041 /*
2042  * The following functions are mostly used for debugging purposes, either
2043  * directly called from the driver or from the kernel debugger.
2044  */
2045 
2046 void
2047 spc_show_scsi_cmd(acb)
2048 	struct spc_acb *acb;
2049 {
2050 	u_char  *b = (u_char *)&acb->scsipi_cmd;
2051 	int i;
2052 
2053 	scsipi_printaddr(acb->xs->xs_periph);
2054 	if ((acb->xs->xs_control & XS_CTL_RESET) == 0) {
2055 		for (i = 0; i < acb->scsipi_cmd_length; i++) {
2056 			if (i)
2057 				printf(",");
2058 			printf("%x", b[i]);
2059 		}
2060 		printf("\n");
2061 	} else
2062 		printf("RESET\n");
2063 }
2064 
2065 void
2066 spc_print_acb(acb)
2067 	struct spc_acb *acb;
2068 {
2069 
2070 	printf("acb@%p xs=%p flags=%x", acb, acb->xs, acb->flags);
2071 	printf(" dp=%p dleft=%d target_stat=%x\n",
2072 	       acb->data_addr, acb->data_length, acb->target_stat);
2073 	spc_show_scsi_cmd(acb);
2074 }
2075 
2076 void
2077 spc_print_active_acb()
2078 {
2079 	struct spc_acb *acb;
2080 	struct spc_softc *sc = spc_cd.cd_devs[0]; /* XXX */
2081 
2082 	printf("ready list:\n");
2083 	for (acb = sc->ready_list.tqh_first; acb != NULL;
2084 	    acb = acb->chain.tqe_next)
2085 		spc_print_acb(acb);
2086 	printf("nexus:\n");
2087 	if (sc->sc_nexus != NULL)
2088 		spc_print_acb(sc->sc_nexus);
2089 	printf("nexus list:\n");
2090 	for (acb = sc->nexus_list.tqh_first; acb != NULL;
2091 	    acb = acb->chain.tqe_next)
2092 		spc_print_acb(acb);
2093 }
2094 
2095 void
2096 spc_dump89352(sc)
2097 	struct spc_softc *sc;
2098 {
2099 	bus_space_tag_t iot = sc->sc_iot;
2100 	bus_space_handle_t ioh = sc->sc_ioh;
2101 
2102 	printf("mb89352: BDID=%x SCTL=%x SCMD=%x TMOD=%x\n",
2103 	    bus_space_read_1(iot, ioh, BDID),
2104 	    bus_space_read_1(iot, ioh, SCTL),
2105 	    bus_space_read_1(iot, ioh, SCMD),
2106 	    bus_space_read_1(iot, ioh, TMOD));
2107 	printf("         INTS=%x PSNS=%x SSTS=%x SERR=%x PCTL=%x\n",
2108 	    bus_space_read_1(iot, ioh, INTS),
2109 	    bus_space_read_1(iot, ioh, PSNS),
2110 	    bus_space_read_1(iot, ioh, SSTS),
2111 	    bus_space_read_1(iot, ioh, SERR),
2112 	    bus_space_read_1(iot, ioh, PCTL));
2113 	printf("         MBC=%x DREG=%x TEMP=%x TCH=%x TCM=%x\n",
2114 	    bus_space_read_1(iot, ioh, MBC),
2115 #if 0
2116 	    bus_space_read_1(iot, ioh, DREG),
2117 #else
2118 	    0,
2119 #endif
2120 	    bus_space_read_1(iot, ioh, TEMP),
2121 	    bus_space_read_1(iot, ioh, TCH),
2122 	    bus_space_read_1(iot, ioh, TCM));
2123 	printf("         TCL=%x EXBF=%x\n",
2124 	    bus_space_read_1(iot, ioh, TCL),
2125 	    bus_space_read_1(iot, ioh, EXBF));
2126 }
2127 
2128 void
2129 spc_dump_driver(sc)
2130 	struct spc_softc *sc;
2131 {
2132 	struct spc_tinfo *ti;
2133 	int i;
2134 
2135 	printf("nexus=%p prevphase=%x\n", sc->sc_nexus, sc->sc_prevphase);
2136 	printf("state=%x msgin=%x msgpriq=%x msgoutq=%x lastmsg=%x currmsg=%x\n",
2137 	    sc->sc_state, sc->sc_imess[0],
2138 	    sc->sc_msgpriq, sc->sc_msgoutq, sc->sc_lastmsg, sc->sc_currmsg);
2139 	for (i = 0; i < 7; i++) {
2140 		ti = &sc->sc_tinfo[i];
2141 		printf("tinfo%d: %d cmds %d disconnects %d timeouts",
2142 		    i, ti->cmds, ti->dconns, ti->touts);
2143 		printf(" %d senses flags=%x\n", ti->senses, ti->flags);
2144 	}
2145 }
2146 #endif
2147