1 /* $NetBSD: mb89352.c,v 1.10 2001/11/13 13:14:41 lukem Exp $ */ 2 /* NecBSD: mb89352.c,v 1.4 1998/03/14 07:31:20 kmatsuda Exp */ 3 4 /*- 5 * Copyright (c) 1996,97,98,99 The NetBSD Foundation, Inc. 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to The NetBSD Foundation 9 * by Charles M. Hannum, Masaru Oki and Kouichi Matsuda. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by Charles M. Hannum. 22 * 4. The name of the author may not be used to endorse or promote products 23 * derived from this software without specific prior written permission. 24 * 25 * Copyright (c) 1994 Jarle Greipsland 26 * All rights reserved. 27 * 28 * Redistribution and use in source and binary forms, with or without 29 * modification, are permitted provided that the following conditions 30 * are met: 31 * 1. Redistributions of source code must retain the above copyright 32 * notice, this list of conditions and the following disclaimer. 33 * 2. Redistributions in binary form must reproduce the above copyright 34 * notice, this list of conditions and the following disclaimer in the 35 * documentation and/or other materials provided with the distribution. 36 * 3. The name of the author may not be used to endorse or promote products 37 * derived from this software without specific prior written permission. 38 * 39 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 40 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 41 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 42 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 43 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 44 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 45 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 46 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 47 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 48 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 49 * POSSIBILITY OF SUCH DAMAGE. 50 */ 51 /* 52 * [NetBSD for NEC PC-98 series] 53 * Copyright (c) 1996, 1997, 1998 54 * NetBSD/pc98 porting staff. All rights reserved. 55 * Copyright (c) 1996, 1997, 1998 56 * Kouichi Matsuda. All rights reserved. 57 */ 58 59 /* 60 * Acknowledgements: Many of the algorithms used in this driver are 61 * inspired by the work of Julian Elischer (julian@tfs.com) and 62 * Charles Hannum (mycroft@duality.gnu.ai.mit.edu). Thanks a million! 63 */ 64 65 /* TODO list: 66 * 1) Get the DMA stuff working. 67 * 2) Get the iov/uio stuff working. Is this a good thing ??? 68 * 3) Get the synch stuff working. 69 * 4) Rewrite it to use malloc for the acb structs instead of static alloc.? 70 */ 71 72 #include <sys/cdefs.h> 73 __KERNEL_RCSID(0, "$NetBSD: mb89352.c,v 1.10 2001/11/13 13:14:41 lukem Exp $"); 74 75 #ifdef DDB 76 #define integrate 77 #else 78 #define integrate __inline static 79 #endif 80 81 /* 82 * A few customizable items: 83 */ 84 85 /* Use doubleword transfers to/from SCSI chip. Note: This requires 86 * motherboard support. Basicly, some motherboard chipsets are able to 87 * split a 32 bit I/O operation into two 16 bit I/O operations, 88 * transparently to the processor. This speeds up some things, notably long 89 * data transfers. 90 */ 91 #define SPC_USE_DWORDS 0 92 93 /* Synchronous data transfers? */ 94 #define SPC_USE_SYNCHRONOUS 0 95 #define SPC_SYNC_REQ_ACK_OFS 8 96 97 /* Wide data transfers? */ 98 #define SPC_USE_WIDE 0 99 #define SPC_MAX_WIDTH 0 100 101 /* Max attempts made to transmit a message */ 102 #define SPC_MSG_MAX_ATTEMPT 3 /* Not used now XXX */ 103 104 /* 105 * Some spin loop parameters (essentially how long to wait some places) 106 * The problem(?) is that sometimes we expect either to be able to transmit a 107 * byte or to get a new one from the SCSI bus pretty soon. In order to avoid 108 * returning from the interrupt just to get yanked back for the next byte we 109 * may spin in the interrupt routine waiting for this byte to come. How long? 110 * This is really (SCSI) device and processor dependent. Tuneable, I guess. 111 */ 112 #define SPC_MSGIN_SPIN 1 /* Will spinwait upto ?ms for a new msg byte */ 113 #define SPC_MSGOUT_SPIN 1 114 115 /* Include debug functions? At the end of this file there are a bunch of 116 * functions that will print out various information regarding queued SCSI 117 * commands, driver state and chip contents. You can call them from the 118 * kernel debugger. If you set SPC_DEBUG to 0 they are not included (the 119 * kernel uses less memory) but you lose the debugging facilities. 120 */ 121 #define SPC_DEBUG 1 122 123 #define SPC_ABORT_TIMEOUT 2000 /* time to wait for abort */ 124 125 /* End of customizable parameters */ 126 127 /* 128 * MB89352 SCSI Protocol Controller (SPC) routines. 129 */ 130 131 #include "opt_ddb.h" 132 133 #include <sys/types.h> 134 #include <sys/param.h> 135 #include <sys/systm.h> 136 #include <sys/kernel.h> 137 #include <sys/errno.h> 138 #include <sys/ioctl.h> 139 #include <sys/device.h> 140 #include <sys/buf.h> 141 #include <sys/proc.h> 142 #include <sys/user.h> 143 #include <sys/queue.h> 144 145 #include <machine/intr.h> 146 #include <machine/bus.h> 147 148 #include <dev/scsipi/scsi_all.h> 149 #include <dev/scsipi/scsipi_all.h> 150 #include <dev/scsipi/scsi_message.h> 151 #include <dev/scsipi/scsiconf.h> 152 153 #include <dev/ic/mb89352reg.h> 154 #include <dev/ic/mb89352var.h> 155 156 #ifndef DDB 157 #define Debugger() panic("should call debugger here (mb89352.c)") 158 #endif /* ! DDB */ 159 160 #if SPC_DEBUG 161 int spc_debug = 0x00; /* SPC_SHOWSTART|SPC_SHOWMISC|SPC_SHOWTRACE; */ 162 #endif 163 164 void spc_minphys __P((struct buf *)); 165 void spc_done __P((struct spc_softc *, struct spc_acb *)); 166 void spc_dequeue __P((struct spc_softc *, struct spc_acb *)); 167 void spc_scsipi_request __P((struct scsipi_channel *, 168 scsipi_adapter_req_t, void *)); 169 int spc_poll __P((struct spc_softc *, struct scsipi_xfer *, int)); 170 integrate void spc_sched_msgout __P((struct spc_softc *, u_char)); 171 integrate void spc_setsync __P((struct spc_softc *, struct spc_tinfo *)); 172 void spc_select __P((struct spc_softc *, struct spc_acb *)); 173 void spc_timeout __P((void *)); 174 void spc_scsi_reset __P((struct spc_softc *)); 175 void spc_reset __P((struct spc_softc *)); 176 void spc_free_acb __P((struct spc_softc *, struct spc_acb *, int)); 177 struct spc_acb* spc_get_acb __P((struct spc_softc *)); 178 int spc_reselect __P((struct spc_softc *, int)); 179 void spc_msgin __P((struct spc_softc *)); 180 void spc_abort __P((struct spc_softc *, struct spc_acb *)); 181 void spc_msgout __P((struct spc_softc *)); 182 int spc_dataout_pio __P((struct spc_softc *, u_char *, int)); 183 int spc_datain_pio __P((struct spc_softc *, u_char *, int)); 184 #if SPC_DEBUG 185 void spc_print_acb __P((struct spc_acb *)); 186 void spc_dump_driver __P((struct spc_softc *)); 187 void spc_dump89352 __P((struct spc_softc *)); 188 void spc_show_scsi_cmd __P((struct spc_acb *)); 189 void spc_print_active_acb __P((void)); 190 #endif 191 192 extern struct cfdriver spc_cd; 193 194 195 /* 196 * INITIALIZATION ROUTINES (probe, attach ++) 197 */ 198 199 /* 200 * Do the real search-for-device. 201 * Prerequisite: sc->sc_iobase should be set to the proper value 202 */ 203 int 204 spc_find(iot, ioh, bdid) 205 bus_space_tag_t iot; 206 bus_space_handle_t ioh; 207 int bdid; 208 { 209 long timeout = SPC_ABORT_TIMEOUT; 210 211 SPC_TRACE(("spc: probing for spc-chip\n")); 212 /* 213 * Disable interrupts then reset the FUJITSU chip. 214 */ 215 bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST); 216 bus_space_write_1(iot, ioh, SCMD, 0); 217 bus_space_write_1(iot, ioh, PCTL, 0); 218 bus_space_write_1(iot, ioh, TEMP, 0); 219 bus_space_write_1(iot, ioh, TCH, 0); 220 bus_space_write_1(iot, ioh, TCM, 0); 221 bus_space_write_1(iot, ioh, TCL, 0); 222 bus_space_write_1(iot, ioh, INTS, 0); 223 bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB); 224 bus_space_write_1(iot, ioh, BDID, bdid); 225 delay(400); 226 bus_space_write_1(iot, ioh, SCTL, bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE); 227 228 /* The following detection is derived from spc.c 229 * (by Takahide Matsutsuka) in FreeBSD/pccard-test. 230 */ 231 while (bus_space_read_1(iot, ioh, PSNS) && timeout) 232 timeout--; 233 if (!timeout) { 234 printf("spc: find failed\n"); 235 return 0; 236 } 237 238 SPC_START(("SPC found")); 239 return 1; 240 } 241 242 void 243 spcattach(sc) 244 struct spc_softc *sc; 245 { 246 247 SPC_TRACE(("spcattach ")); 248 sc->sc_state = SPC_INIT; 249 250 sc->sc_freq = 20; /* XXXX Assume 20 MHz. */ 251 252 #if SPC_USE_SYNCHRONOUS 253 /* 254 * These are the bounds of the sync period, based on the frequency of 255 * the chip's clock input and the size and offset of the sync period 256 * register. 257 * 258 * For a 20Mhz clock, this gives us 25, or 100nS, or 10MB/s, as a 259 * maximum transfer rate, and 112.5, or 450nS, or 2.22MB/s, as a 260 * minimum transfer rate. 261 */ 262 sc->sc_minsync = (2 * 250) / sc->sc_freq; 263 sc->sc_maxsync = (9 * 250) / sc->sc_freq; 264 #endif 265 266 spc_init(sc); /* Init chip and driver */ 267 268 /* 269 * Fill in the adapter. 270 */ 271 sc->sc_adapter.adapt_dev = &sc->sc_dev; 272 sc->sc_adapter.adapt_nchannels = 1; 273 sc->sc_adapter.adapt_openings = 7; 274 sc->sc_adapter.adapt_max_periph = 1; 275 sc->sc_adapter.adapt_minphys = spc_minphys; 276 sc->sc_adapter.adapt_request = spc_scsipi_request; 277 278 sc->sc_channel.chan_adapter = &sc->sc_adapter; 279 sc->sc_channel.chan_bustype = &scsi_bustype; 280 sc->sc_channel.chan_channel = 0; 281 sc->sc_channel.chan_ntargets = 8; 282 sc->sc_channel.chan_nluns = 8; 283 sc->sc_channel.chan_id = sc->sc_initiator; 284 285 /* 286 * ask the adapter what subunits are present 287 */ 288 config_found((struct device*)sc, &sc->sc_channel, scsiprint); 289 } 290 291 /* 292 * Initialize MB89352 chip itself 293 * The following conditions should hold: 294 * spc_isa_probe should have succeeded, i.e. the iobase address in spc_softc 295 * must be valid. 296 */ 297 void 298 spc_reset(sc) 299 struct spc_softc *sc; 300 { 301 bus_space_tag_t iot = sc->sc_iot; 302 bus_space_handle_t ioh = sc->sc_ioh; 303 304 SPC_TRACE(("spc_reset ")); 305 /* 306 * Disable interrupts then reset the FUJITSU chip. 307 */ 308 bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_CTRLRST); 309 bus_space_write_1(iot, ioh, SCMD, 0); 310 bus_space_write_1(iot, ioh, PCTL, 0); 311 bus_space_write_1(iot, ioh, TEMP, 0); 312 bus_space_write_1(iot, ioh, TCH, 0); 313 bus_space_write_1(iot, ioh, TCM, 0); 314 bus_space_write_1(iot, ioh, TCL, 0); 315 bus_space_write_1(iot, ioh, INTS, 0); 316 bus_space_write_1(iot, ioh, SCTL, SCTL_DISABLE | SCTL_ABRT_ENAB | SCTL_PARITY_ENAB | SCTL_RESEL_ENAB); 317 bus_space_write_1(iot, ioh, BDID, sc->sc_initiator); 318 delay(400); 319 bus_space_write_1(iot, ioh, SCTL, bus_space_read_1(iot, ioh, SCTL) & ~SCTL_DISABLE); 320 } 321 322 323 /* 324 * Pull the SCSI RST line for 500us. 325 */ 326 void 327 spc_scsi_reset(sc) 328 struct spc_softc *sc; 329 { 330 bus_space_tag_t iot = sc->sc_iot; 331 bus_space_handle_t ioh = sc->sc_ioh; 332 333 SPC_TRACE(("spc_scsi_reset ")); 334 bus_space_write_1(iot, ioh, SCMD, bus_space_read_1(iot, ioh, SCMD) | SCMD_RST); 335 delay(500); 336 bus_space_write_1(iot, ioh, SCMD, bus_space_read_1(iot, ioh, SCMD) & ~SCMD_RST); 337 delay(50); 338 } 339 340 /* 341 * Initialize spc SCSI driver. 342 */ 343 void 344 spc_init(sc) 345 struct spc_softc *sc; 346 { 347 struct spc_acb *acb; 348 int r; 349 350 SPC_TRACE(("spc_init ")); 351 spc_reset(sc); 352 spc_scsi_reset(sc); 353 spc_reset(sc); 354 355 if (sc->sc_state == SPC_INIT) { 356 /* First time through; initialize. */ 357 TAILQ_INIT(&sc->ready_list); 358 TAILQ_INIT(&sc->nexus_list); 359 TAILQ_INIT(&sc->free_list); 360 sc->sc_nexus = NULL; 361 acb = sc->sc_acb; 362 memset(acb, 0, sizeof(sc->sc_acb)); 363 for (r = 0; r < sizeof(sc->sc_acb) / sizeof(*acb); r++) { 364 TAILQ_INSERT_TAIL(&sc->free_list, acb, chain); 365 acb++; 366 } 367 memset(&sc->sc_tinfo, 0, sizeof(sc->sc_tinfo)); 368 } else { 369 /* Cancel any active commands. */ 370 sc->sc_state = SPC_CLEANING; 371 if ((acb = sc->sc_nexus) != NULL) { 372 acb->xs->error = XS_DRIVER_STUFFUP; 373 callout_stop(&acb->xs->xs_callout); 374 spc_done(sc, acb); 375 } 376 while ((acb = sc->nexus_list.tqh_first) != NULL) { 377 acb->xs->error = XS_DRIVER_STUFFUP; 378 callout_stop(&acb->xs->xs_callout); 379 spc_done(sc, acb); 380 } 381 } 382 383 sc->sc_prevphase = PH_INVALID; 384 for (r = 0; r < 8; r++) { 385 struct spc_tinfo *ti = &sc->sc_tinfo[r]; 386 387 ti->flags = 0; 388 #if SPC_USE_SYNCHRONOUS 389 ti->flags |= DO_SYNC; 390 ti->period = sc->sc_minsync; 391 ti->offset = SPC_SYNC_REQ_ACK_OFS; 392 #else 393 ti->period = ti->offset = 0; 394 #endif 395 #if SPC_USE_WIDE 396 ti->flags |= DO_WIDE; 397 ti->width = SPC_MAX_WIDTH; 398 #else 399 ti->width = 0; 400 #endif 401 } 402 403 sc->sc_state = SPC_IDLE; 404 bus_space_write_1(sc->sc_iot, sc->sc_ioh, SCTL, 405 bus_space_read_1(sc->sc_iot, sc->sc_ioh, SCTL) | SCTL_INTR_ENAB); 406 } 407 408 void 409 spc_free_acb(sc, acb, flags) 410 struct spc_softc *sc; 411 struct spc_acb *acb; 412 int flags; 413 { 414 int s; 415 416 SPC_TRACE(("spc_free_acb ")); 417 s = splbio(); 418 419 acb->flags = 0; 420 TAILQ_INSERT_HEAD(&sc->free_list, acb, chain); 421 splx(s); 422 } 423 424 struct spc_acb * 425 spc_get_acb(sc) 426 struct spc_softc *sc; 427 { 428 struct spc_acb *acb; 429 int s; 430 431 SPC_TRACE(("spc_get_acb ")); 432 s = splbio(); 433 acb = TAILQ_FIRST(&sc->free_list); 434 if (acb != NULL) { 435 TAILQ_REMOVE(&sc->free_list, acb, chain); 436 acb->flags |= ACB_ALLOC; 437 } 438 splx(s); 439 return acb; 440 } 441 442 /* 443 * DRIVER FUNCTIONS CALLABLE FROM HIGHER LEVEL DRIVERS 444 */ 445 446 /* 447 * Expected sequence: 448 * 1) Command inserted into ready list 449 * 2) Command selected for execution 450 * 3) Command won arbitration and has selected target device 451 * 4) Send message out (identify message, eventually also sync.negotiations) 452 * 5) Send command 453 * 5a) Receive disconnect message, disconnect. 454 * 5b) Reselected by target 455 * 5c) Receive identify message from target. 456 * 6) Send or receive data 457 * 7) Receive status 458 * 8) Receive message (command complete etc.) 459 */ 460 461 /* 462 * Start a SCSI-command 463 * This function is called by the higher level SCSI-driver to queue/run 464 * SCSI-commands. 465 */ 466 void 467 spc_scsipi_request(chan, req, arg) 468 struct scsipi_channel *chan; 469 scsipi_adapter_req_t req; 470 void *arg; 471 { 472 struct scsipi_xfer *xs; 473 struct scsipi_periph *periph; 474 struct spc_softc *sc = (void *)chan->chan_adapter->adapt_dev; 475 struct spc_acb *acb; 476 int s, flags; 477 478 switch (req) { 479 case ADAPTER_REQ_RUN_XFER: 480 xs = arg; 481 periph = xs->xs_periph; 482 SPC_TRACE(("spc_scsipi_request ")); 483 SPC_CMDS(("[0x%x, %d]->%d ", (int)xs->cmd->opcode, xs->cmdlen, 484 periph->periph_target)); 485 486 flags = xs->xs_control; 487 if ((acb = spc_get_acb(sc)) == NULL) { 488 xs->error = XS_DRIVER_STUFFUP; 489 scsipi_done(xs); 490 return; 491 } 492 493 /* Initialize acb */ 494 acb->xs = xs; 495 acb->timeout = xs->timeout; 496 497 if (xs->xs_control & XS_CTL_RESET) { 498 acb->flags |= ACB_RESET; 499 acb->scsipi_cmd_length = 0; 500 acb->data_length = 0; 501 } else { 502 memcpy(&acb->scsipi_cmd, xs->cmd, xs->cmdlen); 503 #if 1 504 acb->scsipi_cmd.bytes[0] |= periph->periph_lun << 5; /* XXX? */ 505 #endif 506 acb->scsipi_cmd_length = xs->cmdlen; 507 acb->data_addr = xs->data; 508 acb->data_length = xs->datalen; 509 } 510 acb->target_stat = 0; 511 512 s = splbio(); 513 514 TAILQ_INSERT_TAIL(&sc->ready_list, acb, chain); 515 /* 516 * Start scheduling unless a queue process is in progress. 517 */ 518 if (sc->sc_state == SPC_IDLE) 519 spc_sched(sc); 520 /* 521 * After successful sending, check if we should return just now. 522 * If so, return SUCCESSFULLY_QUEUED. 523 */ 524 525 splx(s); 526 527 if ((flags & XS_CTL_POLL) == 0) 528 return; 529 530 /* Not allowed to use interrupts, use polling instead */ 531 s = splbio(); 532 if (spc_poll(sc, xs, acb->timeout)) { 533 spc_timeout(acb); 534 if (spc_poll(sc, xs, acb->timeout)) 535 spc_timeout(acb); 536 } 537 splx(s); 538 return; 539 case ADAPTER_REQ_GROW_RESOURCES: 540 /* XXX Not supported. */ 541 return; 542 case ADAPTER_REQ_SET_XFER_MODE: 543 /* XXX Not supported. */ 544 return; 545 } 546 } 547 548 /* 549 * Adjust transfer size in buffer structure 550 */ 551 void 552 spc_minphys(bp) 553 struct buf *bp; 554 { 555 556 SPC_TRACE(("spc_minphys ")); 557 minphys(bp); 558 } 559 560 /* 561 * Used when interrupt driven I/O isn't allowed, e.g. during boot. 562 */ 563 int 564 spc_poll(sc, xs, count) 565 struct spc_softc *sc; 566 struct scsipi_xfer *xs; 567 int count; 568 { 569 bus_space_tag_t iot = sc->sc_iot; 570 bus_space_handle_t ioh = sc->sc_ioh; 571 572 SPC_TRACE(("spc_poll ")); 573 while (count) { 574 /* 575 * If we had interrupts enabled, would we 576 * have got an interrupt? 577 */ 578 if (bus_space_read_1(iot, ioh, INTS) != 0) 579 spcintr(sc); 580 if ((xs->xs_status & XS_STS_DONE) != 0) 581 return 0; 582 delay(1000); 583 count--; 584 } 585 return 1; 586 } 587 588 /* 589 * LOW LEVEL SCSI UTILITIES 590 */ 591 592 integrate void 593 spc_sched_msgout(sc, m) 594 struct spc_softc *sc; 595 u_char m; 596 { 597 bus_space_tag_t iot = sc->sc_iot; 598 bus_space_handle_t ioh = sc->sc_ioh; 599 600 SPC_TRACE(("spc_sched_msgout ")); 601 if (sc->sc_msgpriq == 0) 602 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN); 603 sc->sc_msgpriq |= m; 604 } 605 606 /* 607 * Set synchronous transfer offset and period. 608 */ 609 integrate void 610 spc_setsync(sc, ti) 611 struct spc_softc *sc; 612 struct spc_tinfo *ti; 613 { 614 #if SPC_USE_SYNCHRONOUS 615 bus_space_tag_t iot = sc->sc_iot; 616 bus_space_handle_t ioh = sc->sc_ioh; 617 618 SPC_TRACE(("spc_setsync ")); 619 if (ti->offset != 0) 620 bus_space_write_1(iot, ioh, TMOD, 621 ((ti->period * sc->sc_freq) / 250 - 2) << 4 | ti->offset); 622 else 623 bus_space_write_1(iot, ioh, TMOD, 0); 624 #endif 625 } 626 627 /* 628 * Start a selection. This is used by spc_sched() to select an idle target. 629 */ 630 void 631 spc_select(sc, acb) 632 struct spc_softc *sc; 633 struct spc_acb *acb; 634 { 635 struct scsipi_periph *periph = acb->xs->xs_periph; 636 int target = periph->periph_target; 637 struct spc_tinfo *ti = &sc->sc_tinfo[target]; 638 bus_space_tag_t iot = sc->sc_iot; 639 bus_space_handle_t ioh = sc->sc_ioh; 640 641 SPC_TRACE(("spc_select ")); 642 spc_setsync(sc, ti); 643 644 #if 0 645 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN); 646 #endif 647 #ifdef x68k /* XXX? */ 648 do { 649 asm ("nop"); 650 } while (bus_space_read_1(iot, ioh, SSTS) & 651 (SSTS_ACTIVE|SSTS_TARGET|SSTS_BUSY)); 652 #endif 653 654 bus_space_write_1(iot, ioh, PCTL, 0); 655 bus_space_write_1(iot, ioh, TEMP, (1 << sc->sc_initiator) | (1 << target)); 656 /* 657 * Setup BSY timeout (selection timeout). 658 * 250ms according to the SCSI specification. 659 * T = (X * 256 + 15) * Tclf * 2 (Tclf = 200ns on x68k) 660 * To setup 256ms timeout, 661 * 128000ns/200ns = X * 256 + 15 662 * 640 - 15 = X * 256 663 * X = 625 / 256 664 * X = 2 + 113 / 256 665 * ==> tch = 2, tcm = 113 (correct?) 666 */ 667 bus_space_write_1(iot, ioh, TCH, 2); 668 bus_space_write_1(iot, ioh, TCM, 113); 669 /* Time to the information transfer phase start. */ 670 bus_space_write_1(iot, ioh, TCL, 3); 671 bus_space_write_1(iot, ioh, SCMD, SCMD_SELECT); 672 673 sc->sc_state = SPC_SELECTING; 674 } 675 676 int 677 spc_reselect(sc, message) 678 struct spc_softc *sc; 679 int message; 680 { 681 u_char selid, target, lun; 682 struct spc_acb *acb; 683 struct scsipi_periph *periph; 684 struct spc_tinfo *ti; 685 686 SPC_TRACE(("spc_reselect ")); 687 /* 688 * The SCSI chip made a snapshot of the data bus while the reselection 689 * was being negotiated. This enables us to determine which target did 690 * the reselect. 691 */ 692 selid = sc->sc_selid & ~(1 << sc->sc_initiator); 693 if (selid & (selid - 1)) { 694 printf("%s: reselect with invalid selid %02x; sending DEVICE RESET\n", 695 sc->sc_dev.dv_xname, selid); 696 SPC_BREAK(); 697 goto reset; 698 } 699 700 /* 701 * Search wait queue for disconnected cmd 702 * The list should be short, so I haven't bothered with 703 * any more sophisticated structures than a simple 704 * singly linked list. 705 */ 706 target = ffs(selid) - 1; 707 lun = message & 0x07; 708 for (acb = sc->nexus_list.tqh_first; acb != NULL; 709 acb = acb->chain.tqe_next) { 710 periph = acb->xs->xs_periph; 711 if (periph->periph_target == target && 712 periph->periph_lun == lun) 713 break; 714 } 715 if (acb == NULL) { 716 printf("%s: reselect from target %d lun %d with no nexus; sending ABORT\n", 717 sc->sc_dev.dv_xname, target, lun); 718 SPC_BREAK(); 719 goto abort; 720 } 721 722 /* Make this nexus active again. */ 723 TAILQ_REMOVE(&sc->nexus_list, acb, chain); 724 sc->sc_state = SPC_CONNECTED; 725 sc->sc_nexus = acb; 726 ti = &sc->sc_tinfo[target]; 727 ti->lubusy |= (1 << lun); 728 spc_setsync(sc, ti); 729 730 if (acb->flags & ACB_RESET) 731 spc_sched_msgout(sc, SEND_DEV_RESET); 732 else if (acb->flags & ACB_ABORT) 733 spc_sched_msgout(sc, SEND_ABORT); 734 735 /* Do an implicit RESTORE POINTERS. */ 736 sc->sc_dp = acb->data_addr; 737 sc->sc_dleft = acb->data_length; 738 sc->sc_cp = (u_char *)&acb->scsipi_cmd; 739 sc->sc_cleft = acb->scsipi_cmd_length; 740 741 return (0); 742 743 reset: 744 spc_sched_msgout(sc, SEND_DEV_RESET); 745 return (1); 746 747 abort: 748 spc_sched_msgout(sc, SEND_ABORT); 749 return (1); 750 } 751 752 /* 753 * Schedule a SCSI operation. This has now been pulled out of the interrupt 754 * handler so that we may call it from spc_scsi_cmd and spc_done. This may 755 * save us an unecessary interrupt just to get things going. Should only be 756 * called when state == SPC_IDLE and at bio pl. 757 */ 758 void 759 spc_sched(sc) 760 struct spc_softc *sc; 761 { 762 struct spc_acb *acb; 763 struct scsipi_periph *periph; 764 struct spc_tinfo *ti; 765 766 /* missing the hw, just return and wait for our hw */ 767 if (sc->sc_flags & SPC_INACTIVE) 768 return; 769 SPC_TRACE(("spc_sched ")); 770 /* 771 * Find first acb in ready queue that is for a target/lunit pair that 772 * is not busy. 773 */ 774 for (acb = sc->ready_list.tqh_first; acb != NULL; 775 acb = acb->chain.tqe_next) { 776 periph = acb->xs->xs_periph; 777 ti = &sc->sc_tinfo[periph->periph_target]; 778 if ((ti->lubusy & (1 << periph->periph_lun)) == 0) { 779 SPC_MISC(("selecting %d:%d ", 780 periph->periph_target, periph->periph_lun)); 781 TAILQ_REMOVE(&sc->ready_list, acb, chain); 782 sc->sc_nexus = acb; 783 spc_select(sc, acb); 784 return; 785 } else 786 SPC_MISC(("%d:%d busy\n", 787 periph->periph_target, periph->periph_lun)); 788 } 789 SPC_MISC(("idle ")); 790 /* Nothing to start; just enable reselections and wait. */ 791 } 792 793 /* 794 * POST PROCESSING OF SCSI_CMD (usually current) 795 */ 796 void 797 spc_done(sc, acb) 798 struct spc_softc *sc; 799 struct spc_acb *acb; 800 { 801 struct scsipi_xfer *xs = acb->xs; 802 struct scsipi_periph *periph = xs->xs_periph; 803 struct spc_tinfo *ti = &sc->sc_tinfo[periph->periph_target]; 804 805 SPC_TRACE(("spc_done ")); 806 807 if (xs->error == XS_NOERROR) { 808 if (acb->flags & ACB_ABORT) { 809 xs->error = XS_DRIVER_STUFFUP; 810 } else { 811 switch (acb->target_stat) { 812 case SCSI_CHECK: 813 /* First, save the return values */ 814 xs->resid = acb->data_length; 815 /* FALLBACK */ 816 case SCSI_BUSY: 817 xs->status = acb->target_stat; 818 xs->error = XS_BUSY; 819 break; 820 case SCSI_OK: 821 xs->resid = acb->data_length; 822 break; 823 default: 824 xs->error = XS_DRIVER_STUFFUP; 825 #if SPC_DEBUG 826 printf("%s: spc_done: bad stat 0x%x\n", 827 sc->sc_dev.dv_xname, acb->target_stat); 828 #endif 829 break; 830 } 831 } 832 } 833 834 #if SPC_DEBUG 835 if ((spc_debug & SPC_SHOWMISC) != 0) { 836 if (xs->resid != 0) 837 printf("resid=%d ", xs->resid); 838 else 839 printf("error=%d\n", xs->error); 840 } 841 #endif 842 843 /* 844 * Remove the ACB from whatever queue it happens to be on. 845 */ 846 if (acb->flags & ACB_NEXUS) 847 ti->lubusy &= ~(1 << periph->periph_lun); 848 if (acb == sc->sc_nexus) { 849 sc->sc_nexus = NULL; 850 sc->sc_state = SPC_IDLE; 851 spc_sched(sc); 852 } else 853 spc_dequeue(sc, acb); 854 855 spc_free_acb(sc, acb, xs->xs_control); 856 ti->cmds++; 857 scsipi_done(xs); 858 } 859 860 void 861 spc_dequeue(sc, acb) 862 struct spc_softc *sc; 863 struct spc_acb *acb; 864 { 865 866 SPC_TRACE(("spc_dequeue ")); 867 if (acb->flags & ACB_NEXUS) { 868 TAILQ_REMOVE(&sc->nexus_list, acb, chain); 869 } else { 870 TAILQ_REMOVE(&sc->ready_list, acb, chain); 871 } 872 } 873 874 /* 875 * INTERRUPT/PROTOCOL ENGINE 876 */ 877 878 /* 879 * Precondition: 880 * The SCSI bus is already in the MSGI phase and there is a message byte 881 * on the bus, along with an asserted REQ signal. 882 */ 883 void 884 spc_msgin(sc) 885 struct spc_softc *sc; 886 { 887 bus_space_tag_t iot = sc->sc_iot; 888 bus_space_handle_t ioh = sc->sc_ioh; 889 int n; 890 891 SPC_TRACE(("spc_msgin ")); 892 893 if (sc->sc_prevphase == PH_MSGIN) { 894 /* This is a continuation of the previous message. */ 895 n = sc->sc_imp - sc->sc_imess; 896 goto nextbyte; 897 } 898 899 /* This is a new MESSAGE IN phase. Clean up our state. */ 900 sc->sc_flags &= ~SPC_DROP_MSGIN; 901 902 nextmsg: 903 n = 0; 904 sc->sc_imp = &sc->sc_imess[n]; 905 906 nextbyte: 907 /* 908 * Read a whole message, but don't ack the last byte. If we reject the 909 * message, we have to assert ATN during the message transfer phase 910 * itself. 911 */ 912 for (;;) { 913 #if 0 914 for (;;) { 915 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0) 916 break; 917 /* Wait for REQINIT. XXX Need timeout. */ 918 } 919 #endif 920 if (bus_space_read_1(iot, ioh, INTS) != 0) { 921 /* 922 * Target left MESSAGE IN, probably because it 923 * a) noticed our ATN signal, or 924 * b) ran out of messages. 925 */ 926 goto out; 927 } 928 929 /* If parity error, just dump everything on the floor. */ 930 if ((bus_space_read_1(iot, ioh, SERR) & 931 (SERR_SCSI_PAR|SERR_SPC_PAR)) != 0) { 932 sc->sc_flags |= SPC_DROP_MSGIN; 933 spc_sched_msgout(sc, SEND_PARITY_ERROR); 934 } 935 936 /* send TRANSFER command. */ 937 bus_space_write_1(iot, ioh, TCH, 0); 938 bus_space_write_1(iot, ioh, TCM, 0); 939 bus_space_write_1(iot, ioh, TCL, 1); 940 bus_space_write_1(iot, ioh, PCTL, 941 sc->sc_phase | PCTL_BFINT_ENAB); 942 #ifdef x68k 943 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* | SCMD_PROG_XFR */ 944 #else 945 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR); /* XXX */ 946 #endif 947 for (;;) { 948 /*if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0 949 && (bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) != 0)*/ 950 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) == 0) 951 break; 952 if (bus_space_read_1(iot, ioh, INTS) != 0) 953 goto out; 954 } 955 956 /* Gather incoming message bytes if needed. */ 957 if ((sc->sc_flags & SPC_DROP_MSGIN) == 0) { 958 if (n >= SPC_MAX_MSG_LEN) { 959 (void) bus_space_read_1(iot, ioh, DREG); 960 sc->sc_flags |= SPC_DROP_MSGIN; 961 spc_sched_msgout(sc, SEND_REJECT); 962 } else { 963 *sc->sc_imp++ = bus_space_read_1(iot, ioh, DREG); 964 n++; 965 /* 966 * This testing is suboptimal, but most 967 * messages will be of the one byte variety, so 968 * it should not affect performance 969 * significantly. 970 */ 971 if (n == 1 && MSG_IS1BYTE(sc->sc_imess[0])) 972 break; 973 if (n == 2 && MSG_IS2BYTE(sc->sc_imess[0])) 974 break; 975 if (n >= 3 && MSG_ISEXTENDED(sc->sc_imess[0]) && 976 n == sc->sc_imess[1] + 2) 977 break; 978 } 979 } else 980 (void) bus_space_read_1(iot, ioh, DREG); 981 982 /* 983 * If we reach this spot we're either: 984 * a) in the middle of a multi-byte message, or 985 * b) dropping bytes. 986 */ 987 #if 0 988 /* Ack the last byte read. */ 989 /*(void) bus_space_read_1(iot, ioh, DREG);*/ 990 while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0) 991 ; 992 #endif 993 } 994 995 SPC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0])); 996 997 /* We now have a complete message. Parse it. */ 998 switch (sc->sc_state) { 999 struct spc_acb *acb; 1000 struct scsipi_periph *periph; 1001 struct spc_tinfo *ti; 1002 1003 case SPC_CONNECTED: 1004 SPC_ASSERT(sc->sc_nexus != NULL); 1005 acb = sc->sc_nexus; 1006 ti = &sc->sc_tinfo[acb->xs->xs_periph->periph_target]; 1007 1008 switch (sc->sc_imess[0]) { 1009 case MSG_CMDCOMPLETE: 1010 if (sc->sc_dleft < 0) { 1011 periph = acb->xs->xs_periph; 1012 printf("%s: %d extra bytes from %d:%d\n", 1013 sc->sc_dev.dv_xname, -sc->sc_dleft, 1014 periph->periph_target, periph->periph_lun); 1015 acb->data_length = 0; 1016 } 1017 acb->xs->resid = acb->data_length = sc->sc_dleft; 1018 sc->sc_state = SPC_CMDCOMPLETE; 1019 break; 1020 1021 case MSG_PARITY_ERROR: 1022 /* Resend the last message. */ 1023 spc_sched_msgout(sc, sc->sc_lastmsg); 1024 break; 1025 1026 case MSG_MESSAGE_REJECT: 1027 SPC_MISC(("message rejected %02x ", sc->sc_lastmsg)); 1028 switch (sc->sc_lastmsg) { 1029 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE 1030 case SEND_IDENTIFY: 1031 ti->flags &= ~(DO_SYNC | DO_WIDE); 1032 ti->period = ti->offset = 0; 1033 spc_setsync(sc, ti); 1034 ti->width = 0; 1035 break; 1036 #endif 1037 #if SPC_USE_SYNCHRONOUS 1038 case SEND_SDTR: 1039 ti->flags &= ~DO_SYNC; 1040 ti->period = ti->offset = 0; 1041 spc_setsync(sc, ti); 1042 break; 1043 #endif 1044 #if SPC_USE_WIDE 1045 case SEND_WDTR: 1046 ti->flags &= ~DO_WIDE; 1047 ti->width = 0; 1048 break; 1049 #endif 1050 case SEND_INIT_DET_ERR: 1051 spc_sched_msgout(sc, SEND_ABORT); 1052 break; 1053 } 1054 break; 1055 1056 case MSG_NOOP: 1057 break; 1058 1059 case MSG_DISCONNECT: 1060 ti->dconns++; 1061 sc->sc_state = SPC_DISCONNECT; 1062 break; 1063 1064 case MSG_SAVEDATAPOINTER: 1065 acb->data_addr = sc->sc_dp; 1066 acb->data_length = sc->sc_dleft; 1067 break; 1068 1069 case MSG_RESTOREPOINTERS: 1070 sc->sc_dp = acb->data_addr; 1071 sc->sc_dleft = acb->data_length; 1072 sc->sc_cp = (u_char *)&acb->scsipi_cmd; 1073 sc->sc_cleft = acb->scsipi_cmd_length; 1074 break; 1075 1076 case MSG_EXTENDED: 1077 switch (sc->sc_imess[2]) { 1078 #if SPC_USE_SYNCHRONOUS 1079 case MSG_EXT_SDTR: 1080 if (sc->sc_imess[1] != 3) 1081 goto reject; 1082 ti->period = sc->sc_imess[3]; 1083 ti->offset = sc->sc_imess[4]; 1084 ti->flags &= ~DO_SYNC; 1085 if (ti->offset == 0) { 1086 } else if (ti->period < sc->sc_minsync || 1087 ti->period > sc->sc_maxsync || 1088 ti->offset > 8) { 1089 ti->period = ti->offset = 0; 1090 spc_sched_msgout(sc, SEND_SDTR); 1091 } else { 1092 scsipi_printaddr(acb->xs->xs_periph); 1093 printf("sync, offset %d, period %dnsec\n", 1094 ti->offset, ti->period * 4); 1095 } 1096 spc_setsync(sc, ti); 1097 break; 1098 #endif 1099 1100 #if SPC_USE_WIDE 1101 case MSG_EXT_WDTR: 1102 if (sc->sc_imess[1] != 2) 1103 goto reject; 1104 ti->width = sc->sc_imess[3]; 1105 ti->flags &= ~DO_WIDE; 1106 if (ti->width == 0) { 1107 } else if (ti->width > SPC_MAX_WIDTH) { 1108 ti->width = 0; 1109 spc_sched_msgout(sc, SEND_WDTR); 1110 } else { 1111 scsipi_printaddr(acb->xs->xs_periph); 1112 printf("wide, width %d\n", 1113 1 << (3 + ti->width)); 1114 } 1115 break; 1116 #endif 1117 1118 default: 1119 printf("%s: unrecognized MESSAGE EXTENDED; sending REJECT\n", 1120 sc->sc_dev.dv_xname); 1121 SPC_BREAK(); 1122 goto reject; 1123 } 1124 break; 1125 1126 default: 1127 printf("%s: unrecognized MESSAGE; sending REJECT\n", 1128 sc->sc_dev.dv_xname); 1129 SPC_BREAK(); 1130 reject: 1131 spc_sched_msgout(sc, SEND_REJECT); 1132 break; 1133 } 1134 break; 1135 1136 case SPC_RESELECTED: 1137 if (!MSG_ISIDENTIFY(sc->sc_imess[0])) { 1138 printf("%s: reselect without IDENTIFY; sending DEVICE RESET\n", 1139 sc->sc_dev.dv_xname); 1140 SPC_BREAK(); 1141 goto reset; 1142 } 1143 1144 (void) spc_reselect(sc, sc->sc_imess[0]); 1145 break; 1146 1147 default: 1148 printf("%s: unexpected MESSAGE IN; sending DEVICE RESET\n", 1149 sc->sc_dev.dv_xname); 1150 SPC_BREAK(); 1151 reset: 1152 spc_sched_msgout(sc, SEND_DEV_RESET); 1153 break; 1154 1155 #ifdef notdef 1156 abort: 1157 spc_sched_msgout(sc, SEND_ABORT); 1158 break; 1159 #endif 1160 } 1161 1162 /* Ack the last message byte. */ 1163 #if 0 /* XXX? */ 1164 (void) bus_space_read_1(iot, ioh, DREG); 1165 while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0) 1166 ; 1167 #endif 1168 1169 /* Go get the next message, if any. */ 1170 goto nextmsg; 1171 1172 out: 1173 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ACK); 1174 SPC_MISC(("n=%d imess=0x%02x ", n, sc->sc_imess[0])); 1175 } 1176 1177 /* 1178 * Send the highest priority, scheduled message. 1179 */ 1180 void 1181 spc_msgout(sc) 1182 struct spc_softc *sc; 1183 { 1184 bus_space_tag_t iot = sc->sc_iot; 1185 bus_space_handle_t ioh = sc->sc_ioh; 1186 #if SPC_USE_SYNCHRONOUS 1187 struct spc_tinfo *ti; 1188 #endif 1189 int n; 1190 1191 SPC_TRACE(("spc_msgout ")); 1192 1193 if (sc->sc_prevphase == PH_MSGOUT) { 1194 if (sc->sc_omp == sc->sc_omess) { 1195 /* 1196 * This is a retransmission. 1197 * 1198 * We get here if the target stayed in MESSAGE OUT 1199 * phase. Section 5.1.9.2 of the SCSI 2 spec indicates 1200 * that all of the previously transmitted messages must 1201 * be sent again, in the same order. Therefore, we 1202 * requeue all the previously transmitted messages, and 1203 * start again from the top. Our simple priority 1204 * scheme keeps the messages in the right order. 1205 */ 1206 SPC_MISC(("retransmitting ")); 1207 sc->sc_msgpriq |= sc->sc_msgoutq; 1208 /* 1209 * Set ATN. If we're just sending a trivial 1-byte 1210 * message, we'll clear ATN later on anyway. 1211 */ 1212 bus_space_write_1(iot, ioh, SCMD, SCMD_SET_ATN); /* XXX? */ 1213 } else { 1214 /* This is a continuation of the previous message. */ 1215 n = sc->sc_omp - sc->sc_omess; 1216 goto nextbyte; 1217 } 1218 } 1219 1220 /* No messages transmitted so far. */ 1221 sc->sc_msgoutq = 0; 1222 sc->sc_lastmsg = 0; 1223 1224 nextmsg: 1225 /* Pick up highest priority message. */ 1226 sc->sc_currmsg = sc->sc_msgpriq & -sc->sc_msgpriq; 1227 sc->sc_msgpriq &= ~sc->sc_currmsg; 1228 sc->sc_msgoutq |= sc->sc_currmsg; 1229 1230 /* Build the outgoing message data. */ 1231 switch (sc->sc_currmsg) { 1232 case SEND_IDENTIFY: 1233 SPC_ASSERT(sc->sc_nexus != NULL); 1234 sc->sc_omess[0] = 1235 MSG_IDENTIFY(sc->sc_nexus->xs->xs_periph->periph_lun, 1); 1236 n = 1; 1237 break; 1238 1239 #if SPC_USE_SYNCHRONOUS 1240 case SEND_SDTR: 1241 SPC_ASSERT(sc->sc_nexus != NULL); 1242 ti = &sc->sc_tinfo[sc->sc_nexus->xs->xs_periph->periph_target]; 1243 sc->sc_omess[4] = MSG_EXTENDED; 1244 sc->sc_omess[3] = 3; 1245 sc->sc_omess[2] = MSG_EXT_SDTR; 1246 sc->sc_omess[1] = ti->period >> 2; 1247 sc->sc_omess[0] = ti->offset; 1248 n = 5; 1249 break; 1250 #endif 1251 1252 #if SPC_USE_WIDE 1253 case SEND_WDTR: 1254 SPC_ASSERT(sc->sc_nexus != NULL); 1255 ti = &sc->sc_tinfo[sc->sc_nexus->xs->xs_periph->periph_target]; 1256 sc->sc_omess[3] = MSG_EXTENDED; 1257 sc->sc_omess[2] = 2; 1258 sc->sc_omess[1] = MSG_EXT_WDTR; 1259 sc->sc_omess[0] = ti->width; 1260 n = 4; 1261 break; 1262 #endif 1263 1264 case SEND_DEV_RESET: 1265 sc->sc_flags |= SPC_ABORTING; 1266 sc->sc_omess[0] = MSG_BUS_DEV_RESET; 1267 n = 1; 1268 break; 1269 1270 case SEND_REJECT: 1271 sc->sc_omess[0] = MSG_MESSAGE_REJECT; 1272 n = 1; 1273 break; 1274 1275 case SEND_PARITY_ERROR: 1276 sc->sc_omess[0] = MSG_PARITY_ERROR; 1277 n = 1; 1278 break; 1279 1280 case SEND_INIT_DET_ERR: 1281 sc->sc_omess[0] = MSG_INITIATOR_DET_ERR; 1282 n = 1; 1283 break; 1284 1285 case SEND_ABORT: 1286 sc->sc_flags |= SPC_ABORTING; 1287 sc->sc_omess[0] = MSG_ABORT; 1288 n = 1; 1289 break; 1290 1291 default: 1292 printf("%s: unexpected MESSAGE OUT; sending NOOP\n", 1293 sc->sc_dev.dv_xname); 1294 SPC_BREAK(); 1295 sc->sc_omess[0] = MSG_NOOP; 1296 n = 1; 1297 break; 1298 } 1299 sc->sc_omp = &sc->sc_omess[n]; 1300 1301 nextbyte: 1302 /* Send message bytes. */ 1303 /* send TRANSFER command. */ 1304 bus_space_write_1(iot, ioh, TCH, n >> 16); 1305 bus_space_write_1(iot, ioh, TCM, n >> 8); 1306 bus_space_write_1(iot, ioh, TCL, n); 1307 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB); 1308 #ifdef x68k 1309 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */ 1310 #else 1311 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR | SCMD_ICPT_XFR); 1312 #endif 1313 for (;;) { 1314 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0) 1315 break; 1316 if (bus_space_read_1(iot, ioh, INTS) != 0) 1317 goto out; 1318 } 1319 for (;;) { 1320 #if 0 1321 for (;;) { 1322 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) != 0) 1323 break; 1324 /* Wait for REQINIT. XXX Need timeout. */ 1325 } 1326 #endif 1327 if (bus_space_read_1(iot, ioh, INTS) != 0) { 1328 /* 1329 * Target left MESSAGE OUT, possibly to reject 1330 * our message. 1331 * 1332 * If this is the last message being sent, then we 1333 * deassert ATN, since either the target is going to 1334 * ignore this message, or it's going to ask for a 1335 * retransmission via MESSAGE PARITY ERROR (in which 1336 * case we reassert ATN anyway). 1337 */ 1338 #if 0 1339 if (sc->sc_msgpriq == 0) 1340 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN); 1341 #endif 1342 goto out; 1343 } 1344 1345 #if 0 1346 /* Clear ATN before last byte if this is the last message. */ 1347 if (n == 1 && sc->sc_msgpriq == 0) 1348 bus_space_write_1(iot, ioh, SCMD, SCMD_RST_ATN); 1349 #endif 1350 1351 while ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_FULL) != 0) 1352 ; 1353 /* Send message byte. */ 1354 bus_space_write_1(iot, ioh, DREG, *--sc->sc_omp); 1355 --n; 1356 /* Keep track of the last message we've sent any bytes of. */ 1357 sc->sc_lastmsg = sc->sc_currmsg; 1358 #if 0 1359 /* Wait for ACK to be negated. XXX Need timeout. */ 1360 while ((bus_space_read_1(iot, ioh, PSNS) & ACKI) != 0) 1361 ; 1362 #endif 1363 1364 if (n == 0) 1365 break; 1366 } 1367 1368 /* We get here only if the entire message has been transmitted. */ 1369 if (sc->sc_msgpriq != 0) { 1370 /* There are more outgoing messages. */ 1371 goto nextmsg; 1372 } 1373 1374 /* 1375 * The last message has been transmitted. We need to remember the last 1376 * message transmitted (in case the target switches to MESSAGE IN phase 1377 * and sends a MESSAGE REJECT), and the list of messages transmitted 1378 * this time around (in case the target stays in MESSAGE OUT phase to 1379 * request a retransmit). 1380 */ 1381 1382 out: 1383 /* Disable REQ/ACK protocol. */ 1384 } 1385 1386 /* 1387 * spc_dataout_pio: perform a data transfer using the FIFO datapath in the spc 1388 * Precondition: The SCSI bus should be in the DOUT phase, with REQ asserted 1389 * and ACK deasserted (i.e. waiting for a data byte) 1390 * 1391 * This new revision has been optimized (I tried) to make the common case fast, 1392 * and the rarer cases (as a result) somewhat more comlex 1393 */ 1394 int 1395 spc_dataout_pio(sc, p, n) 1396 struct spc_softc *sc; 1397 u_char *p; 1398 int n; 1399 { 1400 bus_space_tag_t iot = sc->sc_iot; 1401 bus_space_handle_t ioh = sc->sc_ioh; 1402 u_char intstat = 0; 1403 int out = 0; 1404 #define DOUTAMOUNT 8 /* Full FIFO */ 1405 1406 SPC_TRACE(("spc_dataout_pio ")); 1407 /* send TRANSFER command. */ 1408 bus_space_write_1(iot, ioh, TCH, n >> 16); 1409 bus_space_write_1(iot, ioh, TCM, n >> 8); 1410 bus_space_write_1(iot, ioh, TCL, n); 1411 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB); 1412 #ifdef x68k 1413 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */ 1414 #else 1415 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR | SCMD_ICPT_XFR); /* XXX */ 1416 #endif 1417 for (;;) { 1418 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0) 1419 break; 1420 if (bus_space_read_1(iot, ioh, INTS) != 0) 1421 break; 1422 } 1423 1424 /* 1425 * I have tried to make the main loop as tight as possible. This 1426 * means that some of the code following the loop is a bit more 1427 * complex than otherwise. 1428 */ 1429 while (n > 0) { 1430 int xfer; 1431 1432 for (;;) { 1433 intstat = bus_space_read_1(iot, ioh, INTS); 1434 /* Wait till buffer is empty. */ 1435 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) != 0) 1436 break; 1437 /* Break on interrupt. */ 1438 if (intstat != 0) 1439 goto phasechange; 1440 } 1441 1442 xfer = min(DOUTAMOUNT, n); 1443 1444 SPC_MISC(("%d> ", xfer)); 1445 1446 n -= xfer; 1447 out += xfer; 1448 1449 while (xfer-- > 0) { 1450 bus_space_write_1(iot, ioh, DREG, *p++); 1451 } 1452 } 1453 1454 if (out == 0) { 1455 for (;;) { 1456 if (bus_space_read_1(iot, ioh, INTS) != 0) 1457 break; 1458 } 1459 SPC_MISC(("extra data ")); 1460 } else { 1461 /* See the bytes off chip */ 1462 for (;;) { 1463 /* Wait till buffer is empty. */ 1464 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_DREG_EMPTY) != 0) 1465 break; 1466 intstat = bus_space_read_1(iot, ioh, INTS); 1467 /* Break on interrupt. */ 1468 if (intstat != 0) 1469 goto phasechange; 1470 } 1471 } 1472 1473 phasechange: 1474 /* Stop the FIFO data path. */ 1475 1476 if (intstat != 0) { 1477 /* Some sort of phase change. */ 1478 int amount; 1479 1480 amount = ((bus_space_read_1(iot, ioh, TCH) << 16) | 1481 (bus_space_read_1(iot, ioh, TCM) << 8) | 1482 bus_space_read_1(iot, ioh, TCL)); 1483 if (amount > 0) { 1484 out -= amount; 1485 SPC_MISC(("+%d ", amount)); 1486 } 1487 } 1488 1489 /* Turn on ENREQINIT again. */ 1490 1491 return out; 1492 } 1493 1494 /* 1495 * spc_datain_pio: perform data transfers using the FIFO datapath in the spc 1496 * Precondition: The SCSI bus should be in the DIN phase, with REQ asserted 1497 * and ACK deasserted (i.e. at least one byte is ready). 1498 * 1499 * For now, uses a pretty dumb algorithm, hangs around until all data has been 1500 * transferred. This, is OK for fast targets, but not so smart for slow 1501 * targets which don't disconnect or for huge transfers. 1502 */ 1503 int 1504 spc_datain_pio(sc, p, n) 1505 struct spc_softc *sc; 1506 u_char *p; 1507 int n; 1508 { 1509 bus_space_tag_t iot = sc->sc_iot; 1510 bus_space_handle_t ioh = sc->sc_ioh; 1511 u_short intstat; 1512 int in = 0; 1513 #define DINAMOUNT 8 /* Full FIFO */ 1514 1515 SPC_TRACE(("spc_datain_pio ")); 1516 /* send TRANSFER command. */ 1517 bus_space_write_1(iot, ioh, TCH, n >> 16); 1518 bus_space_write_1(iot, ioh, TCM, n >> 8); 1519 bus_space_write_1(iot, ioh, TCL, n); 1520 bus_space_write_1(iot, ioh, PCTL, sc->sc_phase | PCTL_BFINT_ENAB); 1521 #ifdef x68k 1522 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR); /* XXX */ 1523 #else 1524 bus_space_write_1(iot, ioh, SCMD, SCMD_XFR | SCMD_PROG_XFR); /* XXX */ 1525 #endif 1526 for (;;) { 1527 if ((bus_space_read_1(iot, ioh, SSTS) & SSTS_BUSY) != 0) 1528 break; 1529 if (bus_space_read_1(iot, ioh, INTS) != 0) 1530 goto phasechange; 1531 } 1532 1533 /* 1534 * We leave this loop if one or more of the following is true: 1535 * a) phase != PH_DATAIN && FIFOs are empty 1536 * b) reset has occurred or busfree is detected. 1537 */ 1538 while (n > 0) { 1539 int xfer; 1540 1541 #define INTSMASK 0xff 1542 /* Wait for fifo half full or phase mismatch */ 1543 for (;;) { 1544 intstat = ((bus_space_read_1(iot, ioh, SSTS) << 8) | 1545 bus_space_read_1(iot, ioh, INTS)); 1546 if ((intstat & (INTSMASK | (SSTS_DREG_FULL << 8))) != 1547 0) 1548 break; 1549 if ((intstat & (SSTS_DREG_EMPTY << 8)) == 0) 1550 break; 1551 } 1552 1553 #if 1 1554 if ((intstat & INTSMASK) != 0) 1555 goto phasechange; 1556 #else 1557 if ((intstat & INTSMASK) != 0 && 1558 (intstat & (SSTS_DREG_EMPTY << 8))) 1559 goto phasechange; 1560 #endif 1561 if ((intstat & (SSTS_DREG_FULL << 8)) != 0) 1562 xfer = min(DINAMOUNT, n); 1563 else 1564 xfer = min(1, n); 1565 1566 SPC_MISC((">%d ", xfer)); 1567 1568 n -= xfer; 1569 in += xfer; 1570 1571 while (xfer-- > 0) { 1572 *p++ = bus_space_read_1(iot, ioh, DREG); 1573 } 1574 1575 if ((intstat & INTSMASK) != 0) 1576 goto phasechange; 1577 } 1578 1579 /* 1580 * Some SCSI-devices are rude enough to transfer more data than what 1581 * was requested, e.g. 2048 bytes from a CD-ROM instead of the 1582 * requested 512. Test for progress, i.e. real transfers. If no real 1583 * transfers have been performed (n is probably already zero) and the 1584 * FIFO is not empty, waste some bytes.... 1585 */ 1586 if (in == 0) { 1587 for (;;) { 1588 if (bus_space_read_1(iot, ioh, INTS) != 0) 1589 break; 1590 } 1591 SPC_MISC(("extra data ")); 1592 } 1593 1594 phasechange: 1595 /* Stop the FIFO data path. */ 1596 1597 /* Turn on ENREQINIT again. */ 1598 1599 return in; 1600 } 1601 1602 /* 1603 * Catch an interrupt from the adaptor 1604 */ 1605 /* 1606 * This is the workhorse routine of the driver. 1607 * Deficiencies (for now): 1608 * 1) always uses programmed I/O 1609 */ 1610 int 1611 spcintr(arg) 1612 void *arg; 1613 { 1614 struct spc_softc *sc = arg; 1615 bus_space_tag_t iot = sc->sc_iot; 1616 bus_space_handle_t ioh = sc->sc_ioh; 1617 u_char ints; 1618 struct spc_acb *acb; 1619 struct scsipi_periph *periph; 1620 struct spc_tinfo *ti; 1621 int n; 1622 1623 /* 1624 * Disable interrupt. 1625 */ 1626 bus_space_write_1(iot, ioh, SCTL, bus_space_read_1(iot, ioh, SCTL) & ~SCTL_INTR_ENAB); 1627 1628 SPC_TRACE(("spcintr ")); 1629 1630 loop: 1631 /* 1632 * Loop until transfer completion. 1633 */ 1634 /* 1635 * First check for abnormal conditions, such as reset. 1636 */ 1637 #ifdef x68k /* XXX? */ 1638 while ((ints = bus_space_read_1(iot, ioh, INTS)) == 0) 1639 delay(1); 1640 SPC_MISC(("ints = 0x%x ", ints)); 1641 #else 1642 ints = bus_space_read_1(iot, ioh, INTS); 1643 SPC_MISC(("ints = 0x%x ", ints)); 1644 #endif 1645 1646 if ((ints & INTS_RST) != 0) { 1647 printf("%s: SCSI bus reset\n", sc->sc_dev.dv_xname); 1648 goto reset; 1649 } 1650 1651 /* 1652 * Check for less serious errors. 1653 */ 1654 if ((bus_space_read_1(iot, ioh, SERR) & (SERR_SCSI_PAR|SERR_SPC_PAR)) != 0) { 1655 printf("%s: SCSI bus parity error\n", sc->sc_dev.dv_xname); 1656 if (sc->sc_prevphase == PH_MSGIN) { 1657 sc->sc_flags |= SPC_DROP_MSGIN; 1658 spc_sched_msgout(sc, SEND_PARITY_ERROR); 1659 } else 1660 spc_sched_msgout(sc, SEND_INIT_DET_ERR); 1661 } 1662 1663 /* 1664 * If we're not already busy doing something test for the following 1665 * conditions: 1666 * 1) We have been reselected by something 1667 * 2) We have selected something successfully 1668 * 3) Our selection process has timed out 1669 * 4) This is really a bus free interrupt just to get a new command 1670 * going? 1671 * 5) Spurious interrupt? 1672 */ 1673 switch (sc->sc_state) { 1674 case SPC_IDLE: 1675 case SPC_SELECTING: 1676 SPC_MISC(("ints:0x%02x ", ints)); 1677 1678 if ((ints & INTS_SEL) != 0) { 1679 /* 1680 * We don't currently support target mode. 1681 */ 1682 printf("%s: target mode selected; going to BUS FREE\n", 1683 sc->sc_dev.dv_xname); 1684 1685 goto sched; 1686 } else if ((ints & INTS_RESEL) != 0) { 1687 SPC_MISC(("reselected ")); 1688 1689 /* 1690 * If we're trying to select a target ourselves, 1691 * push our command back into the ready list. 1692 */ 1693 if (sc->sc_state == SPC_SELECTING) { 1694 SPC_MISC(("backoff selector ")); 1695 SPC_ASSERT(sc->sc_nexus != NULL); 1696 acb = sc->sc_nexus; 1697 sc->sc_nexus = NULL; 1698 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain); 1699 } 1700 1701 /* Save reselection ID. */ 1702 sc->sc_selid = bus_space_read_1(iot, ioh, TEMP); 1703 1704 sc->sc_state = SPC_RESELECTED; 1705 } else if ((ints & INTS_CMD_DONE) != 0) { 1706 SPC_MISC(("selected ")); 1707 1708 /* 1709 * We have selected a target. Things to do: 1710 * a) Determine what message(s) to send. 1711 * b) Verify that we're still selecting the target. 1712 * c) Mark device as busy. 1713 */ 1714 if (sc->sc_state != SPC_SELECTING) { 1715 printf("%s: selection out while idle; resetting\n", 1716 sc->sc_dev.dv_xname); 1717 SPC_BREAK(); 1718 goto reset; 1719 } 1720 SPC_ASSERT(sc->sc_nexus != NULL); 1721 acb = sc->sc_nexus; 1722 periph = acb->xs->xs_periph; 1723 ti = &sc->sc_tinfo[periph->periph_target]; 1724 1725 sc->sc_msgpriq = SEND_IDENTIFY; 1726 if (acb->flags & ACB_RESET) 1727 sc->sc_msgpriq |= SEND_DEV_RESET; 1728 else if (acb->flags & ACB_ABORT) 1729 sc->sc_msgpriq |= SEND_ABORT; 1730 else { 1731 #if SPC_USE_SYNCHRONOUS 1732 if ((ti->flags & DO_SYNC) != 0) 1733 sc->sc_msgpriq |= SEND_SDTR; 1734 #endif 1735 #if SPC_USE_WIDE 1736 if ((ti->flags & DO_WIDE) != 0) 1737 sc->sc_msgpriq |= SEND_WDTR; 1738 #endif 1739 } 1740 1741 acb->flags |= ACB_NEXUS; 1742 ti->lubusy |= (1 << periph->periph_lun); 1743 1744 /* Do an implicit RESTORE POINTERS. */ 1745 sc->sc_dp = acb->data_addr; 1746 sc->sc_dleft = acb->data_length; 1747 sc->sc_cp = (u_char *)&acb->scsipi_cmd; 1748 sc->sc_cleft = acb->scsipi_cmd_length; 1749 1750 /* On our first connection, schedule a timeout. */ 1751 if ((acb->xs->xs_control & XS_CTL_POLL) == 0) 1752 callout_reset(&acb->xs->xs_callout, 1753 (acb->timeout * hz) / 1000, 1754 spc_timeout, acb); 1755 1756 sc->sc_state = SPC_CONNECTED; 1757 } else if ((ints & INTS_TIMEOUT) != 0) { 1758 SPC_MISC(("selection timeout ")); 1759 1760 if (sc->sc_state != SPC_SELECTING) { 1761 printf("%s: selection timeout while idle; resetting\n", 1762 sc->sc_dev.dv_xname); 1763 SPC_BREAK(); 1764 goto reset; 1765 } 1766 SPC_ASSERT(sc->sc_nexus != NULL); 1767 acb = sc->sc_nexus; 1768 1769 delay(250); 1770 1771 acb->xs->error = XS_SELTIMEOUT; 1772 goto finish; 1773 } else { 1774 if (sc->sc_state != SPC_IDLE) { 1775 printf("%s: BUS FREE while not idle; state=%d\n", 1776 sc->sc_dev.dv_xname, sc->sc_state); 1777 SPC_BREAK(); 1778 goto out; 1779 } 1780 1781 goto sched; 1782 } 1783 1784 /* 1785 * Turn off selection stuff, and prepare to catch bus free 1786 * interrupts, parity errors, and phase changes. 1787 */ 1788 1789 sc->sc_flags = 0; 1790 sc->sc_prevphase = PH_INVALID; 1791 goto dophase; 1792 } 1793 1794 if ((ints & INTS_DISCON) != 0) { 1795 /* We've gone to BUS FREE phase. */ 1796 bus_space_write_1(iot, ioh, PCTL, 1797 bus_space_read_1(iot, ioh, PCTL) & ~PCTL_BFINT_ENAB); 1798 /* disable disconnect interrupt */ 1799 bus_space_write_1(iot, ioh, INTS, ints); 1800 /* XXX reset interrput */ 1801 1802 switch (sc->sc_state) { 1803 case SPC_RESELECTED: 1804 goto sched; 1805 1806 case SPC_CONNECTED: 1807 SPC_ASSERT(sc->sc_nexus != NULL); 1808 acb = sc->sc_nexus; 1809 1810 #if SPC_USE_SYNCHRONOUS + SPC_USE_WIDE 1811 if (sc->sc_prevphase == PH_MSGOUT) { 1812 /* 1813 * If the target went to BUS FREE phase during 1814 * or immediately after sending a SDTR or WDTR 1815 * message, disable negotiation. 1816 */ 1817 periph = acb->xs->xs_periph; 1818 ti = &sc->sc_tinfo[periph->periph_target]; 1819 switch (sc->sc_lastmsg) { 1820 #if SPC_USE_SYNCHRONOUS 1821 case SEND_SDTR: 1822 ti->flags &= ~DO_SYNC; 1823 ti->period = ti->offset = 0; 1824 break; 1825 #endif 1826 #if SPC_USE_WIDE 1827 case SEND_WDTR: 1828 ti->flags &= ~DO_WIDE; 1829 ti->width = 0; 1830 break; 1831 #endif 1832 } 1833 } 1834 #endif 1835 1836 if ((sc->sc_flags & SPC_ABORTING) == 0) { 1837 /* 1838 * Section 5.1.1 of the SCSI 2 spec suggests 1839 * issuing a REQUEST SENSE following an 1840 * unexpected disconnect. Some devices go into 1841 * a contingent allegiance condition when 1842 * disconnecting, and this is necessary to 1843 * clean up their state. 1844 */ 1845 printf("%s: unexpected disconnect; sending REQUEST SENSE\n", 1846 sc->sc_dev.dv_xname); 1847 SPC_BREAK(); 1848 acb->target_stat = SCSI_CHECK; 1849 acb->xs->error = XS_NOERROR; 1850 goto finish; 1851 } 1852 1853 acb->xs->error = XS_DRIVER_STUFFUP; 1854 goto finish; 1855 1856 case SPC_DISCONNECT: 1857 SPC_ASSERT(sc->sc_nexus != NULL); 1858 acb = sc->sc_nexus; 1859 TAILQ_INSERT_HEAD(&sc->nexus_list, acb, chain); 1860 sc->sc_nexus = NULL; 1861 goto sched; 1862 1863 case SPC_CMDCOMPLETE: 1864 SPC_ASSERT(sc->sc_nexus != NULL); 1865 acb = sc->sc_nexus; 1866 goto finish; 1867 } 1868 } 1869 else if ((ints & INTS_CMD_DONE) != 0 && 1870 sc->sc_prevphase == PH_MSGIN && sc->sc_state != SPC_CONNECTED) 1871 goto out; 1872 1873 dophase: 1874 #if 0 1875 if ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) { 1876 /* Wait for REQINIT. */ 1877 goto out; 1878 } 1879 #else 1880 bus_space_write_1(iot, ioh, INTS, ints); 1881 ints = 0; 1882 while ((bus_space_read_1(iot, ioh, PSNS) & PSNS_REQ) == 0) 1883 delay(1); /* need timeout XXX */ 1884 #endif 1885 1886 /* 1887 * State transition. 1888 */ 1889 sc->sc_phase = bus_space_read_1(iot, ioh, PSNS) & PH_MASK; 1890 /* bus_space_write_1(iot, ioh, PCTL, sc->sc_phase);*/ 1891 1892 SPC_MISC(("phase=%d\n", sc->sc_phase)); 1893 switch (sc->sc_phase) { 1894 case PH_MSGOUT: 1895 if (sc->sc_state != SPC_CONNECTED && 1896 sc->sc_state != SPC_RESELECTED) 1897 break; 1898 spc_msgout(sc); 1899 sc->sc_prevphase = PH_MSGOUT; 1900 goto loop; 1901 1902 case PH_MSGIN: 1903 if (sc->sc_state != SPC_CONNECTED && 1904 sc->sc_state != SPC_RESELECTED) 1905 break; 1906 spc_msgin(sc); 1907 sc->sc_prevphase = PH_MSGIN; 1908 goto loop; 1909 1910 case PH_CMD: 1911 if (sc->sc_state != SPC_CONNECTED) 1912 break; 1913 #if SPC_DEBUG 1914 if ((spc_debug & SPC_SHOWMISC) != 0) { 1915 SPC_ASSERT(sc->sc_nexus != NULL); 1916 acb = sc->sc_nexus; 1917 printf("cmd=0x%02x+%d ", 1918 acb->scsipi_cmd.opcode, acb->scsipi_cmd_length-1); 1919 } 1920 #endif 1921 n = spc_dataout_pio(sc, sc->sc_cp, sc->sc_cleft); 1922 sc->sc_cp += n; 1923 sc->sc_cleft -= n; 1924 sc->sc_prevphase = PH_CMD; 1925 goto loop; 1926 1927 case PH_DATAOUT: 1928 if (sc->sc_state != SPC_CONNECTED) 1929 break; 1930 SPC_MISC(("dataout dleft=%d ", sc->sc_dleft)); 1931 n = spc_dataout_pio(sc, sc->sc_dp, sc->sc_dleft); 1932 sc->sc_dp += n; 1933 sc->sc_dleft -= n; 1934 sc->sc_prevphase = PH_DATAOUT; 1935 goto loop; 1936 1937 case PH_DATAIN: 1938 if (sc->sc_state != SPC_CONNECTED) 1939 break; 1940 SPC_MISC(("datain ")); 1941 n = spc_datain_pio(sc, sc->sc_dp, sc->sc_dleft); 1942 sc->sc_dp += n; 1943 sc->sc_dleft -= n; 1944 sc->sc_prevphase = PH_DATAIN; 1945 goto loop; 1946 1947 case PH_STAT: 1948 if (sc->sc_state != SPC_CONNECTED) 1949 break; 1950 SPC_ASSERT(sc->sc_nexus != NULL); 1951 acb = sc->sc_nexus; 1952 /*acb->target_stat = bus_space_read_1(iot, ioh, DREG);*/ 1953 spc_datain_pio(sc, &acb->target_stat, 1); 1954 SPC_MISC(("target_stat=0x%02x ", acb->target_stat)); 1955 sc->sc_prevphase = PH_STAT; 1956 goto loop; 1957 } 1958 1959 printf("%s: unexpected bus phase; resetting\n", sc->sc_dev.dv_xname); 1960 SPC_BREAK(); 1961 reset: 1962 spc_init(sc); 1963 return 1; 1964 1965 finish: 1966 callout_stop(&acb->xs->xs_callout); 1967 bus_space_write_1(iot, ioh, INTS, ints); 1968 ints = 0; 1969 spc_done(sc, acb); 1970 goto out; 1971 1972 sched: 1973 sc->sc_state = SPC_IDLE; 1974 spc_sched(sc); 1975 goto out; 1976 1977 out: 1978 if (ints) 1979 bus_space_write_1(iot, ioh, INTS, ints); 1980 bus_space_write_1(iot, ioh, SCTL, 1981 bus_space_read_1(iot, ioh, SCTL) | SCTL_INTR_ENAB); 1982 return 1; 1983 } 1984 1985 void 1986 spc_abort(sc, acb) 1987 struct spc_softc *sc; 1988 struct spc_acb *acb; 1989 { 1990 1991 /* 2 secs for the abort */ 1992 acb->timeout = SPC_ABORT_TIMEOUT; 1993 acb->flags |= ACB_ABORT; 1994 1995 if (acb == sc->sc_nexus) { 1996 /* 1997 * If we're still selecting, the message will be scheduled 1998 * after selection is complete. 1999 */ 2000 if (sc->sc_state == SPC_CONNECTED) 2001 spc_sched_msgout(sc, SEND_ABORT); 2002 } else { 2003 spc_dequeue(sc, acb); 2004 TAILQ_INSERT_HEAD(&sc->ready_list, acb, chain); 2005 if (sc->sc_state == SPC_IDLE) 2006 spc_sched(sc); 2007 } 2008 } 2009 2010 void 2011 spc_timeout(arg) 2012 void *arg; 2013 { 2014 struct spc_acb *acb = arg; 2015 struct scsipi_xfer *xs = acb->xs; 2016 struct scsipi_periph *periph = xs->xs_periph; 2017 struct spc_softc *sc = (void*)periph->periph_channel->chan_adapter->adapt_dev; 2018 int s; 2019 2020 scsipi_printaddr(periph); 2021 printf("timed out"); 2022 2023 s = splbio(); 2024 2025 if (acb->flags & ACB_ABORT) { 2026 /* abort timed out */ 2027 printf(" AGAIN\n"); 2028 /* XXX Must reset! */ 2029 } else { 2030 /* abort the operation that has timed out */ 2031 printf("\n"); 2032 acb->xs->error = XS_TIMEOUT; 2033 spc_abort(sc, acb); 2034 } 2035 2036 splx(s); 2037 } 2038 2039 #ifdef SPC_DEBUG 2040 /* 2041 * The following functions are mostly used for debugging purposes, either 2042 * directly called from the driver or from the kernel debugger. 2043 */ 2044 2045 void 2046 spc_show_scsi_cmd(acb) 2047 struct spc_acb *acb; 2048 { 2049 u_char *b = (u_char *)&acb->scsipi_cmd; 2050 int i; 2051 2052 scsipi_printaddr(acb->xs->xs_periph); 2053 if ((acb->xs->xs_control & XS_CTL_RESET) == 0) { 2054 for (i = 0; i < acb->scsipi_cmd_length; i++) { 2055 if (i) 2056 printf(","); 2057 printf("%x", b[i]); 2058 } 2059 printf("\n"); 2060 } else 2061 printf("RESET\n"); 2062 } 2063 2064 void 2065 spc_print_acb(acb) 2066 struct spc_acb *acb; 2067 { 2068 2069 printf("acb@%p xs=%p flags=%x", acb, acb->xs, acb->flags); 2070 printf(" dp=%p dleft=%d target_stat=%x\n", 2071 acb->data_addr, acb->data_length, acb->target_stat); 2072 spc_show_scsi_cmd(acb); 2073 } 2074 2075 void 2076 spc_print_active_acb() 2077 { 2078 struct spc_acb *acb; 2079 struct spc_softc *sc = spc_cd.cd_devs[0]; /* XXX */ 2080 2081 printf("ready list:\n"); 2082 for (acb = sc->ready_list.tqh_first; acb != NULL; 2083 acb = acb->chain.tqe_next) 2084 spc_print_acb(acb); 2085 printf("nexus:\n"); 2086 if (sc->sc_nexus != NULL) 2087 spc_print_acb(sc->sc_nexus); 2088 printf("nexus list:\n"); 2089 for (acb = sc->nexus_list.tqh_first; acb != NULL; 2090 acb = acb->chain.tqe_next) 2091 spc_print_acb(acb); 2092 } 2093 2094 void 2095 spc_dump89352(sc) 2096 struct spc_softc *sc; 2097 { 2098 bus_space_tag_t iot = sc->sc_iot; 2099 bus_space_handle_t ioh = sc->sc_ioh; 2100 2101 printf("mb89352: BDID=%x SCTL=%x SCMD=%x TMOD=%x\n", 2102 bus_space_read_1(iot, ioh, BDID), 2103 bus_space_read_1(iot, ioh, SCTL), 2104 bus_space_read_1(iot, ioh, SCMD), 2105 bus_space_read_1(iot, ioh, TMOD)); 2106 printf(" INTS=%x PSNS=%x SSTS=%x SERR=%x PCTL=%x\n", 2107 bus_space_read_1(iot, ioh, INTS), 2108 bus_space_read_1(iot, ioh, PSNS), 2109 bus_space_read_1(iot, ioh, SSTS), 2110 bus_space_read_1(iot, ioh, SERR), 2111 bus_space_read_1(iot, ioh, PCTL)); 2112 printf(" MBC=%x DREG=%x TEMP=%x TCH=%x TCM=%x\n", 2113 bus_space_read_1(iot, ioh, MBC), 2114 #if 0 2115 bus_space_read_1(iot, ioh, DREG), 2116 #else 2117 0, 2118 #endif 2119 bus_space_read_1(iot, ioh, TEMP), 2120 bus_space_read_1(iot, ioh, TCH), 2121 bus_space_read_1(iot, ioh, TCM)); 2122 printf(" TCL=%x EXBF=%x\n", 2123 bus_space_read_1(iot, ioh, TCL), 2124 bus_space_read_1(iot, ioh, EXBF)); 2125 } 2126 2127 void 2128 spc_dump_driver(sc) 2129 struct spc_softc *sc; 2130 { 2131 struct spc_tinfo *ti; 2132 int i; 2133 2134 printf("nexus=%p prevphase=%x\n", sc->sc_nexus, sc->sc_prevphase); 2135 printf("state=%x msgin=%x msgpriq=%x msgoutq=%x lastmsg=%x currmsg=%x\n", 2136 sc->sc_state, sc->sc_imess[0], 2137 sc->sc_msgpriq, sc->sc_msgoutq, sc->sc_lastmsg, sc->sc_currmsg); 2138 for (i = 0; i < 7; i++) { 2139 ti = &sc->sc_tinfo[i]; 2140 printf("tinfo%d: %d cmds %d disconnects %d timeouts", 2141 i, ti->cmds, ti->dconns, ti->touts); 2142 printf(" %d senses flags=%x\n", ti->senses, ti->flags); 2143 } 2144 } 2145 #endif 2146