1 /* $NetBSD: max2820reg.h,v 1.7 2006/08/31 19:24:37 dyoung Exp $ */ 2 3 /* 4 * Copyright (c) 2004 David Young. All rights reserved. 5 * 6 * This code was written by David Young. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. Neither the name of the author nor the names of any co-contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY 21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, 22 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A 23 * PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David 24 * Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, 25 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 26 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND 28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY 31 * OF SUCH DAMAGE. 32 */ 33 34 #ifndef _DEV_IC_MAX2820REG_H_ 35 #define _DEV_IC_MAX2820REG_H_ 36 37 /* 38 * Serial bus format for Maxim MAX2820/MAX2820A/MAX2821/MAX2821A 39 * 2.4GHz 802.11b Zero-IF Transceivers 40 */ 41 #define MAX2820_TWI_ADDR_MASK __BITS(15,12) 42 #define MAX2820_TWI_DATA_MASK __BITS(11,0) 43 44 /* 45 * Registers for Maxim MAX2820/MAX2820A/MAX2821/MAX2821A 2.4GHz 46 * 802.11b Zero-IF Transceivers 47 */ 48 #define MAX2820_TEST 0 /* Test Register */ 49 #define MAX2820_TEST_DEFAULT __BITS(2,0) /* Always set to this value. */ 50 51 #define MAX2820_ENABLE 1 /* Block-Enable Register */ 52 #define MAX2820_ENABLE_RSVD1 __BIT(11) /* reserved */ 53 #define MAX2820_ENABLE_PAB __BIT(10) /* Transmit Baseband Filters 54 * Enable 55 * PAB_EN = SHDNB && 56 * (MAX2820_ENABLE_PAB || 57 * TX_ON) 58 */ 59 #define MAX2820_ENABLE_TXFLT __BIT(9) /* Transmit Baseband Filters 60 * Enable 61 * TXFLT_EN = SHDNB && 62 * (MAX2820_ENABLE_TXFLT || 63 * TX_ON) 64 */ 65 #define MAX2820_ENABLE_TXUVD __BIT(8) /* Tx Upconverter, VGA, and 66 * Driver Amp Enable 67 * TXUVD_EN = SHDNB && 68 * (MAX2820_ENABLE_TXUVD || 69 * TX_ON) 70 */ 71 #define MAX2820_ENABLE_DET __BIT(7) /* Receive Detector Enable 72 * DET_EN = SHDNB && 73 * (MAX2820_ENABLE_DET || 74 * RX_ON) 75 */ 76 #define MAX2820_ENABLE_RXDFA __BIT(6) /* Rx Downconverter, Filters, 77 * and AGC Amps Enable 78 * RXDFA_EN = SHDNB && 79 * (MAX2820_ENABLE_RXDFA || 80 * RX_ON) 81 */ 82 #define MAX2820_ENABLE_RXLNA __BIT(5) /* Receive LNA Enable 83 * AT_EN = SHDNB && 84 * (MAX2820_ENABLE_RXLNA || 85 * RX_ON) 86 */ 87 #define MAX2820_ENABLE_AT __BIT(4) /* Auto-tuner Enable 88 * AT_EN = SHDNB && 89 * (MAX2820_ENABLE_AT || 90 * RX_ON || TX_ON) 91 */ 92 #define MAX2820_ENABLE_CP __BIT(3) /* PLL Charge-Pump Enable 93 * CP_EN = SHDNB 94 * && MAX2820_ENABLE_CP 95 */ 96 #define MAX2820_ENABLE_PLL __BIT(2) /* PLL Enable 97 * PLL_EN = SHDNB 98 * && MAX2820_ENABLE_PLL 99 */ 100 #define MAX2820_ENABLE_VCO __BIT(1) /* VCO Enable 101 * VCO_EN = SHDNB 102 * && MAX2820_ENABLE_VCO 103 */ 104 #define MAX2820_ENABLE_RSVD0 __BIT(0) /* reserved */ 105 #define MAX2820_ENABLE_DEFAULT (MAX2820_ENABLE_AT|MAX2820_ENABLE_CP|\ 106 MAX2820_ENABLE_PLL|MAX2820_ENABLE_VCO) 107 108 #define MAX2820_SYNTH 2 /* Synthesizer Register */ 109 #define MAX2820_SYNTH_RSVD0 __BITS(11,7) /* reserved */ 110 #define MAX2820_SYNTH_ICP __BIT(6) /* Charge-Pump Current Select 111 * 0 = +/-1mA 112 * 1 = +/-2mA 113 */ 114 #define MAX2820_SYNTH_R_MASK __BITS(5,0) /* Reference Frequency Divider 115 * 0 = 22MHz 116 * 1 = 44MHz 117 */ 118 #define MAX2820_SYNTH_R_22MHZ __SHIFTIN(0, MAX2820_SYNTH_R_MASK) 119 #define MAX2820_SYNTH_R_44MHZ __SHIFTIN(1, MAX2820_SYNTH_R_MASK) 120 #define MAX2820_SYNTH_ICP_DEFAULT MAX2820_SYNTH_ICP 121 #define MAX2820_SYNTH_R_DEFAULT __SHIFTIN(0, MAX2820_SYNTH_R_MASK) 122 123 #define MAX2820_CHANNEL 3 /* Channel Frequency Register */ 124 #define MAX2820_CHANNEL_RSVD __BITS(11,7) /* reserved */ 125 #define MAX2820_CHANNEL_CF_MASK __BITS(6,0) /* Channel Frequency Select 126 * fLO = 2400MHz + CF * 1MHz 127 */ 128 #define MAX2820_CHANNEL_RSVD_DEFAULT __SHIFTIN(0, MAX2820_CHANNEL_RSVD) 129 #define MAX2820_CHANNEL_CF_DEFAULT __SHIFTIN(37, MAX2820_CHANNEL_CF_MASK) 130 131 #define MAX2820_RECEIVE 4 /* Receiver Settings Register 132 * MAX2820/MAX2821 133 */ 134 #define MAX2820_RECEIVE_2C_MASK __BITS(11,9) /* VGA DC Offset Nulling 135 * Parameter 2 136 */ 137 #define MAX2820_RECEIVE_1C_MASK __BITS(8,6) /* VGA DC Offset Nulling 138 * Parameter 1 139 */ 140 #define MAX2820_RECEIVE_DL_MASK __BITS(5,4) /* Rx Level Detector Midpoint 141 * Select 142 * 11, 01 = 50.2mVp 143 * 10 = 70.9mVp 144 * 00 = 35.5mVp 145 */ 146 #define MAX2820_RECEIVE_SF __BIT(3) /* Special Function Select 147 * 0 = OFF 148 * 1 = ON 149 */ 150 #define MAX2820_RECEIVE_BW_MASK __BITS(2,0) /* Receive Filter -3dB Frequency 151 * Select (all frequencies are 152 * approximate) 153 */ 154 /* 8.5MHz */ 155 #define MAX2820_RECEIVE_BW_8_5MHZ __SHIFTIN(0, MAX2820_RECEIVE_BW_MASK) 156 #define MAX2820_RECEIVE_BW_8MHZ __SHIFTIN(1, MAX2820_RECEIVE_BW_MASK) 157 #define MAX2820_RECEIVE_BW_7_5MHZ __SHIFTIN(2, MAX2820_RECEIVE_BW_MASK) 158 #define MAX2820_RECEIVE_BW_7MHZ __SHIFTIN(3, MAX2820_RECEIVE_BW_MASK) 159 #define MAX2820_RECEIVE_BW_6_5MHZ __SHIFTIN(4, MAX2820_RECEIVE_BW_MASK) 160 #define MAX2820_RECEIVE_BW_6MHZ __SHIFTIN(5, MAX2820_RECEIVE_BW_MASK) 161 #define MAX2820_RECEIVE_2C_DEFAULT __SHIFTIN(7, MAX2820_RECEIVE_2C_MASK) 162 #define MAX2820_RECEIVE_1C_DEFAULT __SHIFTIN(7, MAX2820_RECEIVE_1C_MASK) 163 #define MAX2820_RECEIVE_DL_DEFAULT __SHIFTIN(1, MAX2820_RECEIVE_DL_MASK) 164 #define MAX2820_RECEIVE_SF_DEFAULT __SHIFTIN(0, MAX2820_RECEIVE_SF) 165 #define MAX2820_RECEIVE_BW_DEFAULT MAX2820_RECEIVE_BW_7_5MHZ 166 167 #define MAX2820A_RECEIVE 4 /* Receiver Settings Register, 168 * MAX2820A/MAX2821A 169 */ 170 /* VGA DC Offset Nulling Parameter 2 */ 171 #define MAX2820A_RECEIVE_2C_MASK __BITS(11,9) 172 #define MAX2820A_RECEIVE_2C_DEFAULT __SHIFTIN(7, MAX2820A_RECEIVE_2C_MASK) 173 /* VGA DC Offset Nulling Parameter 1 */ 174 #define MAX2820A_RECEIVE_1C_MASK __BITS(8,6) 175 #define MAX2820A_RECEIVE_1C_DEFAULT __SHIFTIN(7, MAX2820A_RECEIVE_1C_MASK) 176 #define MAX2820A_RECEIVE_RSVD0_MASK __BITS(5,3) 177 #define MAX2820A_RECEIVE_RSVD0_DEFAULT __SHIFTIN(2, MAX2820A_RECEIVE_RSVD0_MASK) 178 #define MAX2820A_RECEIVE_RSVD1_MASK __BITS(2,0) 179 #define MAX2820A_RECEIVE_RSVD1_DEFAULT __SHIFTIN(2,MAX2820_RECEIVE_RSVD1_MASK) 180 181 #define MAX2820_TRANSMIT 5 /* Transmitter Settings Reg. */ 182 #define MAX2820_TRANSMIT_RSVD_MASK __BITS(11,4) /* reserved */ 183 #define MAX2820_TRANSMIT_PA_MASK __BITS(3,0) /* PA Bias Select 184 * 15 = Highest 185 * 0 = Lowest 186 */ 187 #define MAX2820_TRANSMIT_PA_DEFAULT __SHIFTIN(0, MAX2820_TRANSMIT_PA_MASK) 188 189 #endif /* _DEV_IC_MAX2820REG_H_ */ 190