1 /* $NetBSD: isp_target.h,v 1.14 2001/07/06 16:17:36 mjacob Exp $ */ 2 /* 3 * This driver, which is contained in NetBSD in the files: 4 * 5 * sys/dev/ic/isp.c 6 * sys/dev/ic/isp_inline.h 7 * sys/dev/ic/isp_netbsd.c 8 * sys/dev/ic/isp_netbsd.h 9 * sys/dev/ic/isp_target.c 10 * sys/dev/ic/isp_target.h 11 * sys/dev/ic/isp_tpublic.h 12 * sys/dev/ic/ispmbox.h 13 * sys/dev/ic/ispreg.h 14 * sys/dev/ic/ispvar.h 15 * sys/microcode/isp/asm_sbus.h 16 * sys/microcode/isp/asm_1040.h 17 * sys/microcode/isp/asm_1080.h 18 * sys/microcode/isp/asm_12160.h 19 * sys/microcode/isp/asm_2100.h 20 * sys/microcode/isp/asm_2200.h 21 * sys/pci/isp_pci.c 22 * sys/sbus/isp_sbus.c 23 * 24 * Is being actively maintained by Matthew Jacob (mjacob@netbsd.org). 25 * This driver also is shared source with FreeBSD, OpenBSD, Linux, Solaris, 26 * Linux versions. This tends to be an interesting maintenance problem. 27 * 28 * Please coordinate with Matthew Jacob on changes you wish to make here. 29 */ 30 /* 31 * Qlogic Target Mode Structure and Flag Definitions 32 * 33 * Copyright (c) 1997, 1998 34 * Patrick Stirling 35 * pms@psconsult.com 36 * All rights reserved. 37 * 38 * Additional Copyright (c) 1999, 2000, 2001 39 * Matthew Jacob 40 * mjacob@feral.com 41 * All rights reserved. 42 * 43 * 44 * Redistribution and use in source and binary forms, with or without 45 * modification, are permitted provided that the following conditions 46 * are met: 47 * 1. Redistributions of source code must retain the above copyright 48 * notice immediately at the beginning of the file, without modification, 49 * this list of conditions, and the following disclaimer. 50 * 2. The name of the author may not be used to endorse or promote products 51 * derived from this software without specific prior written permission. 52 * 53 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 54 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 55 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 56 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR 57 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 58 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 59 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 60 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 61 * SUCH DAMAGE. 62 * 63 */ 64 #ifndef _ISP_TARGET_H 65 #define _ISP_TARGET_H 66 67 /* 68 * Defines for all entry types 69 */ 70 #define QLTM_SVALID 0x80 71 #define QLTM_SENSELEN 18 72 73 /* 74 * Structure for Enable Lun and Modify Lun queue entries 75 */ 76 typedef struct { 77 isphdr_t le_header; 78 u_int32_t le_reserved; 79 u_int8_t le_lun; 80 u_int8_t le_rsvd; 81 u_int8_t le_ops; /* Modify LUN only */ 82 u_int8_t le_tgt; /* Not for FC */ 83 u_int32_t le_flags; /* Not for FC */ 84 u_int8_t le_status; 85 u_int8_t le_reserved2; 86 u_int8_t le_cmd_count; 87 u_int8_t le_in_count; 88 u_int8_t le_cdb6len; /* Not for FC */ 89 u_int8_t le_cdb7len; /* Not for FC */ 90 u_int16_t le_timeout; 91 u_int16_t le_reserved3[20]; 92 } lun_entry_t; 93 94 /* 95 * le_flags values 96 */ 97 #define LUN_TQAE 0x00000002 /* bit1 Tagged Queue Action Enable */ 98 #define LUN_DSSM 0x01000000 /* bit24 Disable Sending SDP Message */ 99 #define LUN_DISAD 0x02000000 /* bit25 Disable autodisconnect */ 100 #define LUN_DM 0x40000000 /* bit30 Disconnects Mandatory */ 101 102 /* 103 * le_ops values 104 */ 105 #define LUN_CCINCR 0x01 /* increment command count */ 106 #define LUN_CCDECR 0x02 /* decrement command count */ 107 #define LUN_ININCR 0x40 /* increment immed. notify count */ 108 #define LUN_INDECR 0x80 /* decrement immed. notify count */ 109 110 /* 111 * le_status values 112 */ 113 #define LUN_OK 0x01 /* we be rockin' */ 114 #define LUN_ERR 0x04 /* request completed with error */ 115 #define LUN_INVAL 0x06 /* invalid request */ 116 #define LUN_NOCAP 0x16 /* can't provide requested capability */ 117 #define LUN_ENABLED 0x3E /* LUN already enabled */ 118 119 /* 120 * Immediate Notify Entry structure 121 */ 122 #define IN_MSGLEN 8 /* 8 bytes */ 123 #define IN_RSVDLEN 8 /* 8 words */ 124 typedef struct { 125 isphdr_t in_header; 126 u_int32_t in_reserved; 127 u_int8_t in_lun; /* lun */ 128 u_int8_t in_iid; /* initiator */ 129 u_int8_t in_reserved2; 130 u_int8_t in_tgt; /* target */ 131 u_int32_t in_flags; 132 u_int8_t in_status; 133 u_int8_t in_rsvd2; 134 u_int8_t in_tag_val; /* tag value */ 135 u_int8_t in_tag_type; /* tag type */ 136 u_int16_t in_seqid; /* sequence id */ 137 u_int8_t in_msg[IN_MSGLEN]; /* SCSI message bytes */ 138 u_int16_t in_reserved3[IN_RSVDLEN]; 139 u_int8_t in_sense[QLTM_SENSELEN];/* suggested sense data */ 140 } in_entry_t; 141 142 typedef struct { 143 isphdr_t in_header; 144 u_int32_t in_reserved; 145 u_int8_t in_lun; /* lun */ 146 u_int8_t in_iid; /* initiator */ 147 u_int16_t in_scclun; 148 u_int32_t in_reserved2; 149 u_int16_t in_status; 150 u_int16_t in_task_flags; 151 u_int16_t in_seqid; /* sequence id */ 152 } in_fcentry_t; 153 154 /* 155 * Values for the in_status field 156 */ 157 #define IN_REJECT 0x0D /* Message Reject message received */ 158 #define IN_RESET 0x0E /* Bus Reset occurred */ 159 #define IN_NO_RCAP 0x16 /* requested capability not available */ 160 #define IN_IDE_RECEIVED 0x33 /* Initiator Detected Error msg received */ 161 #define IN_RSRC_UNAVAIL 0x34 /* resource unavailable */ 162 #define IN_MSG_RECEIVED 0x36 /* SCSI message received */ 163 #define IN_ABORT_TASK 0x20 /* task named in RX_ID is being aborted (FC) */ 164 #define IN_PORT_LOGOUT 0x29 /* port has logged out (FC) */ 165 #define IN_PORT_CHANGED 0x2A /* port changed */ 166 #define IN_GLOBAL_LOGO 0x2E /* all ports logged out */ 167 #define IN_NO_NEXUS 0x3B /* Nexus not established */ 168 169 /* 170 * Values for the in_task_flags field- should only get one at a time! 171 */ 172 #define TASK_FLAGS_ABORT_TASK (1<<9) 173 #define TASK_FLAGS_CLEAR_TASK_SET (1<<10) 174 #define TASK_FLAGS_TARGET_RESET (1<<13) 175 #define TASK_FLAGS_CLEAR_ACA (1<<14) 176 #define TASK_FLAGS_TERMINATE_TASK (1<<15) 177 178 #ifndef MSG_ABORT_TAG 179 #define MSG_ABORT_TAG 0x06 180 #endif 181 #ifndef MSG_CLEAR_QUEUE 182 #define MSG_CLEAR_QUEUE 0x0e 183 #endif 184 #ifndef MSG_BUS_DEV_RESET 185 #define MSG_BUS_DEV_RESET 0x0b 186 #endif 187 #ifndef MSG_REL_RECOVERY 188 #define MSG_REL_RECOVERY 0x10 189 #endif 190 #ifndef MSG_TERM_IO_PROC 191 #define MSG_TERM_IO_PROC 0x11 192 #endif 193 194 195 /* 196 * Notify Acknowledge Entry structure 197 */ 198 #define NA_RSVDLEN 22 199 typedef struct { 200 isphdr_t na_header; 201 u_int32_t na_reserved; 202 u_int8_t na_lun; /* lun */ 203 u_int8_t na_iid; /* initiator */ 204 u_int8_t na_reserved2; 205 u_int8_t na_tgt; /* target */ 206 u_int32_t na_flags; 207 u_int8_t na_status; 208 u_int8_t na_event; 209 u_int16_t na_seqid; /* sequence id */ 210 u_int16_t na_reserved3[NA_RSVDLEN]; 211 } na_entry_t; 212 213 /* 214 * Value for the na_event field 215 */ 216 #define NA_RST_CLRD 0x80 /* Clear an async event notification */ 217 #define NA_OK 0x01 /* Notify Acknowledge Succeeded */ 218 #define NA_INVALID 0x06 /* Invalid Notify Acknowledge */ 219 220 #define NA2_RSVDLEN 21 221 typedef struct { 222 isphdr_t na_header; 223 u_int32_t na_reserved; 224 u_int8_t na_lun; /* lun */ 225 u_int8_t na_iid; /* initiator */ 226 u_int16_t na_scclun; 227 u_int16_t na_flags; 228 u_int16_t na_reserved2; 229 u_int16_t na_status; 230 u_int16_t na_task_flags; 231 u_int16_t na_seqid; /* sequence id */ 232 u_int16_t na_reserved3[NA2_RSVDLEN]; 233 } na_fcentry_t; 234 #define NAFC_RCOUNT 0x80 /* increment resource count */ 235 #define NAFC_RST_CLRD 0x20 /* Clear LIP Reset */ 236 /* 237 * Accept Target I/O Entry structure 238 */ 239 #define ATIO_CDBLEN 26 240 241 typedef struct { 242 isphdr_t at_header; 243 u_int16_t at_reserved; 244 u_int16_t at_handle; 245 u_int8_t at_lun; /* lun */ 246 u_int8_t at_iid; /* initiator */ 247 u_int8_t at_cdblen; /* cdb length */ 248 u_int8_t at_tgt; /* target */ 249 u_int32_t at_flags; 250 u_int8_t at_status; /* firmware status */ 251 u_int8_t at_scsi_status; /* scsi status */ 252 u_int8_t at_tag_val; /* tag value */ 253 u_int8_t at_tag_type; /* tag type */ 254 u_int8_t at_cdb[ATIO_CDBLEN]; /* received CDB */ 255 u_int8_t at_sense[QLTM_SENSELEN];/* suggested sense data */ 256 } at_entry_t; 257 258 /* 259 * at_flags values 260 */ 261 #define AT_NODISC 0x00008000 /* disconnect disabled */ 262 #define AT_TQAE 0x00000002 /* Tagged Queue Action enabled */ 263 264 /* 265 * at_status values 266 */ 267 #define AT_PATH_INVALID 0x07 /* ATIO sent to firmware for disabled lun */ 268 #define AT_RESET 0x0E /* SCSI Bus Reset Occurred */ 269 #define AT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 270 #define AT_NOCAP 0x16 /* Requested capability not available */ 271 #define AT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 272 #define AT_CDB 0x3D /* CDB received */ 273 274 /* 275 * Macros to create and fetch and test concatenated handle and tag value macros 276 */ 277 278 #define AT_MAKE_TAGID(tid, aep) \ 279 tid = ((aep)->at_handle << 16); \ 280 if ((aep)->at_flags & AT_TQAE) \ 281 (tid) |= ((aep)->at_tag_val + 1) 282 283 #define CT_MAKE_TAGID(tid, ct) \ 284 tid = ((ct)->ct_fwhandle << 16); \ 285 if ((ct)->ct_flags & CT_TQAE) \ 286 (tid) |= ((ct)->ct_tag_val + 1) 287 288 #define AT_HAS_TAG(val) ((val) & 0xffff) 289 #define AT_GET_TAG(val) AT_HAS_TAG(val) - 1 290 #define AT_GET_HANDLE(val) ((val) >> 16) 291 292 /* 293 * Accept Target I/O Entry structure, Type 2 294 */ 295 #define ATIO2_CDBLEN 16 296 297 typedef struct { 298 isphdr_t at_header; 299 u_int32_t at_reserved; 300 u_int8_t at_lun; /* lun or reserved */ 301 u_int8_t at_iid; /* initiator */ 302 u_int16_t at_rxid; /* response ID */ 303 u_int16_t at_flags; 304 u_int16_t at_status; /* firmware status */ 305 u_int8_t at_reserved1; 306 u_int8_t at_taskcodes; 307 u_int8_t at_taskflags; 308 u_int8_t at_execodes; 309 u_int8_t at_cdb[ATIO2_CDBLEN]; /* received CDB */ 310 u_int32_t at_datalen; /* allocated data len */ 311 u_int16_t at_scclun; /* SCC Lun or reserved */ 312 u_int16_t at_reserved2[10]; 313 u_int16_t at_oxid; 314 } at2_entry_t; 315 316 #define ATIO2_WWPN_OFFSET 0x2A 317 #define ATIO2_OXID_OFFSET 0x3E 318 319 #define ATIO2_TC_ATTR_MASK 0x7 320 #define ATIO2_TC_ATTR_SIMPLEQ 0 321 #define ATIO2_TC_ATTR_HEADOFQ 1 322 #define ATIO2_TC_ATTR_ORDERED 2 323 #define ATIO2_TC_ATTR_ACAQ 4 324 #define ATIO2_TC_ATTR_UNTAGGED 5 325 326 /* 327 * Continue Target I/O Entry structure 328 * Request from driver. The response from the 329 * ISP firmware is the same except that the last 18 330 * bytes are overwritten by suggested sense data if 331 * the 'autosense valid' bit is set in the status byte. 332 */ 333 typedef struct { 334 isphdr_t ct_header; 335 u_int16_t ct_reserved; 336 #define ct_syshandle ct_reserved /* we use this */ 337 u_int16_t ct_fwhandle; /* required by f/w */ 338 u_int8_t ct_lun; /* lun */ 339 u_int8_t ct_iid; /* initiator id */ 340 u_int8_t ct_reserved2; 341 u_int8_t ct_tgt; /* our target id */ 342 u_int32_t ct_flags; 343 u_int8_t ct_status; /* isp status */ 344 u_int8_t ct_scsi_status; /* scsi status */ 345 u_int8_t ct_tag_val; /* tag value */ 346 u_int8_t ct_tag_type; /* tag type */ 347 u_int32_t ct_xfrlen; /* transfer length */ 348 u_int32_t ct_resid; /* residual length */ 349 u_int16_t ct_timeout; 350 u_int16_t ct_seg_count; 351 ispds_t ct_dataseg[ISP_RQDSEG]; 352 } ct_entry_t; 353 354 /* 355 * For some of the dual port SCSI adapters, port (bus #) is reported 356 * in the MSbit of ct_iid. Bit fields are a bit too awkward here. 357 * 358 * Note that this does not apply to FC adapters at all which can and 359 * do report IIDs between 129 && 255 (these represent devices that have 360 * logged in across a SCSI fabric). 361 */ 362 #define GET_IID_VAL(x) (x & 0x3f) 363 #define GET_BUS_VAL(x) ((x >> 7) & 0x1) 364 #define SET_IID_VAL(y, x) (y | (x & 0x3f)) 365 #define SET_BUS_VAL(y, x) (y | ((x & 0x1) << 7)) 366 367 /* 368 * ct_flags values 369 */ 370 #define CT_TQAE 0x00000002 /* bit 1, Tagged Queue Action enable */ 371 #define CT_DATA_IN 0x00000040 /* bits 6&7, Data direction */ 372 #define CT_DATA_OUT 0x00000080 /* bits 6&7, Data direction */ 373 #define CT_NO_DATA 0x000000C0 /* bits 6&7, Data direction */ 374 #define CT_CCINCR 0x00000100 /* bit 8, autoincrement atio count */ 375 #define CT_DATAMASK 0x000000C0 /* bits 6&7, Data direction */ 376 #define CT_INISYNCWIDE 0x00004000 /* bit 14, Do Sync/Wide Negotiation */ 377 #define CT_NODISC 0x00008000 /* bit 15, Disconnects disabled */ 378 #define CT_DSDP 0x01000000 /* bit 24, Disable Save Data Pointers */ 379 #define CT_SENDRDP 0x04000000 /* bit 26, Send Restore Pointers msg */ 380 #define CT_SENDSTATUS 0x80000000 /* bit 31, Send SCSI status byte */ 381 382 /* 383 * ct_status values 384 * - set by the firmware when it returns the CTIO 385 */ 386 #define CT_OK 0x01 /* completed without error */ 387 #define CT_ABORTED 0x02 /* aborted by host */ 388 #define CT_ERR 0x04 /* see sense data for error */ 389 #define CT_INVAL 0x06 /* request for disabled lun */ 390 #define CT_NOPATH 0x07 /* invalid ITL nexus */ 391 #define CT_INVRXID 0x08 /* (FC only) Invalid RX_ID */ 392 #define CT_DATA_OVER 0x09 /* (FC only) Data Overrun */ 393 #define CT_RSELTMO 0x0A /* reselection timeout after 2 tries */ 394 #define CT_TIMEOUT 0x0B /* timed out */ 395 #define CT_RESET 0x0E /* SCSI Bus Reset occurred */ 396 #define CT_PARITY 0x0F /* Uncorrectable Parity Error */ 397 #define CT_BUS_ERROR 0x10 /* (FC Only) DMA PCI Error */ 398 #define CT_PANIC 0x13 /* Unrecoverable Error */ 399 #define CT_PHASE_ERROR 0x14 /* Bus phase sequence error */ 400 #define CT_BDR_MSG 0x17 /* Bus Device Reset msg received */ 401 #define CT_DATA_UNDER 0x15 /* (FC only) Data Underrun */ 402 #define CT_TERMINATED 0x19 /* due to Terminate Transfer mbox cmd */ 403 #define CT_PORTNOTAVAIL 0x28 /* port not available */ 404 #define CT_LOGOUT 0x29 /* port logout */ 405 #define CT_PORTCHANGED 0x2A /* port changed */ 406 #define CT_IDE 0x33 /* Initiator Detected Error */ 407 #define CT_NOACK 0x35 /* Outstanding Immed. Notify. entry */ 408 409 /* 410 * When the firmware returns a CTIO entry, it may overwrite the last 411 * part of the structure with sense data. This starts at offset 0x2E 412 * into the entry, which is in the middle of ct_dataseg[1]. Rather 413 * than define a new struct for this, I'm just using the sense data 414 * offset. 415 */ 416 #define CTIO_SENSE_OFFSET 0x2E 417 418 /* 419 * Entry length in u_longs. All entries are the same size so 420 * any one will do as the numerator. 421 */ 422 #define UINT32_ENTRY_SIZE (sizeof(at_entry_t)/sizeof(u_int32_t)) 423 424 /* 425 * QLA2100 CTIO (type 2) entry 426 */ 427 #define MAXRESPLEN 26 428 typedef struct { 429 isphdr_t ct_header; 430 u_int16_t ct_reserved; 431 u_int16_t ct_fwhandle; /* just to match CTIO */ 432 u_int8_t ct_lun; /* lun */ 433 u_int8_t ct_iid; /* initiator id */ 434 u_int16_t ct_rxid; /* response ID */ 435 u_int16_t ct_flags; 436 u_int16_t ct_status; /* isp status */ 437 u_int16_t ct_timeout; 438 u_int16_t ct_seg_count; 439 u_int32_t ct_reloff; /* relative offset */ 440 int32_t ct_resid; /* residual length */ 441 union { 442 /* 443 * The three different modes that the target driver 444 * can set the CTIO2 up as. 445 * 446 * The first is for sending FCP_DATA_IUs as well as 447 * (optionally) sending a terminal SCSI status FCP_RSP_IU. 448 * 449 * The second is for sending SCSI sense data in an FCP_RSP_IU. 450 * Note that no FCP_DATA_IUs will be sent. 451 * 452 * The third is for sending FCP_RSP_IUs as built specifically 453 * in system memory as located by the isp_dataseg. 454 */ 455 struct { 456 u_int32_t _reserved; 457 u_int16_t _reserved2; 458 u_int16_t ct_scsi_status; 459 u_int32_t ct_xfrlen; 460 ispds_t ct_dataseg[ISP_RQDSEG_T2]; 461 /* 462 * For CTIO3, an ispds64_t would go here, padded 463 * to the end of the request. 464 */ 465 /* 466 * For CTIO4, an ispdlist_t would go here, padded 467 * to the end of the request. 468 */ 469 } m0; 470 struct { 471 u_int16_t _reserved; 472 u_int16_t _reserved2; 473 u_int16_t ct_senselen; 474 u_int16_t ct_scsi_status; 475 u_int16_t ct_resplen; 476 u_int8_t ct_resp[MAXRESPLEN]; 477 } m1; 478 struct { 479 u_int32_t _reserved; 480 u_int16_t _reserved2; 481 u_int16_t _reserved3; 482 u_int32_t ct_datalen; 483 ispds_t ct_fcp_rsp_iudata; 484 } m2; 485 /* 486 * CTIO2 returned from F/W... 487 */ 488 struct { 489 u_int32_t _reserved[4]; 490 u_int16_t ct_scsi_status; 491 u_int8_t ct_sense[QLTM_SENSELEN]; 492 } fw; 493 } rsp; 494 } ct2_entry_t; 495 496 /* 497 * ct_flags values for CTIO2 498 */ 499 #define CT2_FLAG_MMASK 0x0003 500 #define CT2_FLAG_MODE0 0x0000 501 #define CT2_FLAG_MODE1 0x0001 502 #define CT2_FLAG_MODE2 0x0002 503 #define CT2_DATA_IN CT_DATA_IN 504 #define CT2_DATA_OUT CT_DATA_OUT 505 #define CT2_NO_DATA CT_NO_DATA 506 #define CT2_DATAMASK CT_DATAMASK 507 #define CT2_CCINCR 0x0100 508 #define CT2_FASTPOST 0x0200 509 #define CT2_SENDSTATUS 0x8000 510 511 /* 512 * ct_status values are (mostly) the same as that for ct_entry. 513 */ 514 515 /* 516 * ct_scsi_status values- the low 8 bits are the normal SCSI status 517 * we know and love. The upper 8 bits are validity markers for FCP_RSP_IU 518 * fields. 519 */ 520 #define CT2_RSPLEN_VALID 0x0100 521 #define CT2_SNSLEN_VALID 0x0200 522 #define CT2_DATA_OVER 0x0400 523 #define CT2_DATA_UNDER 0x0800 524 525 /* 526 * Macros for packing/unpacking the above structures 527 */ 528 529 #ifdef __sparc__ 530 #define ISP_SBUS_SWOZZLE(isp, src, dst, taga, tagb) \ 531 if (isp->isp_bustype == ISP_BT_SBUS) { \ 532 u_int8_t tmp = src -> taga; \ 533 dst -> taga = dst -> tagb; \ 534 src -> tagb = tmp; \ 535 } else { \ 536 dst -> taga = src -> taga; \ 537 dst -> tagb = src -> taga; \ 538 } 539 #else 540 #define ISP_SBUS_SWOZZLE(isp, src, dst, taga, tagb) \ 541 dst -> taga = src -> taga; \ 542 dst -> tagb = src -> taga 543 #endif 544 545 #define MCIDF(d, s) if ((void *) d != (void *)s) MEMCPY(d, s, QENTRY_LEN) 546 547 /* This is really only for SBus cards on a sparc */ 548 #ifdef __sparc__ 549 #define ISP_SWIZ_ATIO(isp, vdst, vsrc) \ 550 { \ 551 at_entry_t *src = (at_entry_t *) vsrc; \ 552 at_entry_t *dst = (at_entry_t *) vdst; \ 553 dst->at_header = src->at_header; \ 554 dst->at_reserved = src->at_reserved; \ 555 dst->at_handle = src->at_handle; \ 556 ISP_SBUS_SWOZZLE(isp, src, dst, at_lun, at_iid); \ 557 ISP_SBUS_SWOZZLE(isp, src, dst, at_cdblen, at_tgt); \ 558 dst->at_flags = src->at_flags; \ 559 ISP_SBUS_SWOZZLE(isp, src, dst, at_status, at_scsi_status); \ 560 ISP_SBUS_SWOZZLE(isp, src, dst, at_tag_val, at_tag_type); \ 561 MEMCPY(dst->at_cdb, src->at_cdb, ATIO_CDBLEN); \ 562 MEMCPY(dst->at_sense, src->at_sense, QLTM_SENSELEN); \ 563 } 564 #define ISP_SWIZ_ATIO2(isp, vdst, vsrc) \ 565 { \ 566 at2_entry_t *src = (at2_entry_t *) vsrc; \ 567 at2_entry_t *dst = (at2_entry_t *) vdst; \ 568 dst->at_reserved = src->at_reserved; \ 569 ISP_SBUS_SWOZZLE(isp, src, dst, at_lun, at_iid); \ 570 dst->at_rxid = src->at_rxid; \ 571 dst->at_flags = src->at_flags; \ 572 dst->at_status = src->at_status; \ 573 ISP_SBUS_SWOZZLE(isp, src, dst, at_reserved1, at_taskcodes); \ 574 ISP_SBUS_SWOZZLE(isp, src, dst, at_taskflags, at_execodes); \ 575 MEMCPY(dst->at_cdb, src->at_cdb, ATIO2_CDBLEN); \ 576 dst->at_datalen = src->at_datalen; \ 577 dst->at_scclun = src->at_scclun; \ 578 MEMCPY(dst->at_reserved2, src->at_reserved2, sizeof dst->at_reserved2);\ 579 dst->at_oxid = src->at_oxid; \ 580 } 581 #define ISP_SWIZ_CTIO(isp, vdst, vsrc) \ 582 { \ 583 ct_entry_t *src = (ct_entry_t *) vsrc; \ 584 ct_entry_t *dst = (ct_entry_t *) vdst; \ 585 dst->ct_header = src->ct_header; \ 586 dst->ct_syshandle = src->ct_syshandle; \ 587 dst->ct_fwhandle = src->ct_fwhandle; \ 588 dst->ct_fwhandle = src->ct_fwhandle; \ 589 ISP_SBUS_SWOZZLE(isp, src, dst, ct_lun, ct_iid); \ 590 ISP_SBUS_SWOZZLE(isp, src, dst, ct_reserved2, ct_tgt); \ 591 dst->ct_flags = src->ct_flags; \ 592 ISP_SBUS_SWOZZLE(isp, src, dst, ct_status, ct_scsi_status); \ 593 ISP_SBUS_SWOZZLE(isp, src, dst, ct_tag_val, ct_tag_type); \ 594 dst->ct_xfrlen = src->ct_xfrlen; \ 595 dst->ct_resid = src->ct_resid; \ 596 dst->ct_timeout = src->ct_timeout; \ 597 dst->ct_seg_count = src->ct_seg_count; \ 598 MEMCPY(dst->ct_dataseg, src->ct_dataseg, sizeof (dst->ct_dataseg)); \ 599 } 600 #define ISP_SWIZ_CTIO2(isp, vdst, vsrc) \ 601 { \ 602 ct2_entry_t *src = (ct2_entry_t *) vsrc; \ 603 ct2_entry_t *dst = (ct2_entry_t *) vdst; \ 604 dst->ct_header = src->ct_header; \ 605 dst->ct_syshandle = src->ct_syshandle; \ 606 dst->ct_fwhandle = src->ct_fwhandle; \ 607 dst->ct_fwhandle = src->ct_fwhandle; \ 608 ISP_SBUS_SWOZZLE(isp, src, dst, ct_lun, ct_iid); \ 609 dst->ct_rxid = src->ct_rxid; \ 610 dst->ct_flags = src->ct_flags; \ 611 dst->ct_status = src->ct_status; \ 612 dst->ct_timeout = src->ct_timeout; \ 613 dst->ct_seg_count = src->ct_seg_count; \ 614 dst->ct_reloff = src->ct_reloff; \ 615 dst->ct_resid = src->ct_resid; \ 616 dst->rsp = src->rsp; \ 617 } 618 #define ISP_SWIZ_ENABLE_LUN(isp, vdst, vsrc) \ 619 { \ 620 lun_entry_t *src = (lun_entry_t *)vsrc; \ 621 lun_entry_t *dst = (lun_entry_t *)vdst; \ 622 dst->le_header = src->le_header; \ 623 dst->le_reserved2 = src->le_reserved2; \ 624 ISP_SBUS_SWOZZLE(isp, src, dst, le_lun, le_rsvd); \ 625 ISP_SBUS_SWOZZLE(isp, src, dst, le_ops, le_tgt); \ 626 dst->le_flags = src->le_flags; \ 627 ISP_SBUS_SWOZZLE(isp, src, dst, le_status, le_reserved2); \ 628 ISP_SBUS_SWOZZLE(isp, src, dst, le_cmd_count, le_in_count); \ 629 ISP_SBUS_SWOZZLE(isp, src, dst, le_cdb6len, le_cdb7len); \ 630 dst->le_timeout = src->le_timeout; \ 631 dst->le_reserved = src->le_reserved; \ 632 } 633 #define ISP_SWIZ_NOTIFY(isp, vdst, vsrc) \ 634 { \ 635 in_entry_type *src = (in_entry_t *)vsrc; \ 636 in_entry_type *dst = (in_entry_t *)vdst; \ 637 dst->in_header = src->in_header; \ 638 dst->in_reserved2 = src->in_reserved2; \ 639 ISP_SBUS_SWOZZLE(isp, src, dst, in_lun, in_iid); \ 640 ISP_SBUS_SWOZZLE(isp, src, dst, in_reserved2, in_tgt); \ 641 dst->in_flags = src->in_flags; \ 642 ISP_SBUS_SWOZZLE(isp, src, dst, in_status, in_rsvd2); \ 643 ISP_SBUS_SWOZZLE(isp, src, dst, in_tag_val, in_tag_type); \ 644 dst->in_seqid = src->in_seqid; \ 645 MEMCPY(dst->in_msg, src->in_msg, IN_MSGLEN); \ 646 MEMCPY(dst->in_reserved, src->in_reserved, IN_RESERVED); \ 647 MEMCPY(dst->in_sense, src->in_sense, QLTM_SENSELEN); \ 648 } 649 #define ISP_SWIZ_NOTIFY_FC(isp, vdst, vsrc) \ 650 { \ 651 in_fcentry_type *src = (in_fcentry_t *)vsrc; \ 652 in_fcentry_type *dst = (in_fcentry_t *)vdst; \ 653 dst->in_header = src->in_header; \ 654 dst->in_reserved2 = src->in_reserved2; \ 655 ISP_SBUS_SWOZZLE(isp, src, dst, in_lun, in_iid); \ 656 dst->in_scclun = src->in_scclun; \ 657 dst->in_reserved2 = src->in_reserved2; \ 658 dst->in_status = src->in_status; \ 659 dst->in_task_flags = src->in_task_flags; \ 660 dst->in_seqid = src->in_seqid; \ 661 } 662 #define ISP_SWIZ_NOT_ACK(isp, vdst, vsrc) \ 663 { \ 664 na_entry_t *src = (na_entry_t *)vsrc; \ 665 na_entry_t *dst = (na_entry_t *)vdst; \ 666 dst->na_header = src->na_header; \ 667 dst->na_reserved = src->na_reserved; \ 668 ISP_SBUS_SWOZZLE(isp, src, dst, na_lun, na_iid); \ 669 dst->na_reserved2 = src->na_reserved2; \ 670 ISP_SBUS_SWOZZLE(isp, src, dst, na_reserved, na_tgt); \ 671 dst->na_flags = src->na_flags; \ 672 ISP_SBUS_SWOZZLE(isp, src, dst, na_status, na_event); \ 673 dst->na_seqid = src->na_seqid; \ 674 MEMCPY(dst->na_reserved3, src->na_reserved3, NA_RSVDLEN); \ 675 } 676 #define ISP_SWIZ_NOT_ACK_FC(isp, vdst, vsrc) \ 677 { \ 678 na_fcentry_t *src = (na_fcentry_t *)vsrc; \ 679 na_fcentry_t *dst = (na_fcentry_t *)vdst; \ 680 dst->na_header = src->na_header; \ 681 dst->na_reserved = src->na_reserved; \ 682 ISP_SBUS_SWOZZLE(isp, src, dst, na_lun, na_iid); \ 683 dst->na_scclun = src->na_scclun; \ 684 dst->na_flags = src->na_flags; \ 685 dst->na_reserved2 = src->na_reserved2; \ 686 dst->na_status = src->na_status; \ 687 dst->na_task_flags = src->na_task_flags; \ 688 dst->na_seqid = src->na_seqid; \ 689 MEMCPY(dst->na_reserved3, src->na_reserved3, NA2_RSVDLEN); \ 690 } 691 #else 692 #define ISP_SWIZ_ATIO(isp, d, s) MCIDF(d, s) 693 #define ISP_SWIZ_ATIO2(isp, d, s) MCIDF(d, s) 694 #define ISP_SWIZ_CTIO(isp, d, s) MCIDF(d, s) 695 #define ISP_SWIZ_CTIO2(isp, d, s) MCIDF(d, s) 696 #define ISP_SWIZ_ENABLE_LUN(isp, d, s) MCIDF(d, s) 697 #define ISP_SWIZ_ATIO2(isp, d, s) MCIDF(d, s) 698 #define ISP_SWIZ_CTIO2(isp, d, s) MCIDF(d, s) 699 #define ISP_SWIZ_NOTIFY(isp, d, s) MCIDF(d, s) 700 #define ISP_SWIZ_NOTIFY_FC(isp, d, s) MCIDF(d, s) 701 #define ISP_SWIZ_NOT_ACK(isp, d, s) MCIDF(d, s) 702 #define ISP_SWIZ_NOT_ACK_FC(isp, d, s) MCIDF(d, s) 703 #endif 704 705 /* 706 * Debug macros 707 */ 708 709 #define ISP_TDQE(isp, msg, idx, arg) \ 710 if (isp->isp_dblev & ISP_LOGTDEBUG2) isp_print_qentry(isp, msg, idx, arg) 711 712 /* 713 * The functions below are target mode functions that 714 * are generally internal to the Qlogic driver. 715 */ 716 717 /* 718 * This function handles new response queue entry appropriate for target mode. 719 */ 720 int isp_target_notify(struct ispsoftc *, void *, u_int16_t *); 721 722 /* 723 * Enable/Disable/Modify a logical unit. 724 * (softc, cmd, bus, tgt, lun, cmd_cnt, inotify_cnt, opaque) 725 */ 726 #define DFLT_CMND_CNT 32 727 #define DFLT_INOT_CNT 4 728 int isp_lun_cmd(struct ispsoftc *, int, int, int, int, int, int, u_int32_t); 729 730 /* 731 * General request queue 'put' routine for target mode entries. 732 */ 733 int isp_target_put_entry(struct ispsoftc *isp, void *); 734 735 /* 736 * General routine to put back an ATIO entry- 737 * used for replenishing f/w resource counts. 738 * The argument is a pointer to a source ATIO 739 * or ATIO2. 740 */ 741 int isp_target_put_atio(struct ispsoftc *, void *); 742 743 /* 744 * General routine to send a final CTIO for a command- used mostly for 745 * local responses. 746 */ 747 int isp_endcmd(struct ispsoftc *, void *, u_int32_t, u_int16_t); 748 #define ECMD_SVALID 0x100 749 750 /* 751 * Handle an asynchronous event 752 */ 753 754 void isp_target_async(struct ispsoftc *, int, int); 755 756 #endif /* _ISP_TARGET_H */ 757