1 /* $NetBSD: interwave.c,v 1.23 2004/07/09 02:46:44 mycroft Exp $ */ 2 3 /* 4 * Copyright (c) 1997, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * Author: Kari Mettinen 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by the NetBSD 20 * Foundation, Inc. and its contributors. 21 * 4. Neither the name of The NetBSD Foundation nor the names of its 22 * contributors may be used to endorse or promote products derived 23 * from this software without specific prior written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 26 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: interwave.c,v 1.23 2004/07/09 02:46:44 mycroft Exp $"); 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/errno.h> 44 #include <sys/ioctl.h> 45 #include <sys/syslog.h> 46 #include <sys/device.h> 47 #include <sys/proc.h> 48 #include <sys/buf.h> 49 #include <sys/fcntl.h> 50 #include <sys/malloc.h> 51 #include <sys/kernel.h> 52 53 #include <machine/cpu.h> 54 #include <machine/intr.h> 55 #include <machine/pio.h> 56 #include <sys/audioio.h> 57 #include <dev/audio_if.h> 58 #include <dev/mulaw.h> 59 60 #include <dev/isa/isavar.h> 61 #include <dev/isa/isadmavar.h> 62 63 #include <dev/ic/interwavereg.h> 64 #include <dev/ic/interwavevar.h> 65 66 67 static void iwreset __P((struct iw_softc *, int)); 68 69 static int iw_set_speed __P((struct iw_softc *, u_long, char)); 70 static u_long iw_set_format __P((struct iw_softc *, u_long, int)); 71 static void iw_mixer_line_level __P((struct iw_softc *, int, int, int)); 72 static void iw_trigger_dma __P((struct iw_softc *, u_char)); 73 static void iw_stop_dma __P((struct iw_softc *, u_char, u_char)); 74 static void iw_dma_count __P((struct iw_softc *, u_short, int)); 75 static int iwintr __P((void *)); 76 static void iw_meminit __P((struct iw_softc *)); 77 static void iw_mempoke __P((struct iw_softc *, u_long, u_char)); 78 static u_char iw_mempeek __P((struct iw_softc *, u_long)); 79 80 #ifdef USE_WAVETABLE 81 static void iw_set_voice_place __P((struct iw_softc *, u_char, u_long)); 82 static void iw_voice_pan __P((struct iw_softc *, u_char, u_short, u_short)); 83 static void iw_voice_freq __P((struct iw_softc *, u_char, u_long)); 84 static void iw_set_loopmode __P((struct iw_softc *, u_char, u_char, u_char)); 85 static void iw_set_voice_pos __P((struct iw_softc *, u_short, u_long, u_long)); 86 static void iw_start_voice __P((struct iw_softc *, u_char)); 87 static void iw_play_voice __P((struct iw_softc *, u_long, u_long, u_short)); 88 static void iw_stop_voice __P((struct iw_softc *, u_char)); 89 static void iw_move_voice_end __P((struct iw_softc *, u_short, u_long)); 90 static void iw_initvoices __P((struct iw_softc *)); 91 #endif 92 93 struct audio_device iw_device = { 94 "Am78C201", 95 "0.1", 96 "guspnp" 97 }; 98 99 #ifdef AUDIO_DEBUG 100 int iw_debug; 101 #define DPRINTF(p) if (iw_debug) printf p 102 #else 103 #define DPRINTF(p) 104 #endif 105 106 static int iw_cc = 1; 107 #ifdef DIAGNOSTIC 108 static int outputs = 0; 109 static int iw_ints = 0; 110 static int inputs = 0; 111 static int iw_inints = 0; 112 #endif 113 114 int 115 iwintr(arg) 116 void *arg; 117 { 118 struct iw_softc *sc = arg; 119 int val = 0; 120 u_char intrs = 0; 121 122 IW_READ_DIRECT_1(6, sc->p2xr_h, intrs); /* UISR */ 123 124 /* codec ints */ 125 126 /* 127 * The proper order to do this seems to be to read CSR3 to get the 128 * int cause and fifo over underrrun status, then deal with the ints 129 * (new DMA set up), and to clear ints by writing the respective bit 130 * to 0. 131 */ 132 133 /* read what ints happened */ 134 135 IW_READ_CODEC_1(CSR3I, intrs); 136 137 /* clear them */ 138 139 IW_WRITE_DIRECT_1(2, sc->codec_index_h, 0x00); 140 141 /* and process them */ 142 143 if (intrs & 0x20) { 144 #ifdef DIAGNOSTIC 145 iw_inints++; 146 #endif 147 if (sc->sc_recintr != 0) 148 sc->sc_recintr(sc->sc_recarg); 149 val = 1; 150 } 151 if (intrs & 0x10) { 152 #ifdef DIAGNOSTIC 153 iw_ints++; 154 #endif 155 if (sc->sc_playintr != 0) 156 sc->sc_playintr(sc->sc_playarg); 157 val = 1; 158 } 159 return val; 160 161 } 162 163 void 164 iwattach(sc) 165 struct iw_softc *sc; 166 { 167 int got_irq = 0; 168 169 DPRINTF(("iwattach sc %p\n", sc)); 170 171 sc->cdatap = 1; /* relative offsets in region */ 172 sc->csr1r = 2; 173 sc->cxdr = 3; /* CPDR or CRDR */ 174 175 sc->gmxr = 0; /* sc->p3xr */ 176 sc->gmxdr = 1; /* GMTDR or GMRDR */ 177 sc->svsr = 2; 178 sc->igidxr = 3; 179 sc->i16dp = 4; 180 sc->i8dp = 5; 181 sc->lmbdr = 7; 182 183 sc->rec_precision = sc->play_precision = 8; 184 sc->rec_channels = sc->play_channels = 1; 185 sc->rec_encoding = sc->play_encoding = AUDIO_ENCODING_ULAW; 186 sc->sc_irate = 8000; 187 sc->sc_orate = 8000; 188 189 sc->sc_fullduplex = 1; 190 191 sc->sc_dma_flags = 0; 192 193 /* 194 * We can only use a few selected irqs, see if we got one from pnp 195 * code that suits us. 196 */ 197 198 if (sc->sc_irq > 0) { 199 sc->sc_ih = isa_intr_establish(sc->sc_p2xr_ic, 200 sc->sc_irq, 201 IST_EDGE, IPL_AUDIO, iwintr, sc); 202 got_irq = 1; 203 } 204 if (!got_irq) { 205 printf("\niwattach: couldn't get a suitable irq\n"); 206 return; 207 } 208 printf("\n"); 209 iwreset(sc, 0); 210 iw_set_format(sc, AUDIO_ENCODING_ULAW, 0); 211 iw_set_format(sc, AUDIO_ENCODING_ULAW, 1); 212 printf("%s: interwave version %s\n", 213 sc->sc_dev.dv_xname, iw_device.version); 214 audio_attach_mi(sc->iw_hw_if, sc, &sc->sc_dev); 215 } 216 217 int 218 iwopen(sc, flags) 219 struct iw_softc *sc; 220 int flags; 221 { 222 223 DPRINTF(("iwopen: sc %p\n", sc)); 224 225 #ifdef DIAGNOSTIC 226 outputs = 0; 227 iw_ints = 0; 228 inputs = 0; 229 iw_inints = 0; 230 #endif 231 232 iwreset(sc, 1); 233 234 return 0; 235 } 236 237 238 239 void 240 iwclose(addr) 241 void *addr; 242 { 243 DPRINTF(("iwclose sc %p\n", addr)); 244 245 #ifdef DIAGNOSTIC 246 DPRINTF(("iwclose: outputs %d ints %d inputs %d in_ints %d\n", 247 outputs, iw_ints, inputs, iw_inints)); 248 #endif 249 } 250 251 #define RAM_STEP 64*1024 252 253 static void 254 iw_mempoke(sc, addy, val) 255 struct iw_softc *sc; 256 u_long addy; 257 u_char val; 258 { 259 IW_WRITE_GENERAL_2(LMALI, (u_short) addy); 260 IW_WRITE_GENERAL_1(LMAHI, (u_char) (addy >> 16)); 261 262 /* Write byte to LMBDR */ 263 IW_WRITE_DIRECT_1(sc->p3xr + 7, sc->p3xr_h, val); 264 } 265 266 static u_char 267 iw_mempeek(sc, addy) 268 struct iw_softc *sc; 269 u_long addy; 270 { 271 u_char ret; 272 273 IW_WRITE_GENERAL_2(LMALI, (u_short) addy); 274 IW_WRITE_GENERAL_1(LMAHI, (u_char) (addy >> 16)); 275 276 IW_READ_DIRECT_1(sc->p3xr + 7, sc->p3xr_h, ret); 277 return ret; /* return byte from LMBDR */ 278 } 279 280 static void 281 iw_meminit(sc) 282 struct iw_softc *sc; 283 { 284 u_long bank[4] = {0L, 0L, 0L, 0L}; 285 u_long addr = 0L, base = 0L, cnt = 0L; 286 u_char i, ram = 0 /* ,memval=0 */ ; 287 u_short lmcfi; 288 u_long temppi; 289 u_long *lpbanks = &temppi; 290 291 IW_WRITE_GENERAL_1(LDMACI, 0x00); 292 293 IW_READ_GENERAL_2(LMCFI, lmcfi); /* 0x52 */ 294 lmcfi |= 0x0A0C; 295 IW_WRITE_GENERAL_2(LMCFI, lmcfi); /* max addr span */ 296 IW_WRITE_GENERAL_1(LMCI, 0x00); 297 298 /* fifo addresses */ 299 300 IW_WRITE_GENERAL_2(LMRFAI, ((4 * 1024 * 1024) >> 8)); 301 IW_WRITE_GENERAL_2(LMPFAI, ((4 * 1024 * 1024 + 16 * 1024) >> 8)); 302 303 IW_WRITE_GENERAL_2(LMFSI, 0x000); 304 305 IW_WRITE_GENERAL_2(LDICI, 0x0000); 306 307 while (addr < (16 * 1024 * 1024)) { 308 iw_mempoke(sc, addr, 0x00); 309 addr += RAM_STEP; 310 } 311 312 printf("%s:", sc->sc_dev.dv_xname); 313 314 for (i = 0; i < 4; i++) { 315 iw_mempoke(sc, base, 0xAA); /* mark start of bank */ 316 iw_mempoke(sc, base + 1L, 0x55); 317 if (iw_mempeek(sc, base) == 0xAA && 318 iw_mempeek(sc, base + 1L) == 0x55) 319 ram = 1; 320 if (ram) { 321 while (cnt < (4 * 1024 * 1024)) { 322 bank[i] += RAM_STEP; 323 cnt += RAM_STEP; 324 addr = base + cnt; 325 if (iw_mempeek(sc, addr) == 0xAA) 326 break; 327 } 328 } 329 if (lpbanks != NULL) { 330 *lpbanks = bank[i]; 331 lpbanks++; 332 } 333 bank[i] = bank[i] >> 10; 334 printf("%s bank[%d]: %ldK", i ? "," : "", i, bank[i]); 335 base += 4 * 1024 * 1024; 336 cnt = 0L; 337 ram = 0; 338 } 339 340 printf("\n"); 341 342 /* 343 * this is not really useful since GUS PnP supports memory 344 * configurations that aren't really supported by Interwave...beware 345 * of holes! Also, we don't use the memory for anything in this 346 * version of the driver. 347 * 348 * we've configured for 4M-4M-4M-4M 349 */ 350 } 351 352 353 static 354 void 355 iwreset(sc, warm) 356 struct iw_softc *sc; 357 int warm; 358 { 359 u_char reg, cmode, val = 0, mixer_image = 0; 360 361 reg = 0; /* XXX gcc -Wall */ 362 363 cmode = 0x6c; /* enhanced codec mode (full duplex) */ 364 365 /* reset */ 366 367 IW_WRITE_GENERAL_1(URSTI, 0x00); 368 delay(10); 369 IW_WRITE_GENERAL_1(URSTI, 0x07); 370 IW_WRITE_GENERAL_1(ICMPTI, 0x1f); /* disable DSP and uici and 371 * udci writes */ 372 IW_WRITE_GENERAL_1(IDECI, 0x7f); /* enable ints to ISA and 373 * codec access */ 374 IW_READ_GENERAL_1(IVERI, reg); 375 IW_WRITE_GENERAL_1(IVERI, reg | 0x01); /* hidden reg lock disable */ 376 IW_WRITE_GENERAL_1(UASBCI, 0x00); 377 378 /* synth enhanced mode (default), 0 active voices, disable ints */ 379 380 IW_WRITE_GENERAL_1(SGMI_WR, 0x01); /* enhanced mode, LFOs 381 * disabled */ 382 for (val = 0; val < 32; val++) { 383 /* set each synth sound volume to 0 */ 384 IW_WRITE_DIRECT_1(sc->p3xr + 2, sc->p3xr_h, val); 385 IW_WRITE_GENERAL_1(SVSI_WR, 0x00); 386 IW_WRITE_GENERAL_2(SASLI_WR, 0x0000); 387 IW_WRITE_GENERAL_2(SASHI_WR, 0x0000); 388 IW_WRITE_GENERAL_2(SAELI_WR, 0x0000); 389 IW_WRITE_GENERAL_2(SAEHI_WR, 0x0000); 390 IW_WRITE_GENERAL_2(SFCI_WR, 0x0000); 391 IW_WRITE_GENERAL_1(SACI_WR, 0x02); 392 IW_WRITE_GENERAL_1(SVSI_WR, 0x00); 393 IW_WRITE_GENERAL_1(SVEI_WR, 0x00); 394 IW_WRITE_GENERAL_2(SVLI_WR, 0x0000); 395 IW_WRITE_GENERAL_1(SVCI_WR, 0x02); 396 IW_WRITE_GENERAL_1(SMSI_WR, 0x02); 397 } 398 399 IW_WRITE_GENERAL_1(SAVI_WR, 0x00); 400 401 /* codec mode/init */ 402 403 /* first change mode to 1 */ 404 405 IW_WRITE_CODEC_1(CMODEI, 0x00); 406 407 /* and mode 3 */ 408 409 IW_WRITE_CODEC_1(CMODEI, cmode); 410 411 IW_READ_CODEC_1(CMODEI, reg); 412 413 DPRINTF(("cmode %x\n", reg)); 414 415 sc->revision = ((reg & 0x80) >> 3) | (reg & 0x0f); 416 417 IW_WRITE_DIRECT_1(sc->codec_index + 2, sc->p2xr_h, 0x00); 418 419 IW_WRITE_CODEC_1(CFIG1I | IW_MCE, 0x00); /* DMA 2 chan access */ 420 IW_WRITE_CODEC_1(CEXTI, 0x00); /* disable ints for now */ 421 422 423 IW_WRITE_CODEC_1(CLPCTI, 0x00); /* reset playback sample counters */ 424 IW_WRITE_CODEC_1(CUPCTI, 0x00); /* always upper byte last */ 425 IW_WRITE_CODEC_1(CFIG2I, 0x80); /* full voltage range, enable record 426 * and playback sample counters, and 427 * don't center output in case or 428 * FIFO underrun */ 429 IW_WRITE_CODEC_1(CFIG3I, 0xc0); /* enable record/playback irq (still 430 * turned off from CEXTI), max DMA 431 * rate */ 432 IW_WRITE_CODEC_1(CSR3I, 0x00); /* clear status 3 reg */ 433 434 435 IW_WRITE_CODEC_1(CLRCTI, 0x00); /* reset record sample counters */ 436 IW_WRITE_CODEC_1(CURCTI, 0x00); /* always upper byte last */ 437 438 439 IW_READ_GENERAL_1(IVERI, reg); 440 441 sc->vers = reg >> 4; 442 if (!warm) 443 snprintf(iw_device.version, sizeof(iw_device.version), "%d.%d", 444 sc->vers, sc->revision); 445 446 IW_WRITE_GENERAL_1(IDECI, 0x7f); /* irqs and codec decode 447 * enable */ 448 449 450 /* ports */ 451 452 if (!warm) { 453 iw_mixer_line_level(sc, IW_LINE_OUT, 255, 255); 454 iw_mixer_line_level(sc, IW_LINE_IN, 0, 0); 455 iw_mixer_line_level(sc, IW_AUX1, 0, 0); 456 iw_mixer_line_level(sc, IW_AUX2, 200, 200); /* CD */ 457 sc->sc_dac.off = 0; 458 iw_mixer_line_level(sc, IW_DAC, 200, 200); 459 460 iw_mixer_line_level(sc, IW_MIC_IN, 0, 0); 461 iw_mixer_line_level(sc, IW_REC, 0, 0); 462 iw_mixer_line_level(sc, IW_LOOPBACK, 0, 0); 463 iw_mixer_line_level(sc, IW_MONO_IN, 0, 0); 464 465 /* mem stuff */ 466 iw_meminit(sc); 467 468 } 469 IW_WRITE_CODEC_1(CEXTI, 0x02); /* codec int enable */ 470 471 /* clear _LDMACI */ 472 473 IW_WRITE_GENERAL_1(LDMACI, 0x00); 474 475 /* enable mixer paths */ 476 mixer_image = 0x0c; 477 IW_WRITE_DIRECT_1(sc->p2xr, sc->p2xr_h, mixer_image); 478 /* 479 * enable output, line in. disable mic in bit 0 = 0 -> line in on 480 * (from codec?) bit 1 = 0 -> output on bit 2 = 1 -> mic in on bit 3 481 * = 1 -> irq&drq pin enable bit 4 = 1 -> channel interrupts to chan 482 * 1 bit 5 = 1 -> enable midi loop back bit 6 = 0 -> irq latches 483 * URCR[2:0] bit 6 = 1 -> DMA latches URCR[2:0] 484 */ 485 486 487 IW_READ_DIRECT_1(sc->p2xr, sc->p2xr_h, mixer_image); 488 #ifdef AUDIO_DEBUG 489 if (!warm) 490 DPRINTF(("mix image %x \n", mixer_image)); 491 #endif 492 } 493 494 struct iw_codec_freq { 495 u_long freq; 496 u_char bits; 497 }; 498 499 int 500 iw_set_speed(sc, freq, in) 501 struct iw_softc *sc; 502 u_long freq; 503 char in; 504 { 505 u_char var, cfig3, reg; 506 507 static struct iw_codec_freq iw_cf[17] = { 508 #define FREQ_1 24576000 509 #define FREQ_2 16934400 510 #define XTAL1 0 511 #define XTAL2 1 512 {5510, 0x00 | XTAL2}, {6620, 0x0E | XTAL2}, 513 {8000, 0x00 | XTAL1}, {9600, 0x0E | XTAL1}, 514 {11025, 0x02 | XTAL2}, {16000, 0x02 | XTAL1}, 515 {18900, 0x04 | XTAL2}, {22050, 0x06 | XTAL2}, 516 {27420, 0x04 | XTAL1}, {32000, 0x06 | XTAL1}, 517 {33075, 0x0C | XTAL2}, {37800, 0x08 | XTAL2}, 518 {38400, 0x0A | XTAL1}, {44100, 0x0A | XTAL2}, 519 {44800, 0x08 | XTAL1}, {48000, 0x0C | XTAL1}, 520 {48000, 0x0C | XTAL1} /* really a dummy for indexing later */ 521 #undef XTAL1 522 #undef XTAL2 523 }; 524 525 cfig3 = 0; /* XXX gcc -Wall */ 526 527 /* 528 * if the frequency is between 3493Hz and 32KHz we can use a more 529 * accurate frequency than the ones listed above base on the formula 530 * FREQ/((16*(48+x))) where FREQ is either FREQ_1 (24576000Hz) or 531 * FREQ_2 (16934400Hz) and x is the value to be written to either 532 * CPVFI or CRVFI. To enable this option, bit 2 in CFIG3 needs to be 533 * set high 534 * 535 * NOT IMPLEMENTED! 536 * 537 * Note that if you have a 'bad' XTAL_1 (higher than 18.5 MHz), 44.8KHz 538 * and 38.4KHz modes will provide wrong frequencies to output. 539 */ 540 541 542 if (freq > 48000) 543 freq = 48000; 544 if (freq < 5510) 545 freq = 5510; 546 547 /* reset CFIG3[2] */ 548 549 IW_READ_CODEC_1(CFIG3I, cfig3); 550 551 cfig3 |= 0xc0; /* not full fifo treshhold */ 552 553 DPRINTF(("cfig3i = %x -> ", cfig3)); 554 555 cfig3 &= ~0x04; 556 IW_WRITE_CODEC_1(CFIG3I, cfig3); 557 IW_READ_CODEC_1(CFIG3I, cfig3); 558 559 DPRINTF(("%x\n", cfig3)); 560 561 for (var = 0; var < 16; var++) /* select closest frequency */ 562 if (freq <= iw_cf[var].freq) 563 break; 564 if (var != 16) 565 if (abs(freq - iw_cf[var].freq) > abs(iw_cf[var + 1].freq - freq)) 566 var++; 567 568 if (in) 569 IW_WRITE_CODEC_1(CRDFI | IW_MCE, sc->recfmtbits | iw_cf[var].bits); 570 else 571 IW_WRITE_CODEC_1(CPDFI | IW_MCE, sc->playfmtbits | iw_cf[var].bits); 572 freq = iw_cf[var].freq; 573 DPRINTF(("setting %s frequency to %d bits %x \n", 574 in ? "in" : "out", (int) freq, iw_cf[var].bits)); 575 576 IW_READ_CODEC_1(CPDFI, reg); 577 578 DPRINTF((" CPDFI %x ", reg)); 579 580 IW_READ_CODEC_1(CRDFI, reg); 581 582 DPRINTF((" CRDFI %x ", reg)); 583 584 return freq; 585 } 586 587 /* Encoding. */ 588 int 589 iw_query_encoding(addr, fp) 590 void *addr; 591 struct audio_encoding *fp; 592 { 593 /* 594 * LINEAR, ALAW, ULAW, ADPCM in HW, we'll use linear unsigned 595 * hardware mode for all 8-bit modes due to buggy (?) codec. 596 */ 597 598 /* 599 * except in wavetable synth. there we have only mu-law and 8 and 16 600 * bit linear data 601 */ 602 603 switch (fp->index) { 604 case 0: 605 strcpy(fp->name, AudioEulinear); 606 fp->encoding = AUDIO_ENCODING_ULINEAR_LE; 607 fp->precision = 8; 608 fp->flags = 0; 609 break; 610 case 1: 611 strcpy(fp->name, AudioEmulaw); 612 fp->encoding = AUDIO_ENCODING_ULAW; 613 fp->precision = 8; 614 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 615 break; 616 case 2: 617 strcpy(fp->name, AudioEalaw); 618 fp->encoding = AUDIO_ENCODING_ALAW; 619 fp->precision = 8; 620 fp->flags = AUDIO_ENCODINGFLAG_EMULATED; 621 break; 622 case 3: 623 strcpy(fp->name, AudioEadpcm); 624 fp->encoding = AUDIO_ENCODING_ADPCM; 625 fp->precision = 8; /* really 4 bit */ 626 fp->flags = 0; 627 break; 628 case 4: 629 strcpy(fp->name, AudioEslinear_le); 630 fp->encoding = AUDIO_ENCODING_SLINEAR_LE; 631 fp->precision = 16; 632 fp->flags = 0; 633 break; 634 case 5: 635 strcpy(fp->name, AudioEslinear_be); 636 fp->encoding = AUDIO_ENCODING_SLINEAR_BE; 637 fp->precision = 16; 638 fp->flags = 0; 639 break; 640 default: 641 return (EINVAL); 642 /* NOTREACHED */ 643 } 644 return (0); 645 } 646 647 648 649 u_long 650 iw_set_format(sc, precision, in) 651 struct iw_softc *sc; 652 u_long precision; 653 int in; 654 { 655 u_char data; 656 int encoding, channels; 657 658 encoding = in ? sc->rec_encoding : sc->play_encoding; 659 channels = in ? sc->rec_channels : sc->play_channels; 660 661 DPRINTF(("iw_set_format\n")); 662 663 switch (encoding) { 664 case AUDIO_ENCODING_ULAW: 665 data = 0x00; 666 break; 667 668 case AUDIO_ENCODING_ALAW: 669 data = 0x00; 670 break; 671 672 case AUDIO_ENCODING_SLINEAR_LE: 673 if (precision == 16) 674 data = 0x40; /* little endian. 0xc0 is big endian */ 675 else 676 data = 0x00; 677 break; 678 679 case AUDIO_ENCODING_SLINEAR_BE: 680 if (precision == 16) 681 data = 0xc0; 682 else 683 data = 0x00; 684 break; 685 686 case AUDIO_ENCODING_ADPCM: 687 data = 0xa0; 688 break; 689 690 default: 691 return -1; 692 } 693 694 if (channels == 2) 695 data |= 0x10; /* stereo */ 696 697 if (in) { 698 /* in */ 699 sc->recfmtbits = data; 700 /* This will zero the normal codec frequency, 701 * iw_set_speed should always be called afterwards. 702 */ 703 IW_WRITE_CODEC_1(CRDFI | IW_MCE, data); 704 } else { 705 /* out */ 706 sc->playfmtbits = data; 707 IW_WRITE_CODEC_1(CPDFI | IW_MCE, data); 708 } 709 710 DPRINTF(("formatbits %s %x", in ? "in" : "out", data)); 711 712 return encoding; 713 } 714 715 716 717 int 718 iw_set_params(addr, setmode, usemode, p, q) 719 void *addr; 720 int setmode; 721 int usemode; 722 struct audio_params *p; 723 struct audio_params *q; 724 { 725 struct iw_softc *sc = addr; 726 void (*swcode)__P((void *, u_char * buf, int cnt)) = NULL; 727 int factor = 1; 728 DPRINTF(("iw_setparams: code %d, prec %d, rate %d, chan %d\n", 729 (int) p->encoding, (int) p->precision, (int) p->sample_rate, 730 (int) p->channels)); 731 732 733 switch (p->encoding) { 734 case AUDIO_ENCODING_ULAW: 735 if (p->precision != 8) 736 return EINVAL; 737 swcode = setmode & AUMODE_PLAY ? mulaw_to_ulinear8 : ulinear8_to_mulaw; 738 factor = 1; 739 break; 740 case AUDIO_ENCODING_ALAW: 741 if (p->precision != 8) 742 return EINVAL; 743 swcode = setmode & AUMODE_PLAY ? alaw_to_ulinear8 : ulinear8_to_alaw; 744 factor = 1; 745 break; 746 case AUDIO_ENCODING_ADPCM: 747 if (p->precision != 8) 748 return EINVAL; 749 else 750 break; 751 752 case AUDIO_ENCODING_SLINEAR_LE: 753 case AUDIO_ENCODING_SLINEAR_BE: 754 if (p->precision != 8 && p->precision != 16) 755 return EINVAL; 756 else 757 break; 758 759 default: 760 return EINVAL; 761 762 } 763 764 if (setmode & AUMODE_PLAY) { 765 sc->play_channels = p->channels; 766 sc->play_encoding = p->encoding; 767 sc->play_precision = p->precision; 768 p->factor = factor; 769 p->sw_code = swcode; 770 iw_set_format(sc, p->precision, 0); 771 q->sample_rate = p->sample_rate = sc->sc_orate = 772 iw_set_speed(sc, p->sample_rate, 0); 773 } else { 774 #if 0 775 q->channels = sc->rec_channels = p->channels; 776 q->encoding = sc->rec_encoding = p->encoding; 777 q->precision = sc->rec_precision = p->precision; 778 #endif 779 sc->rec_channels = q->channels; 780 sc->rec_encoding = q->encoding; 781 sc->rec_precision = q->precision; 782 q->factor = factor; 783 q->sw_code = swcode; 784 785 iw_set_format(sc, p->precision, 1); 786 q->sample_rate = sc->sc_irate = 787 iw_set_speed(sc, q->sample_rate, 1); 788 } 789 return 0; 790 } 791 792 793 int 794 iw_round_blocksize(addr, blk) 795 void *addr; 796 int blk; 797 { 798 /* Round to a multiple of the biggest sample size. */ 799 return blk &= -4; 800 } 801 802 void 803 iw_mixer_line_level(sc, line, levl, levr) 804 struct iw_softc *sc; 805 int line; 806 int levl, levr; 807 { 808 u_char gainl, gainr, attenl, attenr; 809 810 switch (line) { 811 case IW_REC: 812 gainl = sc->sc_recsrcbits | (levl >> 4); 813 gainr = sc->sc_recsrcbits | (levr >> 4); 814 DPRINTF(("recording with %x", gainl)); 815 IW_WRITE_CODEC_1(CLICI, gainl); 816 IW_WRITE_CODEC_1(CRICI, gainr); 817 sc->sc_rec.voll = levl & 0xf0; 818 sc->sc_rec.volr = levr & 0xf0; 819 break; 820 821 case IW_AUX1: 822 823 gainl = (255 - levl) >> 3; 824 gainr = (255 - levr) >> 3; 825 826 /* mute if 0 level */ 827 if (levl == 0) 828 gainl |= 0x80; 829 if (levr == 0) 830 gainr |= 0x80; 831 832 IW_WRITE_CODEC_1(IW_LEFT_AUX1_PORT, gainl); 833 IW_WRITE_CODEC_1(IW_RIGHT_AUX1_PORT, gainr); 834 sc->sc_aux1.voll = levl & 0xf8; 835 sc->sc_aux1.volr = levr & 0xf8; 836 837 break; 838 839 case IW_AUX2: 840 841 gainl = (255 - levl) >> 3; 842 gainr = (255 - levr) >> 3; 843 844 /* mute if 0 level */ 845 if (levl == 0) 846 gainl |= 0x80; 847 if (levr == 0) 848 gainr |= 0x80; 849 850 IW_WRITE_CODEC_1(IW_LEFT_AUX2_PORT, gainl); 851 IW_WRITE_CODEC_1(IW_RIGHT_AUX2_PORT, gainr); 852 sc->sc_aux2.voll = levl & 0xf8; 853 sc->sc_aux2.volr = levr & 0xf8; 854 break; 855 case IW_DAC: 856 attenl = ((255 - levl) >> 2) | ((levl && !sc->sc_dac.off) ? 0 : 0x80); 857 attenr = ((255 - levr) >> 2) | ((levr && !sc->sc_dac.off) ? 0 : 0x80); 858 IW_WRITE_CODEC_1(CLDACI, attenl); 859 IW_WRITE_CODEC_1(CRDACI, attenr); 860 sc->sc_dac.voll = levl & 0xfc; 861 sc->sc_dac.volr = levr & 0xfc; 862 break; 863 case IW_LOOPBACK: 864 attenl = ((255 - levl) & 0xfc) | (levl ? 0x01 : 0); 865 IW_WRITE_CODEC_1(CLCI, attenl); 866 sc->sc_loopback.voll = levl & 0xfc; 867 break; 868 case IW_LINE_IN: 869 gainl = (levl >> 3) | (levl ? 0 : 0x80); 870 gainr = (levr >> 3) | (levr ? 0 : 0x80); 871 IW_WRITE_CODEC_1(CLLICI, gainl); 872 IW_WRITE_CODEC_1(CRLICI, gainr); 873 sc->sc_linein.voll = levl & 0xf8; 874 sc->sc_linein.volr = levr & 0xf8; 875 break; 876 case IW_MIC_IN: 877 gainl = ((255 - levl) >> 3) | (levl ? 0 : 0x80); 878 gainr = ((255 - levr) >> 3) | (levr ? 0 : 0x80); 879 IW_WRITE_CODEC_1(CLMICI, gainl); 880 IW_WRITE_CODEC_1(CRMICI, gainr); 881 sc->sc_mic.voll = levl & 0xf8; 882 sc->sc_mic.volr = levr & 0xf8; 883 break; 884 case IW_LINE_OUT: 885 attenl = ((255 - levl) >> 3) | (levl ? 0 : 0x80); 886 attenr = ((255 - levr) >> 3) | (levr ? 0 : 0x80); 887 IW_WRITE_CODEC_1(CLOAI, attenl); 888 IW_WRITE_CODEC_1(CROAI, attenr); 889 sc->sc_lineout.voll = levl & 0xf8; 890 sc->sc_lineout.volr = levr & 0xf8; 891 break; 892 case IW_MONO_IN: 893 attenl = ((255 - levl) >> 4) | (levl ? 0 : 0xc0); /* in/out mute */ 894 IW_WRITE_CODEC_1(CMONOI, attenl); 895 sc->sc_monoin.voll = levl & 0xf0; 896 break; 897 } 898 } 899 900 int 901 iw_commit_settings(addr) 902 void *addr; 903 { 904 return 0; 905 } 906 907 908 void 909 iw_trigger_dma(sc, io) 910 struct iw_softc *sc; 911 u_char io; 912 { 913 u_char reg; 914 int s; 915 916 s = splaudio(); 917 918 IW_READ_CODEC_1(CSR3I, reg); 919 IW_WRITE_CODEC_1(CSR3I, reg & ~(io == IW_DMA_PLAYBACK ? 0x10 : 0x20)); 920 921 IW_READ_CODEC_1(CFIG1I, reg); 922 923 IW_WRITE_CODEC_1(CFIG1I, reg | io); 924 925 /* let the counter run */ 926 IW_READ_CODEC_1(CFIG2I, reg); 927 IW_WRITE_CODEC_1(CFIG2I, reg & ~(io << 4)); 928 929 splx(s); 930 } 931 932 void 933 iw_stop_dma(sc, io, hard) 934 struct iw_softc *sc; 935 u_char io, hard; 936 { 937 u_char reg; 938 939 /* just stop the counter, no need to flush the fifo */ 940 IW_READ_CODEC_1(CFIG2I, reg); 941 IW_WRITE_CODEC_1(CFIG2I, (reg | (io << 4))); 942 943 if (hard) { 944 /* unless we're closing the device */ 945 IW_READ_CODEC_1(CFIG1I, reg); 946 IW_WRITE_CODEC_1(CFIG1I, reg & ~io); 947 } 948 } 949 950 void 951 iw_dma_count(sc, count, io) 952 struct iw_softc *sc; 953 u_short count; 954 int io; 955 { 956 if (io == IW_DMA_PLAYBACK) { 957 IW_WRITE_CODEC_1(CLPCTI, (u_char) (count & 0x00ff)); 958 IW_WRITE_CODEC_1(CUPCTI, (u_char) ((count >> 8) & 0x00ff)); 959 } else { 960 IW_WRITE_CODEC_1(CLRCTI, (u_char) (count & 0x00ff)); 961 IW_WRITE_CODEC_1(CURCTI, (u_char) ((count >> 8) & 0x00ff)); 962 } 963 } 964 965 int 966 iw_init_output(addr, buf, cc) 967 void *addr; 968 void *buf; 969 int cc; 970 { 971 struct iw_softc *sc = (struct iw_softc *) addr; 972 973 DPRINTF(("iw_init_output\n")); 974 975 isa_dmastart(sc->sc_ic, sc->sc_playdrq, buf, 976 cc, NULL, DMAMODE_WRITE | DMAMODE_LOOP, BUS_DMA_NOWAIT); 977 return 0; 978 } 979 980 int 981 iw_init_input(addr, buf, cc) 982 void *addr; 983 void *buf; 984 int cc; 985 { 986 struct iw_softc *sc = (struct iw_softc *) addr; 987 988 DPRINTF(("iw_init_input\n")); 989 990 isa_dmastart(sc->sc_ic, sc->sc_recdrq, buf, 991 cc, NULL, DMAMODE_READ | DMAMODE_LOOP, BUS_DMA_NOWAIT); 992 return 0; 993 } 994 995 996 int 997 iw_start_output(addr, p, cc, intr, arg) 998 void *addr; 999 void *p; 1000 int cc; 1001 void (*intr)__P((void *)); 1002 void *arg; 1003 { 1004 struct iw_softc *sc = addr; 1005 1006 #ifdef DIAGNOSTIC 1007 if (!intr) { 1008 printf("iw_start_output: no callback!\n"); 1009 return 1; 1010 } 1011 #endif 1012 1013 sc->sc_playintr = intr; 1014 sc->sc_playarg = arg; 1015 sc->sc_dma_flags |= DMAMODE_WRITE; 1016 sc->sc_playdma_bp = p; 1017 1018 isa_dmastart(sc->sc_ic, sc->sc_playdrq, sc->sc_playdma_bp, 1019 cc, NULL, DMAMODE_WRITE, BUS_DMA_NOWAIT); 1020 1021 1022 if (sc->play_encoding == AUDIO_ENCODING_ADPCM) 1023 cc >>= 2; 1024 if (sc->play_precision == 16) 1025 cc >>= 1; 1026 1027 if (sc->play_channels == 2 && sc->play_encoding != AUDIO_ENCODING_ADPCM) 1028 cc >>= 1; 1029 1030 cc -= iw_cc; 1031 1032 /* iw_dma_access(sc,1); */ 1033 if (cc != sc->sc_playdma_cnt) { 1034 iw_dma_count(sc, (u_short) cc, IW_DMA_PLAYBACK); 1035 sc->sc_playdma_cnt = cc; 1036 1037 iw_trigger_dma(sc, IW_DMA_PLAYBACK); 1038 } 1039 1040 #ifdef DIAGNOSTIC 1041 if (outputs != iw_ints) 1042 printf("iw_start_output: out %d, int %d\n", outputs, iw_ints); 1043 outputs++; 1044 #endif 1045 1046 return 0; 1047 } 1048 1049 1050 int 1051 iw_start_input(addr, p, cc, intr, arg) 1052 void *addr; 1053 void *p; 1054 int cc; 1055 void (*intr)__P((void *)); 1056 void *arg; 1057 { 1058 struct iw_softc *sc = addr; 1059 1060 #ifdef DIAGNOSTIC 1061 if (!intr) { 1062 printf("iw_start_input: no callback!\n"); 1063 return 1; 1064 } 1065 #endif 1066 1067 sc->sc_recintr = intr; 1068 sc->sc_recarg = arg; 1069 sc->sc_dma_flags |= DMAMODE_READ; 1070 sc->sc_recdma_bp = p; 1071 1072 isa_dmastart(sc->sc_ic, sc->sc_recdrq, sc->sc_recdma_bp, 1073 cc, NULL, DMAMODE_READ, BUS_DMA_NOWAIT); 1074 1075 1076 if (sc->rec_encoding == AUDIO_ENCODING_ADPCM) 1077 cc >>= 2; 1078 if (sc->rec_precision == 16) 1079 cc >>= 1; 1080 1081 if (sc->rec_channels == 2 && sc->rec_encoding != AUDIO_ENCODING_ADPCM) 1082 cc >>= 1; 1083 1084 cc -= iw_cc; 1085 1086 /* iw_dma_access(sc,0); */ 1087 if (sc->sc_recdma_cnt != cc) { 1088 iw_dma_count(sc, (u_short) cc, IW_DMA_RECORD); 1089 sc->sc_recdma_cnt = cc; 1090 /* iw_dma_ctrl(sc, IW_DMA_RECORD); */ 1091 iw_trigger_dma(sc, IW_DMA_RECORD); 1092 } 1093 1094 #ifdef DIAGNOSTIC 1095 if ((inputs != iw_inints)) 1096 printf("iw_start_input: in %d, inints %d\n", inputs, iw_inints); 1097 inputs++; 1098 #endif 1099 1100 return 0; 1101 } 1102 1103 1104 int 1105 iw_halt_output(addr) 1106 void *addr; 1107 { 1108 struct iw_softc *sc = addr; 1109 1110 iw_stop_dma(sc, IW_DMA_PLAYBACK, 0); 1111 return 0; 1112 } 1113 1114 1115 int 1116 iw_halt_input(addr) 1117 void *addr; 1118 { 1119 struct iw_softc *sc = addr; 1120 1121 iw_stop_dma(sc, IW_DMA_RECORD, 0); 1122 return 0; 1123 } 1124 1125 1126 int 1127 iw_speaker_ctl(addr, newstate) 1128 void *addr; 1129 int newstate; 1130 { 1131 struct iw_softc *sc = addr; 1132 u_char reg; 1133 if (newstate == SPKR_ON) { 1134 sc->sc_dac.off = 0; 1135 IW_READ_CODEC_1(CLDACI, reg); 1136 IW_WRITE_CODEC_1(CLDACI, reg & 0x7f); 1137 IW_READ_CODEC_1(CRDACI, reg); 1138 IW_WRITE_CODEC_1(CRDACI, reg & 0x7f); 1139 } else { 1140 /* SPKR_OFF */ 1141 sc->sc_dac.off = 1; 1142 IW_READ_CODEC_1(CLDACI, reg); 1143 IW_WRITE_CODEC_1(CLDACI, reg | 0x80); 1144 IW_READ_CODEC_1(CRDACI, reg); 1145 IW_WRITE_CODEC_1(CRDACI, reg | 0x80); 1146 } 1147 return 0; 1148 } 1149 1150 1151 int 1152 iw_getdev(addr, retp) 1153 void *addr; 1154 struct audio_device *retp; 1155 { 1156 *retp = iw_device; 1157 return 0; 1158 } 1159 1160 1161 int 1162 iw_setfd(addr, flag) 1163 void *addr; 1164 int flag; 1165 { 1166 return 0; 1167 } 1168 1169 1170 /* Mixer (in/out ports) */ 1171 int 1172 iw_set_port(addr, cp) 1173 void *addr; 1174 mixer_ctrl_t *cp; 1175 { 1176 struct iw_softc *sc = addr; 1177 u_char vall = 0, valr = 0; 1178 int error = EINVAL; 1179 1180 switch (cp->dev) { 1181 case IW_MIC_IN_LVL: 1182 if (cp->type == AUDIO_MIXER_VALUE) { 1183 error = 0; 1184 if (cp->un.value.num_channels == 1) { 1185 vall = valr = cp->un.value.level[0]; 1186 } else { 1187 vall = cp->un.value.level[0]; 1188 valr = cp->un.value.level[1]; 1189 } 1190 sc->sc_mic.voll = vall; 1191 sc->sc_mic.volr = valr; 1192 iw_mixer_line_level(sc, IW_MIC_IN, vall, valr); 1193 } 1194 break; 1195 case IW_AUX1_LVL: 1196 if (cp->type == AUDIO_MIXER_VALUE) { 1197 error = 0; 1198 if (cp->un.value.num_channels == 1) { 1199 vall = valr = cp->un.value.level[0]; 1200 } else { 1201 vall = cp->un.value.level[0]; 1202 valr = cp->un.value.level[1]; 1203 } 1204 sc->sc_aux1.voll = vall; 1205 sc->sc_aux1.volr = valr; 1206 iw_mixer_line_level(sc, IW_AUX1, vall, valr); 1207 } 1208 break; 1209 case IW_AUX2_LVL: 1210 if (cp->type == AUDIO_MIXER_VALUE) { 1211 error = 0; 1212 if (cp->un.value.num_channels == 1) { 1213 vall = valr = cp->un.value.level[0]; 1214 } else { 1215 vall = cp->un.value.level[0]; 1216 valr = cp->un.value.level[1]; 1217 } 1218 sc->sc_aux2.voll = vall; 1219 sc->sc_aux2.volr = valr; 1220 iw_mixer_line_level(sc, IW_AUX2, vall, valr); 1221 } 1222 break; 1223 case IW_LINE_IN_LVL: 1224 if (cp->type == AUDIO_MIXER_VALUE) { 1225 error = 0; 1226 if (cp->un.value.num_channels == 1) { 1227 vall = valr = cp->un.value.level[0]; 1228 } else { 1229 vall = cp->un.value.level[0]; 1230 valr = cp->un.value.level[1]; 1231 } 1232 sc->sc_linein.voll = vall; 1233 sc->sc_linein.volr = valr; 1234 iw_mixer_line_level(sc, IW_LINE_IN, vall, valr); 1235 } 1236 break; 1237 case IW_LINE_OUT_LVL: 1238 if (cp->type == AUDIO_MIXER_VALUE) { 1239 error = 0; 1240 if (cp->un.value.num_channels == 1) { 1241 vall = valr = cp->un.value.level[0]; 1242 } else { 1243 vall = cp->un.value.level[0]; 1244 valr = cp->un.value.level[1]; 1245 } 1246 sc->sc_lineout.voll = vall; 1247 sc->sc_lineout.volr = valr; 1248 iw_mixer_line_level(sc, IW_LINE_OUT, vall, valr); 1249 } 1250 break; 1251 case IW_REC_LVL: 1252 if (cp->type == AUDIO_MIXER_VALUE) { 1253 error = 0; 1254 if (cp->un.value.num_channels == 1) { 1255 vall = valr = cp->un.value.level[0]; 1256 } else { 1257 vall = cp->un.value.level[0]; 1258 valr = cp->un.value.level[1]; 1259 } 1260 sc->sc_rec.voll = vall; 1261 sc->sc_rec.volr = valr; 1262 iw_mixer_line_level(sc, IW_REC, vall, valr); 1263 } 1264 break; 1265 1266 case IW_DAC_LVL: 1267 if (cp->type == AUDIO_MIXER_VALUE) { 1268 error = 0; 1269 if (cp->un.value.num_channels == 1) { 1270 vall = valr = cp->un.value.level[0]; 1271 } else { 1272 vall = cp->un.value.level[0]; 1273 valr = cp->un.value.level[1]; 1274 } 1275 sc->sc_dac.voll = vall; 1276 sc->sc_dac.volr = valr; 1277 iw_mixer_line_level(sc, IW_DAC, vall, valr); 1278 } 1279 break; 1280 1281 case IW_LOOPBACK_LVL: 1282 if (cp->type == AUDIO_MIXER_VALUE) { 1283 error = 0; 1284 if (cp->un.value.num_channels != 1) { 1285 return EINVAL; 1286 } else { 1287 valr = vall = cp->un.value.level[0]; 1288 } 1289 sc->sc_loopback.voll = vall; 1290 sc->sc_loopback.volr = valr; 1291 iw_mixer_line_level(sc, IW_LOOPBACK, vall, valr); 1292 } 1293 break; 1294 1295 case IW_MONO_IN_LVL: 1296 if (cp->type == AUDIO_MIXER_VALUE) { 1297 error = 0; 1298 if (cp->un.value.num_channels != 1) { 1299 return EINVAL; 1300 } else { 1301 valr = vall = cp->un.value.level[0]; 1302 } 1303 sc->sc_monoin.voll = vall; 1304 sc->sc_monoin.volr = valr; 1305 iw_mixer_line_level(sc, IW_MONO_IN, vall, valr); 1306 } 1307 break; 1308 case IW_RECORD_SOURCE: 1309 error = 0; 1310 sc->sc_recsrcbits = cp->un.ord << 6; 1311 DPRINTF(("record source %d bits %x\n", cp->un.ord, sc->sc_recsrcbits)); 1312 iw_mixer_line_level(sc, IW_REC, sc->sc_rec.voll, sc->sc_rec.volr); 1313 break; 1314 } 1315 1316 return error; 1317 } 1318 1319 1320 int 1321 iw_get_port(addr, cp) 1322 void *addr; 1323 mixer_ctrl_t *cp; 1324 { 1325 struct iw_softc *sc = addr; 1326 1327 int error = EINVAL; 1328 1329 switch (cp->dev) { 1330 case IW_MIC_IN_LVL: 1331 if (cp->type == AUDIO_MIXER_VALUE) { 1332 cp->un.value.num_channels = 2; 1333 cp->un.value.level[0] = sc->sc_mic.voll; 1334 cp->un.value.level[1] = sc->sc_mic.volr; 1335 error = 0; 1336 } 1337 break; 1338 case IW_AUX1_LVL: 1339 if (cp->type == AUDIO_MIXER_VALUE) { 1340 cp->un.value.num_channels = 2; 1341 cp->un.value.level[0] = sc->sc_aux1.voll; 1342 cp->un.value.level[1] = sc->sc_aux1.volr; 1343 error = 0; 1344 } 1345 break; 1346 case IW_AUX2_LVL: 1347 if (cp->type == AUDIO_MIXER_VALUE) { 1348 cp->un.value.num_channels = 2; 1349 cp->un.value.level[0] = sc->sc_aux2.voll; 1350 cp->un.value.level[1] = sc->sc_aux2.volr; 1351 error = 0; 1352 } 1353 break; 1354 case IW_LINE_OUT_LVL: 1355 if (cp->type == AUDIO_MIXER_VALUE) { 1356 cp->un.value.num_channels = 2; 1357 cp->un.value.level[0] = sc->sc_lineout.voll; 1358 cp->un.value.level[1] = sc->sc_lineout.volr; 1359 error = 0; 1360 } 1361 break; 1362 case IW_LINE_IN_LVL: 1363 if (cp->type == AUDIO_MIXER_VALUE) { 1364 cp->un.value.num_channels = 2; 1365 cp->un.value.level[0] = sc->sc_linein.voll; 1366 cp->un.value.level[1] = sc->sc_linein.volr; 1367 error = 0; 1368 } 1369 case IW_REC_LVL: 1370 if (cp->type == AUDIO_MIXER_VALUE) { 1371 cp->un.value.num_channels = 2; 1372 cp->un.value.level[0] = sc->sc_rec.voll; 1373 cp->un.value.level[1] = sc->sc_rec.volr; 1374 error = 0; 1375 } 1376 break; 1377 1378 case IW_DAC_LVL: 1379 if (cp->type == AUDIO_MIXER_VALUE) { 1380 cp->un.value.num_channels = 2; 1381 cp->un.value.level[0] = sc->sc_dac.voll; 1382 cp->un.value.level[1] = sc->sc_dac.volr; 1383 error = 0; 1384 } 1385 break; 1386 1387 case IW_LOOPBACK_LVL: 1388 if (cp->type == AUDIO_MIXER_VALUE) { 1389 cp->un.value.num_channels = 1; 1390 cp->un.value.level[0] = sc->sc_loopback.voll; 1391 error = 0; 1392 } 1393 break; 1394 1395 case IW_MONO_IN_LVL: 1396 if (cp->type == AUDIO_MIXER_VALUE) { 1397 cp->un.value.num_channels = 1; 1398 cp->un.value.level[0] = sc->sc_monoin.voll; 1399 error = 0; 1400 } 1401 break; 1402 case IW_RECORD_SOURCE: 1403 cp->un.ord = sc->sc_recsrcbits >> 6; 1404 error = 0; 1405 break; 1406 } 1407 1408 return error; 1409 } 1410 1411 1412 1413 int 1414 iw_query_devinfo(addr, dip) 1415 void *addr; 1416 mixer_devinfo_t *dip; 1417 { 1418 1419 switch (dip->index) { 1420 case IW_MIC_IN_LVL: /* Microphone */ 1421 dip->type = AUDIO_MIXER_VALUE; 1422 dip->mixer_class = IW_INPUT_CLASS; 1423 dip->prev = AUDIO_MIXER_LAST; 1424 dip->next = AUDIO_MIXER_LAST; 1425 strcpy(dip->label.name, AudioNmicrophone); 1426 dip->un.v.num_channels = 2; 1427 strcpy(dip->un.v.units.name, AudioNvolume); 1428 break; 1429 case IW_AUX1_LVL: 1430 dip->type = AUDIO_MIXER_VALUE; 1431 dip->mixer_class = IW_INPUT_CLASS; 1432 dip->prev = AUDIO_MIXER_LAST; 1433 dip->next = AUDIO_MIXER_LAST; 1434 strcpy(dip->label.name, AudioNline); 1435 dip->un.v.num_channels = 2; 1436 strcpy(dip->un.v.units.name, AudioNvolume); 1437 break; 1438 case IW_AUX2_LVL: 1439 dip->type = AUDIO_MIXER_VALUE; 1440 dip->mixer_class = IW_INPUT_CLASS; 1441 dip->prev = AUDIO_MIXER_LAST; 1442 dip->next = AUDIO_MIXER_LAST; 1443 strcpy(dip->label.name, AudioNcd); 1444 dip->un.v.num_channels = 2; 1445 strcpy(dip->un.v.units.name, AudioNvolume); 1446 break; 1447 case IW_LINE_OUT_LVL: 1448 dip->type = AUDIO_MIXER_VALUE; 1449 dip->mixer_class = IW_OUTPUT_CLASS; 1450 dip->prev = AUDIO_MIXER_LAST; 1451 dip->next = AUDIO_MIXER_LAST; 1452 strcpy(dip->label.name, AudioNline); 1453 dip->un.v.num_channels = 2; 1454 strcpy(dip->un.v.units.name, AudioNvolume); 1455 break; 1456 case IW_DAC_LVL: 1457 dip->type = AUDIO_MIXER_VALUE; 1458 dip->mixer_class = IW_OUTPUT_CLASS; 1459 dip->prev = AUDIO_MIXER_LAST; 1460 dip->next = AUDIO_MIXER_LAST; 1461 strcpy(dip->label.name, AudioNdac); 1462 dip->un.v.num_channels = 2; 1463 strcpy(dip->un.v.units.name, AudioNvolume); 1464 break; 1465 case IW_LINE_IN_LVL: 1466 dip->type = AUDIO_MIXER_VALUE; 1467 dip->mixer_class = IW_INPUT_CLASS; 1468 dip->prev = AUDIO_MIXER_LAST; 1469 dip->next = AUDIO_MIXER_LAST; 1470 strcpy(dip->label.name, AudioNinput); 1471 dip->un.v.num_channels = 2; 1472 strcpy(dip->un.v.units.name, AudioNvolume); 1473 break; 1474 case IW_MONO_IN_LVL: 1475 dip->type = AUDIO_MIXER_VALUE; 1476 dip->mixer_class = IW_INPUT_CLASS; 1477 dip->prev = AUDIO_MIXER_LAST; 1478 dip->next = AUDIO_MIXER_LAST; 1479 strcpy(dip->label.name, AudioNmono); 1480 dip->un.v.num_channels = 1; 1481 strcpy(dip->un.v.units.name, AudioNvolume); 1482 break; 1483 1484 case IW_REC_LVL: /* record level */ 1485 dip->type = AUDIO_MIXER_VALUE; 1486 dip->mixer_class = IW_RECORD_CLASS; 1487 dip->prev = AUDIO_MIXER_LAST; 1488 dip->next = AUDIO_MIXER_LAST; 1489 strcpy(dip->label.name, AudioNrecord); 1490 dip->un.v.num_channels = 2; 1491 strcpy(dip->un.v.units.name, AudioNvolume); 1492 break; 1493 1494 case IW_LOOPBACK_LVL: 1495 dip->type = AUDIO_MIXER_VALUE; 1496 dip->mixer_class = IW_RECORD_CLASS; 1497 dip->prev = AUDIO_MIXER_LAST; 1498 dip->next = AUDIO_MIXER_LAST; 1499 strcpy(dip->label.name, "filter"); 1500 dip->un.v.num_channels = 1; 1501 strcpy(dip->un.v.units.name, AudioNvolume); 1502 break; 1503 1504 case IW_RECORD_SOURCE: 1505 dip->mixer_class = IW_RECORD_CLASS; 1506 dip->type = AUDIO_MIXER_ENUM; 1507 dip->prev = AUDIO_MIXER_LAST; 1508 dip->next = AUDIO_MIXER_LAST; 1509 strcpy(dip->label.name, AudioNsource); 1510 dip->un.e.num_mem = 4; 1511 strcpy(dip->un.e.member[0].label.name, AudioNline); 1512 dip->un.e.member[0].ord = IW_LINE_IN_SRC; 1513 strcpy(dip->un.e.member[1].label.name, "aux1"); 1514 dip->un.e.member[1].ord = IW_AUX1_SRC; 1515 strcpy(dip->un.e.member[2].label.name, AudioNmicrophone); 1516 dip->un.e.member[2].ord = IW_MIC_IN_SRC; 1517 strcpy(dip->un.e.member[3].label.name, AudioNmixerout); 1518 dip->un.e.member[3].ord = IW_MIX_OUT_SRC; 1519 break; 1520 case IW_INPUT_CLASS: 1521 dip->type = AUDIO_MIXER_CLASS; 1522 dip->mixer_class = IW_INPUT_CLASS; 1523 dip->next = dip->prev = AUDIO_MIXER_LAST; 1524 strcpy(dip->label.name, AudioCinputs); 1525 break; 1526 case IW_OUTPUT_CLASS: 1527 dip->type = AUDIO_MIXER_CLASS; 1528 dip->mixer_class = IW_OUTPUT_CLASS; 1529 dip->next = dip->prev = AUDIO_MIXER_LAST; 1530 strcpy(dip->label.name, AudioCoutputs); 1531 break; 1532 case IW_RECORD_CLASS: /* record source class */ 1533 dip->type = AUDIO_MIXER_CLASS; 1534 dip->mixer_class = IW_RECORD_CLASS; 1535 dip->next = dip->prev = AUDIO_MIXER_LAST; 1536 strcpy(dip->label.name, AudioCrecord); 1537 return 0; 1538 default: 1539 return ENXIO; 1540 } 1541 return 0; 1542 } 1543 1544 1545 void * 1546 iw_malloc(addr, direction, size, pool, flags) 1547 void *addr; 1548 int direction; 1549 size_t size; 1550 struct malloc_type *pool; 1551 int flags; 1552 { 1553 struct iw_softc *sc = addr; 1554 int drq; 1555 1556 if (direction == AUMODE_PLAY) 1557 drq = sc->sc_playdrq; 1558 else 1559 drq = sc->sc_recdrq; 1560 return (isa_malloc(sc->sc_ic, drq, size, pool, flags)); 1561 } 1562 1563 void 1564 iw_free(addr, ptr, pool) 1565 void *addr; 1566 void *ptr; 1567 struct malloc_type *pool; 1568 { 1569 isa_free(ptr, pool); 1570 } 1571 1572 size_t 1573 iw_round_buffersize(addr, direction, size) 1574 void *addr; 1575 int direction; 1576 size_t size; 1577 { 1578 struct iw_softc *sc = addr; 1579 bus_size_t maxsize; 1580 1581 if (direction == AUMODE_PLAY) 1582 maxsize = sc->sc_play_maxsize; 1583 else 1584 maxsize = sc->sc_rec_maxsize; 1585 1586 if (size > maxsize) 1587 size = maxsize; 1588 return (size); 1589 } 1590 1591 paddr_t 1592 iw_mappage(addr, mem, off, prot) 1593 void *addr; 1594 void *mem; 1595 off_t off; 1596 int prot; 1597 { 1598 return isa_mappage(mem, off, prot); 1599 } 1600 1601 int 1602 iw_get_props(addr) 1603 void *addr; 1604 { 1605 struct iw_softc *sc = addr; 1606 return AUDIO_PROP_MMAP | 1607 (sc->sc_fullduplex ? AUDIO_PROP_FULLDUPLEX : 0); 1608 } 1609