xref: /netbsd-src/sys/dev/ic/intersil7170.c (revision 8b0f9554ff8762542c4defc4f70e1eb76fb508fa)
1 /*	$NetBSD: intersil7170.c,v 1.9 2007/10/19 11:59:54 ad Exp $ */
2 /*-
3  * Copyright (c) 2000 The NetBSD Foundation, Inc.
4  * All rights reserved.
5  *
6  * This code is derived from software contributed to The NetBSD Foundation
7  * by Paul Kranenburg.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *        This product includes software developed by the NetBSD
20  *        Foundation, Inc. and its contributors.
21  * 4. Neither the name of The NetBSD Foundation nor the names of its
22  *    contributors may be used to endorse or promote products derived
23  *    from this software without specific prior written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
26  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 /*
39  * Intersil 7170 time-of-day chip subroutines.
40  */
41 
42 #include <sys/cdefs.h>
43 __KERNEL_RCSID(0, "$NetBSD: intersil7170.c,v 1.9 2007/10/19 11:59:54 ad Exp $");
44 
45 #include <sys/param.h>
46 #include <sys/malloc.h>
47 #include <sys/systm.h>
48 #include <sys/device.h>
49 #include <sys/errno.h>
50 
51 #include <sys/bus.h>
52 #include <dev/clock_subr.h>
53 #include <dev/ic/intersil7170reg.h>
54 #include <dev/ic/intersil7170var.h>
55 
56 int intersil7170_gettime_ymdhms(todr_chip_handle_t, struct clock_ymdhms *);
57 int intersil7170_settime_ymdhms(todr_chip_handle_t, struct clock_ymdhms *);
58 
59 void
60 intersil7170_attach(struct intersil7170_softc *sc)
61 {
62 	todr_chip_handle_t handle;
63 
64 	printf(": intersil7170");
65 
66 	handle = &sc->sc_handle;
67 
68 	handle->cookie = sc;
69 	handle->todr_gettime = NULL;
70 	handle->todr_settime = NULL;
71 	handle->todr_gettime_ymdhms = intersil7170_gettime_ymdhms;
72 	handle->todr_settime_ymdhms = intersil7170_settime_ymdhms;
73 	handle->todr_setwen = NULL;
74 }
75 
76 /*
77  * Set up the system's time, given a `reasonable' time value.
78  */
79 int
80 intersil7170_gettime_ymdhms(todr_chip_handle_t handle, struct clock_ymdhms *dt)
81 {
82 	struct intersil7170_softc *sc = handle->cookie;
83 	bus_space_tag_t bt = sc->sc_bst;
84 	bus_space_handle_t bh = sc->sc_bsh;
85 	uint8_t cmd;
86 	int year;
87 	int s;
88 
89 	/* No interrupts while we're fiddling with the chip */
90 	s = splhigh();
91 
92 	/* Enable read (stop time) */
93 	cmd = INTERSIL_COMMAND(INTERSIL_CMD_STOP, INTERSIL_CMD_IENABLE);
94 	bus_space_write_1(bt, bh, INTERSIL_ICMD, cmd);
95 
96 	/* The order of reading out the clock elements is important */
97 	(void)bus_space_read_1(bt, bh, INTERSIL_ICSEC);	/* not used */
98 	dt->dt_hour = bus_space_read_1(bt, bh, INTERSIL_IHOUR);
99 	dt->dt_min = bus_space_read_1(bt, bh, INTERSIL_IMIN);
100 	dt->dt_sec = bus_space_read_1(bt, bh, INTERSIL_ISEC);
101 	dt->dt_mon = bus_space_read_1(bt, bh, INTERSIL_IMON);
102 	dt->dt_day = bus_space_read_1(bt, bh, INTERSIL_IDAY);
103 	year = bus_space_read_1(bt, bh, INTERSIL_IYEAR);
104 	dt->dt_wday = bus_space_read_1(bt, bh, INTERSIL_IDOW);
105 
106 	/* Done writing (time wears on) */
107 	cmd = INTERSIL_COMMAND(INTERSIL_CMD_RUN, INTERSIL_CMD_IENABLE);
108 	bus_space_write_1(bt, bh, INTERSIL_ICMD, cmd);
109 	splx(s);
110 
111 	year += sc->sc_year0;
112 	if (year < POSIX_BASE_YEAR &&
113 	    (sc->sc_flag & INTERSIL7170_NO_CENT_ADJUST) == 0)
114 		year += 100;
115 
116 	dt->dt_year = year;
117 
118 	return 0;
119 }
120 
121 /*
122  * Reset the clock based on the current time.
123  */
124 int
125 intersil7170_settime_ymdhms(todr_chip_handle_t handle, struct clock_ymdhms *dt)
126 {
127 	struct intersil7170_softc *sc = handle->cookie;
128 	bus_space_tag_t bt = sc->sc_bst;
129 	bus_space_handle_t bh = sc->sc_bsh;
130 	uint8_t cmd;
131 	int year;
132 	int s;
133 
134 	year = dt->dt_year - sc->sc_year0;
135 	if (year > 99 && (sc->sc_flag & INTERSIL7170_NO_CENT_ADJUST) == 0)
136 		year -= 100;
137 
138 	/* No interrupts while we're fiddling with the chip */
139 	s = splhigh();
140 
141 	/* Enable write (stop time) */
142 	cmd = INTERSIL_COMMAND(INTERSIL_CMD_STOP, INTERSIL_CMD_IENABLE);
143 	bus_space_write_1(bt, bh, INTERSIL_ICMD, cmd);
144 
145 	/* The order of reading writing the clock elements is important */
146 	bus_space_write_1(bt, bh, INTERSIL_ICSEC, 0);
147 	bus_space_write_1(bt, bh, INTERSIL_IHOUR, dt->dt_hour);
148 	bus_space_write_1(bt, bh, INTERSIL_IMIN, dt->dt_min);
149 	bus_space_write_1(bt, bh, INTERSIL_ISEC, dt->dt_sec);
150 	bus_space_write_1(bt, bh, INTERSIL_IMON, dt->dt_mon);
151 	bus_space_write_1(bt, bh, INTERSIL_IDAY, dt->dt_day);
152 	bus_space_write_1(bt, bh, INTERSIL_IYEAR, year);
153 	bus_space_write_1(bt, bh, INTERSIL_IDOW, dt->dt_wday);
154 
155 	/* Done writing (time wears on) */
156 	cmd = INTERSIL_COMMAND(INTERSIL_CMD_RUN, INTERSIL_CMD_IENABLE);
157 	bus_space_write_1(bt, bh, INTERSIL_ICMD, cmd);
158 	splx(s);
159 
160 	return 0;
161 }
162