xref: /netbsd-src/sys/dev/ic/dwc_mmc_var.h (revision fe36728d9e37b7489822cd5746cc10ee2bdd5510)
1*fe36728dSjmcneill /* $NetBSD: dwc_mmc_var.h,v 1.15 2022/01/09 15:03:43 jmcneill Exp $ */
221d168c0Sjmcneill 
321d168c0Sjmcneill /*-
45912d346Sjmcneill  * Copyright (c) 2014-2017 Jared McNeill <jmcneill@invisible.ca>
521d168c0Sjmcneill  * All rights reserved.
621d168c0Sjmcneill  *
721d168c0Sjmcneill  * Redistribution and use in source and binary forms, with or without
821d168c0Sjmcneill  * modification, are permitted provided that the following conditions
921d168c0Sjmcneill  * are met:
1021d168c0Sjmcneill  * 1. Redistributions of source code must retain the above copyright
1121d168c0Sjmcneill  *    notice, this list of conditions and the following disclaimer.
1221d168c0Sjmcneill  * 2. Redistributions in binary form must reproduce the above copyright
1321d168c0Sjmcneill  *    notice, this list of conditions and the following disclaimer in the
1421d168c0Sjmcneill  *    documentation and/or other materials provided with the distribution.
1521d168c0Sjmcneill  *
1621d168c0Sjmcneill  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
1721d168c0Sjmcneill  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
1821d168c0Sjmcneill  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
1921d168c0Sjmcneill  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
2021d168c0Sjmcneill  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
2121d168c0Sjmcneill  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
2221d168c0Sjmcneill  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
2321d168c0Sjmcneill  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
2421d168c0Sjmcneill  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
2521d168c0Sjmcneill  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
2621d168c0Sjmcneill  * SUCH DAMAGE.
2721d168c0Sjmcneill  */
2821d168c0Sjmcneill 
2921d168c0Sjmcneill #ifndef _DWC_MMC_VAR_H
3021d168c0Sjmcneill #define _DWC_MMC_VAR_H
3121d168c0Sjmcneill 
3221d168c0Sjmcneill struct dwc_mmc_softc {
3321d168c0Sjmcneill 	device_t sc_dev;
3421d168c0Sjmcneill 	bus_space_tag_t sc_bst;
3521d168c0Sjmcneill 	bus_space_handle_t sc_bsh;
365912d346Sjmcneill 	bus_space_handle_t sc_clk_bsh;
3721d168c0Sjmcneill 	bus_dma_tag_t sc_dmat;
3821d168c0Sjmcneill 
395912d346Sjmcneill 	u_int sc_flags;
405912d346Sjmcneill #define	DWC_MMC_F_DMA		__BIT(0)
415912d346Sjmcneill #define	DWC_MMC_F_USE_HOLD_REG	__BIT(1)
4240fd064dSjmcneill #define	DWC_MMC_F_PWREN_INV	__BIT(2)
43*fe36728dSjmcneill #define	DWC_MMC_F_BROKEN_CD	__BIT(3)
44*fe36728dSjmcneill #define	DWC_MMC_F_NON_REMOVABLE	__BIT(4)
455912d346Sjmcneill 	uint32_t sc_fifo_reg;
465912d346Sjmcneill 	uint32_t sc_fifo_depth;
475912d346Sjmcneill 	u_int sc_clock_freq;
4840fd064dSjmcneill 	u_int sc_bus_width;
49bf24108eSjmcneill 	bool sc_card_inited;
50bc8d1afbSskrll 	u_int sc_verid;
515912d346Sjmcneill 
525912d346Sjmcneill 	void *sc_ih;
53bf24108eSjmcneill 	kmutex_t sc_lock;
5421d168c0Sjmcneill 	kmutex_t sc_intr_lock;
5521d168c0Sjmcneill 	kcondvar_t sc_intr_cv;
565912d346Sjmcneill 
575912d346Sjmcneill 	int sc_mmc_width;
585912d346Sjmcneill 	int sc_mmc_port;
595912d346Sjmcneill 
60e734e7f1Sjmcneill 	u_int sc_ciu_div;
61e734e7f1Sjmcneill 
625912d346Sjmcneill 	device_t sc_sdmmc_dev;
635912d346Sjmcneill 
645912d346Sjmcneill 	uint32_t sc_idma_xferlen;
655912d346Sjmcneill 	bus_dma_segment_t sc_idma_segs[1];
665912d346Sjmcneill 	int sc_idma_nsegs;
675912d346Sjmcneill 	bus_size_t sc_idma_size;
685912d346Sjmcneill 	bus_dmamap_t sc_idma_map;
695912d346Sjmcneill 	int sc_idma_ndesc;
705912d346Sjmcneill 	void *sc_idma_desc;
7121d168c0Sjmcneill 
7226e0c5cbSjmcneill 	bus_dmamap_t sc_dmabounce_map;
7326e0c5cbSjmcneill 	void *sc_dmabounce_buf;
7426e0c5cbSjmcneill 	size_t sc_dmabounce_buflen;
7526e0c5cbSjmcneill 
7626e0c5cbSjmcneill 	uint32_t sc_intr_card;
77c1484821Sjmcneill 	uint32_t sc_intr_cardmask;
7826e0c5cbSjmcneill 	struct sdmmc_command *sc_curcmd;
7926e0c5cbSjmcneill 	bool sc_wait_dma;
8026e0c5cbSjmcneill 	bool sc_wait_cmd;
8126e0c5cbSjmcneill 	bool sc_wait_data;
825912d346Sjmcneill 
8340fd064dSjmcneill 	void (*sc_pre_power_on)(struct dwc_mmc_softc *);
8440fd064dSjmcneill 	void (*sc_post_power_on)(struct dwc_mmc_softc *);
8540fd064dSjmcneill 
865912d346Sjmcneill 	int (*sc_card_detect)(struct dwc_mmc_softc *);
875912d346Sjmcneill 	int (*sc_write_protect)(struct dwc_mmc_softc *);
885912d346Sjmcneill 	void (*sc_set_led)(struct dwc_mmc_softc *, int);
89a4c07ed0Sjmcneill 	int (*sc_bus_clock)(struct dwc_mmc_softc *, int);
9040fd064dSjmcneill 	int (*sc_signal_voltage)(struct dwc_mmc_softc *, int);
9121d168c0Sjmcneill };
9221d168c0Sjmcneill 
935912d346Sjmcneill int	dwc_mmc_init(struct dwc_mmc_softc *);
9421d168c0Sjmcneill int	dwc_mmc_intr(void *);
9521d168c0Sjmcneill 
9621d168c0Sjmcneill #endif /* !_DWC_MMC_VAR_H */
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