1 /* $NetBSD: dwc_eqos_var.h,v 1.4 2022/08/24 19:22:37 ryo Exp $ */ 2 3 /*- 4 * Copyright (c) 2022 Jared McNeill <jmcneill@invisible.ca> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 22 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 /* 30 * DesignWare Ethernet Quality-of-Service controller 31 */ 32 33 #ifndef _DWC_EQOS_VAR_H 34 #define _DWC_EQOS_VAR_H 35 36 #include <dev/ic/dwc_eqos_reg.h> 37 38 #define EQOS_DMA_DESC_COUNT 256 39 40 struct eqos_bufmap { 41 bus_dmamap_t map; 42 struct mbuf *mbuf; 43 }; 44 45 struct eqos_ring { 46 bus_dmamap_t desc_map; 47 bus_dma_segment_t desc_dmaseg; 48 struct eqos_dma_desc *desc_ring; 49 bus_addr_t desc_ring_paddr; 50 struct eqos_bufmap buf_map[EQOS_DMA_DESC_COUNT]; 51 u_int cur, next, queued; 52 }; 53 54 struct eqos_softc { 55 device_t sc_dev; 56 bus_space_tag_t sc_bst; 57 bus_space_handle_t sc_bsh; 58 bus_dma_tag_t sc_dmat; 59 int sc_phy_id; 60 uint32_t sc_csr_clock; 61 uint32_t sc_clock_range; 62 63 uint32_t sc_hw_feature[4]; 64 65 struct ethercom sc_ec; 66 struct mii_data sc_mii; 67 callout_t sc_stat_ch; 68 kmutex_t sc_lock; 69 kmutex_t sc_txlock; 70 71 struct eqos_ring sc_tx; 72 struct eqos_ring sc_rx; 73 74 /* receiving context for jumbo frame */ 75 bool sc_rx_discarding; 76 struct mbuf *sc_rx_receiving_m; 77 struct mbuf *sc_rx_receiving_m_last; 78 79 krndsource_t sc_rndsource; 80 81 /* Indents indicate groups within evcnt. */ 82 struct evcnt sc_ev_intr; 83 struct evcnt sc_ev_rxintr; 84 struct evcnt sc_ev_txintr; 85 struct evcnt sc_ev_mac; 86 struct evcnt sc_ev_mtl; 87 struct evcnt sc_ev_mtl_debugdata; 88 struct evcnt sc_ev_mtl_rxovfis; 89 struct evcnt sc_ev_mtl_txovfis; 90 struct evcnt sc_ev_status; 91 struct evcnt sc_ev_rwt; 92 struct evcnt sc_ev_excol; 93 struct evcnt sc_ev_lcol; 94 struct evcnt sc_ev_exdef; 95 struct evcnt sc_ev_lcarr; 96 struct evcnt sc_ev_ncarr; 97 struct evcnt sc_ev_tjt; 98 }; 99 100 int eqos_attach(struct eqos_softc *); 101 int eqos_intr(void *); 102 103 #endif /* !_DWC_EQOS_VAR_H */ 104