xref: /netbsd-src/sys/dev/ic/dp8390var.h (revision fdecd6a253f999ae92b139670d9e15cc9df4497c)
1 /*	$NetBSD: dp8390var.h,v 1.2 1997/04/30 18:09:16 scottr Exp $	*/
2 
3 /*
4  * Device driver for National Semiconductor DS8390/WD83C690 based ethernet
5  * adapters.
6  *
7  * Copyright (c) 1994, 1995 Charles M. Hannum.  All rights reserved.
8  *
9  * Copyright (C) 1993, David Greenman.  This software may be used, modified,
10  * copied, distributed, and sold, in both source and binary form provided that
11  * the above copyright and these terms are retained.  Under no circumstances is
12  * the author responsible for the proper functioning of this software, nor does
13  * the author assume any responsibility for damages incurred with its use.
14  */
15 
16 #define INTERFACE_NAME_LEN	32
17 
18 /*
19  * dp8390_softc: per line info and status
20  */
21 struct dp8390_softc {
22 	struct device	sc_dev;
23 	void	*sc_ih;
24 	int	sc_flags;	/* interface flags, from config */
25 
26 	struct ethercom sc_ec;	/* ethernet common */
27 
28 	char	*type_str;	/* type string */
29 	u_int	type;		/* interface type code */
30 	u_int	vendor;		/* interface vendor */
31 
32 	bus_space_tag_t	sc_regt;	/* NIC register space tag */
33 	bus_space_handle_t sc_regh;	/* NIC register space handle */
34 	bus_space_tag_t	sc_buft;	/* Buffer space tag */
35 	bus_space_handle_t sc_bufh;	/* Buffer space handle */
36 
37 	bus_size_t sc_reg_map[16];	/* register map (offsets) */
38 
39 	u_char	is790;		/* NIC is a 790 */
40 
41 	u_int8_t cr_proto;	/* values always set in CR */
42 	u_int8_t dcr_reg;	/* override DCR iff LS is set */
43 
44 	int	mem_start;	/* offset of NIC memory */
45 	int	mem_end;	/* offset of NIC memory end */
46 	int	mem_size;	/* total shared memory size */
47 	int	mem_ring;	/* offset of start of RX ring-buffer */
48 
49 	u_short	txb_cnt;	/* Number of transmit buffers */
50 	u_short	txb_inuse;	/* number of transmit buffers active */
51 
52 	u_short	txb_new;	/* pointer to where new buffer will be added */
53 	u_short	txb_next_tx;	/* pointer to next buffer ready to xmit */
54 	u_short	txb_len[8];	/* buffered xmit buffer lengths */
55 	u_short	tx_page_start;	/* first page of TX buffer area */
56 	u_short	rec_page_start; /* first page of RX ring-buffer */
57 	u_short	rec_page_stop;	/* last page of RX ring-buffer */
58 	u_short	next_packet;	/* pointer to next unread RX packet */
59 
60 	u_int8_t sc_enaddr[6];	/* storage for MAC address */
61 
62 	int	(*test_mem) __P((struct dp8390_softc *));
63 	void	(*init_card) __P((struct dp8390_softc *));
64 	void	(*read_hdr) __P((struct dp8390_softc *,
65 		    int, struct dp8390_ring *));
66 	void	(*recv_int) __P((struct dp8390_softc *));
67 	int	(*ring_copy) __P((struct dp8390_softc *,
68 		    int, caddr_t, u_short));
69 	int	(*write_mbuf) __P((struct dp8390_softc *, struct mbuf *, int));
70 };
71 
72 /*
73  * Vendor types
74  */
75 #define DP8390_VENDOR_UNKNOWN	0xff	/* Unknown network card */
76 #define DP8390_VENDOR_WD_SMC	0x00	/* Western Digital/SMC */
77 #define DP8390_VENDOR_3COM	0x01	/* 3Com */
78 #define DP8390_VENDOR_NOVELL	0x02	/* Novell */
79 #define DP8390_VENDOR_APPLE	0x10	/* Apple Ethernet card */
80 #define DP8390_VENDOR_INTERLAN	0x11	/* Interlan A310 card (GatorCard) */
81 #define DP8390_VENDOR_DAYNA	0x12	/* DaynaPORT E/30s (and others?) */
82 #define DP8390_VENDOR_ASANTE	0x13	/* Asante MacCon II/E */
83 #define DP8390_VENDOR_FARALLON	0x14	/* Farallon EtherMac II-TP */
84 #define DP8390_VENDOR_FOCUS	0x15	/* FOCUS Enhancements EtherLAN */
85 #define DP8390_VENDOR_KINETICS	0x16	/* Kinetics EtherPort SE/30 */
86 
87 /*
88  * Compile-time config flags
89  */
90 /*
91  * This sets the default for enabling/disablng the tranceiver.
92  */
93 #define DP8390_DISABLE_TRANCEIVER	0x0001
94 
95 /*
96  * This forces the board to be used in 8/16-bit mode even if it autoconfigs
97  * differently.
98  */
99 #define DP8390_FORCE_8BIT_MODE		0x0002
100 #define DP8390_FORCE_16BIT_MODE		0x0004
101 
102 /*
103  * This disables the use of multiple transmit buffers.
104  */
105 #define DP8390_NO_MULTI_BUFFERING	0x0008
106 
107 /*
108  * This forces all operations with the NIC memory to use Programmed I/O (i.e.
109  * not via shared memory).
110  */
111 #define DP8390_FORCE_PIO		0x0010
112 
113 /*
114  * NIC register access macros
115  */
116 #define NIC_GET(t, h, reg)	(bus_space_read_1(t, h,			\
117 				    ((sc)->sc_reg_map[reg])))
118 #define NIC_PUT(t, h, reg, val)	(bus_space_write_1(t, h,		\
119 				    ((sc)->sc_reg_map[reg]), (val)))
120 
121 int	dp8390_config __P((struct dp8390_softc *));
122 void	dp8390_intr __P((void *, int));
123 int	dp8390_ioctl __P((struct ifnet *, u_long, caddr_t));
124 void	dp8390_start __P((struct ifnet *));
125 void	dp8390_watchdog __P((struct ifnet *));
126 void	dp8390_reset __P((struct dp8390_softc *));
127 void	dp8390_init __P((struct dp8390_softc *));
128 void	dp8390_stop __P((struct dp8390_softc *));
129 
130 void	dp8390_rint __P((struct dp8390_softc *));
131 
132 void	dp8390_getmcaf __P((struct ethercom *, u_int8_t *));
133 struct mbuf *dp8390_get __P((struct dp8390_softc *, int, u_short));
134 void	dp8390_read __P((struct dp8390_softc *, int, u_short));
135