1 /* $NetBSD: cy.c,v 1.40 2006/03/05 17:33:33 christos Exp $ */ 2 3 /* 4 * cy.c 5 * 6 * Driver for Cyclades Cyclom-8/16/32 multiport serial cards 7 * (currently not tested with Cyclom-32 cards) 8 * 9 * Timo Rossi, 1996 10 * 11 * Supports both ISA and PCI Cyclom cards 12 * 13 * Lots of debug output can be enabled by defining CY_DEBUG 14 * Some debugging counters (number of receive/transmit interrupts etc.) 15 * can be enabled by defining CY_DEBUG1 16 */ 17 18 #include <sys/cdefs.h> 19 __KERNEL_RCSID(0, "$NetBSD: cy.c,v 1.40 2006/03/05 17:33:33 christos Exp $"); 20 21 #include <sys/param.h> 22 #include <sys/ioctl.h> 23 #include <sys/syslog.h> 24 #include <sys/fcntl.h> 25 #include <sys/tty.h> 26 #include <sys/proc.h> 27 #include <sys/conf.h> 28 #include <sys/user.h> 29 #include <sys/ioctl.h> 30 #include <sys/select.h> 31 #include <sys/device.h> 32 #include <sys/malloc.h> 33 #include <sys/systm.h> 34 #include <sys/callout.h> 35 36 #include <machine/bus.h> 37 38 #include <dev/ic/cd1400reg.h> 39 #include <dev/ic/cyreg.h> 40 #include <dev/ic/cyvar.h> 41 42 int cyparam(struct tty *, struct termios *); 43 void cystart(struct tty *); 44 void cy_poll(void *); 45 int cy_modem_control(struct cy_softc *, struct cy_port *, int, int); 46 void cy_enable_transmitter(struct cy_softc *, struct cy_port *); 47 void cd1400_channel_cmd(struct cy_softc *, struct cy_port *, int); 48 int cy_speed(speed_t, int *, int *, int); 49 50 extern struct cfdriver cy_cd; 51 52 dev_type_open(cyopen); 53 dev_type_close(cyclose); 54 dev_type_read(cyread); 55 dev_type_write(cywrite); 56 dev_type_ioctl(cyioctl); 57 dev_type_stop(cystop); 58 dev_type_tty(cytty); 59 dev_type_poll(cypoll); 60 61 const struct cdevsw cy_cdevsw = { 62 cyopen, cyclose, cyread, cywrite, cyioctl, 63 cystop, cytty, cypoll, nommap, ttykqfilter, D_TTY 64 }; 65 66 static int cy_open = 0; 67 static int cy_events = 0; 68 69 int cy_attached_ttys; 70 71 struct callout cy_poll_callout = CALLOUT_INITIALIZER; 72 73 /* 74 * Common probe routine 75 */ 76 int 77 cy_find(struct cy_softc *sc) 78 { 79 int cy_chip, chip; 80 u_char firmware_ver; 81 bus_space_tag_t tag = sc->sc_memt; 82 bus_space_handle_t bsh = sc->sc_bsh; 83 int bustype = sc->sc_bustype; 84 85 /* Cyclom card hardware reset */ 86 bus_space_write_1(tag, bsh, CY16_RESET << bustype, 0); 87 DELAY(500); /* wait for reset to complete */ 88 bus_space_write_1(tag, bsh, CY_CLEAR_INTR << bustype, 0); 89 90 #ifdef CY_DEBUG 91 printf("cy: card reset done\n"); 92 #endif 93 sc->sc_nchips = 0; 94 95 for (cy_chip = 0, chip = 0; cy_chip < CY_MAX_CD1400s; 96 cy_chip++, chip += (CY_CD1400_MEMSPACING << bustype)) { 97 int i; 98 99 /* 100 * the last 4 nchips are 'interleaved' with the first 4 on 101 * 32-port boards 102 */ 103 if (cy_chip == 4) 104 chip -= (CY32_ADDR_FIX << bustype); 105 106 #ifdef CY_DEBUG 107 printf("%s probe chip %d offset 0x%x ... ", 108 sc->sc_dev.dv_xname, cy_chip, chip); 109 #endif 110 111 /* wait until the chip is ready for command */ 112 DELAY(1000); 113 if (bus_space_read_1(tag, bsh, chip + 114 ((CD1400_CCR << 1) << bustype)) != 0) { 115 #ifdef CY_DEBUG 116 printf("not ready for command\n"); 117 #endif 118 break; 119 } 120 /* clear the firmware version reg. */ 121 bus_space_write_1(tag, bsh, chip + 122 ((CD1400_GFRCR << 1) << bustype), 0); 123 124 /* 125 * On Cyclom-16 references to non-existent chip 4 126 * actually access chip 0 (address line 9 not decoded). 127 * Here we check if the clearing of chip 4 GFRCR actually 128 * cleared chip 0 GFRCR. In that case we have a 16 port card. 129 */ 130 if (cy_chip == 4 && 131 bus_space_read_1(tag, bsh, /* off for chip 0 (0) + */ 132 ((CD1400_GFRCR << 1) << bustype)) == 0) 133 break; 134 135 /* reset the chip */ 136 bus_space_write_1(tag, bsh, chip + 137 ((CD1400_CCR << 1) << bustype), 138 CD1400_CCR_CMDRESET | CD1400_CCR_FULLRESET); 139 140 /* wait for the chip to initialize itself */ 141 for (i = 0; i < 200; i++) { 142 DELAY(50); 143 firmware_ver = bus_space_read_1(tag, bsh, chip + 144 ((CD1400_GFRCR << 1) << bustype)); 145 if ((firmware_ver & 0xf0) == 0x40) /* found a CD1400 */ 146 break; 147 } 148 #ifdef CY_DEBUG 149 printf("firmware version 0x%x\n", firmware_ver); 150 #endif 151 152 if ((firmware_ver & 0xf0) != 0x40) 153 break; 154 155 /* firmware version OK, CD1400 found */ 156 sc->sc_nchips++; 157 } 158 159 if (sc->sc_nchips == 0) { 160 #ifdef CY_DEBUG 161 printf("no CD1400s found\n"); 162 #endif 163 return 0; 164 } 165 #ifdef CY_DEBUG 166 printf("found %d CD1400s\n", sc->sc_nchips); 167 #endif 168 169 return 1; 170 } 171 172 void 173 cy_attach(struct cy_softc *sc) 174 { 175 int port, cy_chip, num_chips, cdu, chip; 176 int cy_clock; 177 178 num_chips = sc->sc_nchips; 179 if (num_chips == 0) 180 return; 181 182 memset(sc->sc_ports, 0, sizeof(sc->sc_ports)); 183 184 port = 0; 185 for (cy_chip = 0, chip = 0; cy_chip < num_chips; cy_chip++, 186 chip += (CY_CD1400_MEMSPACING << sc->sc_bustype)) { 187 188 if (cy_chip == 4) 189 chip -= (CY32_ADDR_FIX << sc->sc_bustype); 190 191 #ifdef CY_DEBUG 192 aprint_debug("attach CD1400 #%d offset 0x%x\n", cy_chip, chip); 193 #endif 194 sc->sc_cd1400_offs[cy_chip] = chip; 195 196 /* 197 * configure port 0 as serial port (should already be after 198 * reset) 199 */ 200 cd_write_reg(sc, cy_chip, CD1400_GCR, 0); 201 202 if (cd_read_reg(sc, cy_chip, CD1400_GFRCR) <= 0x46) 203 cy_clock = CY_CLOCK; 204 else 205 cy_clock = CY_CLOCK_60; 206 207 /* set up a receive timeout period (1ms) */ 208 cd_write_reg(sc, cy_chip, CD1400_PPR, 209 (cy_clock / CD1400_PPR_PRESCALER / 1000) + 1); 210 211 for (cdu = 0; cdu < CD1400_NO_OF_CHANNELS; cdu++) { 212 sc->sc_ports[port].cy_softc = sc; 213 sc->sc_ports[port].cy_port_num = port; 214 sc->sc_ports[port].cy_chip = cy_chip; 215 sc->sc_ports[port].cy_clock = cy_clock; 216 217 /* should we initialize anything else here? */ 218 port++; 219 } /* for(each port on one CD1400...) */ 220 221 } /* for(each CD1400 on a card... ) */ 222 223 sc->sc_nchannels = port; 224 225 aprint_normal("%s: %d channels (ttyCY%03d..ttyCY%03d)\n", 226 sc->sc_dev.dv_xname, sc->sc_nchannels, cy_attached_ttys, 227 cy_attached_ttys + (sc->sc_nchannels - 1)); 228 229 cy_attached_ttys += sc->sc_nchannels; 230 231 /* ensure an edge for the next interrupt */ 232 bus_space_write_1(sc->sc_memt, sc->sc_bsh, 233 CY_CLEAR_INTR << sc->sc_bustype, 0); 234 } 235 236 #define CYDIALOUT_MASK 0x80000 237 #define CY_DIALOUT(dev) (minor(dev) & CYDIALOUT_MASK) 238 239 #define CY_PORT(dev) cy_getport((dev)) 240 #define CY_BOARD(cy) ((cy)->cy_softc) 241 242 static struct cy_port * 243 cy_getport(dev_t dev) 244 { 245 int i, j, k, u = minor(dev) & ~CYDIALOUT_MASK; 246 struct cy_softc *sc; 247 248 for (i = 0, j = 0; i < cy_cd.cd_ndevs; i++) { 249 k = j; 250 sc = device_lookup(&cy_cd, i); 251 if (sc == NULL) 252 continue; 253 if (sc->sc_nchannels == 0) 254 continue; 255 j += sc->sc_nchannels; 256 if (j > u) 257 return (&sc->sc_ports[u - k]); 258 } 259 260 return (NULL); 261 } 262 263 /* 264 * open routine. returns zero if successful, else error code 265 */ 266 int 267 cyopen(dev_t dev, int flag, int mode, struct lwp *l) 268 { 269 struct cy_softc *sc; 270 struct cy_port *cy; 271 struct tty *tp; 272 int s, error; 273 274 cy = CY_PORT(dev); 275 if (cy == NULL) 276 return (ENXIO); 277 sc = CY_BOARD(cy); 278 279 s = spltty(); 280 if (cy->cy_tty == NULL) { 281 if ((cy->cy_tty = ttymalloc()) == NULL) { 282 splx(s); 283 printf("%s: port %d: can't allocate tty\n", 284 sc->sc_dev.dv_xname, cy->cy_port_num); 285 return (ENOMEM); 286 } 287 tty_attach(cy->cy_tty); 288 } 289 splx(s); 290 291 tp = cy->cy_tty; 292 tp->t_oproc = cystart; 293 tp->t_param = cyparam; 294 tp->t_dev = dev; 295 296 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 297 ttychars(tp); 298 tp->t_iflag = TTYDEF_IFLAG; 299 tp->t_oflag = TTYDEF_OFLAG; 300 tp->t_cflag = TTYDEF_CFLAG; 301 if (ISSET(cy->cy_openflags, TIOCFLAG_CLOCAL)) 302 SET(tp->t_cflag, CLOCAL); 303 if (ISSET(cy->cy_openflags, TIOCFLAG_CRTSCTS)) 304 SET(tp->t_cflag, CRTSCTS); 305 if (ISSET(cy->cy_openflags, TIOCFLAG_MDMBUF)) 306 SET(tp->t_cflag, MDMBUF); 307 tp->t_lflag = TTYDEF_LFLAG; 308 tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED; 309 310 s = spltty(); 311 312 /* 313 * Allocate input ring buffer if we don't already have one 314 */ 315 if (cy->cy_ibuf == NULL) { 316 cy->cy_ibuf = malloc(CY_IBUF_SIZE, M_DEVBUF, M_NOWAIT); 317 if (cy->cy_ibuf == NULL) { 318 printf("%s: port %d: can't allocate input buffer\n", 319 sc->sc_dev.dv_xname, cy->cy_port_num); 320 splx(s); 321 return ENOMEM; 322 } 323 cy->cy_ibuf_end = cy->cy_ibuf + CY_IBUF_SIZE; 324 } 325 /* mark the ring buffer as empty */ 326 cy->cy_ibuf_rd_ptr = cy->cy_ibuf_wr_ptr = cy->cy_ibuf; 327 328 /* select CD1400 channel */ 329 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, 330 cy->cy_port_num & CD1400_CAR_CHAN); 331 /* reset the channel */ 332 cd1400_channel_cmd(sc, cy, CD1400_CCR_CMDRESET); 333 /* encode unit (port) number in LIVR */ 334 /* there is just enough space for 5 bits (32 ports) */ 335 cd_write_reg(sc, cy->cy_chip, CD1400_LIVR, 336 cy->cy_port_num << 3); 337 338 cy->cy_channel_control = 0; 339 340 /* hmm... need spltty() here? */ 341 if (cy_open == 0) { 342 cy_open = 1; 343 callout_reset(&cy_poll_callout, 1, cy_poll, NULL); 344 } 345 /* this sets parameters and raises DTR */ 346 cyparam(tp, &tp->t_termios); 347 348 ttsetwater(tp); 349 350 /* raise RTS too */ 351 cy_modem_control(sc, cy, TIOCM_RTS, DMBIS); 352 353 cy->cy_carrier_stat = 354 cd_read_reg(sc, cy->cy_chip, CD1400_MSVR2); 355 356 /* enable receiver and modem change interrupts */ 357 cd_write_reg(sc, cy->cy_chip, CD1400_SRER, 358 CD1400_SRER_MDMCH | CD1400_SRER_RXDATA); 359 360 if (CY_DIALOUT(dev) || 361 ISSET(cy->cy_openflags, TIOCFLAG_SOFTCAR) || 362 ISSET(tp->t_cflag, MDMBUF) || 363 ISSET(cy->cy_carrier_stat, CD1400_MSVR2_CD)) 364 SET(tp->t_state, TS_CARR_ON); 365 else 366 CLR(tp->t_state, TS_CARR_ON); 367 } else if (ISSET(tp->t_state, TS_XCLUDE) && 368 suser(l->l_proc->p_ucred, &l->l_proc->p_acflag) != 0) { 369 return EBUSY; 370 } else { 371 s = spltty(); 372 } 373 374 /* wait for carrier if necessary */ 375 if (!ISSET(flag, O_NONBLOCK)) { 376 while (!ISSET(tp->t_cflag, CLOCAL) && 377 !ISSET(tp->t_state, TS_CARR_ON)) { 378 tp->t_wopen++; 379 error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH, 380 "cydcd", 0); 381 tp->t_wopen--; 382 if (error != 0) { 383 splx(s); 384 return error; 385 } 386 } 387 } 388 splx(s); 389 390 return (*tp->t_linesw->l_open) (dev, tp); 391 } 392 393 /* 394 * close routine. returns zero if successful, else error code 395 */ 396 int 397 cyclose(dev_t dev, int flag, int mode, struct lwp *l) 398 { 399 struct cy_softc *sc; 400 struct cy_port *cy; 401 struct tty *tp; 402 int s; 403 404 cy = CY_PORT(dev); 405 sc = CY_BOARD(cy); 406 tp = cy->cy_tty; 407 408 (*tp->t_linesw->l_close) (tp, flag); 409 s = spltty(); 410 411 if (ISSET(tp->t_cflag, HUPCL) && 412 !ISSET(cy->cy_openflags, TIOCFLAG_SOFTCAR)) { 413 /* 414 * drop DTR and RTS (should we wait for output buffer to 415 * become empty first?) 416 */ 417 cy_modem_control(sc, cy, 0, DMSET); 418 } 419 /* 420 * XXX should we disable modem change and 421 * receive interrupts here or somewhere ? 422 */ 423 CLR(tp->t_state, TS_BUSY | TS_FLUSH); 424 425 splx(s); 426 ttyclose(tp); 427 428 return 0; 429 } 430 431 /* 432 * Read routine 433 */ 434 int 435 cyread(dev_t dev, struct uio *uio, int flag) 436 { 437 struct cy_port *cy; 438 struct tty *tp; 439 440 cy = CY_PORT(dev); 441 tp = cy->cy_tty; 442 443 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 444 } 445 446 /* 447 * Write routine 448 */ 449 int 450 cywrite(dev_t dev, struct uio *uio, int flag) 451 { 452 struct cy_port *cy; 453 struct tty *tp; 454 455 cy = CY_PORT(dev); 456 tp = cy->cy_tty; 457 458 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 459 } 460 461 /* 462 * Poll routine 463 */ 464 int 465 cypoll(dev_t dev, int events, struct lwp *l) 466 { 467 struct cy_port *cy; 468 struct tty *tp; 469 470 cy = CY_PORT(dev); 471 tp = cy->cy_tty; 472 473 return ((*tp->t_linesw->l_poll)(tp, events, l)); 474 } 475 476 /* 477 * return tty pointer 478 */ 479 struct tty * 480 cytty(dev_t dev) 481 { 482 struct cy_port *cy; 483 484 cy = CY_PORT(dev); 485 486 return (cy->cy_tty); 487 } 488 489 /* 490 * ioctl routine 491 */ 492 int 493 cyioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct lwp *l) 494 { 495 struct cy_softc *sc; 496 struct cy_port *cy; 497 struct proc *p; 498 struct tty *tp; 499 int error; 500 501 p = l ? l->l_proc : NULL; 502 cy = CY_PORT(dev); 503 sc = CY_BOARD(cy); 504 tp = cy->cy_tty; 505 506 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 507 if (error != EPASSTHROUGH) 508 return error; 509 510 error = ttioctl(tp, cmd, data, flag, l); 511 if (error != EPASSTHROUGH) 512 return error; 513 514 /* XXX should not allow dropping DTR when dialin? */ 515 516 switch (cmd) { 517 case TIOCSBRK: /* start break */ 518 SET(cy->cy_flags, CY_F_START_BREAK); 519 cy_enable_transmitter(sc, cy); 520 break; 521 522 case TIOCCBRK: /* stop break */ 523 SET(cy->cy_flags, CY_F_END_BREAK); 524 cy_enable_transmitter(sc, cy); 525 break; 526 527 case TIOCSDTR: /* DTR on */ 528 cy_modem_control(sc, cy, TIOCM_DTR, DMBIS); 529 break; 530 531 case TIOCCDTR: /* DTR off */ 532 cy_modem_control(sc, cy, TIOCM_DTR, DMBIC); 533 break; 534 535 case TIOCMSET: /* set new modem control line values */ 536 cy_modem_control(sc, cy, *((int *) data), DMSET); 537 break; 538 539 case TIOCMBIS: /* turn modem control bits on */ 540 cy_modem_control(sc, cy, *((int *) data), DMBIS); 541 break; 542 543 case TIOCMBIC: /* turn modem control bits off */ 544 cy_modem_control(sc, cy, *((int *) data), DMBIC); 545 break; 546 547 case TIOCMGET: /* get modem control/status line state */ 548 *((int *) data) = cy_modem_control(sc, cy, 0, DMGET); 549 break; 550 551 case TIOCGFLAGS: 552 *((int *) data) = cy->cy_openflags | 553 (CY_DIALOUT(dev) ? TIOCFLAG_SOFTCAR : 0); 554 break; 555 556 case TIOCSFLAGS: 557 error = suser(p->p_ucred, &p->p_acflag); 558 if (error != 0) 559 return EPERM; 560 561 cy->cy_openflags = *((int *) data) & 562 (TIOCFLAG_SOFTCAR | TIOCFLAG_CLOCAL | 563 TIOCFLAG_CRTSCTS | TIOCFLAG_MDMBUF); 564 break; 565 566 default: 567 return EPASSTHROUGH; 568 } 569 570 return 0; 571 } 572 573 /* 574 * start output 575 */ 576 void 577 cystart(struct tty *tp) 578 { 579 struct cy_softc *sc; 580 struct cy_port *cy; 581 int s; 582 583 cy = CY_PORT(tp->t_dev); 584 sc = cy->cy_softc; 585 586 s = spltty(); 587 588 #ifdef CY_DEBUG1 589 cy->cy_start_count++; 590 #endif 591 592 if (!ISSET(tp->t_state, TS_TTSTOP | TS_TIMEOUT | TS_BUSY)) { 593 if (tp->t_outq.c_cc <= tp->t_lowat) { 594 if (ISSET(tp->t_state, TS_ASLEEP)) { 595 CLR(tp->t_state, TS_ASLEEP); 596 wakeup(&tp->t_outq); 597 } 598 selwakeup(&tp->t_wsel); 599 600 if (tp->t_outq.c_cc == 0) 601 goto out; 602 } 603 SET(tp->t_state, TS_BUSY); 604 cy_enable_transmitter(sc, cy); 605 } 606 out: 607 608 splx(s); 609 } 610 611 /* 612 * stop output 613 */ 614 void 615 cystop(struct tty *tp, int flag) 616 { 617 struct cy_port *cy; 618 int s; 619 620 cy = CY_PORT(tp->t_dev); 621 622 s = spltty(); 623 if (ISSET(tp->t_state, TS_BUSY)) { 624 if (!ISSET(tp->t_state, TS_TTSTOP)) 625 SET(tp->t_state, TS_FLUSH); 626 627 /* 628 * the transmit interrupt routine will disable transmit when it 629 * notices that CY_F_STOP has been set. 630 */ 631 SET(cy->cy_flags, CY_F_STOP); 632 } 633 splx(s); 634 } 635 636 /* 637 * parameter setting routine. 638 * returns 0 if successful, else returns error code 639 */ 640 int 641 cyparam(struct tty *tp, struct termios *t) 642 { 643 struct cy_softc *sc; 644 struct cy_port *cy; 645 int ibpr, obpr, i_clk_opt, o_clk_opt, s, opt; 646 647 cy = CY_PORT(tp->t_dev); 648 sc = CY_BOARD(cy); 649 650 if (t->c_ospeed != 0 && cy_speed(t->c_ospeed, &o_clk_opt, &obpr, cy->cy_clock) < 0) 651 return EINVAL; 652 653 if (t->c_ispeed != 0 && cy_speed(t->c_ispeed, &i_clk_opt, &ibpr, cy->cy_clock) < 0) 654 return EINVAL; 655 656 s = spltty(); 657 658 /* hang up the line is ospeed is zero, else turn DTR on */ 659 cy_modem_control(sc, cy, TIOCM_DTR, (t->c_ospeed == 0 ? DMBIC : DMBIS)); 660 661 /* channel was selected by the above call to cy_modem_control() */ 662 #if 0 663 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, port & CD1400_CAR_CHAN); 664 #endif 665 666 /* set transmit speed */ 667 if (t->c_ospeed != 0) { 668 cd_write_reg(sc, cy->cy_chip, CD1400_TCOR, o_clk_opt); 669 cd_write_reg(sc, cy->cy_chip, CD1400_TBPR, obpr); 670 } 671 /* set receive speed */ 672 if (t->c_ispeed != 0) { 673 cd_write_reg(sc, cy->cy_chip, CD1400_RCOR, i_clk_opt); 674 cd_write_reg(sc, cy->cy_chip, CD1400_RBPR, ibpr); 675 } 676 opt = CD1400_CCR_CMDCHANCTL | CD1400_CCR_XMTEN 677 | (ISSET(t->c_cflag, CREAD) ? CD1400_CCR_RCVEN : CD1400_CCR_RCVDIS); 678 679 if (opt != cy->cy_channel_control) { 680 cy->cy_channel_control = opt; 681 cd1400_channel_cmd(sc, cy, opt); 682 } 683 /* compute COR1 contents */ 684 opt = 0; 685 if (ISSET(t->c_cflag, PARENB)) { 686 if (ISSET(t->c_cflag, PARODD)) 687 opt |= CD1400_COR1_PARODD; 688 opt |= CD1400_COR1_PARNORMAL; 689 } 690 if (!ISSET(t->c_iflag, INPCK)) 691 opt |= CD1400_COR1_NOINPCK; /* no parity checking */ 692 693 if (ISSET(t->c_cflag, CSTOPB)) 694 opt |= CD1400_COR1_STOP2; 695 696 switch (t->c_cflag & CSIZE) { 697 case CS5: 698 opt |= CD1400_COR1_CS5; 699 break; 700 701 case CS6: 702 opt |= CD1400_COR1_CS6; 703 break; 704 705 case CS7: 706 opt |= CD1400_COR1_CS7; 707 break; 708 709 default: 710 opt |= CD1400_COR1_CS8; 711 break; 712 } 713 714 cd_write_reg(sc, cy->cy_chip, CD1400_COR1, opt); 715 716 #ifdef CY_DEBUG 717 printf("cor1 = 0x%x...", opt); 718 #endif 719 720 /* 721 * use the CD1400 automatic CTS flow control if CRTSCTS is set 722 * 723 * CD1400_COR2_ETC is used because breaks are generated with 724 * embedded transmit commands 725 */ 726 cd_write_reg(sc, cy->cy_chip, CD1400_COR2, 727 CD1400_COR2_ETC | 728 (ISSET(t->c_cflag, CRTSCTS) ? CD1400_COR2_CCTS_OFLOW : 0)); 729 730 cd_write_reg(sc, cy->cy_chip, CD1400_COR3, CY_RX_FIFO_THRESHOLD); 731 732 cd1400_channel_cmd(sc, cy, CD1400_CCR_CMDCORCHG | 733 CD1400_CCR_COR1 | CD1400_CCR_COR2 | CD1400_CCR_COR3); 734 735 cd_write_reg(sc, cy->cy_chip, CD1400_COR4, CD1400_COR4_PFO_EXCEPTION); 736 cd_write_reg(sc, cy->cy_chip, CD1400_COR5, 0); 737 738 /* 739 * set modem change option registers to generate interrupts 740 * on carrier detect changes. 741 * 742 * if hardware RTS handshaking is used 743 * also set the handshaking threshold. 744 */ 745 if (cy->cy_clock == CY_CLOCK_60) { 746 cd_write_reg(sc, cy->cy_chip, CD1400_MCOR1, CD1400_MCOR1_CDzd | 747 (ISSET(t->c_cflag, CRTSCTS) ? CY_RX_DTR_THRESHOLD : 0)); 748 } else { 749 cd_write_reg(sc, cy->cy_chip, CD1400_MCOR1, CD1400_MCOR1_CDzd); 750 } 751 752 cd_write_reg(sc, cy->cy_chip, CD1400_MCOR2, CD1400_MCOR2_CDod); 753 754 /* 755 * set receive timeout to approx. 2ms 756 * could use more complex logic here... 757 * (but is it actually needed or even useful?) 758 */ 759 cd_write_reg(sc, cy->cy_chip, CD1400_RTPR, 2); 760 761 /* 762 * should do anything else here? 763 * XXX check MDMBUF handshaking like in com.c? 764 */ 765 766 splx(s); 767 return 0; 768 } 769 770 /* 771 * set/get modem line status 772 * 773 * bits can be: TIOCM_DTR, TIOCM_RTS, TIOCM_CTS, TIOCM_CD, TIOCM_RI, TIOCM_DSR 774 */ 775 int 776 cy_modem_control(struct cy_softc *sc, struct cy_port *cy, int bits, int howto) 777 { 778 struct tty *tp = cy->cy_tty; 779 int s, msvr; 780 781 s = spltty(); 782 783 /* select channel */ 784 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, 785 cy->cy_port_num & CD1400_CAR_CHAN); 786 787 /* Does not manipulate RTS if it is used for flow control. */ 788 switch (howto) { 789 case DMGET: 790 bits = 0; 791 if (cy->cy_channel_control & CD1400_CCR_RCVEN) 792 bits |= TIOCM_LE; 793 msvr = cd_read_reg(sc, cy->cy_chip, CD1400_MSVR2); 794 if (cy->cy_clock == CY_CLOCK_60) { 795 if (cd_read_reg(sc, cy->cy_chip, CD1400_MSVR1) & 796 CD1400_MSVR1_RTS) 797 bits |= TIOCM_DTR; 798 if (msvr & CD1400_MSVR2_DTR) 799 bits |= TIOCM_RTS; 800 } else { 801 if (cd_read_reg(sc, cy->cy_chip, CD1400_MSVR1) & 802 CD1400_MSVR1_RTS) 803 bits |= TIOCM_RTS; 804 if (msvr & CD1400_MSVR2_DTR) 805 bits |= TIOCM_DTR; 806 } 807 if (msvr & CD1400_MSVR2_CTS) 808 bits |= TIOCM_CTS; 809 if (msvr & CD1400_MSVR2_CD) 810 bits |= TIOCM_CD; 811 /* Not connected on some Cyclom-Y boards? */ 812 if (msvr & CD1400_MSVR2_DSR) 813 bits |= TIOCM_DSR; 814 /* Not connected on some Cyclom-8Y boards? */ 815 if (msvr & CD1400_MSVR2_RI) 816 bits |= TIOCM_RI; 817 break; 818 819 case DMSET: /* replace old values with new ones */ 820 if (cy->cy_clock == CY_CLOCK_60) { 821 if (!ISSET(tp->t_cflag, CRTSCTS)) 822 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2, 823 ((bits & TIOCM_RTS) ? CD1400_MSVR2_DTR : 0)); 824 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1, 825 ((bits & TIOCM_DTR) ? CD1400_MSVR1_RTS : 0)); 826 } else { 827 if (!ISSET(tp->t_cflag, CRTSCTS)) 828 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1, 829 ((bits & TIOCM_RTS) ? CD1400_MSVR1_RTS : 0)); 830 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2, 831 ((bits & TIOCM_DTR) ? CD1400_MSVR2_DTR : 0)); 832 } 833 break; 834 835 case DMBIS: /* set bits */ 836 if (cy->cy_clock == CY_CLOCK_60) { 837 if (!ISSET(tp->t_cflag, CRTSCTS) && 838 (bits & TIOCM_RTS) != 0) 839 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2, 840 CD1400_MSVR2_DTR); 841 if (bits & TIOCM_DTR) 842 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1, 843 CD1400_MSVR1_RTS); 844 } else { 845 if (!ISSET(tp->t_cflag, CRTSCTS) && 846 (bits & TIOCM_RTS) != 0) 847 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1, 848 CD1400_MSVR1_RTS); 849 if (bits & TIOCM_DTR) 850 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2, 851 CD1400_MSVR2_DTR); 852 } 853 break; 854 855 case DMBIC: /* clear bits */ 856 if (cy->cy_clock == CY_CLOCK_60) { 857 if (!ISSET(tp->t_cflag, CRTSCTS) && (bits & TIOCM_RTS)) 858 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2, 0); 859 if (bits & TIOCM_DTR) 860 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1, 0); 861 } else { 862 if (!ISSET(tp->t_cflag, CRTSCTS) && (bits & TIOCM_RTS)) 863 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1, 0); 864 if (bits & TIOCM_DTR) 865 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2, 0); 866 } 867 break; 868 } 869 splx(s); 870 return ((howto == DMGET) ? bits : 0); 871 } 872 873 /* 874 * Upper-level handler loop (called from timer interrupt?) 875 * This routine is common for multiple cards 876 */ 877 void 878 cy_poll(void *arg) 879 { 880 int card, port; 881 struct cy_softc *sc; 882 struct cy_port *cy; 883 struct tty *tp; 884 static int counter = 0; 885 #ifdef CY_DEBUG1 886 int did_something; 887 #endif 888 int s = spltty(); 889 890 if (cy_events == 0 && ++counter < 200) { 891 splx(s); 892 goto out; 893 } 894 cy_events = 0; 895 splx(s); 896 897 for (card = 0; card < cy_cd.cd_ndevs; card++) { 898 sc = device_lookup(&cy_cd, card); 899 if (sc == NULL) 900 continue; 901 902 #ifdef CY_DEBUG1 903 sc->sc_poll_count1++; 904 did_something = 0; 905 #endif 906 907 for (port = 0; port < sc->sc_nchannels; port++) { 908 cy = &sc->sc_ports[port]; 909 if ((tp = cy->cy_tty) == NULL || cy->cy_ibuf == NULL || 910 (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0)) 911 continue; 912 913 /* 914 * handle received data 915 */ 916 while (cy->cy_ibuf_rd_ptr != cy->cy_ibuf_wr_ptr) { 917 u_char line_stat; 918 int chr; 919 920 line_stat = cy->cy_ibuf_rd_ptr[0]; 921 chr = cy->cy_ibuf_rd_ptr[1]; 922 923 if (line_stat & 924 (CD1400_RDSR_BREAK | CD1400_RDSR_FE)) 925 chr |= TTY_FE; 926 if (line_stat & CD1400_RDSR_PE) 927 chr |= TTY_PE; 928 929 /* 930 * on an overrun error the data is treated as 931 * good just as it should be. 932 */ 933 934 #ifdef CY_DEBUG 935 printf("%s: port %d ttyinput 0x%x\n", 936 sc->sc_dev.dv_xname, port, chr); 937 #endif 938 939 (*tp->t_linesw->l_rint) (chr, tp); 940 941 s = spltty(); /* really necessary? */ 942 if ((cy->cy_ibuf_rd_ptr += 2) == 943 cy->cy_ibuf_end) 944 cy->cy_ibuf_rd_ptr = cy->cy_ibuf; 945 splx(s); 946 947 #ifdef CY_DEBUG1 948 did_something = 1; 949 #endif 950 } 951 952 /* 953 * If we don't have any received data in ibuf and 954 * CRTSCTS is on and RTS is turned off, it is time to 955 * turn RTS back on 956 */ 957 if (ISSET(tp->t_cflag, CRTSCTS)) { 958 /* 959 * we can't use cy_modem_control() here as it 960 * doesn't change RTS if RTSCTS is on 961 */ 962 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, 963 port & CD1400_CAR_CHAN); 964 965 if (cy->cy_clock == CY_CLOCK_60) { 966 if ((cd_read_reg(sc, cy->cy_chip, 967 CD1400_MSVR2) & CD1400_MSVR2_DTR) == 0) { 968 cd_write_reg(sc, cy->cy_chip, 969 CD1400_MSVR2,CD1400_MSVR2_DTR); 970 #ifdef CY_DEBUG1 971 did_something = 1; 972 #endif 973 } 974 } else { 975 if ((cd_read_reg(sc, cy->cy_chip, 976 CD1400_MSVR1) & CD1400_MSVR1_RTS) == 0) { 977 cd_write_reg(sc, cy->cy_chip, 978 CD1400_MSVR1,CD1400_MSVR1_RTS); 979 #ifdef CY_DEBUG1 980 did_something = 1; 981 #endif 982 } 983 } 984 } 985 986 /* 987 * handle carrier changes 988 */ 989 s = spltty(); 990 if (ISSET(cy->cy_flags, CY_F_CARRIER_CHANGED)) { 991 int carrier; 992 993 CLR(cy->cy_flags, CY_F_CARRIER_CHANGED); 994 splx(s); 995 996 carrier = ((cy->cy_carrier_stat & 997 CD1400_MSVR2_CD) != 0); 998 999 #ifdef CY_DEBUG 1000 printf("cy_poll: carrier change " 1001 "(card %d, port %d, carrier %d)\n", 1002 card, port, carrier); 1003 #endif 1004 if (CY_DIALOUT(tp->t_dev) == 0 && 1005 !(*tp->t_linesw->l_modem)(tp, carrier)) 1006 cy_modem_control(sc, cy, 1007 TIOCM_DTR, DMBIC); 1008 1009 #ifdef CY_DEBUG1 1010 did_something = 1; 1011 #endif 1012 } else 1013 splx(s); 1014 1015 s = spltty(); 1016 if (ISSET(cy->cy_flags, CY_F_START)) { 1017 CLR(cy->cy_flags, CY_F_START); 1018 splx(s); 1019 1020 (*tp->t_linesw->l_start) (tp); 1021 1022 #ifdef CY_DEBUG1 1023 did_something = 1; 1024 #endif 1025 } else 1026 splx(s); 1027 1028 /* could move this to even upper level... */ 1029 if (cy->cy_fifo_overruns) { 1030 cy->cy_fifo_overruns = 0; 1031 /* 1032 * doesn't report overrun count, but 1033 * shouldn't really matter 1034 */ 1035 log(LOG_WARNING, "%s: port %d fifo overrun\n", 1036 sc->sc_dev.dv_xname, port); 1037 } 1038 if (cy->cy_ibuf_overruns) { 1039 cy->cy_ibuf_overruns = 0; 1040 log(LOG_WARNING, "%s: port %d ibuf overrun\n", 1041 sc->sc_dev.dv_xname, port); 1042 } 1043 } /* for(port...) */ 1044 #ifdef CY_DEBUG1 1045 if (did_something && counter >= 200) 1046 sc->sc_poll_count2++; 1047 #endif 1048 } /* for(card...) */ 1049 1050 counter = 0; 1051 1052 out: 1053 callout_reset(&cy_poll_callout, 1, cy_poll, NULL); 1054 } 1055 1056 /* 1057 * hardware interrupt routine 1058 */ 1059 int 1060 cy_intr(void *arg) 1061 { 1062 struct cy_softc *sc = arg; 1063 struct cy_port *cy; 1064 int cy_chip, stat; 1065 int int_serviced = 0; 1066 1067 /* 1068 * Check interrupt status of each CD1400 chip on this card 1069 * (multiple cards cannot share the same interrupt) 1070 */ 1071 for (cy_chip = 0; cy_chip < sc->sc_nchips; cy_chip++) { 1072 1073 stat = cd_read_reg(sc, cy_chip, CD1400_SVRR); 1074 if (stat == 0) 1075 continue; 1076 1077 if (ISSET(stat, CD1400_SVRR_RXRDY)) { 1078 u_char save_car, save_rir, serv_type; 1079 u_char line_stat, recv_data, n_chars; 1080 u_char *buf_p; 1081 1082 save_rir = cd_read_reg(sc, cy_chip, CD1400_RIR); 1083 save_car = cd_read_reg(sc, cy_chip, CD1400_CAR); 1084 /* enter rx service */ 1085 cd_write_reg(sc, cy_chip, CD1400_CAR, save_rir); 1086 1087 serv_type = cd_read_reg(sc, cy_chip, CD1400_RIVR); 1088 cy = &sc->sc_ports[serv_type >> 3]; 1089 1090 #ifdef CY_DEBUG1 1091 cy->cy_rx_int_count++; 1092 #endif 1093 1094 buf_p = cy->cy_ibuf_wr_ptr; 1095 1096 if (ISSET(serv_type, CD1400_RIVR_EXCEPTION)) { 1097 line_stat = cd_read_reg(sc, cy->cy_chip, 1098 CD1400_RDSR); 1099 recv_data = cd_read_reg(sc, cy->cy_chip, 1100 CD1400_RDSR); 1101 1102 if (cy->cy_tty == NULL || 1103 !ISSET(cy->cy_tty->t_state, TS_ISOPEN)) 1104 goto end_rx_serv; 1105 1106 #ifdef CY_DEBUG 1107 printf("%s port %d recv exception, line_stat 0x%x, char 0x%x\n", 1108 sc->sc_dev.dv_xname, cy->cy_port_num, line_stat, recv_data); 1109 #endif 1110 if (ISSET(line_stat, CD1400_RDSR_OE)) 1111 cy->cy_fifo_overruns++; 1112 1113 *buf_p++ = line_stat; 1114 *buf_p++ = recv_data; 1115 if (buf_p == cy->cy_ibuf_end) 1116 buf_p = cy->cy_ibuf; 1117 1118 if (buf_p == cy->cy_ibuf_rd_ptr) { 1119 if (buf_p == cy->cy_ibuf) 1120 buf_p = cy->cy_ibuf_end; 1121 buf_p -= 2; 1122 cy->cy_ibuf_overruns++; 1123 } 1124 cy_events = 1; 1125 } else {/* no exception, received data OK */ 1126 n_chars = cd_read_reg(sc, cy->cy_chip, 1127 CD1400_RDCR); 1128 1129 /* If no tty or not open, discard data */ 1130 if (cy->cy_tty == NULL || 1131 !ISSET(cy->cy_tty->t_state, TS_ISOPEN)) { 1132 while (n_chars--) 1133 cd_read_reg(sc, cy->cy_chip, 1134 CD1400_RDSR); 1135 goto end_rx_serv; 1136 } 1137 1138 #ifdef CY_DEBUG 1139 printf("%s port %d receive ok %d chars\n", 1140 sc->sc_dev.dv_xname, cy->cy_port_num, n_chars); 1141 #endif 1142 while (n_chars--) { 1143 *buf_p++ = 0; /* status: OK */ 1144 /* data byte */ 1145 *buf_p++ = cd_read_reg(sc, 1146 cy->cy_chip, CD1400_RDSR); 1147 if (buf_p == cy->cy_ibuf_end) 1148 buf_p = cy->cy_ibuf; 1149 if (buf_p == cy->cy_ibuf_rd_ptr) { 1150 if (buf_p == cy->cy_ibuf) 1151 buf_p = cy->cy_ibuf_end; 1152 buf_p -= 2; 1153 cy->cy_ibuf_overruns++; 1154 break; 1155 } 1156 } 1157 cy_events = 1; 1158 } 1159 1160 cy->cy_ibuf_wr_ptr = buf_p; 1161 1162 /* RTS handshaking for incoming data */ 1163 if (ISSET(cy->cy_tty->t_cflag, CRTSCTS)) { 1164 int bf, msvr; 1165 1166 bf = buf_p - cy->cy_ibuf_rd_ptr; 1167 if (bf < 0) 1168 bf += CY_IBUF_SIZE; 1169 1170 if (bf > (CY_IBUF_SIZE / 2)) { 1171 /* turn RTS off */ 1172 if (cy->cy_clock == CY_CLOCK_60) 1173 msvr = CD1400_MSVR2; 1174 else 1175 msvr = CD1400_MSVR1; 1176 cd_write_reg(sc, cy->cy_chip, msvr, 0); 1177 } 1178 } 1179 1180 end_rx_serv: 1181 /* terminate service context */ 1182 cd_write_reg(sc, cy->cy_chip, CD1400_RIR, 1183 save_rir & 0x3f); 1184 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, save_car); 1185 int_serviced = 1; 1186 } /* if (rx_service...) */ 1187 if (ISSET(stat, CD1400_SVRR_MDMCH)) { 1188 u_char save_car, save_mir, serv_type, modem_stat; 1189 1190 save_mir = cd_read_reg(sc, cy_chip, CD1400_MIR); 1191 save_car = cd_read_reg(sc, cy_chip, CD1400_CAR); 1192 /* enter modem service */ 1193 cd_write_reg(sc, cy_chip, CD1400_CAR, save_mir); 1194 1195 serv_type = cd_read_reg(sc, cy_chip, CD1400_MIVR); 1196 cy = &sc->sc_ports[serv_type >> 3]; 1197 1198 #ifdef CY_DEBUG1 1199 cy->cy_modem_int_count++; 1200 #endif 1201 1202 modem_stat = cd_read_reg(sc, cy->cy_chip, CD1400_MSVR2); 1203 1204 #ifdef CY_DEBUG 1205 printf("%s port %d modem line change, new stat 0x%x\n", 1206 sc->sc_dev.dv_xname, cy->cy_port_num, modem_stat); 1207 #endif 1208 if (ISSET((cy->cy_carrier_stat ^ modem_stat), CD1400_MSVR2_CD)) { 1209 SET(cy->cy_flags, CY_F_CARRIER_CHANGED); 1210 cy_events = 1; 1211 } 1212 cy->cy_carrier_stat = modem_stat; 1213 1214 /* terminate service context */ 1215 cd_write_reg(sc, cy->cy_chip, CD1400_MIR, save_mir & 0x3f); 1216 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, save_car); 1217 int_serviced = 1; 1218 } /* if (modem_service...) */ 1219 if (ISSET(stat, CD1400_SVRR_TXRDY)) { 1220 u_char save_car, save_tir, serv_type, 1221 count, ch; 1222 struct tty *tp; 1223 1224 save_tir = cd_read_reg(sc, cy_chip, CD1400_TIR); 1225 save_car = cd_read_reg(sc, cy_chip, CD1400_CAR); 1226 /* enter tx service */ 1227 cd_write_reg(sc, cy_chip, CD1400_CAR, save_tir); 1228 1229 serv_type = cd_read_reg(sc, cy_chip, CD1400_TIVR); 1230 cy = &sc->sc_ports[serv_type >> 3]; 1231 1232 #ifdef CY_DEBUG1 1233 cy->cy_tx_int_count++; 1234 #endif 1235 #ifdef CY_DEBUG 1236 printf("%s port %d tx service\n", sc->sc_dev.dv_xname, 1237 cy->cy_port_num); 1238 #endif 1239 1240 /* stop transmitting if no tty or CY_F_STOP set */ 1241 tp = cy->cy_tty; 1242 if (tp == NULL || ISSET(cy->cy_flags, CY_F_STOP)) 1243 goto txdone; 1244 1245 count = 0; 1246 if (ISSET(cy->cy_flags, CY_F_SEND_NUL)) { 1247 cd_write_reg(sc, cy->cy_chip, CD1400_TDR, 0); 1248 cd_write_reg(sc, cy->cy_chip, CD1400_TDR, 0); 1249 count += 2; 1250 CLR(cy->cy_flags, CY_F_SEND_NUL); 1251 } 1252 if (tp->t_outq.c_cc > 0) { 1253 SET(tp->t_state, TS_BUSY); 1254 while (tp->t_outq.c_cc > 0 && 1255 count < CD1400_TX_FIFO_SIZE) { 1256 ch = getc(&tp->t_outq); 1257 /* 1258 * remember to double NUL characters 1259 * because embedded transmit commands 1260 * are enabled 1261 */ 1262 if (ch == 0) { 1263 if (count >= CD1400_TX_FIFO_SIZE - 2) { 1264 SET(cy->cy_flags, CY_F_SEND_NUL); 1265 break; 1266 } 1267 cd_write_reg(sc, cy->cy_chip, 1268 CD1400_TDR, ch); 1269 count++; 1270 } 1271 cd_write_reg(sc, cy->cy_chip, 1272 CD1400_TDR, ch); 1273 count++; 1274 } 1275 } else { 1276 /* 1277 * no data to send -- check if we should 1278 * start/stop a break 1279 */ 1280 /* 1281 * XXX does this cause too much delay before 1282 * breaks? 1283 */ 1284 if (ISSET(cy->cy_flags, CY_F_START_BREAK)) { 1285 cd_write_reg(sc, cy->cy_chip, 1286 CD1400_TDR, 0); 1287 cd_write_reg(sc, cy->cy_chip, 1288 CD1400_TDR, 0x81); 1289 CLR(cy->cy_flags, CY_F_START_BREAK); 1290 } 1291 if (ISSET(cy->cy_flags, CY_F_END_BREAK)) { 1292 cd_write_reg(sc, cy->cy_chip, 1293 CD1400_TDR, 0); 1294 cd_write_reg(sc, cy->cy_chip, 1295 CD1400_TDR, 0x83); 1296 CLR(cy->cy_flags, CY_F_END_BREAK); 1297 } 1298 } 1299 1300 if (tp->t_outq.c_cc == 0) { 1301 txdone: 1302 /* 1303 * No data to send or requested to stop. 1304 * Disable transmit interrupt 1305 */ 1306 cd_write_reg(sc, cy->cy_chip, CD1400_SRER, 1307 cd_read_reg(sc, cy->cy_chip, CD1400_SRER) 1308 & ~CD1400_SRER_TXRDY); 1309 CLR(cy->cy_flags, CY_F_STOP); 1310 CLR(tp->t_state, TS_BUSY); 1311 } 1312 if (tp->t_outq.c_cc <= tp->t_lowat) { 1313 SET(cy->cy_flags, CY_F_START); 1314 cy_events = 1; 1315 } 1316 /* terminate service context */ 1317 cd_write_reg(sc, cy->cy_chip, CD1400_TIR, save_tir & 0x3f); 1318 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, save_car); 1319 int_serviced = 1; 1320 } /* if (tx_service...) */ 1321 } /* for(...all CD1400s on a card) */ 1322 1323 /* ensure an edge for next interrupt */ 1324 bus_space_write_1(sc->sc_memt, sc->sc_bsh, 1325 CY_CLEAR_INTR << sc->sc_bustype, 0); 1326 return int_serviced; 1327 } 1328 1329 /* 1330 * subroutine to enable CD1400 transmitter 1331 */ 1332 void 1333 cy_enable_transmitter(struct cy_softc *sc, struct cy_port *cy) 1334 { 1335 int s = spltty(); 1336 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, 1337 cy->cy_port_num & CD1400_CAR_CHAN); 1338 cd_write_reg(sc, cy->cy_chip, CD1400_SRER, 1339 cd_read_reg(sc, cy->cy_chip, CD1400_SRER) | CD1400_SRER_TXRDY); 1340 splx(s); 1341 } 1342 1343 /* 1344 * Execute a CD1400 channel command 1345 */ 1346 void 1347 cd1400_channel_cmd(struct cy_softc *sc, struct cy_port *cy, int cmd) 1348 { 1349 u_int waitcnt = 5 * 8 * 1024; /* approx 5 ms */ 1350 1351 #ifdef CY_DEBUG 1352 printf("c1400_channel_cmd cy %p command 0x%x\n", cy, cmd); 1353 #endif 1354 1355 /* wait until cd1400 is ready to process a new command */ 1356 while (cd_read_reg(sc, cy->cy_chip, CD1400_CCR) != 0 && waitcnt-- > 0); 1357 1358 if (waitcnt == 0) 1359 log(LOG_ERR, "%s: channel command timeout\n", 1360 sc->sc_dev.dv_xname); 1361 1362 cd_write_reg(sc, cy->cy_chip, CD1400_CCR, cmd); 1363 } 1364 1365 /* 1366 * Compute clock option register and baud rate register values 1367 * for a given speed. Return 0 on success, -1 on failure. 1368 * 1369 * The error between requested and actual speed seems 1370 * to be well within allowed limits (less than 3%) 1371 * with every speed value between 50 and 150000 bps. 1372 */ 1373 int 1374 cy_speed(speed_t speed, int *cor, int *bpr, int cy_clock) 1375 { 1376 int c, co, br; 1377 1378 if (speed < 50 || speed > 150000) 1379 return -1; 1380 1381 for (c = 0, co = 8; co <= 2048; co <<= 2, c++) { 1382 br = (cy_clock + (co * speed) / 2) / (co * speed); 1383 if (br < 0x100) { 1384 *bpr = br; 1385 *cor = c; 1386 return 0; 1387 } 1388 } 1389 1390 return -1; 1391 } 1392