1 /* $NetBSD: cy.c,v 1.11 1999/09/09 21:52:11 tron Exp $ */ 2 3 /* 4 * cy.c 5 * 6 * Driver for Cyclades Cyclom-8/16/32 multiport serial cards 7 * (currently not tested with Cyclom-32 cards) 8 * 9 * Timo Rossi, 1996 10 * 11 * Supports both ISA and PCI Cyclom cards 12 * 13 * Lots of debug output can be enabled by defining CY_DEBUG 14 * Some debugging counters (number of receive/transmit interrupts etc.) 15 * can be enabled by defining CY_DEBUG1 16 */ 17 18 #include <sys/types.h> 19 #include <sys/param.h> 20 #include <sys/ioctl.h> 21 #include <sys/syslog.h> 22 #include <sys/fcntl.h> 23 #include <sys/tty.h> 24 #include <sys/proc.h> 25 #include <sys/conf.h> 26 #include <sys/user.h> 27 #include <sys/ioctl.h> 28 #include <sys/select.h> 29 #include <sys/device.h> 30 #include <sys/malloc.h> 31 #include <sys/systm.h> 32 33 #include <machine/bus.h> 34 35 #include <dev/ic/cd1400reg.h> 36 #include <dev/ic/cyreg.h> 37 #include <dev/ic/cyvar.h> 38 39 /* Macros to clear/set/test flags. */ 40 #define SET(t, f) (t) |= (f) 41 #define CLR(t, f) (t) &= ~(f) 42 #define ISSET(t, f) ((t) & (f)) 43 44 static int cyparam __P((struct tty *, struct termios *)); 45 static void cystart __P((struct tty *)); 46 static void cy_poll __P((void *)); 47 static int cy_modem_control __P((struct cy_softc *, 48 struct cy_port *, int, int)); 49 static void cy_enable_transmitter __P((struct cy_softc *, struct cy_port *)); 50 static void cd1400_channel_cmd __P((struct cy_softc *, struct cy_port *, int)); 51 static int cy_speed __P((speed_t, int *, int *, int)); 52 53 extern struct cfdriver cy_cd; 54 55 static int cy_open = 0; 56 static int cy_events = 0; 57 58 cdev_decl(cy); 59 60 /* 61 * Common probe routine 62 */ 63 int 64 cy_find(sc) 65 struct cy_softc *sc; 66 { 67 int cy_chip, chip; 68 u_char firmware_ver; 69 bus_space_tag_t tag = sc->sc_memt; 70 bus_space_handle_t bsh = sc->sc_bsh; 71 int bustype = sc->sc_bustype; 72 73 /* Cyclom card hardware reset */ 74 bus_space_write_1(tag, bsh, CY16_RESET << bustype, 0); 75 DELAY(500); /* wait for reset to complete */ 76 bus_space_write_1(tag, bsh, CY_CLEAR_INTR << bustype, 0); 77 78 #ifdef CY_DEBUG 79 printf("cy: card reset done\n"); 80 #endif 81 sc->sc_nchips = 0; 82 83 for (cy_chip = 0, chip = 0; cy_chip < CY_MAX_CD1400s; 84 cy_chip++, chip += (CY_CD1400_MEMSPACING << bustype)) { 85 int i; 86 87 /* 88 * the last 4 nchips are 'interleaved' with the first 4 on 89 * 32-port boards 90 */ 91 if (cy_chip == 4) 92 chip -= (CY32_ADDR_FIX << bustype); 93 94 #ifdef CY_DEBUG 95 printf("%s probe chip %d offset 0x%x ... ", 96 sc->sc_dev.dv_xname, cy_chip, chip); 97 #endif 98 99 /* wait until the chip is ready for command */ 100 DELAY(1000); 101 if (bus_space_read_1(tag, bsh, chip + 102 ((CD1400_CCR << 1) << bustype)) != 0) { 103 #ifdef CY_DEBUG 104 printf("not ready for command\n"); 105 #endif 106 break; 107 } 108 /* clear the firmware version reg. */ 109 bus_space_write_1(tag, bsh, chip + 110 ((CD1400_GFRCR << 1) << bustype), 0); 111 112 /* 113 * On Cyclom-16 references to non-existent chip 4 114 * actually access chip 0 (address line 9 not decoded). 115 * Here we check if the clearing of chip 4 GFRCR actually 116 * cleared chip 0 GFRCR. In that case we have a 16 port card. 117 */ 118 if (cy_chip == 4 && 119 bus_space_read_1(tag, bsh, /* off for chip 0 (0) + */ 120 ((CD1400_GFRCR << 1) << bustype)) == 0) 121 break; 122 123 /* reset the chip */ 124 bus_space_write_1(tag, bsh, chip + 125 ((CD1400_CCR << 1) << bustype), 126 CD1400_CCR_CMDRESET | CD1400_CCR_FULLRESET); 127 128 /* wait for the chip to initialize itself */ 129 for (i = 0; i < 200; i++) { 130 DELAY(50); 131 firmware_ver = bus_space_read_1(tag, bsh, chip + 132 ((CD1400_GFRCR << 1) << bustype)); 133 if ((firmware_ver & 0xf0) == 0x40) /* found a CD1400 */ 134 break; 135 } 136 #ifdef CY_DEBUG 137 printf("firmware version 0x%x\n", firmware_ver); 138 #endif 139 140 if ((firmware_ver & 0xf0) != 0x40) 141 break; 142 143 /* firmware version OK, CD1400 found */ 144 sc->sc_nchips++; 145 } 146 147 if (sc->sc_nchips == 0) { 148 #ifdef CY_DEBUG 149 printf("no CD1400s found\n"); 150 #endif 151 return 0; 152 } 153 #ifdef CY_DEBUG 154 printf("found %d CD1400s\n", sc->sc_nchips); 155 #endif 156 157 return 1; 158 } 159 160 void 161 cy_attach(parent, self, aux) 162 struct device *parent, *self; 163 void *aux; 164 { 165 int port, cy_chip, num_chips, cdu, chip; 166 struct cy_softc *sc = (void *) self; 167 int cy_clock; 168 169 num_chips = sc->sc_nchips; 170 if (num_chips == 0) 171 return; 172 173 bzero(sc->sc_ports, sizeof(sc->sc_ports)); 174 175 port = 0; 176 for (cy_chip = 0, chip = 0; cy_chip < num_chips; cy_chip++, 177 chip += (CY_CD1400_MEMSPACING << sc->sc_bustype)) { 178 179 if (cy_chip == 4) 180 chip -= (CY32_ADDR_FIX << sc->sc_bustype); 181 182 #ifdef CY_DEBUG 183 printf("attach CD1400 #%d offset 0x%x\n", cy_chip, chip); 184 #endif 185 sc->sc_cd1400_offs[cy_chip] = chip; 186 187 /* 188 * configure port 0 as serial port (should already be after 189 * reset) 190 */ 191 cd_write_reg(sc, cy_chip, CD1400_GCR, 0); 192 193 if (cd_read_reg(sc, cy_chip, CD1400_GFRCR) <= 0x46) 194 cy_clock = CY_CLOCK; 195 else 196 cy_clock = CY_CLOCK_60; 197 198 /* set up a receive timeout period (1ms) */ 199 cd_write_reg(sc, cy_chip, CD1400_PPR, 200 (cy_clock / CD1400_PPR_PRESCALER / 1000) + 1); 201 202 for (cdu = 0; cdu < CD1400_NO_OF_CHANNELS; cdu++) { 203 sc->sc_ports[port].cy_port_num = port; 204 sc->sc_ports[port].cy_chip = cy_chip; 205 sc->sc_ports[port].cy_clock = cy_clock; 206 207 /* should we initialize anything else here? */ 208 port++; 209 } /* for(each port on one CD1400...) */ 210 211 } /* for(each CD1400 on a card... ) */ 212 213 printf(": %d ports\n", port); 214 215 /* ensure an edge for the next interrupt */ 216 bus_space_write_1(sc->sc_memt, sc->sc_bsh, 217 CY_CLEAR_INTR << sc->sc_bustype, 0); 218 } 219 220 /* 221 * open routine. returns zero if successfull, else error code 222 */ 223 int 224 cyopen(dev, flag, mode, p) 225 dev_t dev; 226 int flag, mode; 227 struct proc *p; 228 { 229 int card = CY_CARD(dev); 230 int port = CY_PORT(dev); 231 struct cy_softc *sc; 232 struct cy_port *cy; 233 struct tty *tp; 234 int s, error; 235 236 #ifdef CY_DEBUG 237 printf("cy%d open port %d flag 0x%x mode 0x%x\n", 238 card, port, flag, mode); 239 #endif 240 241 if (card >= cy_cd.cd_ndevs || (sc = cy_cd.cd_devs[card]) == NULL) 242 return ENXIO; 243 244 cy = &sc->sc_ports[port]; 245 246 s = spltty(); 247 if (cy->cy_tty == NULL) { 248 if ((cy->cy_tty = ttymalloc()) == NULL) { 249 splx(s); 250 printf("cy%d: port %d: can't allocate tty\n", 251 card, port); 252 return ENOMEM; 253 } 254 tty_attach(cy->cy_tty); 255 } 256 splx(s); 257 258 tp = cy->cy_tty; 259 tp->t_oproc = cystart; 260 tp->t_param = cyparam; 261 tp->t_dev = dev; 262 263 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 264 ttychars(tp); 265 tp->t_iflag = TTYDEF_IFLAG; 266 tp->t_oflag = TTYDEF_OFLAG; 267 tp->t_cflag = TTYDEF_CFLAG; 268 if (ISSET(cy->cy_openflags, TIOCFLAG_CLOCAL)) 269 SET(tp->t_cflag, CLOCAL); 270 if (ISSET(cy->cy_openflags, TIOCFLAG_CRTSCTS)) 271 SET(tp->t_cflag, CRTSCTS); 272 if (ISSET(cy->cy_openflags, TIOCFLAG_MDMBUF)) 273 SET(tp->t_cflag, MDMBUF); 274 tp->t_lflag = TTYDEF_LFLAG; 275 tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED; 276 277 s = spltty(); 278 279 /* 280 * Allocate input ring buffer if we don't already have one 281 */ 282 if (cy->cy_ibuf == NULL) { 283 cy->cy_ibuf = malloc(CY_IBUF_SIZE, M_DEVBUF, M_NOWAIT); 284 if (cy->cy_ibuf == NULL) { 285 printf("%s: port %d: can't allocate input buffer\n", 286 sc->sc_dev.dv_xname, port); 287 splx(s); 288 return ENOMEM; 289 } 290 cy->cy_ibuf_end = cy->cy_ibuf + CY_IBUF_SIZE; 291 } 292 /* mark the ring buffer as empty */ 293 cy->cy_ibuf_rd_ptr = cy->cy_ibuf_wr_ptr = cy->cy_ibuf; 294 295 /* select CD1400 channel */ 296 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, 297 port & CD1400_CAR_CHAN); 298 /* reset the channel */ 299 cd1400_channel_cmd(sc, cy, CD1400_CCR_CMDRESET); 300 /* encode unit (port) number in LIVR */ 301 /* there is just enough space for 5 bits (32 ports) */ 302 cd_write_reg(sc, cy->cy_chip, CD1400_LIVR, port << 3); 303 304 cy->cy_channel_control = 0; 305 306 /* hmm... need spltty() here? */ 307 if (cy_open == 0) { 308 cy_open = 1; 309 timeout(cy_poll, NULL, 1); 310 } 311 /* this sets parameters and raises DTR */ 312 cyparam(tp, &tp->t_termios); 313 314 ttsetwater(tp); 315 316 /* raise RTS too */ 317 cy_modem_control(sc, cy, TIOCM_RTS, DMBIS); 318 319 cy->cy_carrier_stat = 320 cd_read_reg(sc, cy->cy_chip, CD1400_MSVR2); 321 322 /* enable receiver and modem change interrupts */ 323 cd_write_reg(sc, cy->cy_chip, CD1400_SRER, 324 CD1400_SRER_MDMCH | CD1400_SRER_RXDATA); 325 326 if (CY_DIALOUT(dev) || 327 ISSET(cy->cy_openflags, TIOCFLAG_SOFTCAR) || 328 ISSET(tp->t_cflag, MDMBUF) || 329 ISSET(cy->cy_carrier_stat, CD1400_MSVR2_CD)) 330 SET(tp->t_state, TS_CARR_ON); 331 else 332 CLR(tp->t_state, TS_CARR_ON); 333 } else if (ISSET(tp->t_state, TS_XCLUDE) && p->p_ucred->cr_uid != 0) { 334 return EBUSY; 335 } else { 336 s = spltty(); 337 } 338 339 /* wait for carrier if necessary */ 340 if (!ISSET(flag, O_NONBLOCK)) { 341 while (!ISSET(tp->t_cflag, CLOCAL) && 342 !ISSET(tp->t_state, TS_CARR_ON)) { 343 tp->t_wopen++; 344 error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH, 345 "cydcd", 0); 346 tp->t_wopen--; 347 if (error != 0) { 348 splx(s); 349 return error; 350 } 351 } 352 } 353 splx(s); 354 355 return (*linesw[tp->t_line].l_open) (dev, tp); 356 } 357 358 /* 359 * close routine. returns zero if successfull, else error code 360 */ 361 int 362 cyclose(dev, flag, mode, p) 363 dev_t dev; 364 int flag, mode; 365 struct proc *p; 366 { 367 int card = CY_CARD(dev); 368 int port = CY_PORT(dev); 369 struct cy_softc *sc = cy_cd.cd_devs[card]; 370 struct cy_port *cy = &sc->sc_ports[port]; 371 struct tty *tp = cy->cy_tty; 372 int s; 373 374 #ifdef CY_DEBUG 375 printf("%s: close port %d, flag 0x%x, mode 0x%x\n", 376 sc->sc_dev.dv_xname, port, flag, mode); 377 #endif 378 379 (*linesw[tp->t_line].l_close) (tp, flag); 380 s = spltty(); 381 382 if (ISSET(tp->t_cflag, HUPCL) && 383 !ISSET(cy->cy_openflags, TIOCFLAG_SOFTCAR)) { 384 /* 385 * drop DTR and RTS (should we wait for output buffer to 386 * become empty first?) 387 */ 388 cy_modem_control(sc, cy, 0, DMSET); 389 } 390 /* 391 * XXX should we disable modem change and 392 * receive interrupts here or somewhere ? 393 */ 394 CLR(tp->t_state, TS_BUSY | TS_FLUSH); 395 396 splx(s); 397 ttyclose(tp); 398 399 return 0; 400 } 401 402 /* 403 * Read routine 404 */ 405 int 406 cyread(dev, uio, flag) 407 dev_t dev; 408 struct uio *uio; 409 int flag; 410 { 411 int card = CY_CARD(dev); 412 int port = CY_PORT(dev); 413 struct cy_softc *sc = cy_cd.cd_devs[card]; 414 struct cy_port *cy = &sc->sc_ports[port]; 415 struct tty *tp = cy->cy_tty; 416 417 #ifdef CY_DEBUG 418 printf("%s: read port %d uio 0x%x flag 0x%x\n", 419 sc->sc_dev.dv_xname, port, uio, flag); 420 #endif 421 422 return ((*linesw[tp->t_line].l_read) (tp, uio, flag)); 423 } 424 425 /* 426 * Write routine 427 */ 428 int 429 cywrite(dev, uio, flag) 430 dev_t dev; 431 struct uio *uio; 432 int flag; 433 { 434 int card = CY_CARD(dev); 435 int port = CY_PORT(dev); 436 struct cy_softc *sc = cy_cd.cd_devs[card]; 437 struct cy_port *cy = &sc->sc_ports[port]; 438 struct tty *tp = cy->cy_tty; 439 440 #ifdef CY_DEBUG 441 printf("%s: write port %d uio 0x%x flag 0x%x\n", 442 sc->sc_dev.dv_xname, port, uio, flag); 443 #endif 444 445 return ((*linesw[tp->t_line].l_write) (tp, uio, flag)); 446 } 447 448 /* 449 * return tty pointer 450 */ 451 struct tty * 452 cytty(dev) 453 dev_t dev; 454 { 455 int card = CY_CARD(dev); 456 int port = CY_PORT(dev); 457 struct cy_softc *sc = cy_cd.cd_devs[card]; 458 struct cy_port *cy = &sc->sc_ports[port]; 459 struct tty *tp = cy->cy_tty; 460 461 #ifdef CY_DEBUG 462 printf("%s: tty port %d tp 0x%x\n", sc->sc_dev.dv_xname, port, tp); 463 #endif 464 return tp; 465 } 466 467 /* 468 * ioctl routine 469 */ 470 int 471 cyioctl(dev, cmd, data, flag, p) 472 dev_t dev; 473 u_long cmd; 474 caddr_t data; 475 int flag; 476 struct proc *p; 477 { 478 int card = CY_CARD(dev); 479 int port = CY_PORT(dev); 480 struct cy_softc *sc = cy_cd.cd_devs[card]; 481 struct cy_port *cy = &sc->sc_ports[port]; 482 struct tty *tp = cy->cy_tty; 483 int error; 484 485 #ifdef CY_DEBUG 486 printf("%s: port %d ioctl cmd 0x%x data 0x%x flag 0x%x\n", 487 sc->sc_dev.dv_xname, port, cmd, data, flag); 488 #endif 489 490 error = (*linesw[tp->t_line].l_ioctl) (tp, cmd, data, flag, p); 491 if (error >= 0) 492 return error; 493 494 error = ttioctl(tp, cmd, data, flag, p); 495 if (error >= 0) 496 return error; 497 498 /* XXX should not allow dropping DTR when dialin? */ 499 500 switch (cmd) { 501 case TIOCSBRK: /* start break */ 502 SET(cy->cy_flags, CY_F_START_BREAK); 503 cy_enable_transmitter(sc, cy); 504 break; 505 506 case TIOCCBRK: /* stop break */ 507 SET(cy->cy_flags, CY_F_END_BREAK); 508 cy_enable_transmitter(sc, cy); 509 break; 510 511 case TIOCSDTR: /* DTR on */ 512 cy_modem_control(sc, cy, TIOCM_DTR, DMBIS); 513 break; 514 515 case TIOCCDTR: /* DTR off */ 516 cy_modem_control(sc, cy, TIOCM_DTR, DMBIC); 517 break; 518 519 case TIOCMSET: /* set new modem control line values */ 520 cy_modem_control(sc, cy, *((int *) data), DMSET); 521 break; 522 523 case TIOCMBIS: /* turn modem control bits on */ 524 cy_modem_control(sc, cy, *((int *) data), DMBIS); 525 break; 526 527 case TIOCMBIC: /* turn modem control bits off */ 528 cy_modem_control(sc, cy, *((int *) data), DMBIC); 529 break; 530 531 case TIOCMGET: /* get modem control/status line state */ 532 *((int *) data) = cy_modem_control(sc, cy, 0, DMGET); 533 break; 534 535 case TIOCGFLAGS: 536 *((int *) data) = cy->cy_openflags | 537 (CY_DIALOUT(dev) ? TIOCFLAG_SOFTCAR : 0); 538 break; 539 540 case TIOCSFLAGS: 541 error = suser(p->p_ucred, &p->p_acflag); 542 if (error != 0) 543 return EPERM; 544 545 cy->cy_openflags = *((int *) data) & 546 (TIOCFLAG_SOFTCAR | TIOCFLAG_CLOCAL | 547 TIOCFLAG_CRTSCTS | TIOCFLAG_MDMBUF); 548 break; 549 550 default: 551 return ENOTTY; 552 } 553 554 return 0; 555 } 556 557 /* 558 * start output 559 */ 560 void 561 cystart(tp) 562 struct tty *tp; 563 { 564 int card = CY_CARD(tp->t_dev); 565 int port = CY_PORT(tp->t_dev); 566 struct cy_softc *sc = cy_cd.cd_devs[card]; 567 struct cy_port *cy = &sc->sc_ports[port]; 568 int s; 569 570 #ifdef CY_DEBUG 571 printf("%s: port %d start, tty 0x%x\n", sc->sc_dev.dv_xname, port, tp); 572 #endif 573 574 575 s = spltty(); 576 577 #ifdef CY_DEBUG1 578 cy->cy_start_count++; 579 #endif 580 581 if (!ISSET(tp->t_state, TS_TTSTOP | TS_TIMEOUT | TS_BUSY)) { 582 if (tp->t_outq.c_cc <= tp->t_lowat) { 583 if (ISSET(tp->t_state, TS_ASLEEP)) { 584 CLR(tp->t_state, TS_ASLEEP); 585 wakeup(&tp->t_outq); 586 } 587 selwakeup(&tp->t_wsel); 588 589 if (tp->t_outq.c_cc == 0) 590 goto out; 591 } 592 SET(tp->t_state, TS_BUSY); 593 cy_enable_transmitter(sc, cy); 594 } 595 out: 596 597 splx(s); 598 } 599 600 /* 601 * stop output 602 */ 603 void 604 cystop(tp, flag) 605 struct tty *tp; 606 int flag; 607 { 608 int card = CY_CARD(tp->t_dev); 609 int port = CY_PORT(tp->t_dev); 610 struct cy_softc *sc = cy_cd.cd_devs[card]; 611 struct cy_port *cy = &sc->sc_ports[port]; 612 int s; 613 614 #ifdef CY_DEBUG 615 printf("%s: port %d stop tty 0x%x flag 0x%x\n", 616 sc->sc_dev.dv_xname, port, tp, flag); 617 #endif 618 619 s = spltty(); 620 621 if (ISSET(tp->t_state, TS_BUSY)) { 622 if (!ISSET(tp->t_state, TS_TTSTOP)) 623 SET(tp->t_state, TS_FLUSH); 624 625 /* 626 * the transmit interrupt routine will disable transmit when it 627 * notices that CY_F_STOP has been set. 628 */ 629 SET(cy->cy_flags, CY_F_STOP); 630 } 631 splx(s); 632 } 633 634 /* 635 * parameter setting routine. 636 * returns 0 if successfull, else returns error code 637 */ 638 static int 639 cyparam(tp, t) 640 struct tty *tp; 641 struct termios *t; 642 { 643 int card = CY_CARD(tp->t_dev); 644 int port = CY_PORT(tp->t_dev); 645 struct cy_softc *sc = cy_cd.cd_devs[card]; 646 struct cy_port *cy = &sc->sc_ports[port]; 647 int ibpr, obpr, i_clk_opt, o_clk_opt; 648 int s, opt; 649 650 #ifdef CY_DEBUG 651 printf("%s: port %d param tty 0x%x termios 0x%x\n", 652 sc->sc_dev.dv_xname, port, tp, t); 653 printf("ispeed %d ospeed %d\n", t->c_ispeed, t->c_ospeed); 654 #endif 655 656 if (t->c_ospeed != 0 && cy_speed(t->c_ospeed, &o_clk_opt, &obpr, cy->cy_clock) < 0) 657 return EINVAL; 658 659 if (t->c_ispeed != 0 && cy_speed(t->c_ispeed, &i_clk_opt, &ibpr, cy->cy_clock) < 0) 660 return EINVAL; 661 662 s = spltty(); 663 664 /* hang up the line is ospeed is zero, else turn DTR on */ 665 cy_modem_control(sc, cy, TIOCM_DTR, (t->c_ospeed == 0 ? DMBIC : DMBIS)); 666 667 /* channel was selected by the above call to cy_modem_control() */ 668 #if 0 669 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, port & CD1400_CAR_CHAN); 670 #endif 671 672 /* set transmit speed */ 673 if (t->c_ospeed != 0) { 674 cd_write_reg(sc, cy->cy_chip, CD1400_TCOR, o_clk_opt); 675 cd_write_reg(sc, cy->cy_chip, CD1400_TBPR, obpr); 676 } 677 /* set receive speed */ 678 if (t->c_ispeed != 0) { 679 cd_write_reg(sc, cy->cy_chip, CD1400_RCOR, i_clk_opt); 680 cd_write_reg(sc, cy->cy_chip, CD1400_RBPR, ibpr); 681 } 682 opt = CD1400_CCR_CMDCHANCTL | CD1400_CCR_XMTEN 683 | (ISSET(t->c_cflag, CREAD) ? CD1400_CCR_RCVEN : CD1400_CCR_RCVDIS); 684 685 if (opt != cy->cy_channel_control) { 686 cy->cy_channel_control = opt; 687 cd1400_channel_cmd(sc, cy, opt); 688 } 689 /* compute COR1 contents */ 690 opt = 0; 691 if (ISSET(t->c_cflag, PARENB)) { 692 if (ISSET(t->c_cflag, PARODD)) 693 opt |= CD1400_COR1_PARODD; 694 opt |= CD1400_COR1_PARNORMAL; 695 } 696 if (!ISSET(t->c_iflag, INPCK)) 697 opt |= CD1400_COR1_NOINPCK; /* no parity checking */ 698 699 if (ISSET(t->c_cflag, CSTOPB)) 700 opt |= CD1400_COR1_STOP2; 701 702 switch (t->c_cflag & CSIZE) { 703 case CS5: 704 opt |= CD1400_COR1_CS5; 705 break; 706 707 case CS6: 708 opt |= CD1400_COR1_CS6; 709 break; 710 711 case CS7: 712 opt |= CD1400_COR1_CS7; 713 break; 714 715 default: 716 opt |= CD1400_COR1_CS8; 717 break; 718 } 719 720 cd_write_reg(sc, cy->cy_chip, CD1400_COR1, opt); 721 722 #ifdef CY_DEBUG 723 printf("cor1 = 0x%x...", opt); 724 #endif 725 726 /* 727 * use the CD1400 automatic CTS flow control if CRTSCTS is set 728 * 729 * CD1400_COR2_ETC is used because breaks are generated with 730 * embedded transmit commands 731 */ 732 cd_write_reg(sc, cy->cy_chip, CD1400_COR2, 733 CD1400_COR2_ETC | 734 (ISSET(t->c_cflag, CRTSCTS) ? CD1400_COR2_CCTS_OFLOW : 0)); 735 736 cd_write_reg(sc, cy->cy_chip, CD1400_COR3, CY_RX_FIFO_THRESHOLD); 737 738 cd1400_channel_cmd(sc, cy, CD1400_CCR_CMDCORCHG | 739 CD1400_CCR_COR1 | CD1400_CCR_COR2 | CD1400_CCR_COR3); 740 741 cd_write_reg(sc, cy->cy_chip, CD1400_COR4, CD1400_COR4_PFO_EXCEPTION); 742 cd_write_reg(sc, cy->cy_chip, CD1400_COR5, 0); 743 744 /* 745 * set modem change option registers to generate interrupts 746 * on carrier detect changes. 747 * 748 * if hardware RTS handshaking is used 749 * also set the handshaking threshold. 750 */ 751 if (cy->cy_clock == CY_CLOCK_60) { 752 cd_write_reg(sc, cy->cy_chip, CD1400_MCOR1, CD1400_MCOR1_CDzd | 753 (ISSET(t->c_cflag, CRTSCTS) ? CY_RX_DTR_THRESHOLD : 0)); 754 } else { 755 cd_write_reg(sc, cy->cy_chip, CD1400_MCOR1, CD1400_MCOR1_CDzd); 756 } 757 758 cd_write_reg(sc, cy->cy_chip, CD1400_MCOR2, CD1400_MCOR2_CDod); 759 760 /* 761 * set receive timeout to approx. 2ms 762 * could use more complex logic here... 763 * (but is it actually needed or even useful?) 764 */ 765 cd_write_reg(sc, cy->cy_chip, CD1400_RTPR, 2); 766 767 /* 768 * should do anything else here? 769 * XXX check MDMBUF handshaking like in com.c? 770 */ 771 772 splx(s); 773 return 0; 774 } 775 776 /* 777 * set/get modem line status 778 * 779 * bits can be: TIOCM_DTR, TIOCM_RTS, TIOCM_CTS, TIOCM_CD, TIOCM_RI, TIOCM_DSR 780 * 781 */ 782 static int 783 cy_modem_control(sc, cy, bits, howto) 784 struct cy_softc *sc; 785 struct cy_port *cy; 786 int bits; 787 int howto; 788 { 789 int s, msvr; 790 struct tty *tp = cy->cy_tty; 791 792 s = spltty(); 793 794 /* select channel */ 795 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, 796 cy->cy_port_num & CD1400_CAR_CHAN); 797 798 /* does not manipulate RTS if it is used for flow control */ 799 switch (howto) { 800 case DMGET: 801 splx(s); 802 bits = 0; 803 if (cy->cy_channel_control & CD1400_CCR_RCVEN) 804 bits |= TIOCM_LE; 805 msvr = cd_read_reg(sc, cy->cy_chip, CD1400_MSVR2); 806 if (cy->cy_clock == CY_CLOCK_60) { 807 if (cd_read_reg(sc, cy->cy_chip, CD1400_MSVR1) & 808 CD1400_MSVR1_RTS) 809 bits |= TIOCM_DTR; 810 if (msvr & CD1400_MSVR2_DTR) 811 bits |= TIOCM_RTS; 812 } else { 813 if (cd_read_reg(sc, cy->cy_chip, CD1400_MSVR1) & 814 CD1400_MSVR1_RTS) 815 bits |= TIOCM_RTS; 816 if (msvr & CD1400_MSVR2_DTR) 817 bits |= TIOCM_DTR; 818 } 819 if (msvr & CD1400_MSVR2_CTS) 820 bits |= TIOCM_CTS; 821 if (msvr & CD1400_MSVR2_CD) 822 bits |= TIOCM_CD; 823 if (msvr & CD1400_MSVR2_DSR) /* not connected on some 824 * Cyclom cards? */ 825 bits |= TIOCM_DSR; 826 if (msvr & CD1400_MSVR2_RI) /* not connected on Cyclom-8Y 827 * cards? */ 828 bits |= TIOCM_RI; 829 splx(s); 830 return bits; 831 832 case DMSET: /* replace old values with new ones */ 833 if (cy->cy_clock == CY_CLOCK_60) { 834 if (!ISSET(tp->t_cflag, CRTSCTS)) 835 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2, 836 ((bits & TIOCM_RTS) ? CD1400_MSVR2_DTR : 0)); 837 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1, 838 ((bits & TIOCM_DTR) ? CD1400_MSVR1_RTS : 0)); 839 } else { 840 if (!ISSET(tp->t_cflag, CRTSCTS)) 841 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1, 842 ((bits & TIOCM_RTS) ? CD1400_MSVR1_RTS : 0)); 843 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2, 844 ((bits & TIOCM_DTR) ? CD1400_MSVR2_DTR : 0)); 845 } 846 break; 847 848 case DMBIS: /* set bits */ 849 if (cy->cy_clock == CY_CLOCK_60) { 850 if (!ISSET(tp->t_cflag, CRTSCTS) && (bits & TIOCM_RTS) != 0) 851 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2, 852 CD1400_MSVR2_DTR); 853 if (bits & TIOCM_DTR) 854 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1, 855 CD1400_MSVR1_RTS); 856 } else { 857 if (!ISSET(tp->t_cflag, CRTSCTS) && (bits & TIOCM_RTS) != 0) 858 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1, 859 CD1400_MSVR1_RTS); 860 if (bits & TIOCM_DTR) 861 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2, 862 CD1400_MSVR2_DTR); 863 } 864 break; 865 866 case DMBIC: /* clear bits */ 867 if (cy->cy_clock == CY_CLOCK_60) { 868 if (!ISSET(tp->t_cflag, CRTSCTS) && (bits & TIOCM_RTS)) 869 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2, 0); 870 if (bits & TIOCM_DTR) 871 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1, 0); 872 } else { 873 if (!ISSET(tp->t_cflag, CRTSCTS) && (bits & TIOCM_RTS)) 874 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1, 0); 875 if (bits & TIOCM_DTR) 876 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2, 0); 877 } 878 break; 879 } 880 splx(s); 881 return 0; 882 } 883 884 /* 885 * Upper-level handler loop (called from timer interrupt?) 886 * This routine is common for multiple cards 887 */ 888 static void 889 cy_poll(arg) 890 void *arg; 891 { 892 int card, port; 893 struct cy_softc *sc; 894 struct cy_port *cy; 895 struct tty *tp; 896 static int counter = 0; 897 #ifdef CY_DEBUG1 898 int did_something; 899 #endif 900 int s = spltty(); 901 902 if (cy_events == 0 && ++counter < 200) { 903 splx(s); 904 goto out; 905 } 906 cy_events = 0; 907 splx(s); 908 909 for (card = 0; card < cy_cd.cd_ndevs; card++) { 910 sc = cy_cd.cd_devs[card]; 911 if (sc == NULL) 912 continue; 913 914 #ifdef CY_DEBUG1 915 sc->sc_poll_count1++; 916 did_something = 0; 917 #endif 918 919 for (port = 0; port < sc->sc_nchips * CD1400_NO_OF_CHANNELS; 920 port++) { 921 cy = &sc->sc_ports[port]; 922 if ((tp = cy->cy_tty) == NULL || cy->cy_ibuf == NULL || 923 (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0)) 924 continue; 925 926 /* 927 * handle received data 928 */ 929 while (cy->cy_ibuf_rd_ptr != cy->cy_ibuf_wr_ptr) { 930 u_char line_stat; 931 int chr; 932 933 line_stat = cy->cy_ibuf_rd_ptr[0]; 934 chr = cy->cy_ibuf_rd_ptr[1]; 935 936 if (line_stat & 937 (CD1400_RDSR_BREAK | CD1400_RDSR_FE)) 938 chr |= TTY_FE; 939 if (line_stat & CD1400_RDSR_PE) 940 chr |= TTY_PE; 941 942 /* 943 * on an overrun error the data is treated as 944 * good just as it should be. 945 */ 946 947 #ifdef CY_DEBUG 948 printf("%s: port %d ttyinput 0x%x\n", 949 sc->sc_dev.dv_xname, port, chr); 950 #endif 951 952 (*linesw[tp->t_line].l_rint) (chr, tp); 953 954 s = spltty(); /* really necessary? */ 955 if ((cy->cy_ibuf_rd_ptr += 2) == 956 cy->cy_ibuf_end) 957 cy->cy_ibuf_rd_ptr = cy->cy_ibuf; 958 splx(s); 959 960 #ifdef CY_DEBUG1 961 did_something = 1; 962 #endif 963 } 964 965 /* 966 * If we don't have any received data in ibuf and 967 * CRTSCTS is on and RTS is turned off, it is time to 968 * turn RTS back on 969 */ 970 if (ISSET(tp->t_cflag, CRTSCTS)) { 971 /* 972 * we can't use cy_modem_control() here as it 973 * doesn't change RTS if RTSCTS is on 974 */ 975 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, 976 port & CD1400_CAR_CHAN); 977 978 if (cy->cy_clock == CY_CLOCK_60) { 979 if ((cd_read_reg(sc, cy->cy_chip, 980 CD1400_MSVR2) & CD1400_MSVR2_DTR) == 0) { 981 cd_write_reg(sc, cy->cy_chip, 982 CD1400_MSVR2,CD1400_MSVR2_DTR); 983 #ifdef CY_DEBUG1 984 did_something = 1; 985 #endif 986 } 987 } else { 988 if ((cd_read_reg(sc, cy->cy_chip, 989 CD1400_MSVR1) & CD1400_MSVR1_RTS) == 0) { 990 cd_write_reg(sc, cy->cy_chip, 991 CD1400_MSVR1,CD1400_MSVR1_RTS); 992 #ifdef CY_DEBUG1 993 did_something = 1; 994 #endif 995 } 996 } 997 } 998 999 /* 1000 * handle carrier changes 1001 */ 1002 s = spltty(); 1003 if (ISSET(cy->cy_flags, CY_F_CARRIER_CHANGED)) { 1004 int carrier; 1005 1006 CLR(cy->cy_flags, CY_F_CARRIER_CHANGED); 1007 splx(s); 1008 1009 carrier = ((cy->cy_carrier_stat & 1010 CD1400_MSVR2_CD) != 0); 1011 1012 #ifdef CY_DEBUG 1013 printf("cy_poll: carrier change " 1014 "(card %d, port %d, carrier %d)\n", 1015 card, port, carrier); 1016 #endif 1017 if (CY_DIALIN(tp->t_dev) && 1018 !(*linesw[tp->t_line].l_modem)(tp, carrier)) 1019 cy_modem_control(sc, cy, 1020 TIOCM_DTR, DMBIC); 1021 1022 #ifdef CY_DEBUG1 1023 did_something = 1; 1024 #endif 1025 } else 1026 splx(s); 1027 1028 s = spltty(); 1029 if (ISSET(cy->cy_flags, CY_F_START)) { 1030 CLR(cy->cy_flags, CY_F_START); 1031 splx(s); 1032 1033 (*linesw[tp->t_line].l_start) (tp); 1034 1035 #ifdef CY_DEBUG1 1036 did_something = 1; 1037 #endif 1038 } else 1039 splx(s); 1040 1041 /* could move this to even upper level... */ 1042 if (cy->cy_fifo_overruns) { 1043 cy->cy_fifo_overruns = 0; 1044 /* 1045 * doesn't report overrun count, but 1046 * shouldn't really matter 1047 */ 1048 log(LOG_WARNING, "%s: port %d fifo overrun\n", 1049 sc->sc_dev.dv_xname, port); 1050 } 1051 if (cy->cy_ibuf_overruns) { 1052 cy->cy_ibuf_overruns = 0; 1053 log(LOG_WARNING, "%s: port %d ibuf overrun\n", 1054 sc->sc_dev.dv_xname, port); 1055 } 1056 } /* for(port...) */ 1057 #ifdef CY_DEBUG1 1058 if (did_something && counter >= 200) 1059 sc->sc_poll_count2++; 1060 #endif 1061 } /* for(card...) */ 1062 1063 counter = 0; 1064 1065 out: 1066 timeout(cy_poll, NULL, 1); 1067 } 1068 1069 /* 1070 * hardware interrupt routine 1071 */ 1072 int 1073 cy_intr(arg) 1074 void *arg; 1075 { 1076 struct cy_softc *sc = arg; 1077 struct cy_port *cy; 1078 int cy_chip, stat; 1079 int int_serviced = 0; 1080 1081 /* 1082 * Check interrupt status of each CD1400 chip on this card 1083 * (multiple cards cannot share the same interrupt) 1084 */ 1085 for (cy_chip = 0; cy_chip < sc->sc_nchips; cy_chip++) { 1086 1087 stat = cd_read_reg(sc, cy_chip, CD1400_SVRR); 1088 if (stat == 0) 1089 continue; 1090 1091 if (ISSET(stat, CD1400_SVRR_RXRDY)) { 1092 u_char save_car, save_rir, serv_type; 1093 u_char line_stat, recv_data, n_chars; 1094 u_char *buf_p; 1095 1096 save_rir = cd_read_reg(sc, cy_chip, CD1400_RIR); 1097 save_car = cd_read_reg(sc, cy_chip, CD1400_CAR); 1098 /* enter rx service */ 1099 cd_write_reg(sc, cy_chip, CD1400_CAR, save_rir); 1100 1101 serv_type = cd_read_reg(sc, cy_chip, CD1400_RIVR); 1102 cy = &sc->sc_ports[serv_type >> 3]; 1103 1104 #ifdef CY_DEBUG1 1105 cy->cy_rx_int_count++; 1106 #endif 1107 1108 if (cy->cy_tty == NULL || 1109 !ISSET(cy->cy_tty->t_state, TS_ISOPEN)) 1110 goto end_rx_serv; 1111 1112 buf_p = cy->cy_ibuf_wr_ptr; 1113 1114 if (ISSET(serv_type, CD1400_RIVR_EXCEPTION)) { 1115 line_stat = cd_read_reg(sc, cy->cy_chip, 1116 CD1400_RDSR); 1117 recv_data = cd_read_reg(sc, cy->cy_chip, 1118 CD1400_RDSR); 1119 1120 #ifdef CY_DEBUG 1121 printf("cy%d port %d recv exception, line_stat 0x%x, char 0x%x\n", 1122 card, cy->cy_port_num, line_stat, recv_data); 1123 #endif 1124 if (ISSET(line_stat, CD1400_RDSR_OE)) 1125 cy->cy_fifo_overruns++; 1126 1127 *buf_p++ = line_stat; 1128 *buf_p++ = recv_data; 1129 if (buf_p == cy->cy_ibuf_end) 1130 buf_p = cy->cy_ibuf; 1131 1132 if (buf_p == cy->cy_ibuf_rd_ptr) { 1133 if (buf_p == cy->cy_ibuf) 1134 buf_p = cy->cy_ibuf_end; 1135 buf_p -= 2; 1136 cy->cy_ibuf_overruns++; 1137 } 1138 cy_events = 1; 1139 } else {/* no exception, received data OK */ 1140 n_chars = cd_read_reg(sc, cy->cy_chip, 1141 CD1400_RDCR); 1142 #ifdef CY_DEBUG 1143 printf("cy%d port %d receive ok %d chars\n", 1144 card, cy->cy_port_num, n_chars); 1145 #endif 1146 while (n_chars--) { 1147 *buf_p++ = 0; /* status: OK */ 1148 /* data byte */ 1149 *buf_p++ = cd_read_reg(sc, 1150 cy->cy_chip, CD1400_RDSR); 1151 if (buf_p == cy->cy_ibuf_end) 1152 buf_p = cy->cy_ibuf; 1153 if (buf_p == cy->cy_ibuf_rd_ptr) { 1154 if (buf_p == cy->cy_ibuf) 1155 buf_p = cy->cy_ibuf_end; 1156 buf_p -= 2; 1157 cy->cy_ibuf_overruns++; 1158 break; 1159 } 1160 } 1161 cy_events = 1; 1162 } 1163 1164 cy->cy_ibuf_wr_ptr = buf_p; 1165 1166 /* RTS handshaking for incoming data */ 1167 if (ISSET(cy->cy_tty->t_cflag, CRTSCTS)) { 1168 int bf; 1169 1170 bf = buf_p - cy->cy_ibuf_rd_ptr; 1171 if (bf < 0) 1172 bf += CY_IBUF_SIZE; 1173 1174 if (bf > (CY_IBUF_SIZE / 2)) { /* turn RTS off */ 1175 if (cy->cy_clock == CY_CLOCK_60) { 1176 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2, 0); 1177 } else { 1178 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1, 0); 1179 } 1180 } 1181 } 1182 1183 end_rx_serv: 1184 /* terminate service context */ 1185 cd_write_reg(sc, cy->cy_chip, CD1400_RIR, save_rir & 0x3f); 1186 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, save_car); 1187 int_serviced = 1; 1188 } /* if (rx_service...) */ 1189 if (ISSET(stat, CD1400_SVRR_MDMCH)) { 1190 u_char save_car, save_mir, serv_type, modem_stat; 1191 1192 save_mir = cd_read_reg(sc, cy_chip, CD1400_MIR); 1193 save_car = cd_read_reg(sc, cy_chip, CD1400_CAR); 1194 /* enter modem service */ 1195 cd_write_reg(sc, cy_chip, CD1400_CAR, save_mir); 1196 1197 serv_type = cd_read_reg(sc, cy_chip, CD1400_MIVR); 1198 cy = &sc->sc_ports[serv_type >> 3]; 1199 1200 #ifdef CY_DEBUG1 1201 cy->cy_modem_int_count++; 1202 #endif 1203 1204 modem_stat = cd_read_reg(sc, cy->cy_chip, CD1400_MSVR2); 1205 1206 #ifdef CY_DEBUG 1207 printf("cy%d port %d modem line change, new stat 0x%x\n", 1208 card, cy->cy_port_num, modem_stat); 1209 #endif 1210 if (ISSET((cy->cy_carrier_stat ^ modem_stat), CD1400_MSVR2_CD)) { 1211 SET(cy->cy_flags, CY_F_CARRIER_CHANGED); 1212 cy_events = 1; 1213 } 1214 cy->cy_carrier_stat = modem_stat; 1215 1216 /* terminate service context */ 1217 cd_write_reg(sc, cy->cy_chip, CD1400_MIR, save_mir & 0x3f); 1218 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, save_car); 1219 int_serviced = 1; 1220 } /* if (modem_service...) */ 1221 if (ISSET(stat, CD1400_SVRR_TXRDY)) { 1222 u_char save_car, save_tir, serv_type, 1223 count, ch; 1224 struct tty *tp; 1225 1226 save_tir = cd_read_reg(sc, cy_chip, CD1400_TIR); 1227 save_car = cd_read_reg(sc, cy_chip, CD1400_CAR); 1228 /* enter tx service */ 1229 cd_write_reg(sc, cy_chip, CD1400_CAR, save_tir); 1230 1231 serv_type = cd_read_reg(sc, cy_chip, CD1400_TIVR); 1232 cy = &sc->sc_ports[serv_type >> 3]; 1233 1234 #ifdef CY_DEBUG1 1235 cy->cy_tx_int_count++; 1236 #endif 1237 #ifdef CY_DEBUG 1238 printf("cy%d port %d tx service\n", card, 1239 cy->cy_port_num); 1240 #endif 1241 1242 /* stop transmitting if no tty or CY_F_STOP set */ 1243 tp = cy->cy_tty; 1244 if (tp == NULL || ISSET(cy->cy_flags, CY_F_STOP)) 1245 goto txdone; 1246 1247 count = 0; 1248 if (ISSET(cy->cy_flags, CY_F_SEND_NUL)) { 1249 cd_write_reg(sc, cy->cy_chip, CD1400_TDR, 0); 1250 cd_write_reg(sc, cy->cy_chip, CD1400_TDR, 0); 1251 count += 2; 1252 CLR(cy->cy_flags, CY_F_SEND_NUL); 1253 } 1254 if (tp->t_outq.c_cc > 0) { 1255 SET(tp->t_state, TS_BUSY); 1256 while (tp->t_outq.c_cc > 0 && 1257 count < CD1400_TX_FIFO_SIZE) { 1258 ch = getc(&tp->t_outq); 1259 /* 1260 * remember to double NUL characters 1261 * because embedded transmit commands 1262 * are enabled 1263 */ 1264 if (ch == 0) { 1265 if (count >= CD1400_TX_FIFO_SIZE - 2) { 1266 SET(cy->cy_flags, CY_F_SEND_NUL); 1267 break; 1268 } 1269 cd_write_reg(sc, cy->cy_chip, 1270 CD1400_TDR, ch); 1271 count++; 1272 } 1273 cd_write_reg(sc, cy->cy_chip, 1274 CD1400_TDR, ch); 1275 count++; 1276 } 1277 } else { 1278 /* 1279 * no data to send -- check if we should 1280 * start/stop a break 1281 */ 1282 /* 1283 * XXX does this cause too much delay before 1284 * breaks? 1285 */ 1286 if (ISSET(cy->cy_flags, CY_F_START_BREAK)) { 1287 cd_write_reg(sc, cy->cy_chip, 1288 CD1400_TDR, 0); 1289 cd_write_reg(sc, cy->cy_chip, 1290 CD1400_TDR, 0x81); 1291 CLR(cy->cy_flags, CY_F_START_BREAK); 1292 } 1293 if (ISSET(cy->cy_flags, CY_F_END_BREAK)) { 1294 cd_write_reg(sc, cy->cy_chip, 1295 CD1400_TDR, 0); 1296 cd_write_reg(sc, cy->cy_chip, 1297 CD1400_TDR, 0x83); 1298 CLR(cy->cy_flags, CY_F_END_BREAK); 1299 } 1300 } 1301 1302 if (tp->t_outq.c_cc == 0) { 1303 txdone: 1304 /* 1305 * No data to send or requested to stop. 1306 * Disable transmit interrupt 1307 */ 1308 cd_write_reg(sc, cy->cy_chip, CD1400_SRER, 1309 cd_read_reg(sc, cy->cy_chip, CD1400_SRER) 1310 & ~CD1400_SRER_TXRDY); 1311 CLR(cy->cy_flags, CY_F_STOP); 1312 CLR(tp->t_state, TS_BUSY); 1313 } 1314 if (tp->t_outq.c_cc <= tp->t_lowat) { 1315 SET(cy->cy_flags, CY_F_START); 1316 cy_events = 1; 1317 } 1318 /* terminate service context */ 1319 cd_write_reg(sc, cy->cy_chip, CD1400_TIR, save_tir & 0x3f); 1320 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, save_car); 1321 int_serviced = 1; 1322 } /* if (tx_service...) */ 1323 } /* for(...all CD1400s on a card) */ 1324 1325 /* ensure an edge for next interrupt */ 1326 bus_space_write_1(sc->sc_memt, sc->sc_bsh, 1327 CY_CLEAR_INTR << sc->sc_bustype, 0); 1328 return int_serviced; 1329 } 1330 1331 /* 1332 * subroutine to enable CD1400 transmitter 1333 */ 1334 static void 1335 cy_enable_transmitter(sc, cy) 1336 struct cy_softc *sc; 1337 struct cy_port *cy; 1338 { 1339 int s = spltty(); 1340 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, 1341 cy->cy_port_num & CD1400_CAR_CHAN); 1342 cd_write_reg(sc, cy->cy_chip, CD1400_SRER, 1343 cd_read_reg(sc, cy->cy_chip, CD1400_SRER) | CD1400_SRER_TXRDY); 1344 splx(s); 1345 } 1346 1347 /* 1348 * Execute a CD1400 channel command 1349 */ 1350 static void 1351 cd1400_channel_cmd(sc, cy, cmd) 1352 struct cy_softc *sc; 1353 struct cy_port *cy; 1354 int cmd; 1355 { 1356 u_int waitcnt = 5 * 8 * 1024; /* approx 5 ms */ 1357 1358 #ifdef CY_DEBUG 1359 printf("c1400_channel_cmd cy 0x%x command 0x%x\n", cy, cmd); 1360 #endif 1361 1362 /* wait until cd1400 is ready to process a new command */ 1363 while (cd_read_reg(sc, cy->cy_chip, CD1400_CCR) != 0 && waitcnt-- > 0); 1364 1365 if (waitcnt == 0) 1366 log(LOG_ERR, "%s: channel command timeout\n", 1367 sc->sc_dev.dv_xname); 1368 1369 cd_write_reg(sc, cy->cy_chip, CD1400_CCR, cmd); 1370 } 1371 1372 /* 1373 * Compute clock option register and baud rate register values 1374 * for a given speed. Return 0 on success, -1 on failure. 1375 * 1376 * The error between requested and actual speed seems 1377 * to be well within allowed limits (less than 3%) 1378 * with every speed value between 50 and 150000 bps. 1379 */ 1380 static int 1381 cy_speed(speed, cor, bpr, cy_clock) 1382 speed_t speed; 1383 int *cor, *bpr, cy_clock; 1384 { 1385 int c, co, br; 1386 1387 if (speed < 50 || speed > 150000) 1388 return -1; 1389 1390 for (c = 0, co = 8; co <= 2048; co <<= 2, c++) { 1391 br = (cy_clock + (co * speed) / 2) / (co * speed); 1392 if (br < 0x100) { 1393 *bpr = br; 1394 *cor = c; 1395 return 0; 1396 } 1397 } 1398 1399 return -1; 1400 } 1401