1 /* $NetBSD: cy.c,v 1.23 2001/07/07 16:13:47 thorpej Exp $ */ 2 3 /* 4 * cy.c 5 * 6 * Driver for Cyclades Cyclom-8/16/32 multiport serial cards 7 * (currently not tested with Cyclom-32 cards) 8 * 9 * Timo Rossi, 1996 10 * 11 * Supports both ISA and PCI Cyclom cards 12 * 13 * Lots of debug output can be enabled by defining CY_DEBUG 14 * Some debugging counters (number of receive/transmit interrupts etc.) 15 * can be enabled by defining CY_DEBUG1 16 */ 17 18 #include <sys/types.h> 19 #include <sys/param.h> 20 #include <sys/ioctl.h> 21 #include <sys/syslog.h> 22 #include <sys/fcntl.h> 23 #include <sys/tty.h> 24 #include <sys/proc.h> 25 #include <sys/conf.h> 26 #include <sys/user.h> 27 #include <sys/ioctl.h> 28 #include <sys/select.h> 29 #include <sys/device.h> 30 #include <sys/malloc.h> 31 #include <sys/systm.h> 32 #include <sys/callout.h> 33 34 #include <machine/bus.h> 35 36 #include <dev/ic/cd1400reg.h> 37 #include <dev/ic/cyreg.h> 38 #include <dev/ic/cyvar.h> 39 40 /* Macros to clear/set/test flags. */ 41 #define SET(t, f) (t) |= (f) 42 #define CLR(t, f) (t) &= ~(f) 43 #define ISSET(t, f) ((t) & (f)) 44 45 int cyparam(struct tty *, struct termios *); 46 void cystart(struct tty *); 47 void cy_poll(void *); 48 int cy_modem_control(struct cy_softc *, struct cy_port *, int, int); 49 void cy_enable_transmitter(struct cy_softc *, struct cy_port *); 50 void cd1400_channel_cmd(struct cy_softc *, struct cy_port *, int); 51 int cy_speed(speed_t, int *, int *, int); 52 53 extern struct cfdriver cy_cd; 54 55 static int cy_open = 0; 56 static int cy_events = 0; 57 58 int cy_attached_ttys; 59 60 cdev_decl(cy); 61 62 struct callout cy_poll_callout = CALLOUT_INITIALIZER; 63 64 /* 65 * Common probe routine 66 */ 67 int 68 cy_find(struct cy_softc *sc) 69 { 70 int cy_chip, chip; 71 u_char firmware_ver; 72 bus_space_tag_t tag = sc->sc_memt; 73 bus_space_handle_t bsh = sc->sc_bsh; 74 int bustype = sc->sc_bustype; 75 76 /* Cyclom card hardware reset */ 77 bus_space_write_1(tag, bsh, CY16_RESET << bustype, 0); 78 DELAY(500); /* wait for reset to complete */ 79 bus_space_write_1(tag, bsh, CY_CLEAR_INTR << bustype, 0); 80 81 #ifdef CY_DEBUG 82 printf("cy: card reset done\n"); 83 #endif 84 sc->sc_nchips = 0; 85 86 for (cy_chip = 0, chip = 0; cy_chip < CY_MAX_CD1400s; 87 cy_chip++, chip += (CY_CD1400_MEMSPACING << bustype)) { 88 int i; 89 90 /* 91 * the last 4 nchips are 'interleaved' with the first 4 on 92 * 32-port boards 93 */ 94 if (cy_chip == 4) 95 chip -= (CY32_ADDR_FIX << bustype); 96 97 #ifdef CY_DEBUG 98 printf("%s probe chip %d offset 0x%x ... ", 99 sc->sc_dev.dv_xname, cy_chip, chip); 100 #endif 101 102 /* wait until the chip is ready for command */ 103 DELAY(1000); 104 if (bus_space_read_1(tag, bsh, chip + 105 ((CD1400_CCR << 1) << bustype)) != 0) { 106 #ifdef CY_DEBUG 107 printf("not ready for command\n"); 108 #endif 109 break; 110 } 111 /* clear the firmware version reg. */ 112 bus_space_write_1(tag, bsh, chip + 113 ((CD1400_GFRCR << 1) << bustype), 0); 114 115 /* 116 * On Cyclom-16 references to non-existent chip 4 117 * actually access chip 0 (address line 9 not decoded). 118 * Here we check if the clearing of chip 4 GFRCR actually 119 * cleared chip 0 GFRCR. In that case we have a 16 port card. 120 */ 121 if (cy_chip == 4 && 122 bus_space_read_1(tag, bsh, /* off for chip 0 (0) + */ 123 ((CD1400_GFRCR << 1) << bustype)) == 0) 124 break; 125 126 /* reset the chip */ 127 bus_space_write_1(tag, bsh, chip + 128 ((CD1400_CCR << 1) << bustype), 129 CD1400_CCR_CMDRESET | CD1400_CCR_FULLRESET); 130 131 /* wait for the chip to initialize itself */ 132 for (i = 0; i < 200; i++) { 133 DELAY(50); 134 firmware_ver = bus_space_read_1(tag, bsh, chip + 135 ((CD1400_GFRCR << 1) << bustype)); 136 if ((firmware_ver & 0xf0) == 0x40) /* found a CD1400 */ 137 break; 138 } 139 #ifdef CY_DEBUG 140 printf("firmware version 0x%x\n", firmware_ver); 141 #endif 142 143 if ((firmware_ver & 0xf0) != 0x40) 144 break; 145 146 /* firmware version OK, CD1400 found */ 147 sc->sc_nchips++; 148 } 149 150 if (sc->sc_nchips == 0) { 151 #ifdef CY_DEBUG 152 printf("no CD1400s found\n"); 153 #endif 154 return 0; 155 } 156 #ifdef CY_DEBUG 157 printf("found %d CD1400s\n", sc->sc_nchips); 158 #endif 159 160 return 1; 161 } 162 163 void 164 cy_attach(struct cy_softc *sc) 165 { 166 int port, cy_chip, num_chips, cdu, chip; 167 int cy_clock; 168 169 num_chips = sc->sc_nchips; 170 if (num_chips == 0) 171 return; 172 173 memset(sc->sc_ports, 0, sizeof(sc->sc_ports)); 174 175 port = 0; 176 for (cy_chip = 0, chip = 0; cy_chip < num_chips; cy_chip++, 177 chip += (CY_CD1400_MEMSPACING << sc->sc_bustype)) { 178 179 if (cy_chip == 4) 180 chip -= (CY32_ADDR_FIX << sc->sc_bustype); 181 182 #ifdef CY_DEBUG 183 printf("attach CD1400 #%d offset 0x%x\n", cy_chip, chip); 184 #endif 185 sc->sc_cd1400_offs[cy_chip] = chip; 186 187 /* 188 * configure port 0 as serial port (should already be after 189 * reset) 190 */ 191 cd_write_reg(sc, cy_chip, CD1400_GCR, 0); 192 193 if (cd_read_reg(sc, cy_chip, CD1400_GFRCR) <= 0x46) 194 cy_clock = CY_CLOCK; 195 else 196 cy_clock = CY_CLOCK_60; 197 198 /* set up a receive timeout period (1ms) */ 199 cd_write_reg(sc, cy_chip, CD1400_PPR, 200 (cy_clock / CD1400_PPR_PRESCALER / 1000) + 1); 201 202 for (cdu = 0; cdu < CD1400_NO_OF_CHANNELS; cdu++) { 203 sc->sc_ports[port].cy_softc = sc; 204 sc->sc_ports[port].cy_port_num = port; 205 sc->sc_ports[port].cy_chip = cy_chip; 206 sc->sc_ports[port].cy_clock = cy_clock; 207 208 /* should we initialize anything else here? */ 209 port++; 210 } /* for(each port on one CD1400...) */ 211 212 } /* for(each CD1400 on a card... ) */ 213 214 sc->sc_nchannels = port; 215 216 printf("%s: %d channels (ttyCY%03d..ttyCY%03d)\n", 217 sc->sc_dev.dv_xname, sc->sc_nchannels, cy_attached_ttys, 218 cy_attached_ttys + (sc->sc_nchannels - 1)); 219 220 cy_attached_ttys += sc->sc_nchannels; 221 222 /* ensure an edge for the next interrupt */ 223 bus_space_write_1(sc->sc_memt, sc->sc_bsh, 224 CY_CLEAR_INTR << sc->sc_bustype, 0); 225 } 226 227 #define CYDIALOUT_MASK 0x80000 228 #define CY_DIALOUT(dev) (minor(dev) & CYDIALOUT_MASK) 229 230 #define CY_PORT(dev) cy_getport((dev)) 231 #define CY_BOARD(cy) ((cy)->cy_softc) 232 233 static struct cy_port * 234 cy_getport(dev_t dev) 235 { 236 int i, j, k, u = minor(dev) & ~CYDIALOUT_MASK; 237 struct cy_softc *sc; 238 239 for (i = 0, j = 0; i < cy_cd.cd_ndevs; i++) { 240 k = j; 241 sc = device_lookup(&cy_cd, i); 242 if (sc == NULL) 243 continue; 244 if (sc->sc_nchannels == 0) 245 continue; 246 j += sc->sc_nchannels; 247 if (j > u) 248 break; 249 } 250 251 if (i == cy_cd.cd_ndevs) 252 return (NULL); 253 else 254 return (&sc->sc_ports[u - k]); 255 } 256 257 /* 258 * open routine. returns zero if successfull, else error code 259 */ 260 int 261 cyopen(dev_t dev, int flag, int mode, struct proc *p) 262 { 263 struct cy_softc *sc; 264 struct cy_port *cy; 265 struct tty *tp; 266 int s, error; 267 268 cy = CY_PORT(dev); 269 if (cy == NULL) 270 return (ENXIO); 271 sc = CY_BOARD(cy); 272 273 s = spltty(); 274 if (cy->cy_tty == NULL) { 275 if ((cy->cy_tty = ttymalloc()) == NULL) { 276 splx(s); 277 printf("%s: port %d: can't allocate tty\n", 278 sc->sc_dev.dv_xname, cy->cy_port_num); 279 return (ENOMEM); 280 } 281 tty_attach(cy->cy_tty); 282 } 283 splx(s); 284 285 tp = cy->cy_tty; 286 tp->t_oproc = cystart; 287 tp->t_param = cyparam; 288 tp->t_dev = dev; 289 290 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 291 ttychars(tp); 292 tp->t_iflag = TTYDEF_IFLAG; 293 tp->t_oflag = TTYDEF_OFLAG; 294 tp->t_cflag = TTYDEF_CFLAG; 295 if (ISSET(cy->cy_openflags, TIOCFLAG_CLOCAL)) 296 SET(tp->t_cflag, CLOCAL); 297 if (ISSET(cy->cy_openflags, TIOCFLAG_CRTSCTS)) 298 SET(tp->t_cflag, CRTSCTS); 299 if (ISSET(cy->cy_openflags, TIOCFLAG_MDMBUF)) 300 SET(tp->t_cflag, MDMBUF); 301 tp->t_lflag = TTYDEF_LFLAG; 302 tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED; 303 304 s = spltty(); 305 306 /* 307 * Allocate input ring buffer if we don't already have one 308 */ 309 if (cy->cy_ibuf == NULL) { 310 cy->cy_ibuf = malloc(CY_IBUF_SIZE, M_DEVBUF, M_NOWAIT); 311 if (cy->cy_ibuf == NULL) { 312 printf("%s: port %d: can't allocate input buffer\n", 313 sc->sc_dev.dv_xname, cy->cy_port_num); 314 splx(s); 315 return ENOMEM; 316 } 317 cy->cy_ibuf_end = cy->cy_ibuf + CY_IBUF_SIZE; 318 } 319 /* mark the ring buffer as empty */ 320 cy->cy_ibuf_rd_ptr = cy->cy_ibuf_wr_ptr = cy->cy_ibuf; 321 322 /* select CD1400 channel */ 323 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, 324 cy->cy_port_num & CD1400_CAR_CHAN); 325 /* reset the channel */ 326 cd1400_channel_cmd(sc, cy, CD1400_CCR_CMDRESET); 327 /* encode unit (port) number in LIVR */ 328 /* there is just enough space for 5 bits (32 ports) */ 329 cd_write_reg(sc, cy->cy_chip, CD1400_LIVR, 330 cy->cy_port_num << 3); 331 332 cy->cy_channel_control = 0; 333 334 /* hmm... need spltty() here? */ 335 if (cy_open == 0) { 336 cy_open = 1; 337 callout_reset(&cy_poll_callout, 1, cy_poll, NULL); 338 } 339 /* this sets parameters and raises DTR */ 340 cyparam(tp, &tp->t_termios); 341 342 ttsetwater(tp); 343 344 /* raise RTS too */ 345 cy_modem_control(sc, cy, TIOCM_RTS, DMBIS); 346 347 cy->cy_carrier_stat = 348 cd_read_reg(sc, cy->cy_chip, CD1400_MSVR2); 349 350 /* enable receiver and modem change interrupts */ 351 cd_write_reg(sc, cy->cy_chip, CD1400_SRER, 352 CD1400_SRER_MDMCH | CD1400_SRER_RXDATA); 353 354 if (CY_DIALOUT(dev) || 355 ISSET(cy->cy_openflags, TIOCFLAG_SOFTCAR) || 356 ISSET(tp->t_cflag, MDMBUF) || 357 ISSET(cy->cy_carrier_stat, CD1400_MSVR2_CD)) 358 SET(tp->t_state, TS_CARR_ON); 359 else 360 CLR(tp->t_state, TS_CARR_ON); 361 } else if (ISSET(tp->t_state, TS_XCLUDE) && p->p_ucred->cr_uid != 0) { 362 return EBUSY; 363 } else { 364 s = spltty(); 365 } 366 367 /* wait for carrier if necessary */ 368 if (!ISSET(flag, O_NONBLOCK)) { 369 while (!ISSET(tp->t_cflag, CLOCAL) && 370 !ISSET(tp->t_state, TS_CARR_ON)) { 371 tp->t_wopen++; 372 error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH, 373 "cydcd", 0); 374 tp->t_wopen--; 375 if (error != 0) { 376 splx(s); 377 return error; 378 } 379 } 380 } 381 splx(s); 382 383 return (*tp->t_linesw->l_open) (dev, tp); 384 } 385 386 /* 387 * close routine. returns zero if successfull, else error code 388 */ 389 int 390 cyclose(dev_t dev, int flag, int mode, struct proc *p) 391 { 392 struct cy_softc *sc; 393 struct cy_port *cy; 394 struct tty *tp; 395 int s; 396 397 cy = CY_PORT(dev); 398 sc = CY_BOARD(cy); 399 tp = cy->cy_tty; 400 401 (*tp->t_linesw->l_close) (tp, flag); 402 s = spltty(); 403 404 if (ISSET(tp->t_cflag, HUPCL) && 405 !ISSET(cy->cy_openflags, TIOCFLAG_SOFTCAR)) { 406 /* 407 * drop DTR and RTS (should we wait for output buffer to 408 * become empty first?) 409 */ 410 cy_modem_control(sc, cy, 0, DMSET); 411 } 412 /* 413 * XXX should we disable modem change and 414 * receive interrupts here or somewhere ? 415 */ 416 CLR(tp->t_state, TS_BUSY | TS_FLUSH); 417 418 splx(s); 419 ttyclose(tp); 420 421 return 0; 422 } 423 424 /* 425 * Read routine 426 */ 427 int 428 cyread(dev_t dev, struct uio *uio, int flag) 429 { 430 struct cy_port *cy; 431 struct tty *tp; 432 433 cy = CY_PORT(dev); 434 tp = cy->cy_tty; 435 436 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 437 } 438 439 /* 440 * Write routine 441 */ 442 int 443 cywrite(dev_t dev, struct uio *uio, int flag) 444 { 445 struct cy_port *cy; 446 struct tty *tp; 447 448 cy = CY_PORT(dev); 449 tp = cy->cy_tty; 450 451 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 452 } 453 454 /* 455 * Poll routine 456 */ 457 int 458 cypoll(dev, events, p) 459 dev_t dev; 460 int events; 461 struct proc *p; 462 { 463 struct cy_port *cy; 464 struct tty *tp; 465 466 cy = CY_PORT(dev); 467 tp = cy->cy_tty; 468 469 return ((*tp->t_linesw->l_poll)(tp, events, p)); 470 } 471 472 /* 473 * return tty pointer 474 */ 475 struct tty * 476 cytty(dev_t dev) 477 { 478 struct cy_port *cy; 479 480 cy = CY_PORT(dev); 481 482 return (cy->cy_tty); 483 } 484 485 /* 486 * ioctl routine 487 */ 488 int 489 cyioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p) 490 { 491 struct cy_softc *sc; 492 struct cy_port *cy; 493 struct tty *tp; 494 int error; 495 496 cy = CY_PORT(dev); 497 sc = CY_BOARD(cy); 498 tp = cy->cy_tty; 499 500 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p); 501 if (error >= 0) 502 return error; 503 504 error = ttioctl(tp, cmd, data, flag, p); 505 if (error >= 0) 506 return error; 507 508 /* XXX should not allow dropping DTR when dialin? */ 509 510 switch (cmd) { 511 case TIOCSBRK: /* start break */ 512 SET(cy->cy_flags, CY_F_START_BREAK); 513 cy_enable_transmitter(sc, cy); 514 break; 515 516 case TIOCCBRK: /* stop break */ 517 SET(cy->cy_flags, CY_F_END_BREAK); 518 cy_enable_transmitter(sc, cy); 519 break; 520 521 case TIOCSDTR: /* DTR on */ 522 cy_modem_control(sc, cy, TIOCM_DTR, DMBIS); 523 break; 524 525 case TIOCCDTR: /* DTR off */ 526 cy_modem_control(sc, cy, TIOCM_DTR, DMBIC); 527 break; 528 529 case TIOCMSET: /* set new modem control line values */ 530 cy_modem_control(sc, cy, *((int *) data), DMSET); 531 break; 532 533 case TIOCMBIS: /* turn modem control bits on */ 534 cy_modem_control(sc, cy, *((int *) data), DMBIS); 535 break; 536 537 case TIOCMBIC: /* turn modem control bits off */ 538 cy_modem_control(sc, cy, *((int *) data), DMBIC); 539 break; 540 541 case TIOCMGET: /* get modem control/status line state */ 542 *((int *) data) = cy_modem_control(sc, cy, 0, DMGET); 543 break; 544 545 case TIOCGFLAGS: 546 *((int *) data) = cy->cy_openflags | 547 (CY_DIALOUT(dev) ? TIOCFLAG_SOFTCAR : 0); 548 break; 549 550 case TIOCSFLAGS: 551 error = suser(p->p_ucred, &p->p_acflag); 552 if (error != 0) 553 return EPERM; 554 555 cy->cy_openflags = *((int *) data) & 556 (TIOCFLAG_SOFTCAR | TIOCFLAG_CLOCAL | 557 TIOCFLAG_CRTSCTS | TIOCFLAG_MDMBUF); 558 break; 559 560 default: 561 return ENOTTY; 562 } 563 564 return 0; 565 } 566 567 /* 568 * start output 569 */ 570 void 571 cystart(struct tty *tp) 572 { 573 struct cy_softc *sc; 574 struct cy_port *cy; 575 int s; 576 577 cy = CY_PORT(tp->t_dev); 578 sc = cy->cy_softc; 579 580 s = spltty(); 581 582 #ifdef CY_DEBUG1 583 cy->cy_start_count++; 584 #endif 585 586 if (!ISSET(tp->t_state, TS_TTSTOP | TS_TIMEOUT | TS_BUSY)) { 587 if (tp->t_outq.c_cc <= tp->t_lowat) { 588 if (ISSET(tp->t_state, TS_ASLEEP)) { 589 CLR(tp->t_state, TS_ASLEEP); 590 wakeup(&tp->t_outq); 591 } 592 selwakeup(&tp->t_wsel); 593 594 if (tp->t_outq.c_cc == 0) 595 goto out; 596 } 597 SET(tp->t_state, TS_BUSY); 598 cy_enable_transmitter(sc, cy); 599 } 600 out: 601 602 splx(s); 603 } 604 605 /* 606 * stop output 607 */ 608 void 609 cystop(struct tty *tp, int flag) 610 { 611 struct cy_port *cy; 612 int s; 613 614 cy = CY_PORT(tp->t_dev); 615 616 s = spltty(); 617 if (ISSET(tp->t_state, TS_BUSY)) { 618 if (!ISSET(tp->t_state, TS_TTSTOP)) 619 SET(tp->t_state, TS_FLUSH); 620 621 /* 622 * the transmit interrupt routine will disable transmit when it 623 * notices that CY_F_STOP has been set. 624 */ 625 SET(cy->cy_flags, CY_F_STOP); 626 } 627 splx(s); 628 } 629 630 /* 631 * parameter setting routine. 632 * returns 0 if successfull, else returns error code 633 */ 634 int 635 cyparam(struct tty *tp, struct termios *t) 636 { 637 struct cy_softc *sc; 638 struct cy_port *cy; 639 int ibpr, obpr, i_clk_opt, o_clk_opt, s, opt; 640 641 cy = CY_PORT(tp->t_dev); 642 sc = CY_BOARD(cy); 643 644 if (t->c_ospeed != 0 && cy_speed(t->c_ospeed, &o_clk_opt, &obpr, cy->cy_clock) < 0) 645 return EINVAL; 646 647 if (t->c_ispeed != 0 && cy_speed(t->c_ispeed, &i_clk_opt, &ibpr, cy->cy_clock) < 0) 648 return EINVAL; 649 650 s = spltty(); 651 652 /* hang up the line is ospeed is zero, else turn DTR on */ 653 cy_modem_control(sc, cy, TIOCM_DTR, (t->c_ospeed == 0 ? DMBIC : DMBIS)); 654 655 /* channel was selected by the above call to cy_modem_control() */ 656 #if 0 657 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, port & CD1400_CAR_CHAN); 658 #endif 659 660 /* set transmit speed */ 661 if (t->c_ospeed != 0) { 662 cd_write_reg(sc, cy->cy_chip, CD1400_TCOR, o_clk_opt); 663 cd_write_reg(sc, cy->cy_chip, CD1400_TBPR, obpr); 664 } 665 /* set receive speed */ 666 if (t->c_ispeed != 0) { 667 cd_write_reg(sc, cy->cy_chip, CD1400_RCOR, i_clk_opt); 668 cd_write_reg(sc, cy->cy_chip, CD1400_RBPR, ibpr); 669 } 670 opt = CD1400_CCR_CMDCHANCTL | CD1400_CCR_XMTEN 671 | (ISSET(t->c_cflag, CREAD) ? CD1400_CCR_RCVEN : CD1400_CCR_RCVDIS); 672 673 if (opt != cy->cy_channel_control) { 674 cy->cy_channel_control = opt; 675 cd1400_channel_cmd(sc, cy, opt); 676 } 677 /* compute COR1 contents */ 678 opt = 0; 679 if (ISSET(t->c_cflag, PARENB)) { 680 if (ISSET(t->c_cflag, PARODD)) 681 opt |= CD1400_COR1_PARODD; 682 opt |= CD1400_COR1_PARNORMAL; 683 } 684 if (!ISSET(t->c_iflag, INPCK)) 685 opt |= CD1400_COR1_NOINPCK; /* no parity checking */ 686 687 if (ISSET(t->c_cflag, CSTOPB)) 688 opt |= CD1400_COR1_STOP2; 689 690 switch (t->c_cflag & CSIZE) { 691 case CS5: 692 opt |= CD1400_COR1_CS5; 693 break; 694 695 case CS6: 696 opt |= CD1400_COR1_CS6; 697 break; 698 699 case CS7: 700 opt |= CD1400_COR1_CS7; 701 break; 702 703 default: 704 opt |= CD1400_COR1_CS8; 705 break; 706 } 707 708 cd_write_reg(sc, cy->cy_chip, CD1400_COR1, opt); 709 710 #ifdef CY_DEBUG 711 printf("cor1 = 0x%x...", opt); 712 #endif 713 714 /* 715 * use the CD1400 automatic CTS flow control if CRTSCTS is set 716 * 717 * CD1400_COR2_ETC is used because breaks are generated with 718 * embedded transmit commands 719 */ 720 cd_write_reg(sc, cy->cy_chip, CD1400_COR2, 721 CD1400_COR2_ETC | 722 (ISSET(t->c_cflag, CRTSCTS) ? CD1400_COR2_CCTS_OFLOW : 0)); 723 724 cd_write_reg(sc, cy->cy_chip, CD1400_COR3, CY_RX_FIFO_THRESHOLD); 725 726 cd1400_channel_cmd(sc, cy, CD1400_CCR_CMDCORCHG | 727 CD1400_CCR_COR1 | CD1400_CCR_COR2 | CD1400_CCR_COR3); 728 729 cd_write_reg(sc, cy->cy_chip, CD1400_COR4, CD1400_COR4_PFO_EXCEPTION); 730 cd_write_reg(sc, cy->cy_chip, CD1400_COR5, 0); 731 732 /* 733 * set modem change option registers to generate interrupts 734 * on carrier detect changes. 735 * 736 * if hardware RTS handshaking is used 737 * also set the handshaking threshold. 738 */ 739 if (cy->cy_clock == CY_CLOCK_60) { 740 cd_write_reg(sc, cy->cy_chip, CD1400_MCOR1, CD1400_MCOR1_CDzd | 741 (ISSET(t->c_cflag, CRTSCTS) ? CY_RX_DTR_THRESHOLD : 0)); 742 } else { 743 cd_write_reg(sc, cy->cy_chip, CD1400_MCOR1, CD1400_MCOR1_CDzd); 744 } 745 746 cd_write_reg(sc, cy->cy_chip, CD1400_MCOR2, CD1400_MCOR2_CDod); 747 748 /* 749 * set receive timeout to approx. 2ms 750 * could use more complex logic here... 751 * (but is it actually needed or even useful?) 752 */ 753 cd_write_reg(sc, cy->cy_chip, CD1400_RTPR, 2); 754 755 /* 756 * should do anything else here? 757 * XXX check MDMBUF handshaking like in com.c? 758 */ 759 760 splx(s); 761 return 0; 762 } 763 764 /* 765 * set/get modem line status 766 * 767 * bits can be: TIOCM_DTR, TIOCM_RTS, TIOCM_CTS, TIOCM_CD, TIOCM_RI, TIOCM_DSR 768 */ 769 int 770 cy_modem_control(struct cy_softc *sc, struct cy_port *cy, int bits, int howto) 771 { 772 struct tty *tp = cy->cy_tty; 773 int s, msvr; 774 775 s = spltty(); 776 777 /* select channel */ 778 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, 779 cy->cy_port_num & CD1400_CAR_CHAN); 780 781 /* Does not manipulate RTS if it is used for flow control. */ 782 switch (howto) { 783 case DMGET: 784 bits = 0; 785 if (cy->cy_channel_control & CD1400_CCR_RCVEN) 786 bits |= TIOCM_LE; 787 msvr = cd_read_reg(sc, cy->cy_chip, CD1400_MSVR2); 788 if (cy->cy_clock == CY_CLOCK_60) { 789 if (cd_read_reg(sc, cy->cy_chip, CD1400_MSVR1) & 790 CD1400_MSVR1_RTS) 791 bits |= TIOCM_DTR; 792 if (msvr & CD1400_MSVR2_DTR) 793 bits |= TIOCM_RTS; 794 } else { 795 if (cd_read_reg(sc, cy->cy_chip, CD1400_MSVR1) & 796 CD1400_MSVR1_RTS) 797 bits |= TIOCM_RTS; 798 if (msvr & CD1400_MSVR2_DTR) 799 bits |= TIOCM_DTR; 800 } 801 if (msvr & CD1400_MSVR2_CTS) 802 bits |= TIOCM_CTS; 803 if (msvr & CD1400_MSVR2_CD) 804 bits |= TIOCM_CD; 805 /* Not connected on some Cyclom-Y boards? */ 806 if (msvr & CD1400_MSVR2_DSR) 807 bits |= TIOCM_DSR; 808 /* Not connected on some Cyclom-8Y boards? */ 809 if (msvr & CD1400_MSVR2_RI) 810 bits |= TIOCM_RI; 811 break; 812 813 case DMSET: /* replace old values with new ones */ 814 if (cy->cy_clock == CY_CLOCK_60) { 815 if (!ISSET(tp->t_cflag, CRTSCTS)) 816 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2, 817 ((bits & TIOCM_RTS) ? CD1400_MSVR2_DTR : 0)); 818 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1, 819 ((bits & TIOCM_DTR) ? CD1400_MSVR1_RTS : 0)); 820 } else { 821 if (!ISSET(tp->t_cflag, CRTSCTS)) 822 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1, 823 ((bits & TIOCM_RTS) ? CD1400_MSVR1_RTS : 0)); 824 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2, 825 ((bits & TIOCM_DTR) ? CD1400_MSVR2_DTR : 0)); 826 } 827 break; 828 829 case DMBIS: /* set bits */ 830 if (cy->cy_clock == CY_CLOCK_60) { 831 if (!ISSET(tp->t_cflag, CRTSCTS) && 832 (bits & TIOCM_RTS) != 0) 833 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2, 834 CD1400_MSVR2_DTR); 835 if (bits & TIOCM_DTR) 836 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1, 837 CD1400_MSVR1_RTS); 838 } else { 839 if (!ISSET(tp->t_cflag, CRTSCTS) && 840 (bits & TIOCM_RTS) != 0) 841 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1, 842 CD1400_MSVR1_RTS); 843 if (bits & TIOCM_DTR) 844 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2, 845 CD1400_MSVR2_DTR); 846 } 847 break; 848 849 case DMBIC: /* clear bits */ 850 if (cy->cy_clock == CY_CLOCK_60) { 851 if (!ISSET(tp->t_cflag, CRTSCTS) && (bits & TIOCM_RTS)) 852 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2, 0); 853 if (bits & TIOCM_DTR) 854 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1, 0); 855 } else { 856 if (!ISSET(tp->t_cflag, CRTSCTS) && (bits & TIOCM_RTS)) 857 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1, 0); 858 if (bits & TIOCM_DTR) 859 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2, 0); 860 } 861 break; 862 } 863 splx(s); 864 return ((howto == DMGET) ? bits : 0); 865 } 866 867 /* 868 * Upper-level handler loop (called from timer interrupt?) 869 * This routine is common for multiple cards 870 */ 871 void 872 cy_poll(void *arg) 873 { 874 int card, port; 875 struct cy_softc *sc; 876 struct cy_port *cy; 877 struct tty *tp; 878 static int counter = 0; 879 #ifdef CY_DEBUG1 880 int did_something; 881 #endif 882 int s = spltty(); 883 884 if (cy_events == 0 && ++counter < 200) { 885 splx(s); 886 goto out; 887 } 888 cy_events = 0; 889 splx(s); 890 891 for (card = 0; card < cy_cd.cd_ndevs; card++) { 892 sc = device_lookup(&cy_cd, card); 893 if (sc == NULL) 894 continue; 895 896 #ifdef CY_DEBUG1 897 sc->sc_poll_count1++; 898 did_something = 0; 899 #endif 900 901 for (port = 0; port < sc->sc_nchannels; port++) { 902 cy = &sc->sc_ports[port]; 903 if ((tp = cy->cy_tty) == NULL || cy->cy_ibuf == NULL || 904 (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0)) 905 continue; 906 907 /* 908 * handle received data 909 */ 910 while (cy->cy_ibuf_rd_ptr != cy->cy_ibuf_wr_ptr) { 911 u_char line_stat; 912 int chr; 913 914 line_stat = cy->cy_ibuf_rd_ptr[0]; 915 chr = cy->cy_ibuf_rd_ptr[1]; 916 917 if (line_stat & 918 (CD1400_RDSR_BREAK | CD1400_RDSR_FE)) 919 chr |= TTY_FE; 920 if (line_stat & CD1400_RDSR_PE) 921 chr |= TTY_PE; 922 923 /* 924 * on an overrun error the data is treated as 925 * good just as it should be. 926 */ 927 928 #ifdef CY_DEBUG 929 printf("%s: port %d ttyinput 0x%x\n", 930 sc->sc_dev.dv_xname, port, chr); 931 #endif 932 933 (*tp->t_linesw->l_rint) (chr, tp); 934 935 s = spltty(); /* really necessary? */ 936 if ((cy->cy_ibuf_rd_ptr += 2) == 937 cy->cy_ibuf_end) 938 cy->cy_ibuf_rd_ptr = cy->cy_ibuf; 939 splx(s); 940 941 #ifdef CY_DEBUG1 942 did_something = 1; 943 #endif 944 } 945 946 /* 947 * If we don't have any received data in ibuf and 948 * CRTSCTS is on and RTS is turned off, it is time to 949 * turn RTS back on 950 */ 951 if (ISSET(tp->t_cflag, CRTSCTS)) { 952 /* 953 * we can't use cy_modem_control() here as it 954 * doesn't change RTS if RTSCTS is on 955 */ 956 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, 957 port & CD1400_CAR_CHAN); 958 959 if (cy->cy_clock == CY_CLOCK_60) { 960 if ((cd_read_reg(sc, cy->cy_chip, 961 CD1400_MSVR2) & CD1400_MSVR2_DTR) == 0) { 962 cd_write_reg(sc, cy->cy_chip, 963 CD1400_MSVR2,CD1400_MSVR2_DTR); 964 #ifdef CY_DEBUG1 965 did_something = 1; 966 #endif 967 } 968 } else { 969 if ((cd_read_reg(sc, cy->cy_chip, 970 CD1400_MSVR1) & CD1400_MSVR1_RTS) == 0) { 971 cd_write_reg(sc, cy->cy_chip, 972 CD1400_MSVR1,CD1400_MSVR1_RTS); 973 #ifdef CY_DEBUG1 974 did_something = 1; 975 #endif 976 } 977 } 978 } 979 980 /* 981 * handle carrier changes 982 */ 983 s = spltty(); 984 if (ISSET(cy->cy_flags, CY_F_CARRIER_CHANGED)) { 985 int carrier; 986 987 CLR(cy->cy_flags, CY_F_CARRIER_CHANGED); 988 splx(s); 989 990 carrier = ((cy->cy_carrier_stat & 991 CD1400_MSVR2_CD) != 0); 992 993 #ifdef CY_DEBUG 994 printf("cy_poll: carrier change " 995 "(card %d, port %d, carrier %d)\n", 996 card, port, carrier); 997 #endif 998 if (CY_DIALOUT(tp->t_dev) == 0 && 999 !(*tp->t_linesw->l_modem)(tp, carrier)) 1000 cy_modem_control(sc, cy, 1001 TIOCM_DTR, DMBIC); 1002 1003 #ifdef CY_DEBUG1 1004 did_something = 1; 1005 #endif 1006 } else 1007 splx(s); 1008 1009 s = spltty(); 1010 if (ISSET(cy->cy_flags, CY_F_START)) { 1011 CLR(cy->cy_flags, CY_F_START); 1012 splx(s); 1013 1014 (*tp->t_linesw->l_start) (tp); 1015 1016 #ifdef CY_DEBUG1 1017 did_something = 1; 1018 #endif 1019 } else 1020 splx(s); 1021 1022 /* could move this to even upper level... */ 1023 if (cy->cy_fifo_overruns) { 1024 cy->cy_fifo_overruns = 0; 1025 /* 1026 * doesn't report overrun count, but 1027 * shouldn't really matter 1028 */ 1029 log(LOG_WARNING, "%s: port %d fifo overrun\n", 1030 sc->sc_dev.dv_xname, port); 1031 } 1032 if (cy->cy_ibuf_overruns) { 1033 cy->cy_ibuf_overruns = 0; 1034 log(LOG_WARNING, "%s: port %d ibuf overrun\n", 1035 sc->sc_dev.dv_xname, port); 1036 } 1037 } /* for(port...) */ 1038 #ifdef CY_DEBUG1 1039 if (did_something && counter >= 200) 1040 sc->sc_poll_count2++; 1041 #endif 1042 } /* for(card...) */ 1043 1044 counter = 0; 1045 1046 out: 1047 callout_reset(&cy_poll_callout, 1, cy_poll, NULL); 1048 } 1049 1050 /* 1051 * hardware interrupt routine 1052 */ 1053 int 1054 cy_intr(void *arg) 1055 { 1056 struct cy_softc *sc = arg; 1057 struct cy_port *cy; 1058 int cy_chip, stat; 1059 int int_serviced = 0; 1060 1061 /* 1062 * Check interrupt status of each CD1400 chip on this card 1063 * (multiple cards cannot share the same interrupt) 1064 */ 1065 for (cy_chip = 0; cy_chip < sc->sc_nchips; cy_chip++) { 1066 1067 stat = cd_read_reg(sc, cy_chip, CD1400_SVRR); 1068 if (stat == 0) 1069 continue; 1070 1071 if (ISSET(stat, CD1400_SVRR_RXRDY)) { 1072 u_char save_car, save_rir, serv_type; 1073 u_char line_stat, recv_data, n_chars; 1074 u_char *buf_p; 1075 1076 save_rir = cd_read_reg(sc, cy_chip, CD1400_RIR); 1077 save_car = cd_read_reg(sc, cy_chip, CD1400_CAR); 1078 /* enter rx service */ 1079 cd_write_reg(sc, cy_chip, CD1400_CAR, save_rir); 1080 1081 serv_type = cd_read_reg(sc, cy_chip, CD1400_RIVR); 1082 cy = &sc->sc_ports[serv_type >> 3]; 1083 1084 #ifdef CY_DEBUG1 1085 cy->cy_rx_int_count++; 1086 #endif 1087 1088 buf_p = cy->cy_ibuf_wr_ptr; 1089 1090 if (ISSET(serv_type, CD1400_RIVR_EXCEPTION)) { 1091 line_stat = cd_read_reg(sc, cy->cy_chip, 1092 CD1400_RDSR); 1093 recv_data = cd_read_reg(sc, cy->cy_chip, 1094 CD1400_RDSR); 1095 1096 if (cy->cy_tty == NULL || 1097 !ISSET(cy->cy_tty->t_state, TS_ISOPEN)) 1098 goto end_rx_serv; 1099 1100 #ifdef CY_DEBUG 1101 printf("%s port %d recv exception, line_stat 0x%x, char 0x%x\n", 1102 sc->sc_dev.dv_xname, cy->cy_port_num, line_stat, recv_data); 1103 #endif 1104 if (ISSET(line_stat, CD1400_RDSR_OE)) 1105 cy->cy_fifo_overruns++; 1106 1107 *buf_p++ = line_stat; 1108 *buf_p++ = recv_data; 1109 if (buf_p == cy->cy_ibuf_end) 1110 buf_p = cy->cy_ibuf; 1111 1112 if (buf_p == cy->cy_ibuf_rd_ptr) { 1113 if (buf_p == cy->cy_ibuf) 1114 buf_p = cy->cy_ibuf_end; 1115 buf_p -= 2; 1116 cy->cy_ibuf_overruns++; 1117 } 1118 cy_events = 1; 1119 } else {/* no exception, received data OK */ 1120 n_chars = cd_read_reg(sc, cy->cy_chip, 1121 CD1400_RDCR); 1122 1123 /* If no tty or not open, discard data */ 1124 if (cy->cy_tty == NULL || 1125 !ISSET(cy->cy_tty->t_state, TS_ISOPEN)) { 1126 while (n_chars--) 1127 cd_read_reg(sc, cy->cy_chip, 1128 CD1400_RDSR); 1129 goto end_rx_serv; 1130 } 1131 1132 #ifdef CY_DEBUG 1133 printf("%s port %d receive ok %d chars\n", 1134 sc->sc_dev.dv_xname, cy->cy_port_num, n_chars); 1135 #endif 1136 while (n_chars--) { 1137 *buf_p++ = 0; /* status: OK */ 1138 /* data byte */ 1139 *buf_p++ = cd_read_reg(sc, 1140 cy->cy_chip, CD1400_RDSR); 1141 if (buf_p == cy->cy_ibuf_end) 1142 buf_p = cy->cy_ibuf; 1143 if (buf_p == cy->cy_ibuf_rd_ptr) { 1144 if (buf_p == cy->cy_ibuf) 1145 buf_p = cy->cy_ibuf_end; 1146 buf_p -= 2; 1147 cy->cy_ibuf_overruns++; 1148 break; 1149 } 1150 } 1151 cy_events = 1; 1152 } 1153 1154 cy->cy_ibuf_wr_ptr = buf_p; 1155 1156 /* RTS handshaking for incoming data */ 1157 if (ISSET(cy->cy_tty->t_cflag, CRTSCTS)) { 1158 int bf, msvr; 1159 1160 bf = buf_p - cy->cy_ibuf_rd_ptr; 1161 if (bf < 0) 1162 bf += CY_IBUF_SIZE; 1163 1164 if (bf > (CY_IBUF_SIZE / 2)) { 1165 /* turn RTS off */ 1166 if (cy->cy_clock == CY_CLOCK_60) 1167 msvr = CD1400_MSVR2; 1168 else 1169 msvr = CD1400_MSVR1; 1170 cd_write_reg(sc, cy->cy_chip, msvr, 0); 1171 } 1172 } 1173 1174 end_rx_serv: 1175 /* terminate service context */ 1176 cd_write_reg(sc, cy->cy_chip, CD1400_RIR, 1177 save_rir & 0x3f); 1178 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, save_car); 1179 int_serviced = 1; 1180 } /* if (rx_service...) */ 1181 if (ISSET(stat, CD1400_SVRR_MDMCH)) { 1182 u_char save_car, save_mir, serv_type, modem_stat; 1183 1184 save_mir = cd_read_reg(sc, cy_chip, CD1400_MIR); 1185 save_car = cd_read_reg(sc, cy_chip, CD1400_CAR); 1186 /* enter modem service */ 1187 cd_write_reg(sc, cy_chip, CD1400_CAR, save_mir); 1188 1189 serv_type = cd_read_reg(sc, cy_chip, CD1400_MIVR); 1190 cy = &sc->sc_ports[serv_type >> 3]; 1191 1192 #ifdef CY_DEBUG1 1193 cy->cy_modem_int_count++; 1194 #endif 1195 1196 modem_stat = cd_read_reg(sc, cy->cy_chip, CD1400_MSVR2); 1197 1198 #ifdef CY_DEBUG 1199 printf("%s port %d modem line change, new stat 0x%x\n", 1200 sc->sc_dev.dv_xname, cy->cy_port_num, modem_stat); 1201 #endif 1202 if (ISSET((cy->cy_carrier_stat ^ modem_stat), CD1400_MSVR2_CD)) { 1203 SET(cy->cy_flags, CY_F_CARRIER_CHANGED); 1204 cy_events = 1; 1205 } 1206 cy->cy_carrier_stat = modem_stat; 1207 1208 /* terminate service context */ 1209 cd_write_reg(sc, cy->cy_chip, CD1400_MIR, save_mir & 0x3f); 1210 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, save_car); 1211 int_serviced = 1; 1212 } /* if (modem_service...) */ 1213 if (ISSET(stat, CD1400_SVRR_TXRDY)) { 1214 u_char save_car, save_tir, serv_type, 1215 count, ch; 1216 struct tty *tp; 1217 1218 save_tir = cd_read_reg(sc, cy_chip, CD1400_TIR); 1219 save_car = cd_read_reg(sc, cy_chip, CD1400_CAR); 1220 /* enter tx service */ 1221 cd_write_reg(sc, cy_chip, CD1400_CAR, save_tir); 1222 1223 serv_type = cd_read_reg(sc, cy_chip, CD1400_TIVR); 1224 cy = &sc->sc_ports[serv_type >> 3]; 1225 1226 #ifdef CY_DEBUG1 1227 cy->cy_tx_int_count++; 1228 #endif 1229 #ifdef CY_DEBUG 1230 printf("%s port %d tx service\n", sc->sc_dev.dv_xname, 1231 cy->cy_port_num); 1232 #endif 1233 1234 /* stop transmitting if no tty or CY_F_STOP set */ 1235 tp = cy->cy_tty; 1236 if (tp == NULL || ISSET(cy->cy_flags, CY_F_STOP)) 1237 goto txdone; 1238 1239 count = 0; 1240 if (ISSET(cy->cy_flags, CY_F_SEND_NUL)) { 1241 cd_write_reg(sc, cy->cy_chip, CD1400_TDR, 0); 1242 cd_write_reg(sc, cy->cy_chip, CD1400_TDR, 0); 1243 count += 2; 1244 CLR(cy->cy_flags, CY_F_SEND_NUL); 1245 } 1246 if (tp->t_outq.c_cc > 0) { 1247 SET(tp->t_state, TS_BUSY); 1248 while (tp->t_outq.c_cc > 0 && 1249 count < CD1400_TX_FIFO_SIZE) { 1250 ch = getc(&tp->t_outq); 1251 /* 1252 * remember to double NUL characters 1253 * because embedded transmit commands 1254 * are enabled 1255 */ 1256 if (ch == 0) { 1257 if (count >= CD1400_TX_FIFO_SIZE - 2) { 1258 SET(cy->cy_flags, CY_F_SEND_NUL); 1259 break; 1260 } 1261 cd_write_reg(sc, cy->cy_chip, 1262 CD1400_TDR, ch); 1263 count++; 1264 } 1265 cd_write_reg(sc, cy->cy_chip, 1266 CD1400_TDR, ch); 1267 count++; 1268 } 1269 } else { 1270 /* 1271 * no data to send -- check if we should 1272 * start/stop a break 1273 */ 1274 /* 1275 * XXX does this cause too much delay before 1276 * breaks? 1277 */ 1278 if (ISSET(cy->cy_flags, CY_F_START_BREAK)) { 1279 cd_write_reg(sc, cy->cy_chip, 1280 CD1400_TDR, 0); 1281 cd_write_reg(sc, cy->cy_chip, 1282 CD1400_TDR, 0x81); 1283 CLR(cy->cy_flags, CY_F_START_BREAK); 1284 } 1285 if (ISSET(cy->cy_flags, CY_F_END_BREAK)) { 1286 cd_write_reg(sc, cy->cy_chip, 1287 CD1400_TDR, 0); 1288 cd_write_reg(sc, cy->cy_chip, 1289 CD1400_TDR, 0x83); 1290 CLR(cy->cy_flags, CY_F_END_BREAK); 1291 } 1292 } 1293 1294 if (tp->t_outq.c_cc == 0) { 1295 txdone: 1296 /* 1297 * No data to send or requested to stop. 1298 * Disable transmit interrupt 1299 */ 1300 cd_write_reg(sc, cy->cy_chip, CD1400_SRER, 1301 cd_read_reg(sc, cy->cy_chip, CD1400_SRER) 1302 & ~CD1400_SRER_TXRDY); 1303 CLR(cy->cy_flags, CY_F_STOP); 1304 CLR(tp->t_state, TS_BUSY); 1305 } 1306 if (tp->t_outq.c_cc <= tp->t_lowat) { 1307 SET(cy->cy_flags, CY_F_START); 1308 cy_events = 1; 1309 } 1310 /* terminate service context */ 1311 cd_write_reg(sc, cy->cy_chip, CD1400_TIR, save_tir & 0x3f); 1312 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, save_car); 1313 int_serviced = 1; 1314 } /* if (tx_service...) */ 1315 } /* for(...all CD1400s on a card) */ 1316 1317 /* ensure an edge for next interrupt */ 1318 bus_space_write_1(sc->sc_memt, sc->sc_bsh, 1319 CY_CLEAR_INTR << sc->sc_bustype, 0); 1320 return int_serviced; 1321 } 1322 1323 /* 1324 * subroutine to enable CD1400 transmitter 1325 */ 1326 void 1327 cy_enable_transmitter(struct cy_softc *sc, struct cy_port *cy) 1328 { 1329 int s = spltty(); 1330 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, 1331 cy->cy_port_num & CD1400_CAR_CHAN); 1332 cd_write_reg(sc, cy->cy_chip, CD1400_SRER, 1333 cd_read_reg(sc, cy->cy_chip, CD1400_SRER) | CD1400_SRER_TXRDY); 1334 splx(s); 1335 } 1336 1337 /* 1338 * Execute a CD1400 channel command 1339 */ 1340 void 1341 cd1400_channel_cmd(struct cy_softc *sc, struct cy_port *cy, int cmd) 1342 { 1343 u_int waitcnt = 5 * 8 * 1024; /* approx 5 ms */ 1344 1345 #ifdef CY_DEBUG 1346 printf("c1400_channel_cmd cy %p command 0x%x\n", cy, cmd); 1347 #endif 1348 1349 /* wait until cd1400 is ready to process a new command */ 1350 while (cd_read_reg(sc, cy->cy_chip, CD1400_CCR) != 0 && waitcnt-- > 0); 1351 1352 if (waitcnt == 0) 1353 log(LOG_ERR, "%s: channel command timeout\n", 1354 sc->sc_dev.dv_xname); 1355 1356 cd_write_reg(sc, cy->cy_chip, CD1400_CCR, cmd); 1357 } 1358 1359 /* 1360 * Compute clock option register and baud rate register values 1361 * for a given speed. Return 0 on success, -1 on failure. 1362 * 1363 * The error between requested and actual speed seems 1364 * to be well within allowed limits (less than 3%) 1365 * with every speed value between 50 and 150000 bps. 1366 */ 1367 int 1368 cy_speed(speed_t speed, int *cor, int *bpr, int cy_clock) 1369 { 1370 int c, co, br; 1371 1372 if (speed < 50 || speed > 150000) 1373 return -1; 1374 1375 for (c = 0, co = 8; co <= 2048; co <<= 2, c++) { 1376 br = (cy_clock + (co * speed) / 2) / (co * speed); 1377 if (br < 0x100) { 1378 *bpr = br; 1379 *cor = c; 1380 return 0; 1381 } 1382 } 1383 1384 return -1; 1385 } 1386