1 /* $NetBSD: cy.c,v 1.24 2001/11/13 13:14:36 lukem Exp $ */ 2 3 /* 4 * cy.c 5 * 6 * Driver for Cyclades Cyclom-8/16/32 multiport serial cards 7 * (currently not tested with Cyclom-32 cards) 8 * 9 * Timo Rossi, 1996 10 * 11 * Supports both ISA and PCI Cyclom cards 12 * 13 * Lots of debug output can be enabled by defining CY_DEBUG 14 * Some debugging counters (number of receive/transmit interrupts etc.) 15 * can be enabled by defining CY_DEBUG1 16 */ 17 18 #include <sys/cdefs.h> 19 __KERNEL_RCSID(0, "$NetBSD: cy.c,v 1.24 2001/11/13 13:14:36 lukem Exp $"); 20 21 #include <sys/types.h> 22 #include <sys/param.h> 23 #include <sys/ioctl.h> 24 #include <sys/syslog.h> 25 #include <sys/fcntl.h> 26 #include <sys/tty.h> 27 #include <sys/proc.h> 28 #include <sys/conf.h> 29 #include <sys/user.h> 30 #include <sys/ioctl.h> 31 #include <sys/select.h> 32 #include <sys/device.h> 33 #include <sys/malloc.h> 34 #include <sys/systm.h> 35 #include <sys/callout.h> 36 37 #include <machine/bus.h> 38 39 #include <dev/ic/cd1400reg.h> 40 #include <dev/ic/cyreg.h> 41 #include <dev/ic/cyvar.h> 42 43 /* Macros to clear/set/test flags. */ 44 #define SET(t, f) (t) |= (f) 45 #define CLR(t, f) (t) &= ~(f) 46 #define ISSET(t, f) ((t) & (f)) 47 48 int cyparam(struct tty *, struct termios *); 49 void cystart(struct tty *); 50 void cy_poll(void *); 51 int cy_modem_control(struct cy_softc *, struct cy_port *, int, int); 52 void cy_enable_transmitter(struct cy_softc *, struct cy_port *); 53 void cd1400_channel_cmd(struct cy_softc *, struct cy_port *, int); 54 int cy_speed(speed_t, int *, int *, int); 55 56 extern struct cfdriver cy_cd; 57 58 static int cy_open = 0; 59 static int cy_events = 0; 60 61 int cy_attached_ttys; 62 63 cdev_decl(cy); 64 65 struct callout cy_poll_callout = CALLOUT_INITIALIZER; 66 67 /* 68 * Common probe routine 69 */ 70 int 71 cy_find(struct cy_softc *sc) 72 { 73 int cy_chip, chip; 74 u_char firmware_ver; 75 bus_space_tag_t tag = sc->sc_memt; 76 bus_space_handle_t bsh = sc->sc_bsh; 77 int bustype = sc->sc_bustype; 78 79 /* Cyclom card hardware reset */ 80 bus_space_write_1(tag, bsh, CY16_RESET << bustype, 0); 81 DELAY(500); /* wait for reset to complete */ 82 bus_space_write_1(tag, bsh, CY_CLEAR_INTR << bustype, 0); 83 84 #ifdef CY_DEBUG 85 printf("cy: card reset done\n"); 86 #endif 87 sc->sc_nchips = 0; 88 89 for (cy_chip = 0, chip = 0; cy_chip < CY_MAX_CD1400s; 90 cy_chip++, chip += (CY_CD1400_MEMSPACING << bustype)) { 91 int i; 92 93 /* 94 * the last 4 nchips are 'interleaved' with the first 4 on 95 * 32-port boards 96 */ 97 if (cy_chip == 4) 98 chip -= (CY32_ADDR_FIX << bustype); 99 100 #ifdef CY_DEBUG 101 printf("%s probe chip %d offset 0x%x ... ", 102 sc->sc_dev.dv_xname, cy_chip, chip); 103 #endif 104 105 /* wait until the chip is ready for command */ 106 DELAY(1000); 107 if (bus_space_read_1(tag, bsh, chip + 108 ((CD1400_CCR << 1) << bustype)) != 0) { 109 #ifdef CY_DEBUG 110 printf("not ready for command\n"); 111 #endif 112 break; 113 } 114 /* clear the firmware version reg. */ 115 bus_space_write_1(tag, bsh, chip + 116 ((CD1400_GFRCR << 1) << bustype), 0); 117 118 /* 119 * On Cyclom-16 references to non-existent chip 4 120 * actually access chip 0 (address line 9 not decoded). 121 * Here we check if the clearing of chip 4 GFRCR actually 122 * cleared chip 0 GFRCR. In that case we have a 16 port card. 123 */ 124 if (cy_chip == 4 && 125 bus_space_read_1(tag, bsh, /* off for chip 0 (0) + */ 126 ((CD1400_GFRCR << 1) << bustype)) == 0) 127 break; 128 129 /* reset the chip */ 130 bus_space_write_1(tag, bsh, chip + 131 ((CD1400_CCR << 1) << bustype), 132 CD1400_CCR_CMDRESET | CD1400_CCR_FULLRESET); 133 134 /* wait for the chip to initialize itself */ 135 for (i = 0; i < 200; i++) { 136 DELAY(50); 137 firmware_ver = bus_space_read_1(tag, bsh, chip + 138 ((CD1400_GFRCR << 1) << bustype)); 139 if ((firmware_ver & 0xf0) == 0x40) /* found a CD1400 */ 140 break; 141 } 142 #ifdef CY_DEBUG 143 printf("firmware version 0x%x\n", firmware_ver); 144 #endif 145 146 if ((firmware_ver & 0xf0) != 0x40) 147 break; 148 149 /* firmware version OK, CD1400 found */ 150 sc->sc_nchips++; 151 } 152 153 if (sc->sc_nchips == 0) { 154 #ifdef CY_DEBUG 155 printf("no CD1400s found\n"); 156 #endif 157 return 0; 158 } 159 #ifdef CY_DEBUG 160 printf("found %d CD1400s\n", sc->sc_nchips); 161 #endif 162 163 return 1; 164 } 165 166 void 167 cy_attach(struct cy_softc *sc) 168 { 169 int port, cy_chip, num_chips, cdu, chip; 170 int cy_clock; 171 172 num_chips = sc->sc_nchips; 173 if (num_chips == 0) 174 return; 175 176 memset(sc->sc_ports, 0, sizeof(sc->sc_ports)); 177 178 port = 0; 179 for (cy_chip = 0, chip = 0; cy_chip < num_chips; cy_chip++, 180 chip += (CY_CD1400_MEMSPACING << sc->sc_bustype)) { 181 182 if (cy_chip == 4) 183 chip -= (CY32_ADDR_FIX << sc->sc_bustype); 184 185 #ifdef CY_DEBUG 186 printf("attach CD1400 #%d offset 0x%x\n", cy_chip, chip); 187 #endif 188 sc->sc_cd1400_offs[cy_chip] = chip; 189 190 /* 191 * configure port 0 as serial port (should already be after 192 * reset) 193 */ 194 cd_write_reg(sc, cy_chip, CD1400_GCR, 0); 195 196 if (cd_read_reg(sc, cy_chip, CD1400_GFRCR) <= 0x46) 197 cy_clock = CY_CLOCK; 198 else 199 cy_clock = CY_CLOCK_60; 200 201 /* set up a receive timeout period (1ms) */ 202 cd_write_reg(sc, cy_chip, CD1400_PPR, 203 (cy_clock / CD1400_PPR_PRESCALER / 1000) + 1); 204 205 for (cdu = 0; cdu < CD1400_NO_OF_CHANNELS; cdu++) { 206 sc->sc_ports[port].cy_softc = sc; 207 sc->sc_ports[port].cy_port_num = port; 208 sc->sc_ports[port].cy_chip = cy_chip; 209 sc->sc_ports[port].cy_clock = cy_clock; 210 211 /* should we initialize anything else here? */ 212 port++; 213 } /* for(each port on one CD1400...) */ 214 215 } /* for(each CD1400 on a card... ) */ 216 217 sc->sc_nchannels = port; 218 219 printf("%s: %d channels (ttyCY%03d..ttyCY%03d)\n", 220 sc->sc_dev.dv_xname, sc->sc_nchannels, cy_attached_ttys, 221 cy_attached_ttys + (sc->sc_nchannels - 1)); 222 223 cy_attached_ttys += sc->sc_nchannels; 224 225 /* ensure an edge for the next interrupt */ 226 bus_space_write_1(sc->sc_memt, sc->sc_bsh, 227 CY_CLEAR_INTR << sc->sc_bustype, 0); 228 } 229 230 #define CYDIALOUT_MASK 0x80000 231 #define CY_DIALOUT(dev) (minor(dev) & CYDIALOUT_MASK) 232 233 #define CY_PORT(dev) cy_getport((dev)) 234 #define CY_BOARD(cy) ((cy)->cy_softc) 235 236 static struct cy_port * 237 cy_getport(dev_t dev) 238 { 239 int i, j, k, u = minor(dev) & ~CYDIALOUT_MASK; 240 struct cy_softc *sc; 241 242 for (i = 0, j = 0; i < cy_cd.cd_ndevs; i++) { 243 k = j; 244 sc = device_lookup(&cy_cd, i); 245 if (sc == NULL) 246 continue; 247 if (sc->sc_nchannels == 0) 248 continue; 249 j += sc->sc_nchannels; 250 if (j > u) 251 break; 252 } 253 254 if (i == cy_cd.cd_ndevs) 255 return (NULL); 256 else 257 return (&sc->sc_ports[u - k]); 258 } 259 260 /* 261 * open routine. returns zero if successfull, else error code 262 */ 263 int 264 cyopen(dev_t dev, int flag, int mode, struct proc *p) 265 { 266 struct cy_softc *sc; 267 struct cy_port *cy; 268 struct tty *tp; 269 int s, error; 270 271 cy = CY_PORT(dev); 272 if (cy == NULL) 273 return (ENXIO); 274 sc = CY_BOARD(cy); 275 276 s = spltty(); 277 if (cy->cy_tty == NULL) { 278 if ((cy->cy_tty = ttymalloc()) == NULL) { 279 splx(s); 280 printf("%s: port %d: can't allocate tty\n", 281 sc->sc_dev.dv_xname, cy->cy_port_num); 282 return (ENOMEM); 283 } 284 tty_attach(cy->cy_tty); 285 } 286 splx(s); 287 288 tp = cy->cy_tty; 289 tp->t_oproc = cystart; 290 tp->t_param = cyparam; 291 tp->t_dev = dev; 292 293 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 294 ttychars(tp); 295 tp->t_iflag = TTYDEF_IFLAG; 296 tp->t_oflag = TTYDEF_OFLAG; 297 tp->t_cflag = TTYDEF_CFLAG; 298 if (ISSET(cy->cy_openflags, TIOCFLAG_CLOCAL)) 299 SET(tp->t_cflag, CLOCAL); 300 if (ISSET(cy->cy_openflags, TIOCFLAG_CRTSCTS)) 301 SET(tp->t_cflag, CRTSCTS); 302 if (ISSET(cy->cy_openflags, TIOCFLAG_MDMBUF)) 303 SET(tp->t_cflag, MDMBUF); 304 tp->t_lflag = TTYDEF_LFLAG; 305 tp->t_ispeed = tp->t_ospeed = TTYDEF_SPEED; 306 307 s = spltty(); 308 309 /* 310 * Allocate input ring buffer if we don't already have one 311 */ 312 if (cy->cy_ibuf == NULL) { 313 cy->cy_ibuf = malloc(CY_IBUF_SIZE, M_DEVBUF, M_NOWAIT); 314 if (cy->cy_ibuf == NULL) { 315 printf("%s: port %d: can't allocate input buffer\n", 316 sc->sc_dev.dv_xname, cy->cy_port_num); 317 splx(s); 318 return ENOMEM; 319 } 320 cy->cy_ibuf_end = cy->cy_ibuf + CY_IBUF_SIZE; 321 } 322 /* mark the ring buffer as empty */ 323 cy->cy_ibuf_rd_ptr = cy->cy_ibuf_wr_ptr = cy->cy_ibuf; 324 325 /* select CD1400 channel */ 326 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, 327 cy->cy_port_num & CD1400_CAR_CHAN); 328 /* reset the channel */ 329 cd1400_channel_cmd(sc, cy, CD1400_CCR_CMDRESET); 330 /* encode unit (port) number in LIVR */ 331 /* there is just enough space for 5 bits (32 ports) */ 332 cd_write_reg(sc, cy->cy_chip, CD1400_LIVR, 333 cy->cy_port_num << 3); 334 335 cy->cy_channel_control = 0; 336 337 /* hmm... need spltty() here? */ 338 if (cy_open == 0) { 339 cy_open = 1; 340 callout_reset(&cy_poll_callout, 1, cy_poll, NULL); 341 } 342 /* this sets parameters and raises DTR */ 343 cyparam(tp, &tp->t_termios); 344 345 ttsetwater(tp); 346 347 /* raise RTS too */ 348 cy_modem_control(sc, cy, TIOCM_RTS, DMBIS); 349 350 cy->cy_carrier_stat = 351 cd_read_reg(sc, cy->cy_chip, CD1400_MSVR2); 352 353 /* enable receiver and modem change interrupts */ 354 cd_write_reg(sc, cy->cy_chip, CD1400_SRER, 355 CD1400_SRER_MDMCH | CD1400_SRER_RXDATA); 356 357 if (CY_DIALOUT(dev) || 358 ISSET(cy->cy_openflags, TIOCFLAG_SOFTCAR) || 359 ISSET(tp->t_cflag, MDMBUF) || 360 ISSET(cy->cy_carrier_stat, CD1400_MSVR2_CD)) 361 SET(tp->t_state, TS_CARR_ON); 362 else 363 CLR(tp->t_state, TS_CARR_ON); 364 } else if (ISSET(tp->t_state, TS_XCLUDE) && p->p_ucred->cr_uid != 0) { 365 return EBUSY; 366 } else { 367 s = spltty(); 368 } 369 370 /* wait for carrier if necessary */ 371 if (!ISSET(flag, O_NONBLOCK)) { 372 while (!ISSET(tp->t_cflag, CLOCAL) && 373 !ISSET(tp->t_state, TS_CARR_ON)) { 374 tp->t_wopen++; 375 error = ttysleep(tp, &tp->t_rawq, TTIPRI | PCATCH, 376 "cydcd", 0); 377 tp->t_wopen--; 378 if (error != 0) { 379 splx(s); 380 return error; 381 } 382 } 383 } 384 splx(s); 385 386 return (*tp->t_linesw->l_open) (dev, tp); 387 } 388 389 /* 390 * close routine. returns zero if successfull, else error code 391 */ 392 int 393 cyclose(dev_t dev, int flag, int mode, struct proc *p) 394 { 395 struct cy_softc *sc; 396 struct cy_port *cy; 397 struct tty *tp; 398 int s; 399 400 cy = CY_PORT(dev); 401 sc = CY_BOARD(cy); 402 tp = cy->cy_tty; 403 404 (*tp->t_linesw->l_close) (tp, flag); 405 s = spltty(); 406 407 if (ISSET(tp->t_cflag, HUPCL) && 408 !ISSET(cy->cy_openflags, TIOCFLAG_SOFTCAR)) { 409 /* 410 * drop DTR and RTS (should we wait for output buffer to 411 * become empty first?) 412 */ 413 cy_modem_control(sc, cy, 0, DMSET); 414 } 415 /* 416 * XXX should we disable modem change and 417 * receive interrupts here or somewhere ? 418 */ 419 CLR(tp->t_state, TS_BUSY | TS_FLUSH); 420 421 splx(s); 422 ttyclose(tp); 423 424 return 0; 425 } 426 427 /* 428 * Read routine 429 */ 430 int 431 cyread(dev_t dev, struct uio *uio, int flag) 432 { 433 struct cy_port *cy; 434 struct tty *tp; 435 436 cy = CY_PORT(dev); 437 tp = cy->cy_tty; 438 439 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 440 } 441 442 /* 443 * Write routine 444 */ 445 int 446 cywrite(dev_t dev, struct uio *uio, int flag) 447 { 448 struct cy_port *cy; 449 struct tty *tp; 450 451 cy = CY_PORT(dev); 452 tp = cy->cy_tty; 453 454 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 455 } 456 457 /* 458 * Poll routine 459 */ 460 int 461 cypoll(dev, events, p) 462 dev_t dev; 463 int events; 464 struct proc *p; 465 { 466 struct cy_port *cy; 467 struct tty *tp; 468 469 cy = CY_PORT(dev); 470 tp = cy->cy_tty; 471 472 return ((*tp->t_linesw->l_poll)(tp, events, p)); 473 } 474 475 /* 476 * return tty pointer 477 */ 478 struct tty * 479 cytty(dev_t dev) 480 { 481 struct cy_port *cy; 482 483 cy = CY_PORT(dev); 484 485 return (cy->cy_tty); 486 } 487 488 /* 489 * ioctl routine 490 */ 491 int 492 cyioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p) 493 { 494 struct cy_softc *sc; 495 struct cy_port *cy; 496 struct tty *tp; 497 int error; 498 499 cy = CY_PORT(dev); 500 sc = CY_BOARD(cy); 501 tp = cy->cy_tty; 502 503 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p); 504 if (error >= 0) 505 return error; 506 507 error = ttioctl(tp, cmd, data, flag, p); 508 if (error >= 0) 509 return error; 510 511 /* XXX should not allow dropping DTR when dialin? */ 512 513 switch (cmd) { 514 case TIOCSBRK: /* start break */ 515 SET(cy->cy_flags, CY_F_START_BREAK); 516 cy_enable_transmitter(sc, cy); 517 break; 518 519 case TIOCCBRK: /* stop break */ 520 SET(cy->cy_flags, CY_F_END_BREAK); 521 cy_enable_transmitter(sc, cy); 522 break; 523 524 case TIOCSDTR: /* DTR on */ 525 cy_modem_control(sc, cy, TIOCM_DTR, DMBIS); 526 break; 527 528 case TIOCCDTR: /* DTR off */ 529 cy_modem_control(sc, cy, TIOCM_DTR, DMBIC); 530 break; 531 532 case TIOCMSET: /* set new modem control line values */ 533 cy_modem_control(sc, cy, *((int *) data), DMSET); 534 break; 535 536 case TIOCMBIS: /* turn modem control bits on */ 537 cy_modem_control(sc, cy, *((int *) data), DMBIS); 538 break; 539 540 case TIOCMBIC: /* turn modem control bits off */ 541 cy_modem_control(sc, cy, *((int *) data), DMBIC); 542 break; 543 544 case TIOCMGET: /* get modem control/status line state */ 545 *((int *) data) = cy_modem_control(sc, cy, 0, DMGET); 546 break; 547 548 case TIOCGFLAGS: 549 *((int *) data) = cy->cy_openflags | 550 (CY_DIALOUT(dev) ? TIOCFLAG_SOFTCAR : 0); 551 break; 552 553 case TIOCSFLAGS: 554 error = suser(p->p_ucred, &p->p_acflag); 555 if (error != 0) 556 return EPERM; 557 558 cy->cy_openflags = *((int *) data) & 559 (TIOCFLAG_SOFTCAR | TIOCFLAG_CLOCAL | 560 TIOCFLAG_CRTSCTS | TIOCFLAG_MDMBUF); 561 break; 562 563 default: 564 return ENOTTY; 565 } 566 567 return 0; 568 } 569 570 /* 571 * start output 572 */ 573 void 574 cystart(struct tty *tp) 575 { 576 struct cy_softc *sc; 577 struct cy_port *cy; 578 int s; 579 580 cy = CY_PORT(tp->t_dev); 581 sc = cy->cy_softc; 582 583 s = spltty(); 584 585 #ifdef CY_DEBUG1 586 cy->cy_start_count++; 587 #endif 588 589 if (!ISSET(tp->t_state, TS_TTSTOP | TS_TIMEOUT | TS_BUSY)) { 590 if (tp->t_outq.c_cc <= tp->t_lowat) { 591 if (ISSET(tp->t_state, TS_ASLEEP)) { 592 CLR(tp->t_state, TS_ASLEEP); 593 wakeup(&tp->t_outq); 594 } 595 selwakeup(&tp->t_wsel); 596 597 if (tp->t_outq.c_cc == 0) 598 goto out; 599 } 600 SET(tp->t_state, TS_BUSY); 601 cy_enable_transmitter(sc, cy); 602 } 603 out: 604 605 splx(s); 606 } 607 608 /* 609 * stop output 610 */ 611 void 612 cystop(struct tty *tp, int flag) 613 { 614 struct cy_port *cy; 615 int s; 616 617 cy = CY_PORT(tp->t_dev); 618 619 s = spltty(); 620 if (ISSET(tp->t_state, TS_BUSY)) { 621 if (!ISSET(tp->t_state, TS_TTSTOP)) 622 SET(tp->t_state, TS_FLUSH); 623 624 /* 625 * the transmit interrupt routine will disable transmit when it 626 * notices that CY_F_STOP has been set. 627 */ 628 SET(cy->cy_flags, CY_F_STOP); 629 } 630 splx(s); 631 } 632 633 /* 634 * parameter setting routine. 635 * returns 0 if successfull, else returns error code 636 */ 637 int 638 cyparam(struct tty *tp, struct termios *t) 639 { 640 struct cy_softc *sc; 641 struct cy_port *cy; 642 int ibpr, obpr, i_clk_opt, o_clk_opt, s, opt; 643 644 cy = CY_PORT(tp->t_dev); 645 sc = CY_BOARD(cy); 646 647 if (t->c_ospeed != 0 && cy_speed(t->c_ospeed, &o_clk_opt, &obpr, cy->cy_clock) < 0) 648 return EINVAL; 649 650 if (t->c_ispeed != 0 && cy_speed(t->c_ispeed, &i_clk_opt, &ibpr, cy->cy_clock) < 0) 651 return EINVAL; 652 653 s = spltty(); 654 655 /* hang up the line is ospeed is zero, else turn DTR on */ 656 cy_modem_control(sc, cy, TIOCM_DTR, (t->c_ospeed == 0 ? DMBIC : DMBIS)); 657 658 /* channel was selected by the above call to cy_modem_control() */ 659 #if 0 660 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, port & CD1400_CAR_CHAN); 661 #endif 662 663 /* set transmit speed */ 664 if (t->c_ospeed != 0) { 665 cd_write_reg(sc, cy->cy_chip, CD1400_TCOR, o_clk_opt); 666 cd_write_reg(sc, cy->cy_chip, CD1400_TBPR, obpr); 667 } 668 /* set receive speed */ 669 if (t->c_ispeed != 0) { 670 cd_write_reg(sc, cy->cy_chip, CD1400_RCOR, i_clk_opt); 671 cd_write_reg(sc, cy->cy_chip, CD1400_RBPR, ibpr); 672 } 673 opt = CD1400_CCR_CMDCHANCTL | CD1400_CCR_XMTEN 674 | (ISSET(t->c_cflag, CREAD) ? CD1400_CCR_RCVEN : CD1400_CCR_RCVDIS); 675 676 if (opt != cy->cy_channel_control) { 677 cy->cy_channel_control = opt; 678 cd1400_channel_cmd(sc, cy, opt); 679 } 680 /* compute COR1 contents */ 681 opt = 0; 682 if (ISSET(t->c_cflag, PARENB)) { 683 if (ISSET(t->c_cflag, PARODD)) 684 opt |= CD1400_COR1_PARODD; 685 opt |= CD1400_COR1_PARNORMAL; 686 } 687 if (!ISSET(t->c_iflag, INPCK)) 688 opt |= CD1400_COR1_NOINPCK; /* no parity checking */ 689 690 if (ISSET(t->c_cflag, CSTOPB)) 691 opt |= CD1400_COR1_STOP2; 692 693 switch (t->c_cflag & CSIZE) { 694 case CS5: 695 opt |= CD1400_COR1_CS5; 696 break; 697 698 case CS6: 699 opt |= CD1400_COR1_CS6; 700 break; 701 702 case CS7: 703 opt |= CD1400_COR1_CS7; 704 break; 705 706 default: 707 opt |= CD1400_COR1_CS8; 708 break; 709 } 710 711 cd_write_reg(sc, cy->cy_chip, CD1400_COR1, opt); 712 713 #ifdef CY_DEBUG 714 printf("cor1 = 0x%x...", opt); 715 #endif 716 717 /* 718 * use the CD1400 automatic CTS flow control if CRTSCTS is set 719 * 720 * CD1400_COR2_ETC is used because breaks are generated with 721 * embedded transmit commands 722 */ 723 cd_write_reg(sc, cy->cy_chip, CD1400_COR2, 724 CD1400_COR2_ETC | 725 (ISSET(t->c_cflag, CRTSCTS) ? CD1400_COR2_CCTS_OFLOW : 0)); 726 727 cd_write_reg(sc, cy->cy_chip, CD1400_COR3, CY_RX_FIFO_THRESHOLD); 728 729 cd1400_channel_cmd(sc, cy, CD1400_CCR_CMDCORCHG | 730 CD1400_CCR_COR1 | CD1400_CCR_COR2 | CD1400_CCR_COR3); 731 732 cd_write_reg(sc, cy->cy_chip, CD1400_COR4, CD1400_COR4_PFO_EXCEPTION); 733 cd_write_reg(sc, cy->cy_chip, CD1400_COR5, 0); 734 735 /* 736 * set modem change option registers to generate interrupts 737 * on carrier detect changes. 738 * 739 * if hardware RTS handshaking is used 740 * also set the handshaking threshold. 741 */ 742 if (cy->cy_clock == CY_CLOCK_60) { 743 cd_write_reg(sc, cy->cy_chip, CD1400_MCOR1, CD1400_MCOR1_CDzd | 744 (ISSET(t->c_cflag, CRTSCTS) ? CY_RX_DTR_THRESHOLD : 0)); 745 } else { 746 cd_write_reg(sc, cy->cy_chip, CD1400_MCOR1, CD1400_MCOR1_CDzd); 747 } 748 749 cd_write_reg(sc, cy->cy_chip, CD1400_MCOR2, CD1400_MCOR2_CDod); 750 751 /* 752 * set receive timeout to approx. 2ms 753 * could use more complex logic here... 754 * (but is it actually needed or even useful?) 755 */ 756 cd_write_reg(sc, cy->cy_chip, CD1400_RTPR, 2); 757 758 /* 759 * should do anything else here? 760 * XXX check MDMBUF handshaking like in com.c? 761 */ 762 763 splx(s); 764 return 0; 765 } 766 767 /* 768 * set/get modem line status 769 * 770 * bits can be: TIOCM_DTR, TIOCM_RTS, TIOCM_CTS, TIOCM_CD, TIOCM_RI, TIOCM_DSR 771 */ 772 int 773 cy_modem_control(struct cy_softc *sc, struct cy_port *cy, int bits, int howto) 774 { 775 struct tty *tp = cy->cy_tty; 776 int s, msvr; 777 778 s = spltty(); 779 780 /* select channel */ 781 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, 782 cy->cy_port_num & CD1400_CAR_CHAN); 783 784 /* Does not manipulate RTS if it is used for flow control. */ 785 switch (howto) { 786 case DMGET: 787 bits = 0; 788 if (cy->cy_channel_control & CD1400_CCR_RCVEN) 789 bits |= TIOCM_LE; 790 msvr = cd_read_reg(sc, cy->cy_chip, CD1400_MSVR2); 791 if (cy->cy_clock == CY_CLOCK_60) { 792 if (cd_read_reg(sc, cy->cy_chip, CD1400_MSVR1) & 793 CD1400_MSVR1_RTS) 794 bits |= TIOCM_DTR; 795 if (msvr & CD1400_MSVR2_DTR) 796 bits |= TIOCM_RTS; 797 } else { 798 if (cd_read_reg(sc, cy->cy_chip, CD1400_MSVR1) & 799 CD1400_MSVR1_RTS) 800 bits |= TIOCM_RTS; 801 if (msvr & CD1400_MSVR2_DTR) 802 bits |= TIOCM_DTR; 803 } 804 if (msvr & CD1400_MSVR2_CTS) 805 bits |= TIOCM_CTS; 806 if (msvr & CD1400_MSVR2_CD) 807 bits |= TIOCM_CD; 808 /* Not connected on some Cyclom-Y boards? */ 809 if (msvr & CD1400_MSVR2_DSR) 810 bits |= TIOCM_DSR; 811 /* Not connected on some Cyclom-8Y boards? */ 812 if (msvr & CD1400_MSVR2_RI) 813 bits |= TIOCM_RI; 814 break; 815 816 case DMSET: /* replace old values with new ones */ 817 if (cy->cy_clock == CY_CLOCK_60) { 818 if (!ISSET(tp->t_cflag, CRTSCTS)) 819 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2, 820 ((bits & TIOCM_RTS) ? CD1400_MSVR2_DTR : 0)); 821 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1, 822 ((bits & TIOCM_DTR) ? CD1400_MSVR1_RTS : 0)); 823 } else { 824 if (!ISSET(tp->t_cflag, CRTSCTS)) 825 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1, 826 ((bits & TIOCM_RTS) ? CD1400_MSVR1_RTS : 0)); 827 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2, 828 ((bits & TIOCM_DTR) ? CD1400_MSVR2_DTR : 0)); 829 } 830 break; 831 832 case DMBIS: /* set bits */ 833 if (cy->cy_clock == CY_CLOCK_60) { 834 if (!ISSET(tp->t_cflag, CRTSCTS) && 835 (bits & TIOCM_RTS) != 0) 836 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2, 837 CD1400_MSVR2_DTR); 838 if (bits & TIOCM_DTR) 839 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1, 840 CD1400_MSVR1_RTS); 841 } else { 842 if (!ISSET(tp->t_cflag, CRTSCTS) && 843 (bits & TIOCM_RTS) != 0) 844 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1, 845 CD1400_MSVR1_RTS); 846 if (bits & TIOCM_DTR) 847 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2, 848 CD1400_MSVR2_DTR); 849 } 850 break; 851 852 case DMBIC: /* clear bits */ 853 if (cy->cy_clock == CY_CLOCK_60) { 854 if (!ISSET(tp->t_cflag, CRTSCTS) && (bits & TIOCM_RTS)) 855 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2, 0); 856 if (bits & TIOCM_DTR) 857 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1, 0); 858 } else { 859 if (!ISSET(tp->t_cflag, CRTSCTS) && (bits & TIOCM_RTS)) 860 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR1, 0); 861 if (bits & TIOCM_DTR) 862 cd_write_reg(sc, cy->cy_chip, CD1400_MSVR2, 0); 863 } 864 break; 865 } 866 splx(s); 867 return ((howto == DMGET) ? bits : 0); 868 } 869 870 /* 871 * Upper-level handler loop (called from timer interrupt?) 872 * This routine is common for multiple cards 873 */ 874 void 875 cy_poll(void *arg) 876 { 877 int card, port; 878 struct cy_softc *sc; 879 struct cy_port *cy; 880 struct tty *tp; 881 static int counter = 0; 882 #ifdef CY_DEBUG1 883 int did_something; 884 #endif 885 int s = spltty(); 886 887 if (cy_events == 0 && ++counter < 200) { 888 splx(s); 889 goto out; 890 } 891 cy_events = 0; 892 splx(s); 893 894 for (card = 0; card < cy_cd.cd_ndevs; card++) { 895 sc = device_lookup(&cy_cd, card); 896 if (sc == NULL) 897 continue; 898 899 #ifdef CY_DEBUG1 900 sc->sc_poll_count1++; 901 did_something = 0; 902 #endif 903 904 for (port = 0; port < sc->sc_nchannels; port++) { 905 cy = &sc->sc_ports[port]; 906 if ((tp = cy->cy_tty) == NULL || cy->cy_ibuf == NULL || 907 (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0)) 908 continue; 909 910 /* 911 * handle received data 912 */ 913 while (cy->cy_ibuf_rd_ptr != cy->cy_ibuf_wr_ptr) { 914 u_char line_stat; 915 int chr; 916 917 line_stat = cy->cy_ibuf_rd_ptr[0]; 918 chr = cy->cy_ibuf_rd_ptr[1]; 919 920 if (line_stat & 921 (CD1400_RDSR_BREAK | CD1400_RDSR_FE)) 922 chr |= TTY_FE; 923 if (line_stat & CD1400_RDSR_PE) 924 chr |= TTY_PE; 925 926 /* 927 * on an overrun error the data is treated as 928 * good just as it should be. 929 */ 930 931 #ifdef CY_DEBUG 932 printf("%s: port %d ttyinput 0x%x\n", 933 sc->sc_dev.dv_xname, port, chr); 934 #endif 935 936 (*tp->t_linesw->l_rint) (chr, tp); 937 938 s = spltty(); /* really necessary? */ 939 if ((cy->cy_ibuf_rd_ptr += 2) == 940 cy->cy_ibuf_end) 941 cy->cy_ibuf_rd_ptr = cy->cy_ibuf; 942 splx(s); 943 944 #ifdef CY_DEBUG1 945 did_something = 1; 946 #endif 947 } 948 949 /* 950 * If we don't have any received data in ibuf and 951 * CRTSCTS is on and RTS is turned off, it is time to 952 * turn RTS back on 953 */ 954 if (ISSET(tp->t_cflag, CRTSCTS)) { 955 /* 956 * we can't use cy_modem_control() here as it 957 * doesn't change RTS if RTSCTS is on 958 */ 959 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, 960 port & CD1400_CAR_CHAN); 961 962 if (cy->cy_clock == CY_CLOCK_60) { 963 if ((cd_read_reg(sc, cy->cy_chip, 964 CD1400_MSVR2) & CD1400_MSVR2_DTR) == 0) { 965 cd_write_reg(sc, cy->cy_chip, 966 CD1400_MSVR2,CD1400_MSVR2_DTR); 967 #ifdef CY_DEBUG1 968 did_something = 1; 969 #endif 970 } 971 } else { 972 if ((cd_read_reg(sc, cy->cy_chip, 973 CD1400_MSVR1) & CD1400_MSVR1_RTS) == 0) { 974 cd_write_reg(sc, cy->cy_chip, 975 CD1400_MSVR1,CD1400_MSVR1_RTS); 976 #ifdef CY_DEBUG1 977 did_something = 1; 978 #endif 979 } 980 } 981 } 982 983 /* 984 * handle carrier changes 985 */ 986 s = spltty(); 987 if (ISSET(cy->cy_flags, CY_F_CARRIER_CHANGED)) { 988 int carrier; 989 990 CLR(cy->cy_flags, CY_F_CARRIER_CHANGED); 991 splx(s); 992 993 carrier = ((cy->cy_carrier_stat & 994 CD1400_MSVR2_CD) != 0); 995 996 #ifdef CY_DEBUG 997 printf("cy_poll: carrier change " 998 "(card %d, port %d, carrier %d)\n", 999 card, port, carrier); 1000 #endif 1001 if (CY_DIALOUT(tp->t_dev) == 0 && 1002 !(*tp->t_linesw->l_modem)(tp, carrier)) 1003 cy_modem_control(sc, cy, 1004 TIOCM_DTR, DMBIC); 1005 1006 #ifdef CY_DEBUG1 1007 did_something = 1; 1008 #endif 1009 } else 1010 splx(s); 1011 1012 s = spltty(); 1013 if (ISSET(cy->cy_flags, CY_F_START)) { 1014 CLR(cy->cy_flags, CY_F_START); 1015 splx(s); 1016 1017 (*tp->t_linesw->l_start) (tp); 1018 1019 #ifdef CY_DEBUG1 1020 did_something = 1; 1021 #endif 1022 } else 1023 splx(s); 1024 1025 /* could move this to even upper level... */ 1026 if (cy->cy_fifo_overruns) { 1027 cy->cy_fifo_overruns = 0; 1028 /* 1029 * doesn't report overrun count, but 1030 * shouldn't really matter 1031 */ 1032 log(LOG_WARNING, "%s: port %d fifo overrun\n", 1033 sc->sc_dev.dv_xname, port); 1034 } 1035 if (cy->cy_ibuf_overruns) { 1036 cy->cy_ibuf_overruns = 0; 1037 log(LOG_WARNING, "%s: port %d ibuf overrun\n", 1038 sc->sc_dev.dv_xname, port); 1039 } 1040 } /* for(port...) */ 1041 #ifdef CY_DEBUG1 1042 if (did_something && counter >= 200) 1043 sc->sc_poll_count2++; 1044 #endif 1045 } /* for(card...) */ 1046 1047 counter = 0; 1048 1049 out: 1050 callout_reset(&cy_poll_callout, 1, cy_poll, NULL); 1051 } 1052 1053 /* 1054 * hardware interrupt routine 1055 */ 1056 int 1057 cy_intr(void *arg) 1058 { 1059 struct cy_softc *sc = arg; 1060 struct cy_port *cy; 1061 int cy_chip, stat; 1062 int int_serviced = 0; 1063 1064 /* 1065 * Check interrupt status of each CD1400 chip on this card 1066 * (multiple cards cannot share the same interrupt) 1067 */ 1068 for (cy_chip = 0; cy_chip < sc->sc_nchips; cy_chip++) { 1069 1070 stat = cd_read_reg(sc, cy_chip, CD1400_SVRR); 1071 if (stat == 0) 1072 continue; 1073 1074 if (ISSET(stat, CD1400_SVRR_RXRDY)) { 1075 u_char save_car, save_rir, serv_type; 1076 u_char line_stat, recv_data, n_chars; 1077 u_char *buf_p; 1078 1079 save_rir = cd_read_reg(sc, cy_chip, CD1400_RIR); 1080 save_car = cd_read_reg(sc, cy_chip, CD1400_CAR); 1081 /* enter rx service */ 1082 cd_write_reg(sc, cy_chip, CD1400_CAR, save_rir); 1083 1084 serv_type = cd_read_reg(sc, cy_chip, CD1400_RIVR); 1085 cy = &sc->sc_ports[serv_type >> 3]; 1086 1087 #ifdef CY_DEBUG1 1088 cy->cy_rx_int_count++; 1089 #endif 1090 1091 buf_p = cy->cy_ibuf_wr_ptr; 1092 1093 if (ISSET(serv_type, CD1400_RIVR_EXCEPTION)) { 1094 line_stat = cd_read_reg(sc, cy->cy_chip, 1095 CD1400_RDSR); 1096 recv_data = cd_read_reg(sc, cy->cy_chip, 1097 CD1400_RDSR); 1098 1099 if (cy->cy_tty == NULL || 1100 !ISSET(cy->cy_tty->t_state, TS_ISOPEN)) 1101 goto end_rx_serv; 1102 1103 #ifdef CY_DEBUG 1104 printf("%s port %d recv exception, line_stat 0x%x, char 0x%x\n", 1105 sc->sc_dev.dv_xname, cy->cy_port_num, line_stat, recv_data); 1106 #endif 1107 if (ISSET(line_stat, CD1400_RDSR_OE)) 1108 cy->cy_fifo_overruns++; 1109 1110 *buf_p++ = line_stat; 1111 *buf_p++ = recv_data; 1112 if (buf_p == cy->cy_ibuf_end) 1113 buf_p = cy->cy_ibuf; 1114 1115 if (buf_p == cy->cy_ibuf_rd_ptr) { 1116 if (buf_p == cy->cy_ibuf) 1117 buf_p = cy->cy_ibuf_end; 1118 buf_p -= 2; 1119 cy->cy_ibuf_overruns++; 1120 } 1121 cy_events = 1; 1122 } else {/* no exception, received data OK */ 1123 n_chars = cd_read_reg(sc, cy->cy_chip, 1124 CD1400_RDCR); 1125 1126 /* If no tty or not open, discard data */ 1127 if (cy->cy_tty == NULL || 1128 !ISSET(cy->cy_tty->t_state, TS_ISOPEN)) { 1129 while (n_chars--) 1130 cd_read_reg(sc, cy->cy_chip, 1131 CD1400_RDSR); 1132 goto end_rx_serv; 1133 } 1134 1135 #ifdef CY_DEBUG 1136 printf("%s port %d receive ok %d chars\n", 1137 sc->sc_dev.dv_xname, cy->cy_port_num, n_chars); 1138 #endif 1139 while (n_chars--) { 1140 *buf_p++ = 0; /* status: OK */ 1141 /* data byte */ 1142 *buf_p++ = cd_read_reg(sc, 1143 cy->cy_chip, CD1400_RDSR); 1144 if (buf_p == cy->cy_ibuf_end) 1145 buf_p = cy->cy_ibuf; 1146 if (buf_p == cy->cy_ibuf_rd_ptr) { 1147 if (buf_p == cy->cy_ibuf) 1148 buf_p = cy->cy_ibuf_end; 1149 buf_p -= 2; 1150 cy->cy_ibuf_overruns++; 1151 break; 1152 } 1153 } 1154 cy_events = 1; 1155 } 1156 1157 cy->cy_ibuf_wr_ptr = buf_p; 1158 1159 /* RTS handshaking for incoming data */ 1160 if (ISSET(cy->cy_tty->t_cflag, CRTSCTS)) { 1161 int bf, msvr; 1162 1163 bf = buf_p - cy->cy_ibuf_rd_ptr; 1164 if (bf < 0) 1165 bf += CY_IBUF_SIZE; 1166 1167 if (bf > (CY_IBUF_SIZE / 2)) { 1168 /* turn RTS off */ 1169 if (cy->cy_clock == CY_CLOCK_60) 1170 msvr = CD1400_MSVR2; 1171 else 1172 msvr = CD1400_MSVR1; 1173 cd_write_reg(sc, cy->cy_chip, msvr, 0); 1174 } 1175 } 1176 1177 end_rx_serv: 1178 /* terminate service context */ 1179 cd_write_reg(sc, cy->cy_chip, CD1400_RIR, 1180 save_rir & 0x3f); 1181 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, save_car); 1182 int_serviced = 1; 1183 } /* if (rx_service...) */ 1184 if (ISSET(stat, CD1400_SVRR_MDMCH)) { 1185 u_char save_car, save_mir, serv_type, modem_stat; 1186 1187 save_mir = cd_read_reg(sc, cy_chip, CD1400_MIR); 1188 save_car = cd_read_reg(sc, cy_chip, CD1400_CAR); 1189 /* enter modem service */ 1190 cd_write_reg(sc, cy_chip, CD1400_CAR, save_mir); 1191 1192 serv_type = cd_read_reg(sc, cy_chip, CD1400_MIVR); 1193 cy = &sc->sc_ports[serv_type >> 3]; 1194 1195 #ifdef CY_DEBUG1 1196 cy->cy_modem_int_count++; 1197 #endif 1198 1199 modem_stat = cd_read_reg(sc, cy->cy_chip, CD1400_MSVR2); 1200 1201 #ifdef CY_DEBUG 1202 printf("%s port %d modem line change, new stat 0x%x\n", 1203 sc->sc_dev.dv_xname, cy->cy_port_num, modem_stat); 1204 #endif 1205 if (ISSET((cy->cy_carrier_stat ^ modem_stat), CD1400_MSVR2_CD)) { 1206 SET(cy->cy_flags, CY_F_CARRIER_CHANGED); 1207 cy_events = 1; 1208 } 1209 cy->cy_carrier_stat = modem_stat; 1210 1211 /* terminate service context */ 1212 cd_write_reg(sc, cy->cy_chip, CD1400_MIR, save_mir & 0x3f); 1213 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, save_car); 1214 int_serviced = 1; 1215 } /* if (modem_service...) */ 1216 if (ISSET(stat, CD1400_SVRR_TXRDY)) { 1217 u_char save_car, save_tir, serv_type, 1218 count, ch; 1219 struct tty *tp; 1220 1221 save_tir = cd_read_reg(sc, cy_chip, CD1400_TIR); 1222 save_car = cd_read_reg(sc, cy_chip, CD1400_CAR); 1223 /* enter tx service */ 1224 cd_write_reg(sc, cy_chip, CD1400_CAR, save_tir); 1225 1226 serv_type = cd_read_reg(sc, cy_chip, CD1400_TIVR); 1227 cy = &sc->sc_ports[serv_type >> 3]; 1228 1229 #ifdef CY_DEBUG1 1230 cy->cy_tx_int_count++; 1231 #endif 1232 #ifdef CY_DEBUG 1233 printf("%s port %d tx service\n", sc->sc_dev.dv_xname, 1234 cy->cy_port_num); 1235 #endif 1236 1237 /* stop transmitting if no tty or CY_F_STOP set */ 1238 tp = cy->cy_tty; 1239 if (tp == NULL || ISSET(cy->cy_flags, CY_F_STOP)) 1240 goto txdone; 1241 1242 count = 0; 1243 if (ISSET(cy->cy_flags, CY_F_SEND_NUL)) { 1244 cd_write_reg(sc, cy->cy_chip, CD1400_TDR, 0); 1245 cd_write_reg(sc, cy->cy_chip, CD1400_TDR, 0); 1246 count += 2; 1247 CLR(cy->cy_flags, CY_F_SEND_NUL); 1248 } 1249 if (tp->t_outq.c_cc > 0) { 1250 SET(tp->t_state, TS_BUSY); 1251 while (tp->t_outq.c_cc > 0 && 1252 count < CD1400_TX_FIFO_SIZE) { 1253 ch = getc(&tp->t_outq); 1254 /* 1255 * remember to double NUL characters 1256 * because embedded transmit commands 1257 * are enabled 1258 */ 1259 if (ch == 0) { 1260 if (count >= CD1400_TX_FIFO_SIZE - 2) { 1261 SET(cy->cy_flags, CY_F_SEND_NUL); 1262 break; 1263 } 1264 cd_write_reg(sc, cy->cy_chip, 1265 CD1400_TDR, ch); 1266 count++; 1267 } 1268 cd_write_reg(sc, cy->cy_chip, 1269 CD1400_TDR, ch); 1270 count++; 1271 } 1272 } else { 1273 /* 1274 * no data to send -- check if we should 1275 * start/stop a break 1276 */ 1277 /* 1278 * XXX does this cause too much delay before 1279 * breaks? 1280 */ 1281 if (ISSET(cy->cy_flags, CY_F_START_BREAK)) { 1282 cd_write_reg(sc, cy->cy_chip, 1283 CD1400_TDR, 0); 1284 cd_write_reg(sc, cy->cy_chip, 1285 CD1400_TDR, 0x81); 1286 CLR(cy->cy_flags, CY_F_START_BREAK); 1287 } 1288 if (ISSET(cy->cy_flags, CY_F_END_BREAK)) { 1289 cd_write_reg(sc, cy->cy_chip, 1290 CD1400_TDR, 0); 1291 cd_write_reg(sc, cy->cy_chip, 1292 CD1400_TDR, 0x83); 1293 CLR(cy->cy_flags, CY_F_END_BREAK); 1294 } 1295 } 1296 1297 if (tp->t_outq.c_cc == 0) { 1298 txdone: 1299 /* 1300 * No data to send or requested to stop. 1301 * Disable transmit interrupt 1302 */ 1303 cd_write_reg(sc, cy->cy_chip, CD1400_SRER, 1304 cd_read_reg(sc, cy->cy_chip, CD1400_SRER) 1305 & ~CD1400_SRER_TXRDY); 1306 CLR(cy->cy_flags, CY_F_STOP); 1307 CLR(tp->t_state, TS_BUSY); 1308 } 1309 if (tp->t_outq.c_cc <= tp->t_lowat) { 1310 SET(cy->cy_flags, CY_F_START); 1311 cy_events = 1; 1312 } 1313 /* terminate service context */ 1314 cd_write_reg(sc, cy->cy_chip, CD1400_TIR, save_tir & 0x3f); 1315 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, save_car); 1316 int_serviced = 1; 1317 } /* if (tx_service...) */ 1318 } /* for(...all CD1400s on a card) */ 1319 1320 /* ensure an edge for next interrupt */ 1321 bus_space_write_1(sc->sc_memt, sc->sc_bsh, 1322 CY_CLEAR_INTR << sc->sc_bustype, 0); 1323 return int_serviced; 1324 } 1325 1326 /* 1327 * subroutine to enable CD1400 transmitter 1328 */ 1329 void 1330 cy_enable_transmitter(struct cy_softc *sc, struct cy_port *cy) 1331 { 1332 int s = spltty(); 1333 cd_write_reg(sc, cy->cy_chip, CD1400_CAR, 1334 cy->cy_port_num & CD1400_CAR_CHAN); 1335 cd_write_reg(sc, cy->cy_chip, CD1400_SRER, 1336 cd_read_reg(sc, cy->cy_chip, CD1400_SRER) | CD1400_SRER_TXRDY); 1337 splx(s); 1338 } 1339 1340 /* 1341 * Execute a CD1400 channel command 1342 */ 1343 void 1344 cd1400_channel_cmd(struct cy_softc *sc, struct cy_port *cy, int cmd) 1345 { 1346 u_int waitcnt = 5 * 8 * 1024; /* approx 5 ms */ 1347 1348 #ifdef CY_DEBUG 1349 printf("c1400_channel_cmd cy %p command 0x%x\n", cy, cmd); 1350 #endif 1351 1352 /* wait until cd1400 is ready to process a new command */ 1353 while (cd_read_reg(sc, cy->cy_chip, CD1400_CCR) != 0 && waitcnt-- > 0); 1354 1355 if (waitcnt == 0) 1356 log(LOG_ERR, "%s: channel command timeout\n", 1357 sc->sc_dev.dv_xname); 1358 1359 cd_write_reg(sc, cy->cy_chip, CD1400_CCR, cmd); 1360 } 1361 1362 /* 1363 * Compute clock option register and baud rate register values 1364 * for a given speed. Return 0 on success, -1 on failure. 1365 * 1366 * The error between requested and actual speed seems 1367 * to be well within allowed limits (less than 3%) 1368 * with every speed value between 50 and 150000 bps. 1369 */ 1370 int 1371 cy_speed(speed_t speed, int *cor, int *bpr, int cy_clock) 1372 { 1373 int c, co, br; 1374 1375 if (speed < 50 || speed > 150000) 1376 return -1; 1377 1378 for (c = 0, co = 8; co <= 2048; co <<= 2, c++) { 1379 br = (cy_clock + (co * speed) / 2) / (co * speed); 1380 if (br < 0x100) { 1381 *bpr = br; 1382 *cor = c; 1383 return 0; 1384 } 1385 } 1386 1387 return -1; 1388 } 1389