xref: /netbsd-src/sys/dev/ic/cs89x0var.h (revision 9fbd88883c38d0c0fbfcbe66d76fe6b0fab3f9de)
1 /*	$NetBSD: cs89x0var.h,v 1.1 2001/11/26 19:17:08 yamt Exp $	*/
2 
3 /*
4  * Copyright 1997
5  * Digital Equipment Corporation. All rights reserved.
6  *
7  * This software is furnished under license and may be used and
8  * copied only in accordance with the following terms and conditions.
9  * Subject to these conditions, you may download, copy, install,
10  * use, modify and distribute this software in source and/or binary
11  * form. No title or ownership is transferred hereby.
12  *
13  * 1) Any source code used, modified or distributed must reproduce
14  *    and retain this copyright notice and list of conditions as
15  *    they appear in the source file.
16  *
17  * 2) No right is granted to use any trade name, trademark, or logo of
18  *    Digital Equipment Corporation. Neither the "Digital Equipment
19  *    Corporation" name nor any trademark or logo of Digital Equipment
20  *    Corporation may be used to endorse or promote products derived
21  *    from this software without the prior written permission of
22  *    Digital Equipment Corporation.
23  *
24  * 3) This software is provided "AS-IS" and any express or implied
25  *    warranties, including but not limited to, any implied warranties
26  *    of merchantability, fitness for a particular purpose, or
27  *    non-infringement are disclaimed. In no event shall DIGITAL be
28  *    liable for any damages whatsoever, and in particular, DIGITAL
29  *    shall not be liable for special, indirect, consequential, or
30  *    incidental damages or damages for lost profits, loss of
31  *    revenue or loss of use, whether such damages arise in contract,
32  *    negligence, tort, under statute, in equity, at law or otherwise,
33  *    even if advised of the possibility of such damage.
34  */
35 
36 /*
37 **++
38 **  FACILITY  Crystal CS8900 Ethernet driver header file
39 **
40 **  ABSTRACT
41 **
42 **     This module provides CS8900 driver softc and related definitions
43 **
44 **  AUTHORS
45 **
46 **     Peter Dettori   SEA - Software Engineering.
47 **
48 **  CREATION DATE:
49 **
50 **       13-Feb-1997.
51 **
52 **  MODIFICATION HISTORY:
53 **
54 **--
55 */
56 
57 #ifndef _DEV_IC_CS89X0VAR_H_
58 #define	_DEV_IC_CS89X0VAR_H_
59 
60 /*
61  * Ethernet software status per interface.
62  *
63  * Each interface is referenced by a network interface structure,
64  * arpcom.ac_if, which the routing code uses to locate the interface.
65  * This structure contains the output queue for the interface,
66  * its address, ...
67  */
68 struct cs_softc {
69 	struct device sc_dev;		/* base device glue */
70 	struct ethercom sc_ethercom;	/* Ethernet common */
71 	struct ifmedia sc_media;	/* media control structures */
72 
73 	void	*sc_ih;			/* interupt handler */
74 	void 	*sc_sh;			/* shutdown hook */
75 
76 	bus_space_tag_t sc_iot;		/* bus space tag for IO */
77 	bus_space_tag_t sc_memt;	/* bus space tag for memory mode */
78 	bus_space_handle_t sc_ioh;	/* bus space handles */
79 	bus_space_handle_t sc_memh;
80 
81 #if 0
82 	isa_chipset_tag_t sc_ic;	/* ISA chipset */
83 #endif
84 
85 	int	sc_irq;			/* IRQ line */
86 
87 	int	sc_prodid;		/* saved product ID */
88 	int	sc_prodrev;		/* saved product rev */
89 
90 	bus_addr_t sc_pktpgaddr;	/* PacketPage bus memory address */
91 
92 	int	sc_cfgflags;		/* software configuration flags */
93 
94 	int	sc_memorymode;		/* are we in memory mode? */
95 	int	sc_txbusy;		/* transmit in progress */
96 	int	sc_resetting;		/* reset in progress */
97 
98 	int	sc_xe_ent;		/* current early-xmit table entry */
99 	int	sc_xe_togo;		/* # of packets to go at this ent */
100 
101 	int	sc_carrier;		/* has carrier */
102 
103 	u_int8_t sc_enaddr[ETHER_ADDR_LEN];	/* MAC address */
104 
105 #if NRND > 0
106 	rndsource_element_t rnd_source; /* random source */
107 #endif
108 
109 	/* power management */
110 	int (*sc_enable) __P((struct cs_softc *));
111 	void (*sc_disable) __P((struct cs_softc *));
112 	void *sc_powerhook;
113 
114 	/* dma hooks */
115 	void (*sc_dma_process_rx) __P((struct cs_softc *));
116 	void (*sc_dma_chipinit) __P((struct cs_softc *));
117 	void (*sc_dma_attach) __P((struct cs_softc *));
118 };
119 
120 
121 /* Config Flags in cs_softc */
122 
123 #define CFGFLG_MEM_MODE     0x0001
124 #define CFGFLG_USE_SA       0x0002
125 #define CFGFLG_IOCHRDY      0x0004
126 #define CFGFLG_DCDC_POL     0x0008
127 #define CFGFLG_DMA_MODE	    0x0020
128 #define CFGFLG_ATTACHED     0x0040 /* XXX should not be here? */
129 #define CFGFLG_CARDBUS_HACK 0x0080
130 #define CFGFLG_ENABLED      0x0100 /* XXX should not be here? */
131 #define CFGFLG_NOT_EEPROM   0x8000
132 
133 
134 /*
135  * Inlines for reading/writing the packet page area.
136  */
137 
138 static __inline__ u_int16_t _cs_read_port(struct cs_softc *, int);
139 
140 static __inline__ u_int16_t
141 _cs_read_port(struct cs_softc *sc, int off)
142 {
143 	u_int16_t result;
144 
145 	if (sc->sc_cfgflags & CFGFLG_CARDBUS_HACK) {
146 	    /*
147 		 * hack for EtherJet PCMCIA and cardbus (obtained from freebsd)
148 		 *
149 	     * EtherJet PCMCIA don't work with cardbus bridges
150 	     * (at least TI1250) without this hack.
151 	     */
152 	    result = (bus_space_read_1(sc->sc_iot, sc->sc_ioh, off) & 0xff);
153 	    result |= ((bus_space_read_1(sc->sc_iot, sc->sc_ioh, off+1) & 0xff) << 8);
154 	}
155 	else {
156 	    result = bus_space_read_2(sc->sc_iot, sc->sc_ioh, off);
157 	}
158 
159 	return result;
160 }
161 
162 static __inline__ u_int16_t _CS_READ_PACKET_PAGE_IO(struct cs_softc *, int);
163 
164 static __inline__ u_int16_t
165 _CS_READ_PACKET_PAGE_IO(struct cs_softc *sc, int offset)
166 {
167 
168 	bus_space_write_2(sc->sc_iot, sc->sc_ioh, PORT_PKTPG_PTR, offset);
169 	return (_cs_read_port(sc, PORT_PKTPG_DATA));
170 }
171 
172 static __inline__ u_int16_t CS_READ_PACKET_PAGE_IO __P((bus_space_tag_t,
173 	bus_space_handle_t, int));
174 
175 static __inline__ u_int16_t
176 CS_READ_PACKET_PAGE_IO(iot, ioh, offset)
177 	bus_space_tag_t iot;
178 	bus_space_handle_t ioh;
179 	int offset;
180 {
181 
182 	bus_space_write_2(iot, ioh, PORT_PKTPG_PTR, offset);
183 	return (bus_space_read_2(iot, ioh, PORT_PKTPG_DATA));
184 }
185 
186 #define	CS_READ_PACKET_PAGE_MEM(memt, memh, offset)			\
187 	bus_space_read_2((memt), (memh), (offset))
188 
189 #define	CS_READ_PACKET_PAGE(sc, offset)					\
190 	((sc)->sc_memorymode ? CS_READ_PACKET_PAGE_MEM((sc)->sc_memt,	\
191 			       (sc)->sc_memh, (offset)) :		\
192 	 _CS_READ_PACKET_PAGE_IO((sc), (offset)))
193 
194 #define	CS_WRITE_PACKET_PAGE_IO(iot, ioh, offset, val)			\
195 do {									\
196 	bus_space_write_2((iot), (ioh), PORT_PKTPG_PTR, (offset));	\
197 	bus_space_write_2((iot), (ioh), PORT_PKTPG_DATA, (val));	\
198 } while (0)
199 
200 #define	CS_WRITE_PACKET_PAGE_MEM(memt, memh, offset, val)		\
201 	bus_space_write_2((memt), (memh), (offset), (val))
202 
203 #define	CS_WRITE_PACKET_PAGE(sc, offset, val)				\
204 do {									\
205 	if ((sc)->sc_memorymode)					\
206 		CS_WRITE_PACKET_PAGE_MEM((sc)->sc_memt, (sc)->sc_memh,	\
207 		    (offset), (val));					\
208 	else								\
209 		CS_WRITE_PACKET_PAGE_IO((sc)->sc_iot, (sc)->sc_ioh,	\
210 		    (offset), (val));					\
211 } while (0)
212 
213 #define CS_READ_PORT(sc, off)\
214 	bus_space_read_2((sc)->sc_iot, (sc)->sc_ioh, (off))
215 
216 #define CS_WRITE_PORT(sc, off, val)\
217 	bus_space_write_2((sc)->sc_iot, (sc)->sc_ioh, (off), (val))
218 
219 
220 /* Return Status */
221 #define	CS_ERROR   -1
222 #define CS_OK       1
223 
224 
225 /* Media Type in cs_softc */
226 
227 #define MEDIA_AUI           0x0001
228 #define MEDIA_10BASE2       0x0002
229 #define MEDIA_10BASET       0x0003
230 
231 
232 /* Miscellaneous definitions */
233 
234 #define MAXLOOP            0x8888
235 
236 int	cs_attach __P((struct cs_softc *sc, u_int8_t *enaddr,
237 	    int *media, int nmedia, int defmedia));
238 int	cs_detach __P((struct cs_softc *sc));
239 int	cs_verify_eeprom __P((bus_space_tag_t, bus_space_handle_t));
240 int	cs_read_eeprom __P((bus_space_tag_t, bus_space_handle_t, int,
241 	    u_int16_t *));
242 int	cs_intr __P((void *));
243 int cs_activate __P((struct device *, enum devact));
244 void	cs_ether_input __P((struct cs_softc *, struct mbuf *));
245 void	cs_print_rx_errors __P((struct cs_softc *, u_int16_t));
246 int	cs_init __P((struct ifnet *));
247 
248 #define CS_IS_ENABLED(sc)	((sc)->sc_cfgflags & CFGFLG_ENABLED)
249 
250 #endif /* _DEV_IC_CS89X0VAR_H_ */
251