1 /* $NetBSD: com.c,v 1.280 2008/04/28 20:23:49 martin Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2004, 2008 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * Copyright (c) 1991 The Regents of the University of California. 34 * All rights reserved. 35 * 36 * Redistribution and use in source and binary forms, with or without 37 * modification, are permitted provided that the following conditions 38 * are met: 39 * 1. Redistributions of source code must retain the above copyright 40 * notice, this list of conditions and the following disclaimer. 41 * 2. Redistributions in binary form must reproduce the above copyright 42 * notice, this list of conditions and the following disclaimer in the 43 * documentation and/or other materials provided with the distribution. 44 * 3. Neither the name of the University nor the names of its contributors 45 * may be used to endorse or promote products derived from this software 46 * without specific prior written permission. 47 * 48 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 49 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 50 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 51 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 52 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 53 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 54 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 55 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 56 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 57 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 58 * SUCH DAMAGE. 59 * 60 * @(#)com.c 7.5 (Berkeley) 5/16/91 61 */ 62 63 /* 64 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 65 * Supports automatic hardware flow control on StarTech ST16C650A UART 66 */ 67 68 #include <sys/cdefs.h> 69 __KERNEL_RCSID(0, "$NetBSD: com.c,v 1.280 2008/04/28 20:23:49 martin Exp $"); 70 71 #include "opt_com.h" 72 #include "opt_ddb.h" 73 #include "opt_kgdb.h" 74 #include "opt_lockdebug.h" 75 #include "opt_multiprocessor.h" 76 #include "opt_ntp.h" 77 78 #include "rnd.h" 79 #if NRND > 0 && defined(RND_COM) 80 #include <sys/rnd.h> 81 #endif 82 83 /* The COM16650 option was renamed to COM_16650. */ 84 #ifdef COM16650 85 #error Obsolete COM16650 option; use COM_16650 instead. 86 #endif 87 88 /* 89 * Override cnmagic(9) macro before including <sys/systm.h>. 90 * We need to know if cn_check_magic triggered debugger, so set a flag. 91 * Callers of cn_check_magic must declare int cn_trapped = 0; 92 * XXX: this is *ugly*! 93 */ 94 #define cn_trap() \ 95 do { \ 96 console_debugger(); \ 97 cn_trapped = 1; \ 98 } while (/* CONSTCOND */ 0) 99 100 #include <sys/param.h> 101 #include <sys/systm.h> 102 #include <sys/ioctl.h> 103 #include <sys/select.h> 104 #include <sys/poll.h> 105 #include <sys/tty.h> 106 #include <sys/proc.h> 107 #include <sys/user.h> 108 #include <sys/conf.h> 109 #include <sys/file.h> 110 #include <sys/uio.h> 111 #include <sys/kernel.h> 112 #include <sys/syslog.h> 113 #include <sys/device.h> 114 #include <sys/malloc.h> 115 #include <sys/timepps.h> 116 #include <sys/vnode.h> 117 #include <sys/kauth.h> 118 #include <sys/intr.h> 119 120 #include <sys/bus.h> 121 122 #include <dev/ic/comreg.h> 123 #include <dev/ic/comvar.h> 124 #include <dev/ic/ns16550reg.h> 125 #include <dev/ic/st16650reg.h> 126 #ifdef COM_HAYESP 127 #include <dev/ic/hayespreg.h> 128 #endif 129 #define com_lcr com_cfcr 130 #include <dev/cons.h> 131 132 #ifdef COM_REGMAP 133 #define CSR_WRITE_1(r, o, v) \ 134 bus_space_write_1((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o], v) 135 #define CSR_READ_1(r, o) \ 136 bus_space_read_1((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o]) 137 #define CSR_WRITE_2(r, o, v) \ 138 bus_space_write_2((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o], v) 139 #define CSR_READ_2(r, o) \ 140 bus_space_read_2((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o]) 141 #define CSR_WRITE_MULTI(r, o, p, n) \ 142 bus_space_write_multi_1((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o], p, n) 143 #else 144 #define CSR_WRITE_1(r, o, v) \ 145 bus_space_write_1((r)->cr_iot, (r)->cr_ioh, o, v) 146 #define CSR_READ_1(r, o) \ 147 bus_space_read_1((r)->cr_iot, (r)->cr_ioh, o) 148 #define CSR_WRITE_2(r, o, v) \ 149 bus_space_write_2((r)->cr_iot, (r)->cr_ioh, o, v) 150 #define CSR_READ_2(r, o) \ 151 bus_space_read_2((r)->cr_iot, (r)->cr_ioh, o) 152 #define CSR_WRITE_MULTI(r, o, p, n) \ 153 bus_space_write_multi_1((r)->cr_iot, (r)->cr_ioh, o, p, n) 154 #endif 155 156 157 static void com_enable_debugport(struct com_softc *); 158 159 void com_config(struct com_softc *); 160 void com_shutdown(struct com_softc *); 161 int comspeed(long, long, int); 162 static u_char cflag2lcr(tcflag_t); 163 int comparam(struct tty *, struct termios *); 164 void comstart(struct tty *); 165 int comhwiflow(struct tty *, int); 166 167 void com_loadchannelregs(struct com_softc *); 168 void com_hwiflow(struct com_softc *); 169 void com_break(struct com_softc *, int); 170 void com_modem(struct com_softc *, int); 171 void tiocm_to_com(struct com_softc *, u_long, int); 172 int com_to_tiocm(struct com_softc *); 173 void com_iflush(struct com_softc *); 174 175 int com_common_getc(dev_t, struct com_regs *); 176 void com_common_putc(dev_t, struct com_regs *, int); 177 178 int cominit(struct com_regs *, int, int, int, tcflag_t); 179 180 int comcngetc(dev_t); 181 void comcnputc(dev_t, int); 182 void comcnpollc(dev_t, int); 183 184 #define integrate static inline 185 void comsoft(void *); 186 integrate void com_rxsoft(struct com_softc *, struct tty *); 187 integrate void com_txsoft(struct com_softc *, struct tty *); 188 integrate void com_stsoft(struct com_softc *, struct tty *); 189 integrate void com_schedrx(struct com_softc *); 190 void comdiag(void *); 191 192 extern struct cfdriver com_cd; 193 194 dev_type_open(comopen); 195 dev_type_close(comclose); 196 dev_type_read(comread); 197 dev_type_write(comwrite); 198 dev_type_ioctl(comioctl); 199 dev_type_stop(comstop); 200 dev_type_tty(comtty); 201 dev_type_poll(compoll); 202 203 const struct cdevsw com_cdevsw = { 204 comopen, comclose, comread, comwrite, comioctl, 205 comstop, comtty, compoll, nommap, ttykqfilter, D_TTY 206 }; 207 208 /* 209 * Make this an option variable one can patch. 210 * But be warned: this must be a power of 2! 211 */ 212 u_int com_rbuf_size = COM_RING_SIZE; 213 214 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 215 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 216 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 217 218 static struct com_regs comconsregs; 219 static int comconsattached; 220 static int comconsrate; 221 static tcflag_t comconscflag; 222 static struct cnm_state com_cnm_state; 223 224 #ifdef KGDB 225 #include <sys/kgdb.h> 226 227 static struct com_regs comkgdbregs; 228 static int com_kgdb_attached; 229 230 int com_kgdb_getc(void *); 231 void com_kgdb_putc(void *, int); 232 #endif /* KGDB */ 233 234 #ifdef COM_REGMAP 235 /* initializer for typical 16550-ish hardware */ 236 #define COM_REG_16550 { \ 237 com_data, com_data, com_dlbl, com_dlbh, com_ier, com_iir, com_fifo, \ 238 com_efr, com_lcr, com_mcr, com_lsr, com_msr } 239 240 const bus_size_t com_std_map[16] = COM_REG_16550; 241 #endif /* COM_REGMAP */ 242 243 #define COMUNIT_MASK 0x7ffff 244 #define COMDIALOUT_MASK 0x80000 245 246 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 247 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 248 249 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 250 device_is_active((sc)->sc_dev)) 251 252 #define BR BUS_SPACE_BARRIER_READ 253 #define BW BUS_SPACE_BARRIER_WRITE 254 #define COM_BARRIER(r, f) \ 255 bus_space_barrier((r)->cr_iot, (r)->cr_ioh, 0, (r)->cr_nports, (f)) 256 257 /*ARGSUSED*/ 258 int 259 comspeed(long speed, long frequency, int type) 260 { 261 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 262 263 int x, err; 264 265 #if 0 266 if (speed == 0) 267 return (0); 268 #endif 269 if (speed <= 0) 270 return (-1); 271 x = divrnd(frequency / 16, speed); 272 if (x <= 0) 273 return (-1); 274 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 275 if (err < 0) 276 err = -err; 277 if (err > COM_TOLERANCE) 278 return (-1); 279 return (x); 280 281 #undef divrnd 282 } 283 284 #ifdef COM_DEBUG 285 int com_debug = 0; 286 287 void comstatus(struct com_softc *, const char *); 288 void 289 comstatus(struct com_softc *sc, const char *str) 290 { 291 struct tty *tp = sc->sc_tty; 292 293 aprint_normal_dev(sc->sc_dev, 294 "%s %cclocal %cdcd %cts_carr_on %cdtr %ctx_stopped\n", 295 str, 296 ISSET(tp->t_cflag, CLOCAL) ? '+' : '-', 297 ISSET(sc->sc_msr, MSR_DCD) ? '+' : '-', 298 ISSET(tp->t_state, TS_CARR_ON) ? '+' : '-', 299 ISSET(sc->sc_mcr, MCR_DTR) ? '+' : '-', 300 sc->sc_tx_stopped ? '+' : '-'); 301 302 aprint_normal_dev(sc->sc_dev, 303 "%s %ccrtscts %ccts %cts_ttstop %crts rx_flags=0x%x\n", 304 str, 305 ISSET(tp->t_cflag, CRTSCTS) ? '+' : '-', 306 ISSET(sc->sc_msr, MSR_CTS) ? '+' : '-', 307 ISSET(tp->t_state, TS_TTSTOP) ? '+' : '-', 308 ISSET(sc->sc_mcr, MCR_RTS) ? '+' : '-', 309 sc->sc_rx_flags); 310 } 311 #endif 312 313 int 314 com_probe_subr(struct com_regs *regs) 315 { 316 317 /* force access to id reg */ 318 CSR_WRITE_1(regs, COM_REG_LCR, LCR_8BITS); 319 CSR_WRITE_1(regs, COM_REG_IIR, 0); 320 if ((CSR_READ_1(regs, COM_REG_LCR) != LCR_8BITS) || 321 (CSR_READ_1(regs, COM_REG_IIR) & 0x38)) 322 return (0); 323 324 return (1); 325 } 326 327 int 328 comprobe1(bus_space_tag_t iot, bus_space_handle_t ioh) 329 { 330 struct com_regs regs; 331 332 regs.cr_iot = iot; 333 regs.cr_ioh = ioh; 334 #ifdef COM_REGMAP 335 memcpy(regs.cr_map, com_std_map, sizeof (regs.cr_map));; 336 #endif 337 338 return com_probe_subr(®s); 339 } 340 341 /* 342 * No locking in this routine; it is only called during attach, 343 * or with the port already locked. 344 */ 345 static void 346 com_enable_debugport(struct com_softc *sc) 347 { 348 349 /* Turn on line break interrupt, set carrier. */ 350 sc->sc_ier = IER_ERXRDY; 351 if (sc->sc_type == COM_TYPE_PXA2x0) 352 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 353 CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier); 354 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 355 CSR_WRITE_1(&sc->sc_regs, COM_REG_MCR, sc->sc_mcr); 356 } 357 358 void 359 com_attach_subr(struct com_softc *sc) 360 { 361 struct com_regs *regsp = &sc->sc_regs; 362 struct tty *tp; 363 #ifdef COM_16650 364 u_int8_t lcr; 365 #endif 366 const char *fifo_msg = NULL; 367 368 aprint_naive("\n"); 369 370 callout_init(&sc->sc_diag_callout, 0); 371 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_HIGH); 372 373 /* Disable interrupts before configuring the device. */ 374 if (sc->sc_type == COM_TYPE_PXA2x0) 375 sc->sc_ier = IER_EUART; 376 else 377 sc->sc_ier = 0; 378 379 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 380 381 if (regsp->cr_iot == comconsregs.cr_iot && 382 regsp->cr_iobase == comconsregs.cr_iobase) { 383 comconsattached = 1; 384 385 /* Make sure the console is always "hardwired". */ 386 delay(10000); /* wait for output to finish */ 387 SET(sc->sc_hwflags, COM_HW_CONSOLE); 388 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 389 } 390 391 /* Probe for FIFO */ 392 switch (sc->sc_type) { 393 case COM_TYPE_HAYESP: 394 goto fifodone; 395 396 case COM_TYPE_AU1x00: 397 sc->sc_fifolen = 16; 398 fifo_msg = "Au1X00 UART, working fifo"; 399 SET(sc->sc_hwflags, COM_HW_FIFO); 400 goto fifodelay; 401 } 402 403 sc->sc_fifolen = 1; 404 /* look for a NS 16550AF UART with FIFOs */ 405 CSR_WRITE_1(regsp, COM_REG_FIFO, 406 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 407 delay(100); 408 if (ISSET(CSR_READ_1(regsp, COM_REG_IIR), IIR_FIFO_MASK) 409 == IIR_FIFO_MASK) 410 if (ISSET(CSR_READ_1(regsp, COM_REG_FIFO), FIFO_TRIGGER_14) 411 == FIFO_TRIGGER_14) { 412 SET(sc->sc_hwflags, COM_HW_FIFO); 413 414 #ifdef COM_16650 415 /* 416 * IIR changes into the EFR if LCR is set to LCR_EERS 417 * on 16650s. We also know IIR != 0 at this point. 418 * Write 0 into the EFR, and read it. If the result 419 * is 0, we have a 16650. 420 * 421 * Older 16650s were broken; the test to detect them 422 * is taken from the Linux driver. Apparently 423 * setting DLAB enable gives access to the EFR on 424 * these chips. 425 */ 426 lcr = CSR_READ_1(regsp, COM_REG_LCR); 427 CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS); 428 CSR_WRITE_1(regsp, COM_REG_EFR, 0); 429 if (CSR_READ_1(regsp, COM_REG_EFR) == 0) { 430 CSR_WRITE_1(regsp, COM_REG_LCR, 431 lcr | LCR_DLAB); 432 if (CSR_READ_1(regsp, COM_REG_EFR) == 0) { 433 CLR(sc->sc_hwflags, COM_HW_FIFO); 434 sc->sc_fifolen = 0; 435 } else { 436 SET(sc->sc_hwflags, COM_HW_FLOW); 437 sc->sc_fifolen = 32; 438 } 439 } else 440 #endif 441 sc->sc_fifolen = 16; 442 443 #ifdef COM_16650 444 CSR_WRITE_1(regsp, COM_REG_LCR, lcr); 445 if (sc->sc_fifolen == 0) 446 fifo_msg = "st16650, broken fifo"; 447 else if (sc->sc_fifolen == 32) 448 fifo_msg = "st16650a, working fifo"; 449 else 450 #endif 451 fifo_msg = "ns16550a, working fifo"; 452 } else 453 fifo_msg = "ns16550, broken fifo"; 454 else 455 fifo_msg = "ns8250 or ns16450, no fifo"; 456 CSR_WRITE_1(regsp, COM_REG_FIFO, 0); 457 fifodelay: 458 /* 459 * Some chips will clear down both Tx and Rx FIFOs when zero is 460 * written to com_fifo. If this chip is the console, writing zero 461 * results in some of the chip/FIFO description being lost, so delay 462 * printing it until now. 463 */ 464 delay(10); 465 aprint_normal(": %s\n", fifo_msg); 466 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 467 sc->sc_fifolen = 1; 468 aprint_normal_dev(sc->sc_dev, "txfifo disabled\n"); 469 } 470 471 fifodone: 472 473 tp = ttymalloc(); 474 tp->t_oproc = comstart; 475 tp->t_param = comparam; 476 tp->t_hwiflow = comhwiflow; 477 478 sc->sc_tty = tp; 479 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 480 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 481 sc->sc_rbavail = com_rbuf_size; 482 if (sc->sc_rbuf == NULL) { 483 aprint_error_dev(sc->sc_dev, 484 "unable to allocate ring buffer\n"); 485 return; 486 } 487 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 488 489 tty_attach(tp); 490 491 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 492 SET(sc->sc_mcr, MCR_IENABLE); 493 494 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 495 int maj; 496 497 /* locate the major number */ 498 maj = cdevsw_lookup_major(&com_cdevsw); 499 500 tp->t_dev = cn_tab->cn_dev = makedev(maj, 501 device_unit(sc->sc_dev)); 502 503 aprint_normal_dev(sc->sc_dev, "console\n"); 504 } 505 506 #ifdef KGDB 507 /* 508 * Allow kgdb to "take over" this port. If this is 509 * not the console and is the kgdb device, it has 510 * exclusive use. If it's the console _and_ the 511 * kgdb device, it doesn't. 512 */ 513 if (regsp->cr_iot == comkgdbregs.cr_iot && 514 regsp->cr_iobase == comkgdbregs.cr_iobase) { 515 if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 516 com_kgdb_attached = 1; 517 518 SET(sc->sc_hwflags, COM_HW_KGDB); 519 } 520 aprint_normal_dev(sc->sc_dev, "kgdb\n"); 521 } 522 #endif 523 524 sc->sc_si = softint_establish(SOFTINT_SERIAL, comsoft, sc); 525 526 #if NRND > 0 && defined(RND_COM) 527 rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev), 528 RND_TYPE_TTY, 0); 529 #endif 530 531 /* if there are no enable/disable functions, assume the device 532 is always enabled */ 533 if (!sc->enable) 534 sc->enabled = 1; 535 536 com_config(sc); 537 538 SET(sc->sc_hwflags, COM_HW_DEV_OK); 539 } 540 541 void 542 com_config(struct com_softc *sc) 543 { 544 struct com_regs *regsp = &sc->sc_regs; 545 546 /* Disable interrupts before configuring the device. */ 547 if (sc->sc_type == COM_TYPE_PXA2x0) 548 sc->sc_ier = IER_EUART; 549 else 550 sc->sc_ier = 0; 551 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 552 (void) CSR_READ_1(regsp, COM_REG_IIR); 553 554 #ifdef COM_HAYESP 555 /* Look for a Hayes ESP board. */ 556 if (sc->sc_type == COM_TYPE_HAYESP) { 557 558 /* Set 16550 compatibility mode */ 559 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1, 560 HAYESP_SETMODE); 561 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 562 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 563 HAYESP_MODE_SCALE); 564 565 /* Set RTS/CTS flow control */ 566 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1, 567 HAYESP_SETFLOWTYPE); 568 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 569 HAYESP_FLOW_RTS); 570 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 571 HAYESP_FLOW_CTS); 572 573 /* Set flow control levels */ 574 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1, 575 HAYESP_SETRXFLOW); 576 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 577 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 578 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 579 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 580 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 581 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 582 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 583 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 584 } 585 #endif 586 587 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB)) 588 com_enable_debugport(sc); 589 } 590 591 int 592 com_detach(device_t self, int flags) 593 { 594 struct com_softc *sc = device_private(self); 595 int maj, mn; 596 597 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 598 return EBUSY; 599 600 /* locate the major number */ 601 maj = cdevsw_lookup_major(&com_cdevsw); 602 603 /* Nuke the vnodes for any open instances. */ 604 mn = device_unit(self); 605 vdevgone(maj, mn, mn, VCHR); 606 607 mn |= COMDIALOUT_MASK; 608 vdevgone(maj, mn, mn, VCHR); 609 610 if (sc->sc_rbuf == NULL) { 611 /* 612 * Ring buffer allocation failed in the com_attach_subr, 613 * only the tty is allocated, and nothing else. 614 */ 615 ttyfree(sc->sc_tty); 616 return 0; 617 } 618 619 /* Free the receive buffer. */ 620 free(sc->sc_rbuf, M_DEVBUF); 621 622 /* Detach and free the tty. */ 623 tty_detach(sc->sc_tty); 624 ttyfree(sc->sc_tty); 625 626 /* Unhook the soft interrupt handler. */ 627 softint_disestablish(sc->sc_si); 628 629 #if NRND > 0 && defined(RND_COM) 630 /* Unhook the entropy source. */ 631 rnd_detach_source(&sc->rnd_source); 632 #endif 633 callout_destroy(&sc->sc_diag_callout); 634 635 /* Destroy the lock. */ 636 mutex_destroy(&sc->sc_lock); 637 638 return (0); 639 } 640 641 int 642 com_activate(device_t self, enum devact act) 643 { 644 struct com_softc *sc = device_private(self); 645 int rv = 0; 646 647 switch (act) { 648 case DVACT_ACTIVATE: 649 rv = EOPNOTSUPP; 650 break; 651 652 case DVACT_DEACTIVATE: 653 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 654 rv = EBUSY; 655 break; 656 } 657 658 if (sc->disable != NULL && sc->enabled != 0) { 659 (*sc->disable)(sc); 660 sc->enabled = 0; 661 } 662 break; 663 } 664 665 return (rv); 666 } 667 668 void 669 com_shutdown(struct com_softc *sc) 670 { 671 struct tty *tp = sc->sc_tty; 672 673 mutex_spin_enter(&sc->sc_lock); 674 675 /* If we were asserting flow control, then deassert it. */ 676 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 677 com_hwiflow(sc); 678 679 /* Clear any break condition set with TIOCSBRK. */ 680 com_break(sc, 0); 681 682 /* 683 * Hang up if necessary. Wait a bit, so the other side has time to 684 * notice even if we immediately open the port again. 685 * Avoid tsleeping above splhigh(). 686 */ 687 if (ISSET(tp->t_cflag, HUPCL)) { 688 com_modem(sc, 0); 689 mutex_spin_exit(&sc->sc_lock); 690 /* XXX will only timeout */ 691 (void) kpause(ttclos, false, hz, NULL); 692 mutex_spin_enter(&sc->sc_lock); 693 } 694 695 /* Turn off interrupts. */ 696 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 697 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 698 if (sc->sc_type == COM_TYPE_PXA2x0) 699 sc->sc_ier |= IER_ERXTOUT; 700 } else 701 sc->sc_ier = 0; 702 703 if (sc->sc_type == COM_TYPE_PXA2x0) 704 sc->sc_ier |= IER_EUART; 705 706 CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier); 707 708 mutex_spin_exit(&sc->sc_lock); 709 710 if (sc->disable) { 711 #ifdef DIAGNOSTIC 712 if (!sc->enabled) 713 panic("com_shutdown: not enabled?"); 714 #endif 715 (*sc->disable)(sc); 716 sc->enabled = 0; 717 } 718 } 719 720 int 721 comopen(dev_t dev, int flag, int mode, struct lwp *l) 722 { 723 struct com_softc *sc; 724 struct tty *tp; 725 int s; 726 int error; 727 728 sc = device_lookup_private(&com_cd, COMUNIT(dev)); 729 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 730 sc->sc_rbuf == NULL) 731 return (ENXIO); 732 733 if (!device_is_active(sc->sc_dev)) 734 return (ENXIO); 735 736 #ifdef KGDB 737 /* 738 * If this is the kgdb port, no other use is permitted. 739 */ 740 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 741 return (EBUSY); 742 #endif 743 744 tp = sc->sc_tty; 745 746 if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp)) 747 return (EBUSY); 748 749 s = spltty(); 750 751 /* 752 * Do the following iff this is a first open. 753 */ 754 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 755 struct termios t; 756 757 tp->t_dev = dev; 758 759 760 if (sc->enable) { 761 if ((*sc->enable)(sc)) { 762 splx(s); 763 aprint_error_dev(sc->sc_dev, 764 "device enable failed\n"); 765 return (EIO); 766 } 767 mutex_spin_enter(&sc->sc_lock); 768 sc->enabled = 1; 769 com_config(sc); 770 } else { 771 mutex_spin_enter(&sc->sc_lock); 772 } 773 774 /* Turn on interrupts. */ 775 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 776 if (sc->sc_type == COM_TYPE_PXA2x0) 777 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 778 CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier); 779 780 /* Fetch the current modem control status, needed later. */ 781 sc->sc_msr = CSR_READ_1(&sc->sc_regs, COM_REG_MSR); 782 783 /* Clear PPS capture state on first open. */ 784 mutex_spin_enter(&timecounter_lock); 785 memset(&sc->sc_pps_state, 0, sizeof(sc->sc_pps_state)); 786 sc->sc_pps_state.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR; 787 pps_init(&sc->sc_pps_state); 788 mutex_spin_exit(&timecounter_lock); 789 790 mutex_spin_exit(&sc->sc_lock); 791 792 /* 793 * Initialize the termios status to the defaults. Add in the 794 * sticky bits from TIOCSFLAGS. 795 */ 796 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 797 t.c_ospeed = comconsrate; 798 t.c_cflag = comconscflag; 799 } else { 800 t.c_ospeed = TTYDEF_SPEED; 801 t.c_cflag = TTYDEF_CFLAG; 802 } 803 t.c_ispeed = t.c_ospeed; 804 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 805 SET(t.c_cflag, CLOCAL); 806 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 807 SET(t.c_cflag, CRTSCTS); 808 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 809 SET(t.c_cflag, MDMBUF); 810 /* Make sure comparam() will do something. */ 811 tp->t_ospeed = 0; 812 (void) comparam(tp, &t); 813 tp->t_iflag = TTYDEF_IFLAG; 814 tp->t_oflag = TTYDEF_OFLAG; 815 tp->t_lflag = TTYDEF_LFLAG; 816 ttychars(tp); 817 ttsetwater(tp); 818 819 mutex_spin_enter(&sc->sc_lock); 820 821 /* 822 * Turn on DTR. We must always do this, even if carrier is not 823 * present, because otherwise we'd have to use TIOCSDTR 824 * immediately after setting CLOCAL, which applications do not 825 * expect. We always assert DTR while the device is open 826 * unless explicitly requested to deassert it. 827 */ 828 com_modem(sc, 1); 829 830 /* Clear the input ring, and unblock. */ 831 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 832 sc->sc_rbavail = com_rbuf_size; 833 com_iflush(sc); 834 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 835 com_hwiflow(sc); 836 837 #ifdef COM_DEBUG 838 if (com_debug) 839 comstatus(sc, "comopen "); 840 #endif 841 842 mutex_spin_exit(&sc->sc_lock); 843 } 844 845 splx(s); 846 847 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 848 if (error) 849 goto bad; 850 851 error = (*tp->t_linesw->l_open)(dev, tp); 852 if (error) 853 goto bad; 854 855 return (0); 856 857 bad: 858 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 859 /* 860 * We failed to open the device, and nobody else had it opened. 861 * Clean up the state as appropriate. 862 */ 863 com_shutdown(sc); 864 } 865 866 return (error); 867 } 868 869 int 870 comclose(dev_t dev, int flag, int mode, struct lwp *l) 871 { 872 struct com_softc *sc = 873 device_lookup_private(&com_cd, COMUNIT(dev)); 874 struct tty *tp = sc->sc_tty; 875 876 /* XXX This is for cons.c. */ 877 if (!ISSET(tp->t_state, TS_ISOPEN)) 878 return (0); 879 880 (*tp->t_linesw->l_close)(tp, flag); 881 ttyclose(tp); 882 883 if (COM_ISALIVE(sc) == 0) 884 return (0); 885 886 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 887 /* 888 * Although we got a last close, the device may still be in 889 * use; e.g. if this was the dialout node, and there are still 890 * processes waiting for carrier on the non-dialout node. 891 */ 892 com_shutdown(sc); 893 } 894 895 return (0); 896 } 897 898 int 899 comread(dev_t dev, struct uio *uio, int flag) 900 { 901 struct com_softc *sc = 902 device_lookup_private(&com_cd, COMUNIT(dev)); 903 struct tty *tp = sc->sc_tty; 904 905 if (COM_ISALIVE(sc) == 0) 906 return (EIO); 907 908 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 909 } 910 911 int 912 comwrite(dev_t dev, struct uio *uio, int flag) 913 { 914 struct com_softc *sc = 915 device_lookup_private(&com_cd, COMUNIT(dev)); 916 struct tty *tp = sc->sc_tty; 917 918 if (COM_ISALIVE(sc) == 0) 919 return (EIO); 920 921 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 922 } 923 924 int 925 compoll(dev_t dev, int events, struct lwp *l) 926 { 927 struct com_softc *sc = 928 device_lookup_private(&com_cd, COMUNIT(dev)); 929 struct tty *tp = sc->sc_tty; 930 931 if (COM_ISALIVE(sc) == 0) 932 return (POLLHUP); 933 934 return ((*tp->t_linesw->l_poll)(tp, events, l)); 935 } 936 937 struct tty * 938 comtty(dev_t dev) 939 { 940 struct com_softc *sc = 941 device_lookup_private(&com_cd, COMUNIT(dev)); 942 struct tty *tp = sc->sc_tty; 943 944 return (tp); 945 } 946 947 int 948 comioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l) 949 { 950 struct com_softc *sc; 951 struct tty *tp; 952 int error; 953 954 sc = device_lookup_private(&com_cd, COMUNIT(dev)); 955 if (sc == NULL) 956 return ENXIO; 957 if (COM_ISALIVE(sc) == 0) 958 return (EIO); 959 960 tp = sc->sc_tty; 961 962 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 963 if (error != EPASSTHROUGH) 964 return (error); 965 966 error = ttioctl(tp, cmd, data, flag, l); 967 if (error != EPASSTHROUGH) 968 return (error); 969 970 error = 0; 971 switch (cmd) { 972 case TIOCSFLAGS: 973 error = kauth_authorize_device_tty(l->l_cred, 974 KAUTH_DEVICE_TTY_PRIVSET, tp); 975 break; 976 default: 977 /* nothing */ 978 break; 979 } 980 if (error) { 981 return error; 982 } 983 984 mutex_spin_enter(&sc->sc_lock); 985 986 switch (cmd) { 987 case TIOCSBRK: 988 com_break(sc, 1); 989 break; 990 991 case TIOCCBRK: 992 com_break(sc, 0); 993 break; 994 995 case TIOCSDTR: 996 com_modem(sc, 1); 997 break; 998 999 case TIOCCDTR: 1000 com_modem(sc, 0); 1001 break; 1002 1003 case TIOCGFLAGS: 1004 *(int *)data = sc->sc_swflags; 1005 break; 1006 1007 case TIOCSFLAGS: 1008 sc->sc_swflags = *(int *)data; 1009 break; 1010 1011 case TIOCMSET: 1012 case TIOCMBIS: 1013 case TIOCMBIC: 1014 tiocm_to_com(sc, cmd, *(int *)data); 1015 break; 1016 1017 case TIOCMGET: 1018 *(int *)data = com_to_tiocm(sc); 1019 break; 1020 1021 case PPS_IOC_CREATE: 1022 case PPS_IOC_DESTROY: 1023 case PPS_IOC_GETPARAMS: 1024 case PPS_IOC_SETPARAMS: 1025 case PPS_IOC_GETCAP: 1026 case PPS_IOC_FETCH: 1027 #ifdef PPS_SYNC 1028 case PPS_IOC_KCBIND: 1029 #endif 1030 mutex_spin_enter(&timecounter_lock); 1031 error = pps_ioctl(cmd, data, &sc->sc_pps_state); 1032 mutex_spin_exit(&timecounter_lock); 1033 break; 1034 1035 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1036 mutex_spin_enter(&timecounter_lock); 1037 #ifndef PPS_TRAILING_EDGE 1038 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1039 &sc->sc_pps_state.ppsinfo.assert_timestamp); 1040 #else 1041 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1042 &sc->sc_pps_state.ppsinfo.clear_timestamp); 1043 #endif 1044 mutex_spin_exit(&timecounter_lock); 1045 break; 1046 1047 default: 1048 error = EPASSTHROUGH; 1049 break; 1050 } 1051 1052 mutex_spin_exit(&sc->sc_lock); 1053 1054 #ifdef COM_DEBUG 1055 if (com_debug) 1056 comstatus(sc, "comioctl "); 1057 #endif 1058 1059 return (error); 1060 } 1061 1062 integrate void 1063 com_schedrx(struct com_softc *sc) 1064 { 1065 1066 sc->sc_rx_ready = 1; 1067 1068 /* Wake up the poller. */ 1069 softint_schedule(sc->sc_si); 1070 } 1071 1072 void 1073 com_break(struct com_softc *sc, int onoff) 1074 { 1075 1076 if (onoff) 1077 SET(sc->sc_lcr, LCR_SBREAK); 1078 else 1079 CLR(sc->sc_lcr, LCR_SBREAK); 1080 1081 if (!sc->sc_heldchange) { 1082 if (sc->sc_tx_busy) { 1083 sc->sc_heldtbc = sc->sc_tbc; 1084 sc->sc_tbc = 0; 1085 sc->sc_heldchange = 1; 1086 } else 1087 com_loadchannelregs(sc); 1088 } 1089 } 1090 1091 void 1092 com_modem(struct com_softc *sc, int onoff) 1093 { 1094 1095 if (sc->sc_mcr_dtr == 0) 1096 return; 1097 1098 if (onoff) 1099 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1100 else 1101 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1102 1103 if (!sc->sc_heldchange) { 1104 if (sc->sc_tx_busy) { 1105 sc->sc_heldtbc = sc->sc_tbc; 1106 sc->sc_tbc = 0; 1107 sc->sc_heldchange = 1; 1108 } else 1109 com_loadchannelregs(sc); 1110 } 1111 } 1112 1113 void 1114 tiocm_to_com(struct com_softc *sc, u_long how, int ttybits) 1115 { 1116 u_char combits; 1117 1118 combits = 0; 1119 if (ISSET(ttybits, TIOCM_DTR)) 1120 SET(combits, MCR_DTR); 1121 if (ISSET(ttybits, TIOCM_RTS)) 1122 SET(combits, MCR_RTS); 1123 1124 switch (how) { 1125 case TIOCMBIC: 1126 CLR(sc->sc_mcr, combits); 1127 break; 1128 1129 case TIOCMBIS: 1130 SET(sc->sc_mcr, combits); 1131 break; 1132 1133 case TIOCMSET: 1134 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1135 SET(sc->sc_mcr, combits); 1136 break; 1137 } 1138 1139 if (!sc->sc_heldchange) { 1140 if (sc->sc_tx_busy) { 1141 sc->sc_heldtbc = sc->sc_tbc; 1142 sc->sc_tbc = 0; 1143 sc->sc_heldchange = 1; 1144 } else 1145 com_loadchannelregs(sc); 1146 } 1147 } 1148 1149 int 1150 com_to_tiocm(struct com_softc *sc) 1151 { 1152 u_char combits; 1153 int ttybits = 0; 1154 1155 combits = sc->sc_mcr; 1156 if (ISSET(combits, MCR_DTR)) 1157 SET(ttybits, TIOCM_DTR); 1158 if (ISSET(combits, MCR_RTS)) 1159 SET(ttybits, TIOCM_RTS); 1160 1161 combits = sc->sc_msr; 1162 if (ISSET(combits, MSR_DCD)) 1163 SET(ttybits, TIOCM_CD); 1164 if (ISSET(combits, MSR_CTS)) 1165 SET(ttybits, TIOCM_CTS); 1166 if (ISSET(combits, MSR_DSR)) 1167 SET(ttybits, TIOCM_DSR); 1168 if (ISSET(combits, MSR_RI | MSR_TERI)) 1169 SET(ttybits, TIOCM_RI); 1170 1171 if (ISSET(sc->sc_ier, IER_ERXRDY | IER_ETXRDY | IER_ERLS | IER_EMSC)) 1172 SET(ttybits, TIOCM_LE); 1173 1174 return (ttybits); 1175 } 1176 1177 static u_char 1178 cflag2lcr(tcflag_t cflag) 1179 { 1180 u_char lcr = 0; 1181 1182 switch (ISSET(cflag, CSIZE)) { 1183 case CS5: 1184 SET(lcr, LCR_5BITS); 1185 break; 1186 case CS6: 1187 SET(lcr, LCR_6BITS); 1188 break; 1189 case CS7: 1190 SET(lcr, LCR_7BITS); 1191 break; 1192 case CS8: 1193 SET(lcr, LCR_8BITS); 1194 break; 1195 } 1196 if (ISSET(cflag, PARENB)) { 1197 SET(lcr, LCR_PENAB); 1198 if (!ISSET(cflag, PARODD)) 1199 SET(lcr, LCR_PEVEN); 1200 } 1201 if (ISSET(cflag, CSTOPB)) 1202 SET(lcr, LCR_STOPB); 1203 1204 return (lcr); 1205 } 1206 1207 int 1208 comparam(struct tty *tp, struct termios *t) 1209 { 1210 struct com_softc *sc = 1211 device_lookup_private(&com_cd, COMUNIT(tp->t_dev)); 1212 int ospeed; 1213 u_char lcr; 1214 1215 if (COM_ISALIVE(sc) == 0) 1216 return (EIO); 1217 1218 #ifdef COM_HAYESP 1219 if (sc->sc_type == COM_TYPE_HAYESP) { 1220 int prescaler, speed; 1221 1222 /* 1223 * Calculate UART clock prescaler. It should be in 1224 * range of 0 .. 3. 1225 */ 1226 for (prescaler = 0, speed = t->c_ospeed; prescaler < 4; 1227 prescaler++, speed /= 2) 1228 if ((ospeed = comspeed(speed, sc->sc_frequency, 1229 sc->sc_type)) > 0) 1230 break; 1231 1232 if (prescaler == 4) 1233 return (EINVAL); 1234 sc->sc_prescaler = prescaler; 1235 } else 1236 #endif 1237 ospeed = comspeed(t->c_ospeed, sc->sc_frequency, sc->sc_type); 1238 1239 /* Check requested parameters. */ 1240 if (ospeed < 0) 1241 return (EINVAL); 1242 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1243 return (EINVAL); 1244 1245 /* 1246 * For the console, always force CLOCAL and !HUPCL, so that the port 1247 * is always active. 1248 */ 1249 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1250 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1251 SET(t->c_cflag, CLOCAL); 1252 CLR(t->c_cflag, HUPCL); 1253 } 1254 1255 /* 1256 * If there were no changes, don't do anything. This avoids dropping 1257 * input and improves performance when all we did was frob things like 1258 * VMIN and VTIME. 1259 */ 1260 if (tp->t_ospeed == t->c_ospeed && 1261 tp->t_cflag == t->c_cflag) 1262 return (0); 1263 1264 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1265 1266 mutex_spin_enter(&sc->sc_lock); 1267 1268 sc->sc_lcr = lcr; 1269 1270 /* 1271 * If we're not in a mode that assumes a connection is present, then 1272 * ignore carrier changes. 1273 */ 1274 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1275 sc->sc_msr_dcd = 0; 1276 else 1277 sc->sc_msr_dcd = MSR_DCD; 1278 /* 1279 * Set the flow control pins depending on the current flow control 1280 * mode. 1281 */ 1282 if (ISSET(t->c_cflag, CRTSCTS)) { 1283 sc->sc_mcr_dtr = MCR_DTR; 1284 sc->sc_mcr_rts = MCR_RTS; 1285 sc->sc_msr_cts = MSR_CTS; 1286 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1287 } else if (ISSET(t->c_cflag, MDMBUF)) { 1288 /* 1289 * For DTR/DCD flow control, make sure we don't toggle DTR for 1290 * carrier detection. 1291 */ 1292 sc->sc_mcr_dtr = 0; 1293 sc->sc_mcr_rts = MCR_DTR; 1294 sc->sc_msr_cts = MSR_DCD; 1295 sc->sc_efr = 0; 1296 } else { 1297 /* 1298 * If no flow control, then always set RTS. This will make 1299 * the other side happy if it mistakenly thinks we're doing 1300 * RTS/CTS flow control. 1301 */ 1302 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1303 sc->sc_mcr_rts = 0; 1304 sc->sc_msr_cts = 0; 1305 sc->sc_efr = 0; 1306 if (ISSET(sc->sc_mcr, MCR_DTR)) 1307 SET(sc->sc_mcr, MCR_RTS); 1308 else 1309 CLR(sc->sc_mcr, MCR_RTS); 1310 } 1311 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1312 1313 #if 0 1314 if (ospeed == 0) 1315 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1316 else 1317 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1318 #endif 1319 1320 sc->sc_dlbl = ospeed; 1321 sc->sc_dlbh = ospeed >> 8; 1322 1323 /* 1324 * Set the FIFO threshold based on the receive speed. 1325 * 1326 * * If it's a low speed, it's probably a mouse or some other 1327 * interactive device, so set the threshold low. 1328 * * If it's a high speed, trim the trigger level down to prevent 1329 * overflows. 1330 * * Otherwise set it a bit higher. 1331 */ 1332 if (sc->sc_type == COM_TYPE_HAYESP) 1333 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1334 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) { 1335 if (t->c_ospeed <= 1200) 1336 sc->sc_fifo = FIFO_ENABLE | FIFO_TRIGGER_1; 1337 else if (t->c_ospeed <= 38400) 1338 sc->sc_fifo = FIFO_ENABLE | FIFO_TRIGGER_8; 1339 else 1340 sc->sc_fifo = FIFO_ENABLE | FIFO_TRIGGER_4; 1341 } else 1342 sc->sc_fifo = 0; 1343 1344 /* And copy to tty. */ 1345 tp->t_ispeed = t->c_ospeed; 1346 tp->t_ospeed = t->c_ospeed; 1347 tp->t_cflag = t->c_cflag; 1348 1349 if (!sc->sc_heldchange) { 1350 if (sc->sc_tx_busy) { 1351 sc->sc_heldtbc = sc->sc_tbc; 1352 sc->sc_tbc = 0; 1353 sc->sc_heldchange = 1; 1354 } else 1355 com_loadchannelregs(sc); 1356 } 1357 1358 if (!ISSET(t->c_cflag, CHWFLOW)) { 1359 /* Disable the high water mark. */ 1360 sc->sc_r_hiwat = 0; 1361 sc->sc_r_lowat = 0; 1362 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1363 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1364 com_schedrx(sc); 1365 } 1366 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1367 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1368 com_hwiflow(sc); 1369 } 1370 } else { 1371 sc->sc_r_hiwat = com_rbuf_hiwat; 1372 sc->sc_r_lowat = com_rbuf_lowat; 1373 } 1374 1375 mutex_spin_exit(&sc->sc_lock); 1376 1377 /* 1378 * Update the tty layer's idea of the carrier bit, in case we changed 1379 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1380 * explicit request. 1381 */ 1382 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1383 1384 #ifdef COM_DEBUG 1385 if (com_debug) 1386 comstatus(sc, "comparam "); 1387 #endif 1388 1389 if (!ISSET(t->c_cflag, CHWFLOW)) { 1390 if (sc->sc_tx_stopped) { 1391 sc->sc_tx_stopped = 0; 1392 comstart(tp); 1393 } 1394 } 1395 1396 return (0); 1397 } 1398 1399 void 1400 com_iflush(struct com_softc *sc) 1401 { 1402 struct com_regs *regsp = &sc->sc_regs; 1403 #ifdef DIAGNOSTIC 1404 int reg; 1405 #endif 1406 int timo; 1407 1408 #ifdef DIAGNOSTIC 1409 reg = 0xffff; 1410 #endif 1411 timo = 50000; 1412 /* flush any pending I/O */ 1413 while (ISSET(CSR_READ_1(regsp, COM_REG_LSR), LSR_RXRDY) 1414 && --timo) 1415 #ifdef DIAGNOSTIC 1416 reg = 1417 #else 1418 (void) 1419 #endif 1420 CSR_READ_1(regsp, COM_REG_RXDATA); 1421 #ifdef DIAGNOSTIC 1422 if (!timo) 1423 aprint_error_dev(sc->sc_dev, "com_iflush timeout %02x\n", reg); 1424 #endif 1425 } 1426 1427 void 1428 com_loadchannelregs(struct com_softc *sc) 1429 { 1430 struct com_regs *regsp = &sc->sc_regs; 1431 1432 /* XXXXX necessary? */ 1433 com_iflush(sc); 1434 1435 if (sc->sc_type == COM_TYPE_PXA2x0) 1436 CSR_WRITE_1(regsp, COM_REG_IER, IER_EUART); 1437 else 1438 CSR_WRITE_1(regsp, COM_REG_IER, 0); 1439 1440 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1441 if (sc->sc_type != COM_TYPE_AU1x00) { /* no EFR on alchemy */ 1442 CSR_WRITE_1(regsp, COM_REG_EFR, sc->sc_efr); 1443 CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS); 1444 } 1445 } 1446 if (sc->sc_type == COM_TYPE_AU1x00) { 1447 /* alchemy has single separate 16-bit clock divisor register */ 1448 CSR_WRITE_2(regsp, COM_REG_DLBL, sc->sc_dlbl + 1449 (sc->sc_dlbh << 8)); 1450 } else { 1451 CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr | LCR_DLAB); 1452 CSR_WRITE_1(regsp, COM_REG_DLBL, sc->sc_dlbl); 1453 CSR_WRITE_1(regsp, COM_REG_DLBH, sc->sc_dlbh); 1454 } 1455 CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr); 1456 CSR_WRITE_1(regsp, COM_REG_MCR, sc->sc_mcr_active = sc->sc_mcr); 1457 CSR_WRITE_1(regsp, COM_REG_FIFO, sc->sc_fifo); 1458 #ifdef COM_HAYESP 1459 if (sc->sc_type == COM_TYPE_HAYESP) { 1460 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1, 1461 HAYESP_SETPRESCALER); 1462 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 1463 sc->sc_prescaler); 1464 } 1465 #endif 1466 1467 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 1468 } 1469 1470 int 1471 comhwiflow(struct tty *tp, int block) 1472 { 1473 struct com_softc *sc = 1474 device_lookup_private(&com_cd, COMUNIT(tp->t_dev)); 1475 1476 if (COM_ISALIVE(sc) == 0) 1477 return (0); 1478 1479 if (sc->sc_mcr_rts == 0) 1480 return (0); 1481 1482 mutex_spin_enter(&sc->sc_lock); 1483 1484 if (block) { 1485 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1486 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1487 com_hwiflow(sc); 1488 } 1489 } else { 1490 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1491 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1492 com_schedrx(sc); 1493 } 1494 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1495 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1496 com_hwiflow(sc); 1497 } 1498 } 1499 1500 mutex_spin_exit(&sc->sc_lock); 1501 return (1); 1502 } 1503 1504 /* 1505 * (un)block input via hw flowcontrol 1506 */ 1507 void 1508 com_hwiflow(struct com_softc *sc) 1509 { 1510 struct com_regs *regsp= &sc->sc_regs; 1511 1512 if (sc->sc_mcr_rts == 0) 1513 return; 1514 1515 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1516 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1517 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1518 } else { 1519 SET(sc->sc_mcr, sc->sc_mcr_rts); 1520 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1521 } 1522 CSR_WRITE_1(regsp, COM_REG_MCR, sc->sc_mcr_active); 1523 } 1524 1525 1526 void 1527 comstart(struct tty *tp) 1528 { 1529 struct com_softc *sc = 1530 device_lookup_private(&com_cd, COMUNIT(tp->t_dev)); 1531 struct com_regs *regsp = &sc->sc_regs; 1532 int s; 1533 1534 if (COM_ISALIVE(sc) == 0) 1535 return; 1536 1537 s = spltty(); 1538 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1539 goto out; 1540 if (sc->sc_tx_stopped) 1541 goto out; 1542 if (!ttypull(tp)) 1543 goto out; 1544 1545 /* Grab the first contiguous region of buffer space. */ 1546 { 1547 u_char *tba; 1548 int tbc; 1549 1550 tba = tp->t_outq.c_cf; 1551 tbc = ndqb(&tp->t_outq, 0); 1552 1553 mutex_spin_enter(&sc->sc_lock); 1554 1555 sc->sc_tba = tba; 1556 sc->sc_tbc = tbc; 1557 } 1558 1559 SET(tp->t_state, TS_BUSY); 1560 sc->sc_tx_busy = 1; 1561 1562 /* Enable transmit completion interrupts if necessary. */ 1563 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1564 SET(sc->sc_ier, IER_ETXRDY); 1565 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 1566 } 1567 1568 /* Output the first chunk of the contiguous buffer. */ 1569 if (!ISSET(sc->sc_hwflags, COM_HW_NO_TXPRELOAD)) { 1570 u_int n; 1571 1572 n = sc->sc_tbc; 1573 if (n > sc->sc_fifolen) 1574 n = sc->sc_fifolen; 1575 CSR_WRITE_MULTI(regsp, COM_REG_TXDATA, sc->sc_tba, n); 1576 sc->sc_tbc -= n; 1577 sc->sc_tba += n; 1578 } 1579 1580 mutex_spin_exit(&sc->sc_lock); 1581 out: 1582 splx(s); 1583 return; 1584 } 1585 1586 /* 1587 * Stop output on a line. 1588 */ 1589 void 1590 comstop(struct tty *tp, int flag) 1591 { 1592 struct com_softc *sc = 1593 device_lookup_private(&com_cd, COMUNIT(tp->t_dev)); 1594 1595 mutex_spin_enter(&sc->sc_lock); 1596 if (ISSET(tp->t_state, TS_BUSY)) { 1597 /* Stop transmitting at the next chunk. */ 1598 sc->sc_tbc = 0; 1599 sc->sc_heldtbc = 0; 1600 if (!ISSET(tp->t_state, TS_TTSTOP)) 1601 SET(tp->t_state, TS_FLUSH); 1602 } 1603 mutex_spin_exit(&sc->sc_lock); 1604 } 1605 1606 void 1607 comdiag(void *arg) 1608 { 1609 struct com_softc *sc = arg; 1610 int overflows, floods; 1611 1612 mutex_spin_enter(&sc->sc_lock); 1613 overflows = sc->sc_overflows; 1614 sc->sc_overflows = 0; 1615 floods = sc->sc_floods; 1616 sc->sc_floods = 0; 1617 sc->sc_errors = 0; 1618 mutex_spin_exit(&sc->sc_lock); 1619 1620 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1621 device_xname(sc->sc_dev), 1622 overflows, overflows == 1 ? "" : "s", 1623 floods, floods == 1 ? "" : "s"); 1624 } 1625 1626 integrate void 1627 com_rxsoft(struct com_softc *sc, struct tty *tp) 1628 { 1629 int (*rint)(int, struct tty *) = tp->t_linesw->l_rint; 1630 u_char *get, *end; 1631 u_int cc, scc; 1632 u_char lsr; 1633 int code; 1634 1635 end = sc->sc_ebuf; 1636 get = sc->sc_rbget; 1637 scc = cc = com_rbuf_size - sc->sc_rbavail; 1638 1639 if (cc == com_rbuf_size) { 1640 sc->sc_floods++; 1641 if (sc->sc_errors++ == 0) 1642 callout_reset(&sc->sc_diag_callout, 60 * hz, 1643 comdiag, sc); 1644 } 1645 1646 /* If not yet open, drop the entire buffer content here */ 1647 if (!ISSET(tp->t_state, TS_ISOPEN)) { 1648 get += cc << 1; 1649 if (get >= end) 1650 get -= com_rbuf_size << 1; 1651 cc = 0; 1652 } 1653 while (cc) { 1654 code = get[0]; 1655 lsr = get[1]; 1656 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1657 if (ISSET(lsr, LSR_OE)) { 1658 sc->sc_overflows++; 1659 if (sc->sc_errors++ == 0) 1660 callout_reset(&sc->sc_diag_callout, 1661 60 * hz, comdiag, sc); 1662 } 1663 if (ISSET(lsr, LSR_BI | LSR_FE)) 1664 SET(code, TTY_FE); 1665 if (ISSET(lsr, LSR_PE)) 1666 SET(code, TTY_PE); 1667 } 1668 if ((*rint)(code, tp) == -1) { 1669 /* 1670 * The line discipline's buffer is out of space. 1671 */ 1672 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1673 /* 1674 * We're either not using flow control, or the 1675 * line discipline didn't tell us to block for 1676 * some reason. Either way, we have no way to 1677 * know when there's more space available, so 1678 * just drop the rest of the data. 1679 */ 1680 get += cc << 1; 1681 if (get >= end) 1682 get -= com_rbuf_size << 1; 1683 cc = 0; 1684 } else { 1685 /* 1686 * Don't schedule any more receive processing 1687 * until the line discipline tells us there's 1688 * space available (through comhwiflow()). 1689 * Leave the rest of the data in the input 1690 * buffer. 1691 */ 1692 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1693 } 1694 break; 1695 } 1696 get += 2; 1697 if (get >= end) 1698 get = sc->sc_rbuf; 1699 cc--; 1700 } 1701 1702 if (cc != scc) { 1703 sc->sc_rbget = get; 1704 mutex_spin_enter(&sc->sc_lock); 1705 1706 cc = sc->sc_rbavail += scc - cc; 1707 /* Buffers should be ok again, release possible block. */ 1708 if (cc >= sc->sc_r_lowat) { 1709 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1710 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1711 SET(sc->sc_ier, IER_ERXRDY); 1712 #ifdef COM_PXA2X0 1713 if (sc->sc_type == COM_TYPE_PXA2x0) 1714 SET(sc->sc_ier, IER_ERXTOUT); 1715 #endif 1716 CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier); 1717 } 1718 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1719 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1720 com_hwiflow(sc); 1721 } 1722 } 1723 mutex_spin_exit(&sc->sc_lock); 1724 } 1725 } 1726 1727 integrate void 1728 com_txsoft(struct com_softc *sc, struct tty *tp) 1729 { 1730 1731 CLR(tp->t_state, TS_BUSY); 1732 if (ISSET(tp->t_state, TS_FLUSH)) 1733 CLR(tp->t_state, TS_FLUSH); 1734 else 1735 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1736 (*tp->t_linesw->l_start)(tp); 1737 } 1738 1739 integrate void 1740 com_stsoft(struct com_softc *sc, struct tty *tp) 1741 { 1742 u_char msr, delta; 1743 1744 mutex_spin_enter(&sc->sc_lock); 1745 msr = sc->sc_msr; 1746 delta = sc->sc_msr_delta; 1747 sc->sc_msr_delta = 0; 1748 mutex_spin_exit(&sc->sc_lock); 1749 1750 if (ISSET(delta, sc->sc_msr_dcd)) { 1751 /* 1752 * Inform the tty layer that carrier detect changed. 1753 */ 1754 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1755 } 1756 1757 if (ISSET(delta, sc->sc_msr_cts)) { 1758 /* Block or unblock output according to flow control. */ 1759 if (ISSET(msr, sc->sc_msr_cts)) { 1760 sc->sc_tx_stopped = 0; 1761 (*tp->t_linesw->l_start)(tp); 1762 } else { 1763 sc->sc_tx_stopped = 1; 1764 } 1765 } 1766 1767 #ifdef COM_DEBUG 1768 if (com_debug) 1769 comstatus(sc, "com_stsoft"); 1770 #endif 1771 } 1772 1773 void 1774 comsoft(void *arg) 1775 { 1776 struct com_softc *sc = arg; 1777 struct tty *tp; 1778 1779 if (COM_ISALIVE(sc) == 0) 1780 return; 1781 1782 tp = sc->sc_tty; 1783 1784 if (sc->sc_rx_ready) { 1785 sc->sc_rx_ready = 0; 1786 com_rxsoft(sc, tp); 1787 } 1788 1789 if (sc->sc_st_check) { 1790 sc->sc_st_check = 0; 1791 com_stsoft(sc, tp); 1792 } 1793 1794 if (sc->sc_tx_done) { 1795 sc->sc_tx_done = 0; 1796 com_txsoft(sc, tp); 1797 } 1798 } 1799 1800 int 1801 comintr(void *arg) 1802 { 1803 struct com_softc *sc = arg; 1804 struct com_regs *regsp = &sc->sc_regs; 1805 1806 u_char *put, *end; 1807 u_int cc; 1808 u_char lsr, iir; 1809 1810 if (COM_ISALIVE(sc) == 0) 1811 return (0); 1812 1813 mutex_spin_enter(&sc->sc_lock); 1814 iir = CSR_READ_1(regsp, COM_REG_IIR); 1815 if (ISSET(iir, IIR_NOPEND)) { 1816 mutex_spin_exit(&sc->sc_lock); 1817 return (0); 1818 } 1819 1820 end = sc->sc_ebuf; 1821 put = sc->sc_rbput; 1822 cc = sc->sc_rbavail; 1823 1824 again: do { 1825 u_char msr, delta; 1826 1827 lsr = CSR_READ_1(regsp, COM_REG_LSR); 1828 if (ISSET(lsr, LSR_BI)) { 1829 int cn_trapped = 0; 1830 1831 cn_check_magic(sc->sc_tty->t_dev, 1832 CNC_BREAK, com_cnm_state); 1833 if (cn_trapped) 1834 continue; 1835 #if defined(KGDB) && !defined(DDB) 1836 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 1837 kgdb_connect(1); 1838 continue; 1839 } 1840 #endif 1841 } 1842 1843 if (ISSET(lsr, LSR_RCV_MASK) && 1844 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1845 while (cc > 0) { 1846 int cn_trapped = 0; 1847 put[0] = CSR_READ_1(regsp, COM_REG_RXDATA); 1848 put[1] = lsr; 1849 cn_check_magic(sc->sc_tty->t_dev, 1850 put[0], com_cnm_state); 1851 if (cn_trapped) 1852 goto next; 1853 put += 2; 1854 if (put >= end) 1855 put = sc->sc_rbuf; 1856 cc--; 1857 next: 1858 lsr = CSR_READ_1(regsp, COM_REG_LSR); 1859 if (!ISSET(lsr, LSR_RCV_MASK)) 1860 break; 1861 } 1862 1863 /* 1864 * Current string of incoming characters ended because 1865 * no more data was available or we ran out of space. 1866 * Schedule a receive event if any data was received. 1867 * If we're out of space, turn off receive interrupts. 1868 */ 1869 sc->sc_rbput = put; 1870 sc->sc_rbavail = cc; 1871 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1872 sc->sc_rx_ready = 1; 1873 1874 /* 1875 * See if we are in danger of overflowing a buffer. If 1876 * so, use hardware flow control to ease the pressure. 1877 */ 1878 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1879 cc < sc->sc_r_hiwat) { 1880 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1881 com_hwiflow(sc); 1882 } 1883 1884 /* 1885 * If we're out of space, disable receive interrupts 1886 * until the queue has drained a bit. 1887 */ 1888 if (!cc) { 1889 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1890 #ifdef COM_PXA2X0 1891 if (sc->sc_type == COM_TYPE_PXA2x0) 1892 CLR(sc->sc_ier, IER_ERXRDY|IER_ERXTOUT); 1893 else 1894 #endif 1895 CLR(sc->sc_ier, IER_ERXRDY); 1896 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 1897 } 1898 } else { 1899 if ((iir & (IIR_RXRDY|IIR_TXRDY)) == IIR_RXRDY) { 1900 (void) CSR_READ_1(regsp, COM_REG_RXDATA); 1901 continue; 1902 } 1903 } 1904 1905 msr = CSR_READ_1(regsp, COM_REG_MSR); 1906 delta = msr ^ sc->sc_msr; 1907 sc->sc_msr = msr; 1908 if ((sc->sc_pps_state.ppsparam.mode & PPS_CAPTUREBOTH) && 1909 (delta & MSR_DCD)) { 1910 mutex_spin_enter(&timecounter_lock); 1911 pps_capture(&sc->sc_pps_state); 1912 pps_event(&sc->sc_pps_state, 1913 (msr & MSR_DCD) ? 1914 PPS_CAPTUREASSERT : 1915 PPS_CAPTURECLEAR); 1916 mutex_spin_exit(&timecounter_lock); 1917 } 1918 1919 /* 1920 * Process normal status changes 1921 */ 1922 if (ISSET(delta, sc->sc_msr_mask)) { 1923 SET(sc->sc_msr_delta, delta); 1924 1925 /* 1926 * Stop output immediately if we lose the output 1927 * flow control signal or carrier detect. 1928 */ 1929 if (ISSET(~msr, sc->sc_msr_mask)) { 1930 sc->sc_tbc = 0; 1931 sc->sc_heldtbc = 0; 1932 #ifdef COM_DEBUG 1933 if (com_debug) 1934 comstatus(sc, "comintr "); 1935 #endif 1936 } 1937 1938 sc->sc_st_check = 1; 1939 } 1940 } while (!ISSET((iir = 1941 CSR_READ_1(regsp, COM_REG_IIR)), IIR_NOPEND) && 1942 /* 1943 * Since some device (e.g., ST16C1550) doesn't clear IIR_TXRDY 1944 * by IIR read, so we can't do this way: `process all interrupts, 1945 * then do TX if possble'. 1946 */ 1947 (iir & IIR_IMASK) != IIR_TXRDY); 1948 1949 /* 1950 * Read LSR again, since there may be an interrupt between 1951 * the last LSR read and IIR read above. 1952 */ 1953 lsr = CSR_READ_1(regsp, COM_REG_LSR); 1954 1955 /* 1956 * See if data can be transmitted as well. 1957 * Schedule tx done event if no data left 1958 * and tty was marked busy. 1959 */ 1960 if (ISSET(lsr, LSR_TXRDY)) { 1961 /* 1962 * If we've delayed a parameter change, do it now, and restart 1963 * output. 1964 */ 1965 if (sc->sc_heldchange) { 1966 com_loadchannelregs(sc); 1967 sc->sc_heldchange = 0; 1968 sc->sc_tbc = sc->sc_heldtbc; 1969 sc->sc_heldtbc = 0; 1970 } 1971 1972 /* Output the next chunk of the contiguous buffer, if any. */ 1973 if (sc->sc_tbc > 0) { 1974 u_int n; 1975 1976 n = sc->sc_tbc; 1977 if (n > sc->sc_fifolen) 1978 n = sc->sc_fifolen; 1979 CSR_WRITE_MULTI(regsp, COM_REG_TXDATA, sc->sc_tba, n); 1980 sc->sc_tbc -= n; 1981 sc->sc_tba += n; 1982 } else { 1983 /* Disable transmit completion interrupts if necessary. */ 1984 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 1985 CLR(sc->sc_ier, IER_ETXRDY); 1986 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 1987 } 1988 if (sc->sc_tx_busy) { 1989 sc->sc_tx_busy = 0; 1990 sc->sc_tx_done = 1; 1991 } 1992 } 1993 } 1994 1995 if (!ISSET((iir = CSR_READ_1(regsp, COM_REG_IIR)), IIR_NOPEND)) 1996 goto again; 1997 1998 mutex_spin_exit(&sc->sc_lock); 1999 2000 /* Wake up the poller. */ 2001 softint_schedule(sc->sc_si); 2002 2003 #if NRND > 0 && defined(RND_COM) 2004 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2005 #endif 2006 2007 return (1); 2008 } 2009 2010 /* 2011 * The following functions are polled getc and putc routines, shared 2012 * by the console and kgdb glue. 2013 * 2014 * The read-ahead code is so that you can detect pending in-band 2015 * cn_magic in polled mode while doing output rather than having to 2016 * wait until the kernel decides it needs input. 2017 */ 2018 2019 #define MAX_READAHEAD 20 2020 static int com_readahead[MAX_READAHEAD]; 2021 static int com_readaheadcount = 0; 2022 2023 int 2024 com_common_getc(dev_t dev, struct com_regs *regsp) 2025 { 2026 int s = splserial(); 2027 u_char stat, c; 2028 2029 /* got a character from reading things earlier */ 2030 if (com_readaheadcount > 0) { 2031 int i; 2032 2033 c = com_readahead[0]; 2034 for (i = 1; i < com_readaheadcount; i++) { 2035 com_readahead[i-1] = com_readahead[i]; 2036 } 2037 com_readaheadcount--; 2038 splx(s); 2039 return (c); 2040 } 2041 2042 /* block until a character becomes available */ 2043 while (!ISSET(stat = CSR_READ_1(regsp, COM_REG_LSR), LSR_RXRDY)) 2044 ; 2045 2046 c = CSR_READ_1(regsp, COM_REG_RXDATA); 2047 stat = CSR_READ_1(regsp, COM_REG_IIR); 2048 { 2049 int cn_trapped = 0; /* unused */ 2050 #ifdef DDB 2051 extern int db_active; 2052 if (!db_active) 2053 #endif 2054 cn_check_magic(dev, c, com_cnm_state); 2055 } 2056 splx(s); 2057 return (c); 2058 } 2059 2060 void 2061 com_common_putc(dev_t dev, struct com_regs *regsp, int c) 2062 { 2063 int s = splserial(); 2064 int cin, stat, timo; 2065 2066 if (com_readaheadcount < MAX_READAHEAD 2067 && ISSET(stat = CSR_READ_1(regsp, COM_REG_LSR), LSR_RXRDY)) { 2068 int cn_trapped = 0; 2069 cin = CSR_READ_1(regsp, COM_REG_RXDATA); 2070 stat = CSR_READ_1(regsp, COM_REG_IIR); 2071 cn_check_magic(dev, cin, com_cnm_state); 2072 com_readahead[com_readaheadcount++] = cin; 2073 } 2074 2075 /* wait for any pending transmission to finish */ 2076 timo = 150000; 2077 while (!ISSET(CSR_READ_1(regsp, COM_REG_LSR), LSR_TXRDY) && --timo) 2078 continue; 2079 2080 CSR_WRITE_1(regsp, COM_REG_TXDATA, c); 2081 COM_BARRIER(regsp, BR | BW); 2082 2083 splx(s); 2084 } 2085 2086 /* 2087 * Initialize UART for use as console or KGDB line. 2088 */ 2089 int 2090 cominit(struct com_regs *regsp, int rate, int frequency, int type, 2091 tcflag_t cflag) 2092 { 2093 2094 if (bus_space_map(regsp->cr_iot, regsp->cr_iobase, regsp->cr_nports, 0, 2095 ®sp->cr_ioh)) 2096 return (ENOMEM); /* ??? */ 2097 2098 rate = comspeed(rate, frequency, type); 2099 if (type != COM_TYPE_AU1x00) { 2100 /* no EFR on alchemy */ 2101 CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS); 2102 CSR_WRITE_1(regsp, COM_REG_EFR, 0); 2103 CSR_WRITE_1(regsp, COM_REG_LCR, LCR_DLAB); 2104 CSR_WRITE_1(regsp, COM_REG_DLBL, rate & 0xff); 2105 CSR_WRITE_1(regsp, COM_REG_DLBH, rate >> 8); 2106 } else { 2107 CSR_WRITE_1(regsp, COM_REG_DLBL, rate); 2108 } 2109 CSR_WRITE_1(regsp, COM_REG_LCR, cflag2lcr(cflag)); 2110 CSR_WRITE_1(regsp, COM_REG_MCR, MCR_DTR | MCR_RTS); 2111 CSR_WRITE_1(regsp, COM_REG_FIFO, 2112 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2113 #ifdef COM_PXA2X0 2114 if (type == COM_TYPE_PXA2x0) 2115 CSR_WRITE_1(regsp, COM_REG_IER, IER_EUART); 2116 else 2117 #endif 2118 CSR_WRITE_1(regsp, COM_REG_IER, 0); 2119 2120 return (0); 2121 } 2122 2123 /* 2124 * Following are all routines needed for COM to act as console 2125 */ 2126 struct consdev comcons = { 2127 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, NULL, NULL, 2128 NODEV, CN_NORMAL 2129 }; 2130 2131 2132 int 2133 comcnattach1(struct com_regs *regsp, int rate, int frequency, int type, 2134 tcflag_t cflag) 2135 { 2136 int res; 2137 2138 comconsregs = *regsp; 2139 2140 res = cominit(&comconsregs, rate, frequency, type, cflag); 2141 if (res) 2142 return (res); 2143 2144 cn_tab = &comcons; 2145 cn_init_magic(&com_cnm_state); 2146 cn_set_magic("\047\001"); /* default magic is BREAK */ 2147 2148 comconsrate = rate; 2149 comconscflag = cflag; 2150 2151 return (0); 2152 } 2153 2154 int 2155 comcnattach(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2156 int type, tcflag_t cflag) 2157 { 2158 struct com_regs regs; 2159 2160 memset(®s, 0, sizeof regs); 2161 regs.cr_iot = iot; 2162 regs.cr_iobase = iobase; 2163 regs.cr_nports = COM_NPORTS; 2164 #ifdef COM_REGMAP 2165 memcpy(regs.cr_map, com_std_map, sizeof (regs.cr_map)); 2166 #endif 2167 2168 return comcnattach1(®s, rate, frequency, type, cflag); 2169 } 2170 2171 int 2172 comcngetc(dev_t dev) 2173 { 2174 2175 return (com_common_getc(dev, &comconsregs)); 2176 } 2177 2178 /* 2179 * Console kernel output character routine. 2180 */ 2181 void 2182 comcnputc(dev_t dev, int c) 2183 { 2184 2185 com_common_putc(dev, &comconsregs, c); 2186 } 2187 2188 void 2189 comcnpollc(dev_t dev, int on) 2190 { 2191 2192 } 2193 2194 #ifdef KGDB 2195 int 2196 com_kgdb_attach1(struct com_regs *regsp, int rate, int frequency, int type, 2197 tcflag_t cflag) 2198 { 2199 int res; 2200 2201 if (regsp->cr_iot == comconsregs.cr_iot && 2202 regsp->cr_iobase == comconsregs.cr_iobase) { 2203 #if !defined(DDB) 2204 return (EBUSY); /* cannot share with console */ 2205 #else 2206 comkgdbregs = *regsp; 2207 comkgdbregs.cr_ioh = comconsregs.cr_ioh; 2208 #endif 2209 } else { 2210 comkgdbregs = *regsp; 2211 res = cominit(&comkgdbregs, rate, frequency, type, cflag); 2212 if (res) 2213 return (res); 2214 2215 /* 2216 * XXXfvdl this shouldn't be needed, but the cn_magic goo 2217 * expects this to be initialized 2218 */ 2219 cn_init_magic(&com_cnm_state); 2220 cn_set_magic("\047\001"); 2221 } 2222 2223 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2224 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2225 2226 return (0); 2227 } 2228 2229 int 2230 com_kgdb_attach(bus_space_tag_t iot, bus_addr_t iobase, int rate, 2231 int frequency, int type, tcflag_t cflag) 2232 { 2233 struct com_regs regs; 2234 2235 regs.cr_iot = iot; 2236 regs.cr_nports = COM_NPORTS; 2237 regs.cr_iobase = iobase; 2238 #ifdef COM_REGMAP 2239 memcpy(regs.cr_map, com_std_map, sizeof (regs.cr_map)); 2240 #endif 2241 2242 return com_kgdb_attach1(®s, rate, frequency, type, cflag); 2243 } 2244 2245 /* ARGSUSED */ 2246 int 2247 com_kgdb_getc(void *arg) 2248 { 2249 2250 return (com_common_getc(NODEV, &comkgdbregs)); 2251 } 2252 2253 /* ARGSUSED */ 2254 void 2255 com_kgdb_putc(void *arg, int c) 2256 { 2257 2258 com_common_putc(NODEV, &comkgdbregs, c); 2259 } 2260 #endif /* KGDB */ 2261 2262 /* helper function to identify the com ports used by 2263 console or KGDB (and not yet autoconf attached) */ 2264 int 2265 com_is_console(bus_space_tag_t iot, bus_addr_t iobase, bus_space_handle_t *ioh) 2266 { 2267 bus_space_handle_t help; 2268 2269 if (!comconsattached && 2270 iot == comconsregs.cr_iot && iobase == comconsregs.cr_iobase) 2271 help = comconsregs.cr_ioh; 2272 #ifdef KGDB 2273 else if (!com_kgdb_attached && 2274 iot == comkgdbregs.cr_iot && iobase == comkgdbregs.cr_iobase) 2275 help = comkgdbregs.cr_ioh; 2276 #endif 2277 else 2278 return (0); 2279 2280 if (ioh) 2281 *ioh = help; 2282 return (1); 2283 } 2284 2285 /* 2286 * this routine exists to serve as a shutdown hook for systems that 2287 * have firmware which doesn't interact properly with a com device in 2288 * FIFO mode. 2289 */ 2290 bool 2291 com_cleanup(device_t self, int how) 2292 { 2293 struct com_softc *sc = device_private(self); 2294 2295 if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 2296 CSR_WRITE_1(&sc->sc_regs, COM_REG_FIFO, 0); 2297 2298 return true; 2299 } 2300 2301 bool 2302 com_suspend(device_t self PMF_FN_ARGS) 2303 { 2304 struct com_softc *sc = device_private(self); 2305 2306 CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, 0); 2307 (void)CSR_READ_1(&sc->sc_regs, COM_REG_IIR); 2308 2309 return true; 2310 } 2311 2312 bool 2313 com_resume(device_t self PMF_FN_ARGS) 2314 { 2315 struct com_softc *sc = device_private(self); 2316 2317 mutex_spin_enter(&sc->sc_lock); 2318 com_loadchannelregs(sc); 2319 mutex_spin_exit(&sc->sc_lock); 2320 2321 return true; 2322 } 2323