1 /* $NetBSD: com.c,v 1.278 2008/04/11 12:45:08 tsutsui Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2004, 2008 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. Neither the name of the University nor the names of its contributors 52 * may be used to endorse or promote products derived from this software 53 * without specific prior written permission. 54 * 55 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 56 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 57 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 58 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 59 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 60 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 61 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 62 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 63 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 64 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 65 * SUCH DAMAGE. 66 * 67 * @(#)com.c 7.5 (Berkeley) 5/16/91 68 */ 69 70 /* 71 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 72 * Supports automatic hardware flow control on StarTech ST16C650A UART 73 */ 74 75 #include <sys/cdefs.h> 76 __KERNEL_RCSID(0, "$NetBSD: com.c,v 1.278 2008/04/11 12:45:08 tsutsui Exp $"); 77 78 #include "opt_com.h" 79 #include "opt_ddb.h" 80 #include "opt_kgdb.h" 81 #include "opt_lockdebug.h" 82 #include "opt_multiprocessor.h" 83 #include "opt_ntp.h" 84 85 #include "rnd.h" 86 #if NRND > 0 && defined(RND_COM) 87 #include <sys/rnd.h> 88 #endif 89 90 /* The COM16650 option was renamed to COM_16650. */ 91 #ifdef COM16650 92 #error Obsolete COM16650 option; use COM_16650 instead. 93 #endif 94 95 /* 96 * Override cnmagic(9) macro before including <sys/systm.h>. 97 * We need to know if cn_check_magic triggered debugger, so set a flag. 98 * Callers of cn_check_magic must declare int cn_trapped = 0; 99 * XXX: this is *ugly*! 100 */ 101 #define cn_trap() \ 102 do { \ 103 console_debugger(); \ 104 cn_trapped = 1; \ 105 } while (/* CONSTCOND */ 0) 106 107 #include <sys/param.h> 108 #include <sys/systm.h> 109 #include <sys/ioctl.h> 110 #include <sys/select.h> 111 #include <sys/poll.h> 112 #include <sys/tty.h> 113 #include <sys/proc.h> 114 #include <sys/user.h> 115 #include <sys/conf.h> 116 #include <sys/file.h> 117 #include <sys/uio.h> 118 #include <sys/kernel.h> 119 #include <sys/syslog.h> 120 #include <sys/device.h> 121 #include <sys/malloc.h> 122 #include <sys/timepps.h> 123 #include <sys/vnode.h> 124 #include <sys/kauth.h> 125 #include <sys/intr.h> 126 127 #include <sys/bus.h> 128 129 #include <dev/ic/comreg.h> 130 #include <dev/ic/comvar.h> 131 #include <dev/ic/ns16550reg.h> 132 #include <dev/ic/st16650reg.h> 133 #ifdef COM_HAYESP 134 #include <dev/ic/hayespreg.h> 135 #endif 136 #define com_lcr com_cfcr 137 #include <dev/cons.h> 138 139 #ifdef COM_REGMAP 140 #define CSR_WRITE_1(r, o, v) \ 141 bus_space_write_1((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o], v) 142 #define CSR_READ_1(r, o) \ 143 bus_space_read_1((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o]) 144 #define CSR_WRITE_2(r, o, v) \ 145 bus_space_write_2((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o], v) 146 #define CSR_READ_2(r, o) \ 147 bus_space_read_2((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o]) 148 #define CSR_WRITE_MULTI(r, o, p, n) \ 149 bus_space_write_multi_1((r)->cr_iot, (r)->cr_ioh, (r)->cr_map[o], p, n) 150 #else 151 #define CSR_WRITE_1(r, o, v) \ 152 bus_space_write_1((r)->cr_iot, (r)->cr_ioh, o, v) 153 #define CSR_READ_1(r, o) \ 154 bus_space_read_1((r)->cr_iot, (r)->cr_ioh, o) 155 #define CSR_WRITE_2(r, o, v) \ 156 bus_space_write_2((r)->cr_iot, (r)->cr_ioh, o, v) 157 #define CSR_READ_2(r, o) \ 158 bus_space_read_2((r)->cr_iot, (r)->cr_ioh, o) 159 #define CSR_WRITE_MULTI(r, o, p, n) \ 160 bus_space_write_multi_1((r)->cr_iot, (r)->cr_ioh, o, p, n) 161 #endif 162 163 164 static void com_enable_debugport(struct com_softc *); 165 166 void com_config(struct com_softc *); 167 void com_shutdown(struct com_softc *); 168 int comspeed(long, long, int); 169 static u_char cflag2lcr(tcflag_t); 170 int comparam(struct tty *, struct termios *); 171 void comstart(struct tty *); 172 int comhwiflow(struct tty *, int); 173 174 void com_loadchannelregs(struct com_softc *); 175 void com_hwiflow(struct com_softc *); 176 void com_break(struct com_softc *, int); 177 void com_modem(struct com_softc *, int); 178 void tiocm_to_com(struct com_softc *, u_long, int); 179 int com_to_tiocm(struct com_softc *); 180 void com_iflush(struct com_softc *); 181 182 int com_common_getc(dev_t, struct com_regs *); 183 void com_common_putc(dev_t, struct com_regs *, int); 184 185 int cominit(struct com_regs *, int, int, int, tcflag_t); 186 187 int comcngetc(dev_t); 188 void comcnputc(dev_t, int); 189 void comcnpollc(dev_t, int); 190 191 #define integrate static inline 192 void comsoft(void *); 193 integrate void com_rxsoft(struct com_softc *, struct tty *); 194 integrate void com_txsoft(struct com_softc *, struct tty *); 195 integrate void com_stsoft(struct com_softc *, struct tty *); 196 integrate void com_schedrx(struct com_softc *); 197 void comdiag(void *); 198 199 extern struct cfdriver com_cd; 200 201 dev_type_open(comopen); 202 dev_type_close(comclose); 203 dev_type_read(comread); 204 dev_type_write(comwrite); 205 dev_type_ioctl(comioctl); 206 dev_type_stop(comstop); 207 dev_type_tty(comtty); 208 dev_type_poll(compoll); 209 210 const struct cdevsw com_cdevsw = { 211 comopen, comclose, comread, comwrite, comioctl, 212 comstop, comtty, compoll, nommap, ttykqfilter, D_TTY 213 }; 214 215 /* 216 * Make this an option variable one can patch. 217 * But be warned: this must be a power of 2! 218 */ 219 u_int com_rbuf_size = COM_RING_SIZE; 220 221 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 222 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 223 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 224 225 static struct com_regs comconsregs; 226 static int comconsattached; 227 static int comconsrate; 228 static tcflag_t comconscflag; 229 static struct cnm_state com_cnm_state; 230 231 #ifdef KGDB 232 #include <sys/kgdb.h> 233 234 static struct com_regs comkgdbregs; 235 static int com_kgdb_attached; 236 237 int com_kgdb_getc(void *); 238 void com_kgdb_putc(void *, int); 239 #endif /* KGDB */ 240 241 #ifdef COM_REGMAP 242 /* initializer for typical 16550-ish hardware */ 243 #define COM_REG_16550 { \ 244 com_data, com_data, com_dlbl, com_dlbh, com_ier, com_iir, com_fifo, \ 245 com_efr, com_lcr, com_mcr, com_lsr, com_msr } 246 247 const bus_size_t com_std_map[16] = COM_REG_16550; 248 #endif /* COM_REGMAP */ 249 250 #define COMUNIT_MASK 0x7ffff 251 #define COMDIALOUT_MASK 0x80000 252 253 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 254 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 255 256 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 257 device_is_active((sc)->sc_dev)) 258 259 #define BR BUS_SPACE_BARRIER_READ 260 #define BW BUS_SPACE_BARRIER_WRITE 261 #define COM_BARRIER(r, f) \ 262 bus_space_barrier((r)->cr_iot, (r)->cr_ioh, 0, (r)->cr_nports, (f)) 263 264 /*ARGSUSED*/ 265 int 266 comspeed(long speed, long frequency, int type) 267 { 268 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 269 270 int x, err; 271 272 #if 0 273 if (speed == 0) 274 return (0); 275 #endif 276 if (speed <= 0) 277 return (-1); 278 x = divrnd(frequency / 16, speed); 279 if (x <= 0) 280 return (-1); 281 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 282 if (err < 0) 283 err = -err; 284 if (err > COM_TOLERANCE) 285 return (-1); 286 return (x); 287 288 #undef divrnd 289 } 290 291 #ifdef COM_DEBUG 292 int com_debug = 0; 293 294 void comstatus(struct com_softc *, const char *); 295 void 296 comstatus(struct com_softc *sc, const char *str) 297 { 298 struct tty *tp = sc->sc_tty; 299 300 aprint_normal_dev(sc->sc_dev, 301 "%s %cclocal %cdcd %cts_carr_on %cdtr %ctx_stopped\n", 302 str, 303 ISSET(tp->t_cflag, CLOCAL) ? '+' : '-', 304 ISSET(sc->sc_msr, MSR_DCD) ? '+' : '-', 305 ISSET(tp->t_state, TS_CARR_ON) ? '+' : '-', 306 ISSET(sc->sc_mcr, MCR_DTR) ? '+' : '-', 307 sc->sc_tx_stopped ? '+' : '-'); 308 309 aprint_normal_dev(sc->sc_dev, 310 "%s %ccrtscts %ccts %cts_ttstop %crts rx_flags=0x%x\n", 311 str, 312 ISSET(tp->t_cflag, CRTSCTS) ? '+' : '-', 313 ISSET(sc->sc_msr, MSR_CTS) ? '+' : '-', 314 ISSET(tp->t_state, TS_TTSTOP) ? '+' : '-', 315 ISSET(sc->sc_mcr, MCR_RTS) ? '+' : '-', 316 sc->sc_rx_flags); 317 } 318 #endif 319 320 int 321 com_probe_subr(struct com_regs *regs) 322 { 323 324 /* force access to id reg */ 325 CSR_WRITE_1(regs, COM_REG_LCR, LCR_8BITS); 326 CSR_WRITE_1(regs, COM_REG_IIR, 0); 327 if ((CSR_READ_1(regs, COM_REG_LCR) != LCR_8BITS) || 328 (CSR_READ_1(regs, COM_REG_IIR) & 0x38)) 329 return (0); 330 331 return (1); 332 } 333 334 int 335 comprobe1(bus_space_tag_t iot, bus_space_handle_t ioh) 336 { 337 struct com_regs regs; 338 339 regs.cr_iot = iot; 340 regs.cr_ioh = ioh; 341 #ifdef COM_REGMAP 342 memcpy(regs.cr_map, com_std_map, sizeof (regs.cr_map));; 343 #endif 344 345 return com_probe_subr(®s); 346 } 347 348 /* 349 * No locking in this routine; it is only called during attach, 350 * or with the port already locked. 351 */ 352 static void 353 com_enable_debugport(struct com_softc *sc) 354 { 355 356 /* Turn on line break interrupt, set carrier. */ 357 sc->sc_ier = IER_ERXRDY; 358 if (sc->sc_type == COM_TYPE_PXA2x0) 359 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 360 CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier); 361 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 362 CSR_WRITE_1(&sc->sc_regs, COM_REG_MCR, sc->sc_mcr); 363 } 364 365 void 366 com_attach_subr(struct com_softc *sc) 367 { 368 struct com_regs *regsp = &sc->sc_regs; 369 struct tty *tp; 370 #ifdef COM_16650 371 u_int8_t lcr; 372 #endif 373 const char *fifo_msg = NULL; 374 375 aprint_naive("\n"); 376 377 callout_init(&sc->sc_diag_callout, 0); 378 mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_HIGH); 379 380 /* Disable interrupts before configuring the device. */ 381 if (sc->sc_type == COM_TYPE_PXA2x0) 382 sc->sc_ier = IER_EUART; 383 else 384 sc->sc_ier = 0; 385 386 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 387 388 if (regsp->cr_iot == comconsregs.cr_iot && 389 regsp->cr_iobase == comconsregs.cr_iobase) { 390 comconsattached = 1; 391 392 /* Make sure the console is always "hardwired". */ 393 delay(10000); /* wait for output to finish */ 394 SET(sc->sc_hwflags, COM_HW_CONSOLE); 395 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 396 } 397 398 /* Probe for FIFO */ 399 switch (sc->sc_type) { 400 case COM_TYPE_HAYESP: 401 goto fifodone; 402 403 case COM_TYPE_AU1x00: 404 sc->sc_fifolen = 16; 405 fifo_msg = "Au1X00 UART, working fifo"; 406 SET(sc->sc_hwflags, COM_HW_FIFO); 407 goto fifodelay; 408 } 409 410 sc->sc_fifolen = 1; 411 /* look for a NS 16550AF UART with FIFOs */ 412 CSR_WRITE_1(regsp, COM_REG_FIFO, 413 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 414 delay(100); 415 if (ISSET(CSR_READ_1(regsp, COM_REG_IIR), IIR_FIFO_MASK) 416 == IIR_FIFO_MASK) 417 if (ISSET(CSR_READ_1(regsp, COM_REG_FIFO), FIFO_TRIGGER_14) 418 == FIFO_TRIGGER_14) { 419 SET(sc->sc_hwflags, COM_HW_FIFO); 420 421 #ifdef COM_16650 422 /* 423 * IIR changes into the EFR if LCR is set to LCR_EERS 424 * on 16650s. We also know IIR != 0 at this point. 425 * Write 0 into the EFR, and read it. If the result 426 * is 0, we have a 16650. 427 * 428 * Older 16650s were broken; the test to detect them 429 * is taken from the Linux driver. Apparently 430 * setting DLAB enable gives access to the EFR on 431 * these chips. 432 */ 433 lcr = CSR_READ_1(regsp, COM_REG_LCR); 434 CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS); 435 CSR_WRITE_1(regsp, COM_REG_EFR, 0); 436 if (CSR_READ_1(regsp, COM_REG_EFR) == 0) { 437 CSR_WRITE_1(regsp, COM_REG_LCR, 438 lcr | LCR_DLAB); 439 if (CSR_READ_1(regsp, COM_REG_EFR) == 0) { 440 CLR(sc->sc_hwflags, COM_HW_FIFO); 441 sc->sc_fifolen = 0; 442 } else { 443 SET(sc->sc_hwflags, COM_HW_FLOW); 444 sc->sc_fifolen = 32; 445 } 446 } else 447 #endif 448 sc->sc_fifolen = 16; 449 450 #ifdef COM_16650 451 CSR_WRITE_1(regsp, COM_REG_LCR, lcr); 452 if (sc->sc_fifolen == 0) 453 fifo_msg = "st16650, broken fifo"; 454 else if (sc->sc_fifolen == 32) 455 fifo_msg = "st16650a, working fifo"; 456 else 457 #endif 458 fifo_msg = "ns16550a, working fifo"; 459 } else 460 fifo_msg = "ns16550, broken fifo"; 461 else 462 fifo_msg = "ns8250 or ns16450, no fifo"; 463 CSR_WRITE_1(regsp, COM_REG_FIFO, 0); 464 fifodelay: 465 /* 466 * Some chips will clear down both Tx and Rx FIFOs when zero is 467 * written to com_fifo. If this chip is the console, writing zero 468 * results in some of the chip/FIFO description being lost, so delay 469 * printing it until now. 470 */ 471 delay(10); 472 aprint_normal(": %s\n", fifo_msg); 473 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 474 sc->sc_fifolen = 1; 475 aprint_normal_dev(sc->sc_dev, "txfifo disabled\n"); 476 } 477 478 fifodone: 479 480 tp = ttymalloc(); 481 tp->t_oproc = comstart; 482 tp->t_param = comparam; 483 tp->t_hwiflow = comhwiflow; 484 485 sc->sc_tty = tp; 486 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 487 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 488 sc->sc_rbavail = com_rbuf_size; 489 if (sc->sc_rbuf == NULL) { 490 aprint_error_dev(sc->sc_dev, 491 "unable to allocate ring buffer\n"); 492 return; 493 } 494 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 495 496 tty_attach(tp); 497 498 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 499 SET(sc->sc_mcr, MCR_IENABLE); 500 501 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 502 int maj; 503 504 /* locate the major number */ 505 maj = cdevsw_lookup_major(&com_cdevsw); 506 507 tp->t_dev = cn_tab->cn_dev = makedev(maj, 508 device_unit(sc->sc_dev)); 509 510 aprint_normal_dev(sc->sc_dev, "console\n"); 511 } 512 513 #ifdef KGDB 514 /* 515 * Allow kgdb to "take over" this port. If this is 516 * not the console and is the kgdb device, it has 517 * exclusive use. If it's the console _and_ the 518 * kgdb device, it doesn't. 519 */ 520 if (regsp->cr_iot == comkgdbregs.cr_iot && 521 regsp->cr_iobase == comkgdbregs.cr_iobase) { 522 if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 523 com_kgdb_attached = 1; 524 525 SET(sc->sc_hwflags, COM_HW_KGDB); 526 } 527 aprint_normal_dev(sc->sc_dev, "kgdb\n"); 528 } 529 #endif 530 531 sc->sc_si = softint_establish(SOFTINT_SERIAL, comsoft, sc); 532 533 #if NRND > 0 && defined(RND_COM) 534 rnd_attach_source(&sc->rnd_source, device_xname(sc->sc_dev), 535 RND_TYPE_TTY, 0); 536 #endif 537 538 /* if there are no enable/disable functions, assume the device 539 is always enabled */ 540 if (!sc->enable) 541 sc->enabled = 1; 542 543 com_config(sc); 544 545 SET(sc->sc_hwflags, COM_HW_DEV_OK); 546 } 547 548 void 549 com_config(struct com_softc *sc) 550 { 551 struct com_regs *regsp = &sc->sc_regs; 552 553 /* Disable interrupts before configuring the device. */ 554 if (sc->sc_type == COM_TYPE_PXA2x0) 555 sc->sc_ier = IER_EUART; 556 else 557 sc->sc_ier = 0; 558 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 559 (void) CSR_READ_1(regsp, COM_REG_IIR); 560 561 #ifdef COM_HAYESP 562 /* Look for a Hayes ESP board. */ 563 if (sc->sc_type == COM_TYPE_HAYESP) { 564 565 /* Set 16550 compatibility mode */ 566 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1, 567 HAYESP_SETMODE); 568 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 569 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 570 HAYESP_MODE_SCALE); 571 572 /* Set RTS/CTS flow control */ 573 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1, 574 HAYESP_SETFLOWTYPE); 575 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 576 HAYESP_FLOW_RTS); 577 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 578 HAYESP_FLOW_CTS); 579 580 /* Set flow control levels */ 581 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1, 582 HAYESP_SETRXFLOW); 583 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 584 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 585 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 586 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 587 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 588 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 589 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 590 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 591 } 592 #endif 593 594 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB)) 595 com_enable_debugport(sc); 596 } 597 598 int 599 com_detach(device_t self, int flags) 600 { 601 struct com_softc *sc = device_private(self); 602 int maj, mn; 603 604 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 605 return EBUSY; 606 607 /* locate the major number */ 608 maj = cdevsw_lookup_major(&com_cdevsw); 609 610 /* Nuke the vnodes for any open instances. */ 611 mn = device_unit(self); 612 vdevgone(maj, mn, mn, VCHR); 613 614 mn |= COMDIALOUT_MASK; 615 vdevgone(maj, mn, mn, VCHR); 616 617 if (sc->sc_rbuf == NULL) { 618 /* 619 * Ring buffer allocation failed in the com_attach_subr, 620 * only the tty is allocated, and nothing else. 621 */ 622 ttyfree(sc->sc_tty); 623 return 0; 624 } 625 626 /* Free the receive buffer. */ 627 free(sc->sc_rbuf, M_DEVBUF); 628 629 /* Detach and free the tty. */ 630 tty_detach(sc->sc_tty); 631 ttyfree(sc->sc_tty); 632 633 /* Unhook the soft interrupt handler. */ 634 softint_disestablish(sc->sc_si); 635 636 #if NRND > 0 && defined(RND_COM) 637 /* Unhook the entropy source. */ 638 rnd_detach_source(&sc->rnd_source); 639 #endif 640 callout_destroy(&sc->sc_diag_callout); 641 642 /* Destroy the lock. */ 643 mutex_destroy(&sc->sc_lock); 644 645 return (0); 646 } 647 648 int 649 com_activate(device_t self, enum devact act) 650 { 651 struct com_softc *sc = device_private(self); 652 int rv = 0; 653 654 switch (act) { 655 case DVACT_ACTIVATE: 656 rv = EOPNOTSUPP; 657 break; 658 659 case DVACT_DEACTIVATE: 660 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 661 rv = EBUSY; 662 break; 663 } 664 665 if (sc->disable != NULL && sc->enabled != 0) { 666 (*sc->disable)(sc); 667 sc->enabled = 0; 668 } 669 break; 670 } 671 672 return (rv); 673 } 674 675 void 676 com_shutdown(struct com_softc *sc) 677 { 678 struct tty *tp = sc->sc_tty; 679 680 mutex_spin_enter(&sc->sc_lock); 681 682 /* If we were asserting flow control, then deassert it. */ 683 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 684 com_hwiflow(sc); 685 686 /* Clear any break condition set with TIOCSBRK. */ 687 com_break(sc, 0); 688 689 /* 690 * Hang up if necessary. Wait a bit, so the other side has time to 691 * notice even if we immediately open the port again. 692 * Avoid tsleeping above splhigh(). 693 */ 694 if (ISSET(tp->t_cflag, HUPCL)) { 695 com_modem(sc, 0); 696 mutex_spin_exit(&sc->sc_lock); 697 /* XXX will only timeout */ 698 (void) kpause(ttclos, false, hz, NULL); 699 mutex_spin_enter(&sc->sc_lock); 700 } 701 702 /* Turn off interrupts. */ 703 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 704 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 705 if (sc->sc_type == COM_TYPE_PXA2x0) 706 sc->sc_ier |= IER_ERXTOUT; 707 } else 708 sc->sc_ier = 0; 709 710 if (sc->sc_type == COM_TYPE_PXA2x0) 711 sc->sc_ier |= IER_EUART; 712 713 CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier); 714 715 mutex_spin_exit(&sc->sc_lock); 716 717 if (sc->disable) { 718 #ifdef DIAGNOSTIC 719 if (!sc->enabled) 720 panic("com_shutdown: not enabled?"); 721 #endif 722 (*sc->disable)(sc); 723 sc->enabled = 0; 724 } 725 } 726 727 int 728 comopen(dev_t dev, int flag, int mode, struct lwp *l) 729 { 730 struct com_softc *sc; 731 struct tty *tp; 732 int s; 733 int error; 734 735 sc = device_lookup_private(&com_cd, COMUNIT(dev)); 736 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 737 sc->sc_rbuf == NULL) 738 return (ENXIO); 739 740 if (!device_is_active(sc->sc_dev)) 741 return (ENXIO); 742 743 #ifdef KGDB 744 /* 745 * If this is the kgdb port, no other use is permitted. 746 */ 747 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 748 return (EBUSY); 749 #endif 750 751 tp = sc->sc_tty; 752 753 if (kauth_authorize_device_tty(l->l_cred, KAUTH_DEVICE_TTY_OPEN, tp)) 754 return (EBUSY); 755 756 s = spltty(); 757 758 /* 759 * Do the following iff this is a first open. 760 */ 761 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 762 struct termios t; 763 764 tp->t_dev = dev; 765 766 767 if (sc->enable) { 768 if ((*sc->enable)(sc)) { 769 splx(s); 770 aprint_error_dev(sc->sc_dev, 771 "device enable failed\n"); 772 return (EIO); 773 } 774 mutex_spin_enter(&sc->sc_lock); 775 sc->enabled = 1; 776 com_config(sc); 777 } else { 778 mutex_spin_enter(&sc->sc_lock); 779 } 780 781 /* Turn on interrupts. */ 782 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 783 if (sc->sc_type == COM_TYPE_PXA2x0) 784 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 785 CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier); 786 787 /* Fetch the current modem control status, needed later. */ 788 sc->sc_msr = CSR_READ_1(&sc->sc_regs, COM_REG_MSR); 789 790 /* Clear PPS capture state on first open. */ 791 memset(&sc->sc_pps_state, 0, sizeof(sc->sc_pps_state)); 792 sc->sc_pps_state.ppscap = PPS_CAPTUREASSERT | PPS_CAPTURECLEAR; 793 pps_init(&sc->sc_pps_state); 794 795 mutex_spin_exit(&sc->sc_lock); 796 797 /* 798 * Initialize the termios status to the defaults. Add in the 799 * sticky bits from TIOCSFLAGS. 800 */ 801 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 802 t.c_ospeed = comconsrate; 803 t.c_cflag = comconscflag; 804 } else { 805 t.c_ospeed = TTYDEF_SPEED; 806 t.c_cflag = TTYDEF_CFLAG; 807 } 808 t.c_ispeed = t.c_ospeed; 809 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 810 SET(t.c_cflag, CLOCAL); 811 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 812 SET(t.c_cflag, CRTSCTS); 813 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 814 SET(t.c_cflag, MDMBUF); 815 /* Make sure comparam() will do something. */ 816 tp->t_ospeed = 0; 817 (void) comparam(tp, &t); 818 tp->t_iflag = TTYDEF_IFLAG; 819 tp->t_oflag = TTYDEF_OFLAG; 820 tp->t_lflag = TTYDEF_LFLAG; 821 ttychars(tp); 822 ttsetwater(tp); 823 824 mutex_spin_enter(&sc->sc_lock); 825 826 /* 827 * Turn on DTR. We must always do this, even if carrier is not 828 * present, because otherwise we'd have to use TIOCSDTR 829 * immediately after setting CLOCAL, which applications do not 830 * expect. We always assert DTR while the device is open 831 * unless explicitly requested to deassert it. 832 */ 833 com_modem(sc, 1); 834 835 /* Clear the input ring, and unblock. */ 836 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 837 sc->sc_rbavail = com_rbuf_size; 838 com_iflush(sc); 839 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 840 com_hwiflow(sc); 841 842 #ifdef COM_DEBUG 843 if (com_debug) 844 comstatus(sc, "comopen "); 845 #endif 846 847 mutex_spin_exit(&sc->sc_lock); 848 } 849 850 splx(s); 851 852 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 853 if (error) 854 goto bad; 855 856 error = (*tp->t_linesw->l_open)(dev, tp); 857 if (error) 858 goto bad; 859 860 return (0); 861 862 bad: 863 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 864 /* 865 * We failed to open the device, and nobody else had it opened. 866 * Clean up the state as appropriate. 867 */ 868 com_shutdown(sc); 869 } 870 871 return (error); 872 } 873 874 int 875 comclose(dev_t dev, int flag, int mode, struct lwp *l) 876 { 877 struct com_softc *sc = 878 device_lookup_private(&com_cd, COMUNIT(dev)); 879 struct tty *tp = sc->sc_tty; 880 881 /* XXX This is for cons.c. */ 882 if (!ISSET(tp->t_state, TS_ISOPEN)) 883 return (0); 884 885 (*tp->t_linesw->l_close)(tp, flag); 886 ttyclose(tp); 887 888 if (COM_ISALIVE(sc) == 0) 889 return (0); 890 891 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 892 /* 893 * Although we got a last close, the device may still be in 894 * use; e.g. if this was the dialout node, and there are still 895 * processes waiting for carrier on the non-dialout node. 896 */ 897 com_shutdown(sc); 898 } 899 900 return (0); 901 } 902 903 int 904 comread(dev_t dev, struct uio *uio, int flag) 905 { 906 struct com_softc *sc = 907 device_lookup_private(&com_cd, COMUNIT(dev)); 908 struct tty *tp = sc->sc_tty; 909 910 if (COM_ISALIVE(sc) == 0) 911 return (EIO); 912 913 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 914 } 915 916 int 917 comwrite(dev_t dev, struct uio *uio, int flag) 918 { 919 struct com_softc *sc = 920 device_lookup_private(&com_cd, COMUNIT(dev)); 921 struct tty *tp = sc->sc_tty; 922 923 if (COM_ISALIVE(sc) == 0) 924 return (EIO); 925 926 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 927 } 928 929 int 930 compoll(dev_t dev, int events, struct lwp *l) 931 { 932 struct com_softc *sc = 933 device_lookup_private(&com_cd, COMUNIT(dev)); 934 struct tty *tp = sc->sc_tty; 935 936 if (COM_ISALIVE(sc) == 0) 937 return (POLLHUP); 938 939 return ((*tp->t_linesw->l_poll)(tp, events, l)); 940 } 941 942 struct tty * 943 comtty(dev_t dev) 944 { 945 struct com_softc *sc = 946 device_lookup_private(&com_cd, COMUNIT(dev)); 947 struct tty *tp = sc->sc_tty; 948 949 return (tp); 950 } 951 952 int 953 comioctl(dev_t dev, u_long cmd, void *data, int flag, struct lwp *l) 954 { 955 struct com_softc *sc; 956 struct tty *tp; 957 int error; 958 959 sc = device_lookup_private(&com_cd, COMUNIT(dev)); 960 if (sc == NULL) 961 return ENXIO; 962 if (COM_ISALIVE(sc) == 0) 963 return (EIO); 964 965 tp = sc->sc_tty; 966 967 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, l); 968 if (error != EPASSTHROUGH) 969 return (error); 970 971 error = ttioctl(tp, cmd, data, flag, l); 972 if (error != EPASSTHROUGH) 973 return (error); 974 975 error = 0; 976 switch (cmd) { 977 case TIOCSFLAGS: 978 error = kauth_authorize_device_tty(l->l_cred, 979 KAUTH_DEVICE_TTY_PRIVSET, tp); 980 break; 981 default: 982 /* nothing */ 983 break; 984 } 985 if (error) { 986 return error; 987 } 988 989 mutex_spin_enter(&sc->sc_lock); 990 991 switch (cmd) { 992 case TIOCSBRK: 993 com_break(sc, 1); 994 break; 995 996 case TIOCCBRK: 997 com_break(sc, 0); 998 break; 999 1000 case TIOCSDTR: 1001 com_modem(sc, 1); 1002 break; 1003 1004 case TIOCCDTR: 1005 com_modem(sc, 0); 1006 break; 1007 1008 case TIOCGFLAGS: 1009 *(int *)data = sc->sc_swflags; 1010 break; 1011 1012 case TIOCSFLAGS: 1013 sc->sc_swflags = *(int *)data; 1014 break; 1015 1016 case TIOCMSET: 1017 case TIOCMBIS: 1018 case TIOCMBIC: 1019 tiocm_to_com(sc, cmd, *(int *)data); 1020 break; 1021 1022 case TIOCMGET: 1023 *(int *)data = com_to_tiocm(sc); 1024 break; 1025 1026 case PPS_IOC_CREATE: 1027 case PPS_IOC_DESTROY: 1028 case PPS_IOC_GETPARAMS: 1029 case PPS_IOC_SETPARAMS: 1030 case PPS_IOC_GETCAP: 1031 case PPS_IOC_FETCH: 1032 #ifdef PPS_SYNC 1033 case PPS_IOC_KCBIND: 1034 #endif 1035 error = pps_ioctl(cmd, data, &sc->sc_pps_state); 1036 break; 1037 1038 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1039 #ifndef PPS_TRAILING_EDGE 1040 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1041 &sc->sc_pps_state.ppsinfo.assert_timestamp); 1042 #else 1043 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1044 &sc->sc_pps_state.ppsinfo.clear_timestamp); 1045 #endif 1046 break; 1047 1048 default: 1049 error = EPASSTHROUGH; 1050 break; 1051 } 1052 1053 mutex_spin_exit(&sc->sc_lock); 1054 1055 #ifdef COM_DEBUG 1056 if (com_debug) 1057 comstatus(sc, "comioctl "); 1058 #endif 1059 1060 return (error); 1061 } 1062 1063 integrate void 1064 com_schedrx(struct com_softc *sc) 1065 { 1066 1067 sc->sc_rx_ready = 1; 1068 1069 /* Wake up the poller. */ 1070 softint_schedule(sc->sc_si); 1071 } 1072 1073 void 1074 com_break(struct com_softc *sc, int onoff) 1075 { 1076 1077 if (onoff) 1078 SET(sc->sc_lcr, LCR_SBREAK); 1079 else 1080 CLR(sc->sc_lcr, LCR_SBREAK); 1081 1082 if (!sc->sc_heldchange) { 1083 if (sc->sc_tx_busy) { 1084 sc->sc_heldtbc = sc->sc_tbc; 1085 sc->sc_tbc = 0; 1086 sc->sc_heldchange = 1; 1087 } else 1088 com_loadchannelregs(sc); 1089 } 1090 } 1091 1092 void 1093 com_modem(struct com_softc *sc, int onoff) 1094 { 1095 1096 if (sc->sc_mcr_dtr == 0) 1097 return; 1098 1099 if (onoff) 1100 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1101 else 1102 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1103 1104 if (!sc->sc_heldchange) { 1105 if (sc->sc_tx_busy) { 1106 sc->sc_heldtbc = sc->sc_tbc; 1107 sc->sc_tbc = 0; 1108 sc->sc_heldchange = 1; 1109 } else 1110 com_loadchannelregs(sc); 1111 } 1112 } 1113 1114 void 1115 tiocm_to_com(struct com_softc *sc, u_long how, int ttybits) 1116 { 1117 u_char combits; 1118 1119 combits = 0; 1120 if (ISSET(ttybits, TIOCM_DTR)) 1121 SET(combits, MCR_DTR); 1122 if (ISSET(ttybits, TIOCM_RTS)) 1123 SET(combits, MCR_RTS); 1124 1125 switch (how) { 1126 case TIOCMBIC: 1127 CLR(sc->sc_mcr, combits); 1128 break; 1129 1130 case TIOCMBIS: 1131 SET(sc->sc_mcr, combits); 1132 break; 1133 1134 case TIOCMSET: 1135 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1136 SET(sc->sc_mcr, combits); 1137 break; 1138 } 1139 1140 if (!sc->sc_heldchange) { 1141 if (sc->sc_tx_busy) { 1142 sc->sc_heldtbc = sc->sc_tbc; 1143 sc->sc_tbc = 0; 1144 sc->sc_heldchange = 1; 1145 } else 1146 com_loadchannelregs(sc); 1147 } 1148 } 1149 1150 int 1151 com_to_tiocm(struct com_softc *sc) 1152 { 1153 u_char combits; 1154 int ttybits = 0; 1155 1156 combits = sc->sc_mcr; 1157 if (ISSET(combits, MCR_DTR)) 1158 SET(ttybits, TIOCM_DTR); 1159 if (ISSET(combits, MCR_RTS)) 1160 SET(ttybits, TIOCM_RTS); 1161 1162 combits = sc->sc_msr; 1163 if (ISSET(combits, MSR_DCD)) 1164 SET(ttybits, TIOCM_CD); 1165 if (ISSET(combits, MSR_CTS)) 1166 SET(ttybits, TIOCM_CTS); 1167 if (ISSET(combits, MSR_DSR)) 1168 SET(ttybits, TIOCM_DSR); 1169 if (ISSET(combits, MSR_RI | MSR_TERI)) 1170 SET(ttybits, TIOCM_RI); 1171 1172 if (ISSET(sc->sc_ier, IER_ERXRDY | IER_ETXRDY | IER_ERLS | IER_EMSC)) 1173 SET(ttybits, TIOCM_LE); 1174 1175 return (ttybits); 1176 } 1177 1178 static u_char 1179 cflag2lcr(tcflag_t cflag) 1180 { 1181 u_char lcr = 0; 1182 1183 switch (ISSET(cflag, CSIZE)) { 1184 case CS5: 1185 SET(lcr, LCR_5BITS); 1186 break; 1187 case CS6: 1188 SET(lcr, LCR_6BITS); 1189 break; 1190 case CS7: 1191 SET(lcr, LCR_7BITS); 1192 break; 1193 case CS8: 1194 SET(lcr, LCR_8BITS); 1195 break; 1196 } 1197 if (ISSET(cflag, PARENB)) { 1198 SET(lcr, LCR_PENAB); 1199 if (!ISSET(cflag, PARODD)) 1200 SET(lcr, LCR_PEVEN); 1201 } 1202 if (ISSET(cflag, CSTOPB)) 1203 SET(lcr, LCR_STOPB); 1204 1205 return (lcr); 1206 } 1207 1208 int 1209 comparam(struct tty *tp, struct termios *t) 1210 { 1211 struct com_softc *sc = 1212 device_lookup_private(&com_cd, COMUNIT(tp->t_dev)); 1213 int ospeed; 1214 u_char lcr; 1215 1216 if (COM_ISALIVE(sc) == 0) 1217 return (EIO); 1218 1219 #ifdef COM_HAYESP 1220 if (sc->sc_type == COM_TYPE_HAYESP) { 1221 int prescaler, speed; 1222 1223 /* 1224 * Calculate UART clock prescaler. It should be in 1225 * range of 0 .. 3. 1226 */ 1227 for (prescaler = 0, speed = t->c_ospeed; prescaler < 4; 1228 prescaler++, speed /= 2) 1229 if ((ospeed = comspeed(speed, sc->sc_frequency, 1230 sc->sc_type)) > 0) 1231 break; 1232 1233 if (prescaler == 4) 1234 return (EINVAL); 1235 sc->sc_prescaler = prescaler; 1236 } else 1237 #endif 1238 ospeed = comspeed(t->c_ospeed, sc->sc_frequency, sc->sc_type); 1239 1240 /* Check requested parameters. */ 1241 if (ospeed < 0) 1242 return (EINVAL); 1243 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1244 return (EINVAL); 1245 1246 /* 1247 * For the console, always force CLOCAL and !HUPCL, so that the port 1248 * is always active. 1249 */ 1250 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1251 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1252 SET(t->c_cflag, CLOCAL); 1253 CLR(t->c_cflag, HUPCL); 1254 } 1255 1256 /* 1257 * If there were no changes, don't do anything. This avoids dropping 1258 * input and improves performance when all we did was frob things like 1259 * VMIN and VTIME. 1260 */ 1261 if (tp->t_ospeed == t->c_ospeed && 1262 tp->t_cflag == t->c_cflag) 1263 return (0); 1264 1265 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1266 1267 mutex_spin_enter(&sc->sc_lock); 1268 1269 sc->sc_lcr = lcr; 1270 1271 /* 1272 * If we're not in a mode that assumes a connection is present, then 1273 * ignore carrier changes. 1274 */ 1275 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1276 sc->sc_msr_dcd = 0; 1277 else 1278 sc->sc_msr_dcd = MSR_DCD; 1279 /* 1280 * Set the flow control pins depending on the current flow control 1281 * mode. 1282 */ 1283 if (ISSET(t->c_cflag, CRTSCTS)) { 1284 sc->sc_mcr_dtr = MCR_DTR; 1285 sc->sc_mcr_rts = MCR_RTS; 1286 sc->sc_msr_cts = MSR_CTS; 1287 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1288 } else if (ISSET(t->c_cflag, MDMBUF)) { 1289 /* 1290 * For DTR/DCD flow control, make sure we don't toggle DTR for 1291 * carrier detection. 1292 */ 1293 sc->sc_mcr_dtr = 0; 1294 sc->sc_mcr_rts = MCR_DTR; 1295 sc->sc_msr_cts = MSR_DCD; 1296 sc->sc_efr = 0; 1297 } else { 1298 /* 1299 * If no flow control, then always set RTS. This will make 1300 * the other side happy if it mistakenly thinks we're doing 1301 * RTS/CTS flow control. 1302 */ 1303 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1304 sc->sc_mcr_rts = 0; 1305 sc->sc_msr_cts = 0; 1306 sc->sc_efr = 0; 1307 if (ISSET(sc->sc_mcr, MCR_DTR)) 1308 SET(sc->sc_mcr, MCR_RTS); 1309 else 1310 CLR(sc->sc_mcr, MCR_RTS); 1311 } 1312 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1313 1314 #if 0 1315 if (ospeed == 0) 1316 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1317 else 1318 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1319 #endif 1320 1321 sc->sc_dlbl = ospeed; 1322 sc->sc_dlbh = ospeed >> 8; 1323 1324 /* 1325 * Set the FIFO threshold based on the receive speed. 1326 * 1327 * * If it's a low speed, it's probably a mouse or some other 1328 * interactive device, so set the threshold low. 1329 * * If it's a high speed, trim the trigger level down to prevent 1330 * overflows. 1331 * * Otherwise set it a bit higher. 1332 */ 1333 if (sc->sc_type == COM_TYPE_HAYESP) 1334 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1335 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) { 1336 if (t->c_ospeed <= 1200) 1337 sc->sc_fifo = FIFO_ENABLE | FIFO_TRIGGER_1; 1338 else if (t->c_ospeed <= 38400) 1339 sc->sc_fifo = FIFO_ENABLE | FIFO_TRIGGER_8; 1340 else 1341 sc->sc_fifo = FIFO_ENABLE | FIFO_TRIGGER_4; 1342 } else 1343 sc->sc_fifo = 0; 1344 1345 /* And copy to tty. */ 1346 tp->t_ispeed = t->c_ospeed; 1347 tp->t_ospeed = t->c_ospeed; 1348 tp->t_cflag = t->c_cflag; 1349 1350 if (!sc->sc_heldchange) { 1351 if (sc->sc_tx_busy) { 1352 sc->sc_heldtbc = sc->sc_tbc; 1353 sc->sc_tbc = 0; 1354 sc->sc_heldchange = 1; 1355 } else 1356 com_loadchannelregs(sc); 1357 } 1358 1359 if (!ISSET(t->c_cflag, CHWFLOW)) { 1360 /* Disable the high water mark. */ 1361 sc->sc_r_hiwat = 0; 1362 sc->sc_r_lowat = 0; 1363 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1364 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1365 com_schedrx(sc); 1366 } 1367 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1368 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1369 com_hwiflow(sc); 1370 } 1371 } else { 1372 sc->sc_r_hiwat = com_rbuf_hiwat; 1373 sc->sc_r_lowat = com_rbuf_lowat; 1374 } 1375 1376 mutex_spin_exit(&sc->sc_lock); 1377 1378 /* 1379 * Update the tty layer's idea of the carrier bit, in case we changed 1380 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1381 * explicit request. 1382 */ 1383 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1384 1385 #ifdef COM_DEBUG 1386 if (com_debug) 1387 comstatus(sc, "comparam "); 1388 #endif 1389 1390 if (!ISSET(t->c_cflag, CHWFLOW)) { 1391 if (sc->sc_tx_stopped) { 1392 sc->sc_tx_stopped = 0; 1393 comstart(tp); 1394 } 1395 } 1396 1397 return (0); 1398 } 1399 1400 void 1401 com_iflush(struct com_softc *sc) 1402 { 1403 struct com_regs *regsp = &sc->sc_regs; 1404 #ifdef DIAGNOSTIC 1405 int reg; 1406 #endif 1407 int timo; 1408 1409 #ifdef DIAGNOSTIC 1410 reg = 0xffff; 1411 #endif 1412 timo = 50000; 1413 /* flush any pending I/O */ 1414 while (ISSET(CSR_READ_1(regsp, COM_REG_LSR), LSR_RXRDY) 1415 && --timo) 1416 #ifdef DIAGNOSTIC 1417 reg = 1418 #else 1419 (void) 1420 #endif 1421 CSR_READ_1(regsp, COM_REG_RXDATA); 1422 #ifdef DIAGNOSTIC 1423 if (!timo) 1424 aprint_error_dev(sc->sc_dev, "com_iflush timeout %02x\n", reg); 1425 #endif 1426 } 1427 1428 void 1429 com_loadchannelregs(struct com_softc *sc) 1430 { 1431 struct com_regs *regsp = &sc->sc_regs; 1432 1433 /* XXXXX necessary? */ 1434 com_iflush(sc); 1435 1436 if (sc->sc_type == COM_TYPE_PXA2x0) 1437 CSR_WRITE_1(regsp, COM_REG_IER, IER_EUART); 1438 else 1439 CSR_WRITE_1(regsp, COM_REG_IER, 0); 1440 1441 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1442 if (sc->sc_type != COM_TYPE_AU1x00) { /* no EFR on alchemy */ 1443 CSR_WRITE_1(regsp, COM_REG_EFR, sc->sc_efr); 1444 CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS); 1445 } 1446 } 1447 if (sc->sc_type == COM_TYPE_AU1x00) { 1448 /* alchemy has single separate 16-bit clock divisor register */ 1449 CSR_WRITE_2(regsp, COM_REG_DLBL, sc->sc_dlbl + 1450 (sc->sc_dlbh << 8)); 1451 } else { 1452 CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr | LCR_DLAB); 1453 CSR_WRITE_1(regsp, COM_REG_DLBL, sc->sc_dlbl); 1454 CSR_WRITE_1(regsp, COM_REG_DLBH, sc->sc_dlbh); 1455 } 1456 CSR_WRITE_1(regsp, COM_REG_LCR, sc->sc_lcr); 1457 CSR_WRITE_1(regsp, COM_REG_MCR, sc->sc_mcr_active = sc->sc_mcr); 1458 CSR_WRITE_1(regsp, COM_REG_FIFO, sc->sc_fifo); 1459 #ifdef COM_HAYESP 1460 if (sc->sc_type == COM_TYPE_HAYESP) { 1461 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD1, 1462 HAYESP_SETPRESCALER); 1463 bus_space_write_1(regsp->cr_iot, sc->sc_hayespioh, HAYESP_CMD2, 1464 sc->sc_prescaler); 1465 } 1466 #endif 1467 1468 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 1469 } 1470 1471 int 1472 comhwiflow(struct tty *tp, int block) 1473 { 1474 struct com_softc *sc = 1475 device_lookup_private(&com_cd, COMUNIT(tp->t_dev)); 1476 1477 if (COM_ISALIVE(sc) == 0) 1478 return (0); 1479 1480 if (sc->sc_mcr_rts == 0) 1481 return (0); 1482 1483 mutex_spin_enter(&sc->sc_lock); 1484 1485 if (block) { 1486 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1487 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1488 com_hwiflow(sc); 1489 } 1490 } else { 1491 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1492 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1493 com_schedrx(sc); 1494 } 1495 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1496 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1497 com_hwiflow(sc); 1498 } 1499 } 1500 1501 mutex_spin_exit(&sc->sc_lock); 1502 return (1); 1503 } 1504 1505 /* 1506 * (un)block input via hw flowcontrol 1507 */ 1508 void 1509 com_hwiflow(struct com_softc *sc) 1510 { 1511 struct com_regs *regsp= &sc->sc_regs; 1512 1513 if (sc->sc_mcr_rts == 0) 1514 return; 1515 1516 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1517 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1518 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1519 } else { 1520 SET(sc->sc_mcr, sc->sc_mcr_rts); 1521 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1522 } 1523 CSR_WRITE_1(regsp, COM_REG_MCR, sc->sc_mcr_active); 1524 } 1525 1526 1527 void 1528 comstart(struct tty *tp) 1529 { 1530 struct com_softc *sc = 1531 device_lookup_private(&com_cd, COMUNIT(tp->t_dev)); 1532 struct com_regs *regsp = &sc->sc_regs; 1533 int s; 1534 1535 if (COM_ISALIVE(sc) == 0) 1536 return; 1537 1538 s = spltty(); 1539 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1540 goto out; 1541 if (sc->sc_tx_stopped) 1542 goto out; 1543 if (!ttypull(tp)) 1544 goto out; 1545 1546 /* Grab the first contiguous region of buffer space. */ 1547 { 1548 u_char *tba; 1549 int tbc; 1550 1551 tba = tp->t_outq.c_cf; 1552 tbc = ndqb(&tp->t_outq, 0); 1553 1554 mutex_spin_enter(&sc->sc_lock); 1555 1556 sc->sc_tba = tba; 1557 sc->sc_tbc = tbc; 1558 } 1559 1560 SET(tp->t_state, TS_BUSY); 1561 sc->sc_tx_busy = 1; 1562 1563 /* Enable transmit completion interrupts if necessary. */ 1564 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1565 SET(sc->sc_ier, IER_ETXRDY); 1566 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 1567 } 1568 1569 /* Output the first chunk of the contiguous buffer. */ 1570 if (!ISSET(sc->sc_hwflags, COM_HW_NO_TXPRELOAD)) { 1571 u_int n; 1572 1573 n = sc->sc_tbc; 1574 if (n > sc->sc_fifolen) 1575 n = sc->sc_fifolen; 1576 CSR_WRITE_MULTI(regsp, COM_REG_TXDATA, sc->sc_tba, n); 1577 sc->sc_tbc -= n; 1578 sc->sc_tba += n; 1579 } 1580 1581 mutex_spin_exit(&sc->sc_lock); 1582 out: 1583 splx(s); 1584 return; 1585 } 1586 1587 /* 1588 * Stop output on a line. 1589 */ 1590 void 1591 comstop(struct tty *tp, int flag) 1592 { 1593 struct com_softc *sc = 1594 device_lookup_private(&com_cd, COMUNIT(tp->t_dev)); 1595 1596 mutex_spin_enter(&sc->sc_lock); 1597 if (ISSET(tp->t_state, TS_BUSY)) { 1598 /* Stop transmitting at the next chunk. */ 1599 sc->sc_tbc = 0; 1600 sc->sc_heldtbc = 0; 1601 if (!ISSET(tp->t_state, TS_TTSTOP)) 1602 SET(tp->t_state, TS_FLUSH); 1603 } 1604 mutex_spin_exit(&sc->sc_lock); 1605 } 1606 1607 void 1608 comdiag(void *arg) 1609 { 1610 struct com_softc *sc = arg; 1611 int overflows, floods; 1612 1613 mutex_spin_enter(&sc->sc_lock); 1614 overflows = sc->sc_overflows; 1615 sc->sc_overflows = 0; 1616 floods = sc->sc_floods; 1617 sc->sc_floods = 0; 1618 sc->sc_errors = 0; 1619 mutex_spin_exit(&sc->sc_lock); 1620 1621 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1622 device_xname(sc->sc_dev), 1623 overflows, overflows == 1 ? "" : "s", 1624 floods, floods == 1 ? "" : "s"); 1625 } 1626 1627 integrate void 1628 com_rxsoft(struct com_softc *sc, struct tty *tp) 1629 { 1630 int (*rint)(int, struct tty *) = tp->t_linesw->l_rint; 1631 u_char *get, *end; 1632 u_int cc, scc; 1633 u_char lsr; 1634 int code; 1635 1636 end = sc->sc_ebuf; 1637 get = sc->sc_rbget; 1638 scc = cc = com_rbuf_size - sc->sc_rbavail; 1639 1640 if (cc == com_rbuf_size) { 1641 sc->sc_floods++; 1642 if (sc->sc_errors++ == 0) 1643 callout_reset(&sc->sc_diag_callout, 60 * hz, 1644 comdiag, sc); 1645 } 1646 1647 /* If not yet open, drop the entire buffer content here */ 1648 if (!ISSET(tp->t_state, TS_ISOPEN)) { 1649 get += cc << 1; 1650 if (get >= end) 1651 get -= com_rbuf_size << 1; 1652 cc = 0; 1653 } 1654 while (cc) { 1655 code = get[0]; 1656 lsr = get[1]; 1657 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1658 if (ISSET(lsr, LSR_OE)) { 1659 sc->sc_overflows++; 1660 if (sc->sc_errors++ == 0) 1661 callout_reset(&sc->sc_diag_callout, 1662 60 * hz, comdiag, sc); 1663 } 1664 if (ISSET(lsr, LSR_BI | LSR_FE)) 1665 SET(code, TTY_FE); 1666 if (ISSET(lsr, LSR_PE)) 1667 SET(code, TTY_PE); 1668 } 1669 if ((*rint)(code, tp) == -1) { 1670 /* 1671 * The line discipline's buffer is out of space. 1672 */ 1673 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1674 /* 1675 * We're either not using flow control, or the 1676 * line discipline didn't tell us to block for 1677 * some reason. Either way, we have no way to 1678 * know when there's more space available, so 1679 * just drop the rest of the data. 1680 */ 1681 get += cc << 1; 1682 if (get >= end) 1683 get -= com_rbuf_size << 1; 1684 cc = 0; 1685 } else { 1686 /* 1687 * Don't schedule any more receive processing 1688 * until the line discipline tells us there's 1689 * space available (through comhwiflow()). 1690 * Leave the rest of the data in the input 1691 * buffer. 1692 */ 1693 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1694 } 1695 break; 1696 } 1697 get += 2; 1698 if (get >= end) 1699 get = sc->sc_rbuf; 1700 cc--; 1701 } 1702 1703 if (cc != scc) { 1704 sc->sc_rbget = get; 1705 mutex_spin_enter(&sc->sc_lock); 1706 1707 cc = sc->sc_rbavail += scc - cc; 1708 /* Buffers should be ok again, release possible block. */ 1709 if (cc >= sc->sc_r_lowat) { 1710 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1711 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1712 SET(sc->sc_ier, IER_ERXRDY); 1713 #ifdef COM_PXA2X0 1714 if (sc->sc_type == COM_TYPE_PXA2x0) 1715 SET(sc->sc_ier, IER_ERXTOUT); 1716 #endif 1717 CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, sc->sc_ier); 1718 } 1719 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1720 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1721 com_hwiflow(sc); 1722 } 1723 } 1724 mutex_spin_exit(&sc->sc_lock); 1725 } 1726 } 1727 1728 integrate void 1729 com_txsoft(struct com_softc *sc, struct tty *tp) 1730 { 1731 1732 CLR(tp->t_state, TS_BUSY); 1733 if (ISSET(tp->t_state, TS_FLUSH)) 1734 CLR(tp->t_state, TS_FLUSH); 1735 else 1736 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1737 (*tp->t_linesw->l_start)(tp); 1738 } 1739 1740 integrate void 1741 com_stsoft(struct com_softc *sc, struct tty *tp) 1742 { 1743 u_char msr, delta; 1744 1745 mutex_spin_enter(&sc->sc_lock); 1746 msr = sc->sc_msr; 1747 delta = sc->sc_msr_delta; 1748 sc->sc_msr_delta = 0; 1749 mutex_spin_exit(&sc->sc_lock); 1750 1751 if (ISSET(delta, sc->sc_msr_dcd)) { 1752 /* 1753 * Inform the tty layer that carrier detect changed. 1754 */ 1755 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1756 } 1757 1758 if (ISSET(delta, sc->sc_msr_cts)) { 1759 /* Block or unblock output according to flow control. */ 1760 if (ISSET(msr, sc->sc_msr_cts)) { 1761 sc->sc_tx_stopped = 0; 1762 (*tp->t_linesw->l_start)(tp); 1763 } else { 1764 sc->sc_tx_stopped = 1; 1765 } 1766 } 1767 1768 #ifdef COM_DEBUG 1769 if (com_debug) 1770 comstatus(sc, "com_stsoft"); 1771 #endif 1772 } 1773 1774 void 1775 comsoft(void *arg) 1776 { 1777 struct com_softc *sc = arg; 1778 struct tty *tp; 1779 1780 if (COM_ISALIVE(sc) == 0) 1781 return; 1782 1783 tp = sc->sc_tty; 1784 1785 if (sc->sc_rx_ready) { 1786 sc->sc_rx_ready = 0; 1787 com_rxsoft(sc, tp); 1788 } 1789 1790 if (sc->sc_st_check) { 1791 sc->sc_st_check = 0; 1792 com_stsoft(sc, tp); 1793 } 1794 1795 if (sc->sc_tx_done) { 1796 sc->sc_tx_done = 0; 1797 com_txsoft(sc, tp); 1798 } 1799 } 1800 1801 int 1802 comintr(void *arg) 1803 { 1804 struct com_softc *sc = arg; 1805 struct com_regs *regsp = &sc->sc_regs; 1806 1807 u_char *put, *end; 1808 u_int cc; 1809 u_char lsr, iir; 1810 1811 if (COM_ISALIVE(sc) == 0) 1812 return (0); 1813 1814 mutex_spin_enter(&sc->sc_lock); 1815 iir = CSR_READ_1(regsp, COM_REG_IIR); 1816 if (ISSET(iir, IIR_NOPEND)) { 1817 mutex_spin_exit(&sc->sc_lock); 1818 return (0); 1819 } 1820 1821 end = sc->sc_ebuf; 1822 put = sc->sc_rbput; 1823 cc = sc->sc_rbavail; 1824 1825 again: do { 1826 u_char msr, delta; 1827 1828 lsr = CSR_READ_1(regsp, COM_REG_LSR); 1829 if (ISSET(lsr, LSR_BI)) { 1830 int cn_trapped = 0; 1831 1832 cn_check_magic(sc->sc_tty->t_dev, 1833 CNC_BREAK, com_cnm_state); 1834 if (cn_trapped) 1835 continue; 1836 #if defined(KGDB) && !defined(DDB) 1837 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 1838 kgdb_connect(1); 1839 continue; 1840 } 1841 #endif 1842 } 1843 1844 if (ISSET(lsr, LSR_RCV_MASK) && 1845 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1846 while (cc > 0) { 1847 int cn_trapped = 0; 1848 put[0] = CSR_READ_1(regsp, COM_REG_RXDATA); 1849 put[1] = lsr; 1850 cn_check_magic(sc->sc_tty->t_dev, 1851 put[0], com_cnm_state); 1852 if (cn_trapped) 1853 goto next; 1854 put += 2; 1855 if (put >= end) 1856 put = sc->sc_rbuf; 1857 cc--; 1858 next: 1859 lsr = CSR_READ_1(regsp, COM_REG_LSR); 1860 if (!ISSET(lsr, LSR_RCV_MASK)) 1861 break; 1862 } 1863 1864 /* 1865 * Current string of incoming characters ended because 1866 * no more data was available or we ran out of space. 1867 * Schedule a receive event if any data was received. 1868 * If we're out of space, turn off receive interrupts. 1869 */ 1870 sc->sc_rbput = put; 1871 sc->sc_rbavail = cc; 1872 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1873 sc->sc_rx_ready = 1; 1874 1875 /* 1876 * See if we are in danger of overflowing a buffer. If 1877 * so, use hardware flow control to ease the pressure. 1878 */ 1879 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1880 cc < sc->sc_r_hiwat) { 1881 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1882 com_hwiflow(sc); 1883 } 1884 1885 /* 1886 * If we're out of space, disable receive interrupts 1887 * until the queue has drained a bit. 1888 */ 1889 if (!cc) { 1890 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1891 #ifdef COM_PXA2X0 1892 if (sc->sc_type == COM_TYPE_PXA2x0) 1893 CLR(sc->sc_ier, IER_ERXRDY|IER_ERXTOUT); 1894 else 1895 #endif 1896 CLR(sc->sc_ier, IER_ERXRDY); 1897 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 1898 } 1899 } else { 1900 if ((iir & (IIR_RXRDY|IIR_TXRDY)) == IIR_RXRDY) { 1901 (void) CSR_READ_1(regsp, COM_REG_RXDATA); 1902 continue; 1903 } 1904 } 1905 1906 msr = CSR_READ_1(regsp, COM_REG_MSR); 1907 delta = msr ^ sc->sc_msr; 1908 sc->sc_msr = msr; 1909 if ((sc->sc_pps_state.ppsparam.mode & PPS_CAPTUREBOTH) && 1910 (delta & MSR_DCD)) { 1911 pps_capture(&sc->sc_pps_state); 1912 pps_event(&sc->sc_pps_state, 1913 (msr & MSR_DCD) ? 1914 PPS_CAPTUREASSERT : 1915 PPS_CAPTURECLEAR); 1916 } 1917 1918 /* 1919 * Process normal status changes 1920 */ 1921 if (ISSET(delta, sc->sc_msr_mask)) { 1922 SET(sc->sc_msr_delta, delta); 1923 1924 /* 1925 * Stop output immediately if we lose the output 1926 * flow control signal or carrier detect. 1927 */ 1928 if (ISSET(~msr, sc->sc_msr_mask)) { 1929 sc->sc_tbc = 0; 1930 sc->sc_heldtbc = 0; 1931 #ifdef COM_DEBUG 1932 if (com_debug) 1933 comstatus(sc, "comintr "); 1934 #endif 1935 } 1936 1937 sc->sc_st_check = 1; 1938 } 1939 } while (!ISSET((iir = 1940 CSR_READ_1(regsp, COM_REG_IIR)), IIR_NOPEND) && 1941 /* 1942 * Since some device (e.g., ST16C1550) doesn't clear IIR_TXRDY 1943 * by IIR read, so we can't do this way: `process all interrupts, 1944 * then do TX if possble'. 1945 */ 1946 (iir & IIR_IMASK) != IIR_TXRDY); 1947 1948 /* 1949 * Read LSR again, since there may be an interrupt between 1950 * the last LSR read and IIR read above. 1951 */ 1952 lsr = CSR_READ_1(regsp, COM_REG_LSR); 1953 1954 /* 1955 * See if data can be transmitted as well. 1956 * Schedule tx done event if no data left 1957 * and tty was marked busy. 1958 */ 1959 if (ISSET(lsr, LSR_TXRDY)) { 1960 /* 1961 * If we've delayed a parameter change, do it now, and restart 1962 * output. 1963 */ 1964 if (sc->sc_heldchange) { 1965 com_loadchannelregs(sc); 1966 sc->sc_heldchange = 0; 1967 sc->sc_tbc = sc->sc_heldtbc; 1968 sc->sc_heldtbc = 0; 1969 } 1970 1971 /* Output the next chunk of the contiguous buffer, if any. */ 1972 if (sc->sc_tbc > 0) { 1973 u_int n; 1974 1975 n = sc->sc_tbc; 1976 if (n > sc->sc_fifolen) 1977 n = sc->sc_fifolen; 1978 CSR_WRITE_MULTI(regsp, COM_REG_TXDATA, sc->sc_tba, n); 1979 sc->sc_tbc -= n; 1980 sc->sc_tba += n; 1981 } else { 1982 /* Disable transmit completion interrupts if necessary. */ 1983 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 1984 CLR(sc->sc_ier, IER_ETXRDY); 1985 CSR_WRITE_1(regsp, COM_REG_IER, sc->sc_ier); 1986 } 1987 if (sc->sc_tx_busy) { 1988 sc->sc_tx_busy = 0; 1989 sc->sc_tx_done = 1; 1990 } 1991 } 1992 } 1993 1994 if (!ISSET((iir = CSR_READ_1(regsp, COM_REG_IIR)), IIR_NOPEND)) 1995 goto again; 1996 1997 mutex_spin_exit(&sc->sc_lock); 1998 1999 /* Wake up the poller. */ 2000 softint_schedule(sc->sc_si); 2001 2002 #if NRND > 0 && defined(RND_COM) 2003 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2004 #endif 2005 2006 return (1); 2007 } 2008 2009 /* 2010 * The following functions are polled getc and putc routines, shared 2011 * by the console and kgdb glue. 2012 * 2013 * The read-ahead code is so that you can detect pending in-band 2014 * cn_magic in polled mode while doing output rather than having to 2015 * wait until the kernel decides it needs input. 2016 */ 2017 2018 #define MAX_READAHEAD 20 2019 static int com_readahead[MAX_READAHEAD]; 2020 static int com_readaheadcount = 0; 2021 2022 int 2023 com_common_getc(dev_t dev, struct com_regs *regsp) 2024 { 2025 int s = splserial(); 2026 u_char stat, c; 2027 2028 /* got a character from reading things earlier */ 2029 if (com_readaheadcount > 0) { 2030 int i; 2031 2032 c = com_readahead[0]; 2033 for (i = 1; i < com_readaheadcount; i++) { 2034 com_readahead[i-1] = com_readahead[i]; 2035 } 2036 com_readaheadcount--; 2037 splx(s); 2038 return (c); 2039 } 2040 2041 /* block until a character becomes available */ 2042 while (!ISSET(stat = CSR_READ_1(regsp, COM_REG_LSR), LSR_RXRDY)) 2043 ; 2044 2045 c = CSR_READ_1(regsp, COM_REG_RXDATA); 2046 stat = CSR_READ_1(regsp, COM_REG_IIR); 2047 { 2048 int cn_trapped = 0; /* unused */ 2049 #ifdef DDB 2050 extern int db_active; 2051 if (!db_active) 2052 #endif 2053 cn_check_magic(dev, c, com_cnm_state); 2054 } 2055 splx(s); 2056 return (c); 2057 } 2058 2059 void 2060 com_common_putc(dev_t dev, struct com_regs *regsp, int c) 2061 { 2062 int s = splserial(); 2063 int cin, stat, timo; 2064 2065 if (com_readaheadcount < MAX_READAHEAD 2066 && ISSET(stat = CSR_READ_1(regsp, COM_REG_LSR), LSR_RXRDY)) { 2067 int cn_trapped = 0; 2068 cin = CSR_READ_1(regsp, COM_REG_RXDATA); 2069 stat = CSR_READ_1(regsp, COM_REG_IIR); 2070 cn_check_magic(dev, cin, com_cnm_state); 2071 com_readahead[com_readaheadcount++] = cin; 2072 } 2073 2074 /* wait for any pending transmission to finish */ 2075 timo = 150000; 2076 while (!ISSET(CSR_READ_1(regsp, COM_REG_LSR), LSR_TXRDY) && --timo) 2077 continue; 2078 2079 CSR_WRITE_1(regsp, COM_REG_TXDATA, c); 2080 COM_BARRIER(regsp, BR | BW); 2081 2082 splx(s); 2083 } 2084 2085 /* 2086 * Initialize UART for use as console or KGDB line. 2087 */ 2088 int 2089 cominit(struct com_regs *regsp, int rate, int frequency, int type, 2090 tcflag_t cflag) 2091 { 2092 2093 if (bus_space_map(regsp->cr_iot, regsp->cr_iobase, regsp->cr_nports, 0, 2094 ®sp->cr_ioh)) 2095 return (ENOMEM); /* ??? */ 2096 2097 rate = comspeed(rate, frequency, type); 2098 if (type != COM_TYPE_AU1x00) { 2099 /* no EFR on alchemy */ 2100 CSR_WRITE_1(regsp, COM_REG_LCR, LCR_EERS); 2101 CSR_WRITE_1(regsp, COM_REG_EFR, 0); 2102 CSR_WRITE_1(regsp, COM_REG_LCR, LCR_DLAB); 2103 CSR_WRITE_1(regsp, COM_REG_DLBL, rate & 0xff); 2104 CSR_WRITE_1(regsp, COM_REG_DLBH, rate >> 8); 2105 } else { 2106 CSR_WRITE_1(regsp, COM_REG_DLBL, rate); 2107 } 2108 CSR_WRITE_1(regsp, COM_REG_LCR, cflag2lcr(cflag)); 2109 CSR_WRITE_1(regsp, COM_REG_MCR, MCR_DTR | MCR_RTS); 2110 CSR_WRITE_1(regsp, COM_REG_FIFO, 2111 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2112 #ifdef COM_PXA2X0 2113 if (type == COM_TYPE_PXA2x0) 2114 CSR_WRITE_1(regsp, COM_REG_IER, IER_EUART); 2115 else 2116 #endif 2117 CSR_WRITE_1(regsp, COM_REG_IER, 0); 2118 2119 return (0); 2120 } 2121 2122 /* 2123 * Following are all routines needed for COM to act as console 2124 */ 2125 struct consdev comcons = { 2126 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, NULL, NULL, 2127 NODEV, CN_NORMAL 2128 }; 2129 2130 2131 int 2132 comcnattach1(struct com_regs *regsp, int rate, int frequency, int type, 2133 tcflag_t cflag) 2134 { 2135 int res; 2136 2137 comconsregs = *regsp; 2138 2139 res = cominit(&comconsregs, rate, frequency, type, cflag); 2140 if (res) 2141 return (res); 2142 2143 cn_tab = &comcons; 2144 cn_init_magic(&com_cnm_state); 2145 cn_set_magic("\047\001"); /* default magic is BREAK */ 2146 2147 comconsrate = rate; 2148 comconscflag = cflag; 2149 2150 return (0); 2151 } 2152 2153 int 2154 comcnattach(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2155 int type, tcflag_t cflag) 2156 { 2157 struct com_regs regs; 2158 2159 memset(®s, 0, sizeof regs); 2160 regs.cr_iot = iot; 2161 regs.cr_iobase = iobase; 2162 regs.cr_nports = COM_NPORTS; 2163 #ifdef COM_REGMAP 2164 memcpy(regs.cr_map, com_std_map, sizeof (regs.cr_map)); 2165 #endif 2166 2167 return comcnattach1(®s, rate, frequency, type, cflag); 2168 } 2169 2170 int 2171 comcngetc(dev_t dev) 2172 { 2173 2174 return (com_common_getc(dev, &comconsregs)); 2175 } 2176 2177 /* 2178 * Console kernel output character routine. 2179 */ 2180 void 2181 comcnputc(dev_t dev, int c) 2182 { 2183 2184 com_common_putc(dev, &comconsregs, c); 2185 } 2186 2187 void 2188 comcnpollc(dev_t dev, int on) 2189 { 2190 2191 } 2192 2193 #ifdef KGDB 2194 int 2195 com_kgdb_attach1(struct com_regs *regsp, int rate, int frequency, int type, 2196 tcflag_t cflag) 2197 { 2198 int res; 2199 2200 if (regsp->cr_iot == comconsregs.cr_iot && 2201 regsp->cr_iobase == comconsregs.cr_iobase) { 2202 #if !defined(DDB) 2203 return (EBUSY); /* cannot share with console */ 2204 #else 2205 comkgdbregs = *regsp; 2206 comkgdbregs.cr_ioh = comconsregs.cr_ioh; 2207 #endif 2208 } else { 2209 comkgdbregs = *regsp; 2210 res = cominit(&comkgdbregs, rate, frequency, type, cflag); 2211 if (res) 2212 return (res); 2213 2214 /* 2215 * XXXfvdl this shouldn't be needed, but the cn_magic goo 2216 * expects this to be initialized 2217 */ 2218 cn_init_magic(&com_cnm_state); 2219 cn_set_magic("\047\001"); 2220 } 2221 2222 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2223 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2224 2225 return (0); 2226 } 2227 2228 int 2229 com_kgdb_attach(bus_space_tag_t iot, bus_addr_t iobase, int rate, 2230 int frequency, int type, tcflag_t cflag) 2231 { 2232 struct com_regs regs; 2233 2234 regs.cr_iot = iot; 2235 regs.cr_nports = COM_NPORTS; 2236 regs.cr_iobase = iobase; 2237 #ifdef COM_REGMAP 2238 memcpy(regs.cr_map, com_std_map, sizeof (regs.cr_map)); 2239 #endif 2240 2241 return com_kgdb_attach1(®s, rate, frequency, type, cflag); 2242 } 2243 2244 /* ARGSUSED */ 2245 int 2246 com_kgdb_getc(void *arg) 2247 { 2248 2249 return (com_common_getc(NODEV, &comkgdbregs)); 2250 } 2251 2252 /* ARGSUSED */ 2253 void 2254 com_kgdb_putc(void *arg, int c) 2255 { 2256 2257 com_common_putc(NODEV, &comkgdbregs, c); 2258 } 2259 #endif /* KGDB */ 2260 2261 /* helper function to identify the com ports used by 2262 console or KGDB (and not yet autoconf attached) */ 2263 int 2264 com_is_console(bus_space_tag_t iot, bus_addr_t iobase, bus_space_handle_t *ioh) 2265 { 2266 bus_space_handle_t help; 2267 2268 if (!comconsattached && 2269 iot == comconsregs.cr_iot && iobase == comconsregs.cr_iobase) 2270 help = comconsregs.cr_ioh; 2271 #ifdef KGDB 2272 else if (!com_kgdb_attached && 2273 iot == comkgdbregs.cr_iot && iobase == comkgdbregs.cr_iobase) 2274 help = comkgdbregs.cr_ioh; 2275 #endif 2276 else 2277 return (0); 2278 2279 if (ioh) 2280 *ioh = help; 2281 return (1); 2282 } 2283 2284 /* 2285 * this routine exists to serve as a shutdown hook for systems that 2286 * have firmware which doesn't interact properly with a com device in 2287 * FIFO mode. 2288 */ 2289 bool 2290 com_cleanup(device_t self, int how) 2291 { 2292 struct com_softc *sc = device_private(self); 2293 2294 if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 2295 CSR_WRITE_1(&sc->sc_regs, COM_REG_FIFO, 0); 2296 2297 return true; 2298 } 2299 2300 bool 2301 com_suspend(device_t self PMF_FN_ARGS) 2302 { 2303 struct com_softc *sc = device_private(self); 2304 2305 CSR_WRITE_1(&sc->sc_regs, COM_REG_IER, 0); 2306 (void)CSR_READ_1(&sc->sc_regs, COM_REG_IIR); 2307 2308 return true; 2309 } 2310 2311 bool 2312 com_resume(device_t self PMF_FN_ARGS) 2313 { 2314 struct com_softc *sc = device_private(self); 2315 2316 mutex_spin_enter(&sc->sc_lock); 2317 com_loadchannelregs(sc); 2318 mutex_spin_exit(&sc->sc_lock); 2319 2320 return true; 2321 } 2322