1 /* $NetBSD: com.c,v 1.227 2004/05/01 19:03:59 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. Neither the name of the University nor the names of its contributors 52 * may be used to endorse or promote products derived from this software 53 * without specific prior written permission. 54 * 55 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 56 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 57 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 58 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 59 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 60 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 61 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 62 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 63 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 64 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 65 * SUCH DAMAGE. 66 * 67 * @(#)com.c 7.5 (Berkeley) 5/16/91 68 */ 69 70 /* 71 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 72 * Supports automatic hardware flow control on StarTech ST16C650A UART 73 */ 74 75 #include <sys/cdefs.h> 76 __KERNEL_RCSID(0, "$NetBSD: com.c,v 1.227 2004/05/01 19:03:59 thorpej Exp $"); 77 78 #include "opt_com.h" 79 #include "opt_ddb.h" 80 #include "opt_kgdb.h" 81 #include "opt_lockdebug.h" 82 #include "opt_multiprocessor.h" 83 #include "opt_ntp.h" 84 85 #include "rnd.h" 86 #if NRND > 0 && defined(RND_COM) 87 #include <sys/rnd.h> 88 #endif 89 90 /* The COM16650 option was renamed to COM_16650. */ 91 #ifdef COM16650 92 #error Obsolete COM16650 option; use COM_16650 instead. 93 #endif 94 95 /* 96 * Override cnmagic(9) macro before including <sys/systm.h>. 97 * We need to know if cn_check_magic triggered debugger, so set a flag. 98 * Callers of cn_check_magic must declare int cn_trapped = 0; 99 * XXX: this is *ugly*! 100 */ 101 #define cn_trap() \ 102 do { \ 103 console_debugger(); \ 104 cn_trapped = 1; \ 105 } while (/* CONSTCOND */ 0) 106 107 #include <sys/param.h> 108 #include <sys/systm.h> 109 #include <sys/ioctl.h> 110 #include <sys/select.h> 111 #include <sys/tty.h> 112 #include <sys/proc.h> 113 #include <sys/user.h> 114 #include <sys/conf.h> 115 #include <sys/file.h> 116 #include <sys/uio.h> 117 #include <sys/kernel.h> 118 #include <sys/syslog.h> 119 #include <sys/device.h> 120 #include <sys/malloc.h> 121 #include <sys/timepps.h> 122 #include <sys/vnode.h> 123 124 #include <machine/intr.h> 125 #include <machine/bus.h> 126 127 #include <dev/ic/comreg.h> 128 #include <dev/ic/comvar.h> 129 #include <dev/ic/ns16550reg.h> 130 #include <dev/ic/st16650reg.h> 131 #ifdef COM_HAYESP 132 #include <dev/ic/hayespreg.h> 133 #endif 134 #define com_lcr com_cfcr 135 #include <dev/cons.h> 136 137 #ifdef COM_HAYESP 138 int comprobeHAYESP(bus_space_handle_t hayespioh, struct com_softc *sc); 139 #endif 140 141 static void com_enable_debugport(struct com_softc *); 142 143 void com_config(struct com_softc *); 144 void com_shutdown(struct com_softc *); 145 int comspeed(long, long, int); 146 static u_char cflag2lcr(tcflag_t); 147 int comparam(struct tty *, struct termios *); 148 void comstart(struct tty *); 149 int comhwiflow(struct tty *, int); 150 151 void com_loadchannelregs(struct com_softc *); 152 void com_hwiflow(struct com_softc *); 153 void com_break(struct com_softc *, int); 154 void com_modem(struct com_softc *, int); 155 void tiocm_to_com(struct com_softc *, u_long, int); 156 int com_to_tiocm(struct com_softc *); 157 void com_iflush(struct com_softc *); 158 159 int com_common_getc(dev_t, bus_space_tag_t, bus_space_handle_t); 160 void com_common_putc(dev_t, bus_space_tag_t, bus_space_handle_t, int); 161 162 int cominit(bus_space_tag_t, bus_addr_t, int, int, int, tcflag_t, 163 bus_space_handle_t *); 164 165 int comcngetc(dev_t); 166 void comcnputc(dev_t, int); 167 void comcnpollc(dev_t, int); 168 169 #define integrate static inline 170 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 171 void comsoft(void *); 172 #else 173 #ifndef __NO_SOFT_SERIAL_INTERRUPT 174 void comsoft(void); 175 #else 176 void comsoft(void *); 177 static struct callout comsoft_callout = CALLOUT_INITIALIZER; 178 #endif 179 #endif 180 integrate void com_rxsoft(struct com_softc *, struct tty *); 181 integrate void com_txsoft(struct com_softc *, struct tty *); 182 integrate void com_stsoft(struct com_softc *, struct tty *); 183 integrate void com_schedrx(struct com_softc *); 184 void comdiag(void *); 185 186 extern struct cfdriver com_cd; 187 188 dev_type_open(comopen); 189 dev_type_close(comclose); 190 dev_type_read(comread); 191 dev_type_write(comwrite); 192 dev_type_ioctl(comioctl); 193 dev_type_stop(comstop); 194 dev_type_tty(comtty); 195 dev_type_poll(compoll); 196 197 const struct cdevsw com_cdevsw = { 198 comopen, comclose, comread, comwrite, comioctl, 199 comstop, comtty, compoll, nommap, ttykqfilter, D_TTY 200 }; 201 202 /* 203 * Make this an option variable one can patch. 204 * But be warned: this must be a power of 2! 205 */ 206 u_int com_rbuf_size = COM_RING_SIZE; 207 208 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 209 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 210 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 211 212 static bus_addr_t comconsaddr; 213 static bus_space_tag_t comconstag; 214 static bus_space_handle_t comconsioh; 215 static int comconsattached; 216 static int comconsrate; 217 static tcflag_t comconscflag; 218 static struct cnm_state com_cnm_state; 219 220 static int ppscap = 221 PPS_TSFMT_TSPEC | 222 PPS_CAPTUREASSERT | 223 PPS_CAPTURECLEAR | 224 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 225 226 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 227 #ifdef __NO_SOFT_SERIAL_INTERRUPT 228 volatile int com_softintr_scheduled; 229 #endif 230 #endif 231 232 #ifdef KGDB 233 #include <sys/kgdb.h> 234 235 static bus_addr_t com_kgdb_addr; 236 static bus_space_tag_t com_kgdb_iot; 237 static bus_space_handle_t com_kgdb_ioh; 238 static int com_kgdb_attached; 239 240 int com_kgdb_getc(void *); 241 void com_kgdb_putc(void *, int); 242 #endif /* KGDB */ 243 244 #define COMUNIT_MASK 0x7ffff 245 #define COMDIALOUT_MASK 0x80000 246 247 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 248 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 249 250 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 251 ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE)) 252 253 #define BR BUS_SPACE_BARRIER_READ 254 #define BW BUS_SPACE_BARRIER_WRITE 255 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 256 257 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 258 259 #define COM_LOCK(sc) simple_lock(&(sc)->sc_lock) 260 #define COM_UNLOCK(sc) simple_unlock(&(sc)->sc_lock) 261 262 #else 263 264 #define COM_LOCK(sc) 265 #define COM_UNLOCK(sc) 266 267 #endif 268 269 /*ARGSUSED*/ 270 int 271 comspeed(long speed, long frequency, int type) 272 { 273 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 274 275 int x, err; 276 277 #if 0 278 if (speed == 0) 279 return (0); 280 #endif 281 if (speed <= 0) 282 return (-1); 283 x = divrnd(frequency / 16, speed); 284 if (x <= 0) 285 return (-1); 286 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 287 if (err < 0) 288 err = -err; 289 if (err > COM_TOLERANCE) 290 return (-1); 291 return (x); 292 293 #undef divrnd 294 } 295 296 #ifdef COM_DEBUG 297 int com_debug = 0; 298 299 void comstatus(struct com_softc *, char *); 300 void 301 comstatus(struct com_softc *sc, char *str) 302 { 303 struct tty *tp = sc->sc_tty; 304 305 printf("%s: %s %cclocal %cdcd %cts_carr_on %cdtr %ctx_stopped\n", 306 sc->sc_dev.dv_xname, str, 307 ISSET(tp->t_cflag, CLOCAL) ? '+' : '-', 308 ISSET(sc->sc_msr, MSR_DCD) ? '+' : '-', 309 ISSET(tp->t_state, TS_CARR_ON) ? '+' : '-', 310 ISSET(sc->sc_mcr, MCR_DTR) ? '+' : '-', 311 sc->sc_tx_stopped ? '+' : '-'); 312 313 printf("%s: %s %ccrtscts %ccts %cts_ttstop %crts rx_flags=0x%x\n", 314 sc->sc_dev.dv_xname, str, 315 ISSET(tp->t_cflag, CRTSCTS) ? '+' : '-', 316 ISSET(sc->sc_msr, MSR_CTS) ? '+' : '-', 317 ISSET(tp->t_state, TS_TTSTOP) ? '+' : '-', 318 ISSET(sc->sc_mcr, MCR_RTS) ? '+' : '-', 319 sc->sc_rx_flags); 320 } 321 #endif 322 323 int 324 comprobe1(bus_space_tag_t iot, bus_space_handle_t ioh) 325 { 326 327 /* force access to id reg */ 328 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 329 bus_space_write_1(iot, ioh, com_iir, 0); 330 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 331 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 332 return (0); 333 334 return (1); 335 } 336 337 #ifdef COM_HAYESP 338 int 339 comprobeHAYESP(bus_space_handle_t hayespioh, struct com_softc *sc) 340 { 341 char val, dips; 342 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 343 bus_space_tag_t iot = sc->sc_iot; 344 345 /* 346 * Hayes ESP cards have two iobases. One is for compatibility with 347 * 16550 serial chips, and at the same ISA PC base addresses. The 348 * other is for ESP-specific enhanced features, and lies at a 349 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 350 */ 351 352 /* Test for ESP signature */ 353 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 354 return (0); 355 356 /* 357 * ESP is present at ESP enhanced base address; unknown com port 358 */ 359 360 /* Get the dip-switch configurations */ 361 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 362 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 363 364 /* Determine which com port this ESP card services: bits 0,1 of */ 365 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 366 if (sc->sc_iobase != combaselist[dips & 0x03]) 367 return (0); 368 369 printf(": ESP"); 370 371 /* Check ESP Self Test bits. */ 372 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 373 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 374 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 375 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 376 if ((val & 0x70) < 0x20) { 377 printf("-old (%o)", val & 0x70); 378 /* we do not support the necessary features */ 379 return (0); 380 } 381 382 /* Check for ability to emulate 16550: bit 8 == 1 */ 383 if ((dips & 0x80) == 0) { 384 printf(" slave"); 385 /* XXX Does slave really mean no 16550 support?? */ 386 return (0); 387 } 388 389 /* 390 * If we made it this far, we are a full-featured ESP v2.0 (or 391 * better), at the correct com port address. 392 */ 393 394 sc->sc_type = COM_TYPE_HAYESP; 395 printf(", 1024 byte fifo\n"); 396 return (1); 397 } 398 #endif 399 400 static void 401 com_enable_debugport(struct com_softc *sc) 402 { 403 int s; 404 405 /* Turn on line break interrupt, set carrier. */ 406 s = splserial(); 407 COM_LOCK(sc); 408 sc->sc_ier = IER_ERXRDY; 409 #ifdef COM_PXA2X0 410 if (sc->sc_type == COM_TYPE_PXA2x0) 411 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 412 #endif 413 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 414 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 415 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 416 COM_UNLOCK(sc); 417 splx(s); 418 } 419 420 void 421 com_attach_subr(struct com_softc *sc) 422 { 423 bus_addr_t iobase = sc->sc_iobase; 424 bus_space_tag_t iot = sc->sc_iot; 425 bus_space_handle_t ioh = sc->sc_ioh; 426 struct tty *tp; 427 #ifdef COM_16650 428 u_int8_t lcr; 429 #endif 430 #ifdef COM_HAYESP 431 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 432 int *hayespp; 433 #endif 434 const char *fifo_msg = NULL; 435 436 callout_init(&sc->sc_diag_callout); 437 #if (defined(MULTIPROCESSOR) || defined(LOCKDEBUG)) && defined(COM_MPLOCK) 438 simple_lock_init(&sc->sc_lock); 439 #endif 440 441 /* Disable interrupts before configuring the device. */ 442 #ifdef COM_PXA2X0 443 if (sc->sc_type == COM_TYPE_PXA2x0) 444 sc->sc_ier = IER_EUART; 445 else 446 #endif 447 sc->sc_ier = 0; 448 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 449 450 if (iot == comconstag && iobase == comconsaddr) { 451 comconsattached = 1; 452 453 /* Make sure the console is always "hardwired". */ 454 delay(10000); /* wait for output to finish */ 455 SET(sc->sc_hwflags, COM_HW_CONSOLE); 456 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 457 } 458 459 #ifdef COM_HAYESP 460 sc->sc_prescaler = 0; /* set prescaler to x1. */ 461 462 /* Look for a Hayes ESP board. */ 463 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 464 bus_space_handle_t hayespioh; 465 466 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 467 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 468 continue; 469 if (comprobeHAYESP(hayespioh, sc)) { 470 sc->sc_hayespioh = hayespioh; 471 sc->sc_fifolen = 1024; 472 473 break; 474 } 475 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 476 } 477 /* No ESP; look for other things. */ 478 if (sc->sc_type != COM_TYPE_HAYESP) { 479 #endif 480 sc->sc_fifolen = 1; 481 /* look for a NS 16550AF UART with FIFOs */ 482 bus_space_write_1(iot, ioh, com_fifo, 483 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 484 delay(100); 485 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 486 == IIR_FIFO_MASK) 487 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 488 == FIFO_TRIGGER_14) { 489 SET(sc->sc_hwflags, COM_HW_FIFO); 490 491 #ifdef COM_16650 492 /* 493 * IIR changes into the EFR if LCR is set to LCR_EERS 494 * on 16650s. We also know IIR != 0 at this point. 495 * Write 0 into the EFR, and read it. If the result 496 * is 0, we have a 16650. 497 * 498 * Older 16650s were broken; the test to detect them 499 * is taken from the Linux driver. Apparently 500 * setting DLAB enable gives access to the EFR on 501 * these chips. 502 */ 503 lcr = bus_space_read_1(iot, ioh, com_lcr); 504 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 505 bus_space_write_1(iot, ioh, com_efr, 0); 506 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 507 bus_space_write_1(iot, ioh, com_lcr, 508 lcr | LCR_DLAB); 509 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 510 CLR(sc->sc_hwflags, COM_HW_FIFO); 511 sc->sc_fifolen = 0; 512 } else { 513 SET(sc->sc_hwflags, COM_HW_FLOW); 514 sc->sc_fifolen = 32; 515 } 516 } else 517 #endif 518 sc->sc_fifolen = 16; 519 520 #ifdef COM_16650 521 bus_space_write_1(iot, ioh, com_lcr, lcr); 522 if (sc->sc_fifolen == 0) 523 fifo_msg = "st16650, broken fifo"; 524 else if (sc->sc_fifolen == 32) 525 fifo_msg = "st16650a, working fifo"; 526 else 527 #endif 528 fifo_msg = "ns16550a, working fifo"; 529 } else 530 fifo_msg = "ns16550, broken fifo"; 531 else 532 fifo_msg = "ns8250 or ns16450, no fifo"; 533 bus_space_write_1(iot, ioh, com_fifo, 0); 534 /* 535 * Some chips will clear down both Tx and Rx FIFOs when zero is 536 * written to com_fifo. If this chip is the console, writing zero 537 * results in some of the chip/FIFO description being lost, so delay 538 * printing it until now. 539 */ 540 delay(10); 541 aprint_normal(": %s\n", fifo_msg); 542 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 543 sc->sc_fifolen = 1; 544 aprint_normal("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 545 } 546 #ifdef COM_HAYESP 547 } 548 #endif 549 550 tp = ttymalloc(); 551 tp->t_oproc = comstart; 552 tp->t_param = comparam; 553 tp->t_hwiflow = comhwiflow; 554 555 sc->sc_tty = tp; 556 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 557 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 558 sc->sc_rbavail = com_rbuf_size; 559 if (sc->sc_rbuf == NULL) { 560 aprint_error("%s: unable to allocate ring buffer\n", 561 sc->sc_dev.dv_xname); 562 return; 563 } 564 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 565 566 tty_attach(tp); 567 568 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 569 SET(sc->sc_mcr, MCR_IENABLE); 570 571 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 572 int maj; 573 574 /* locate the major number */ 575 maj = cdevsw_lookup_major(&com_cdevsw); 576 577 tp->t_dev = cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 578 579 aprint_normal("%s: console\n", sc->sc_dev.dv_xname); 580 } 581 582 #ifdef KGDB 583 /* 584 * Allow kgdb to "take over" this port. If this is 585 * not the console and is the kgdb device, it has 586 * exclusive use. If it's the console _and_ the 587 * kgdb device, it doesn't. 588 */ 589 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 590 if (!ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 591 com_kgdb_attached = 1; 592 593 SET(sc->sc_hwflags, COM_HW_KGDB); 594 } 595 aprint_normal("%s: kgdb\n", sc->sc_dev.dv_xname); 596 } 597 #endif 598 599 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 600 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 601 #endif 602 603 #if NRND > 0 && defined(RND_COM) 604 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 605 RND_TYPE_TTY, 0); 606 #endif 607 608 /* if there are no enable/disable functions, assume the device 609 is always enabled */ 610 if (!sc->enable) 611 sc->enabled = 1; 612 613 com_config(sc); 614 615 SET(sc->sc_hwflags, COM_HW_DEV_OK); 616 } 617 618 void 619 com_config(struct com_softc *sc) 620 { 621 bus_space_tag_t iot = sc->sc_iot; 622 bus_space_handle_t ioh = sc->sc_ioh; 623 624 /* Disable interrupts before configuring the device. */ 625 #ifdef COM_PXA2X0 626 if (sc->sc_type == COM_TYPE_PXA2x0) 627 sc->sc_ier = IER_EUART; 628 else 629 #endif 630 sc->sc_ier = 0; 631 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 632 633 #ifdef COM_HAYESP 634 /* Look for a Hayes ESP board. */ 635 if (sc->sc_type == COM_TYPE_HAYESP) { 636 sc->sc_fifolen = 1024; 637 638 /* Set 16550 compatibility mode */ 639 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 640 HAYESP_SETMODE); 641 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 642 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 643 HAYESP_MODE_SCALE); 644 645 /* Set RTS/CTS flow control */ 646 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 647 HAYESP_SETFLOWTYPE); 648 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 649 HAYESP_FLOW_RTS); 650 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 651 HAYESP_FLOW_CTS); 652 653 /* Set flow control levels */ 654 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 655 HAYESP_SETRXFLOW); 656 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 657 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 658 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 659 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 660 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 661 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 662 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 663 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 664 } 665 #endif 666 667 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE|COM_HW_KGDB)) 668 com_enable_debugport(sc); 669 } 670 671 int 672 com_detach(struct device *self, int flags) 673 { 674 struct com_softc *sc = (struct com_softc *)self; 675 int maj, mn; 676 677 /* locate the major number */ 678 maj = cdevsw_lookup_major(&com_cdevsw); 679 680 /* Nuke the vnodes for any open instances. */ 681 mn = self->dv_unit; 682 vdevgone(maj, mn, mn, VCHR); 683 684 mn |= COMDIALOUT_MASK; 685 vdevgone(maj, mn, mn, VCHR); 686 687 if (sc->sc_rbuf == NULL) { 688 /* 689 * Ring buffer allocation failed in the com_attach_subr, 690 * only the tty is allocated, and nothing else. 691 */ 692 ttyfree(sc->sc_tty); 693 return 0; 694 } 695 696 /* Free the receive buffer. */ 697 free(sc->sc_rbuf, M_DEVBUF); 698 699 /* Detach and free the tty. */ 700 tty_detach(sc->sc_tty); 701 ttyfree(sc->sc_tty); 702 703 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 704 /* Unhook the soft interrupt handler. */ 705 softintr_disestablish(sc->sc_si); 706 #endif 707 708 #if NRND > 0 && defined(RND_COM) 709 /* Unhook the entropy source. */ 710 rnd_detach_source(&sc->rnd_source); 711 #endif 712 713 return (0); 714 } 715 716 int 717 com_activate(struct device *self, enum devact act) 718 { 719 struct com_softc *sc = (struct com_softc *)self; 720 int s, rv = 0; 721 722 s = splserial(); 723 COM_LOCK(sc); 724 switch (act) { 725 case DVACT_ACTIVATE: 726 rv = EOPNOTSUPP; 727 break; 728 729 case DVACT_DEACTIVATE: 730 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 731 rv = EBUSY; 732 break; 733 } 734 735 if (sc->disable != NULL && sc->enabled != 0) { 736 (*sc->disable)(sc); 737 sc->enabled = 0; 738 } 739 break; 740 } 741 742 COM_UNLOCK(sc); 743 splx(s); 744 return (rv); 745 } 746 747 void 748 com_shutdown(struct com_softc *sc) 749 { 750 struct tty *tp = sc->sc_tty; 751 int s; 752 753 s = splserial(); 754 COM_LOCK(sc); 755 756 /* If we were asserting flow control, then deassert it. */ 757 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 758 com_hwiflow(sc); 759 760 /* Clear any break condition set with TIOCSBRK. */ 761 com_break(sc, 0); 762 763 /* Turn off PPS capture on last close. */ 764 sc->sc_ppsmask = 0; 765 sc->ppsparam.mode = 0; 766 767 /* 768 * Hang up if necessary. Wait a bit, so the other side has time to 769 * notice even if we immediately open the port again. 770 * Avoid tsleeping above splhigh(). 771 */ 772 if (ISSET(tp->t_cflag, HUPCL)) { 773 com_modem(sc, 0); 774 COM_UNLOCK(sc); 775 splx(s); 776 /* XXX tsleep will only timeout */ 777 (void) tsleep(sc, TTIPRI, ttclos, hz); 778 s = splserial(); 779 COM_LOCK(sc); 780 } 781 782 /* Turn off interrupts. */ 783 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 784 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 785 #ifdef COM_PXA2X0 786 if (sc->sc_type == COM_TYPE_PXA2x0) 787 sc->sc_ier |= IER_ERXTOUT; 788 #endif 789 } else 790 sc->sc_ier = 0; 791 792 #ifdef COM_PXA2X0 793 if (sc->sc_type == COM_TYPE_PXA2x0) 794 sc->sc_ier |= IER_EUART; 795 #endif 796 797 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 798 799 if (sc->disable) { 800 #ifdef DIAGNOSTIC 801 if (!sc->enabled) 802 panic("com_shutdown: not enabled?"); 803 #endif 804 (*sc->disable)(sc); 805 sc->enabled = 0; 806 } 807 COM_UNLOCK(sc); 808 splx(s); 809 } 810 811 int 812 comopen(dev_t dev, int flag, int mode, struct proc *p) 813 { 814 struct com_softc *sc; 815 struct tty *tp; 816 int s, s2; 817 int error; 818 819 sc = device_lookup(&com_cd, COMUNIT(dev)); 820 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 821 sc->sc_rbuf == NULL) 822 return (ENXIO); 823 824 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 825 return (ENXIO); 826 827 #ifdef KGDB 828 /* 829 * If this is the kgdb port, no other use is permitted. 830 */ 831 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 832 return (EBUSY); 833 #endif 834 835 tp = sc->sc_tty; 836 837 if (ISSET(tp->t_state, TS_ISOPEN) && 838 ISSET(tp->t_state, TS_XCLUDE) && 839 p->p_ucred->cr_uid != 0) 840 return (EBUSY); 841 842 s = spltty(); 843 844 /* 845 * Do the following iff this is a first open. 846 */ 847 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 848 struct termios t; 849 850 tp->t_dev = dev; 851 852 s2 = splserial(); 853 COM_LOCK(sc); 854 855 if (sc->enable) { 856 if ((*sc->enable)(sc)) { 857 COM_UNLOCK(sc); 858 splx(s2); 859 splx(s); 860 printf("%s: device enable failed\n", 861 sc->sc_dev.dv_xname); 862 return (EIO); 863 } 864 sc->enabled = 1; 865 com_config(sc); 866 } 867 868 /* Turn on interrupts. */ 869 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 870 #ifdef COM_PXA2X0 871 if (sc->sc_type == COM_TYPE_PXA2x0) 872 sc->sc_ier |= IER_EUART | IER_ERXTOUT; 873 #endif 874 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 875 876 /* Fetch the current modem control status, needed later. */ 877 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 878 879 /* Clear PPS capture state on first open. */ 880 sc->sc_ppsmask = 0; 881 sc->ppsparam.mode = 0; 882 883 COM_UNLOCK(sc); 884 splx(s2); 885 886 /* 887 * Initialize the termios status to the defaults. Add in the 888 * sticky bits from TIOCSFLAGS. 889 */ 890 t.c_ispeed = 0; 891 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 892 t.c_ospeed = comconsrate; 893 t.c_cflag = comconscflag; 894 } else { 895 t.c_ospeed = TTYDEF_SPEED; 896 t.c_cflag = TTYDEF_CFLAG; 897 } 898 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 899 SET(t.c_cflag, CLOCAL); 900 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 901 SET(t.c_cflag, CRTSCTS); 902 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 903 SET(t.c_cflag, MDMBUF); 904 /* Make sure comparam() will do something. */ 905 tp->t_ospeed = 0; 906 (void) comparam(tp, &t); 907 tp->t_iflag = TTYDEF_IFLAG; 908 tp->t_oflag = TTYDEF_OFLAG; 909 tp->t_lflag = TTYDEF_LFLAG; 910 ttychars(tp); 911 ttsetwater(tp); 912 913 s2 = splserial(); 914 COM_LOCK(sc); 915 916 /* 917 * Turn on DTR. We must always do this, even if carrier is not 918 * present, because otherwise we'd have to use TIOCSDTR 919 * immediately after setting CLOCAL, which applications do not 920 * expect. We always assert DTR while the device is open 921 * unless explicitly requested to deassert it. 922 */ 923 com_modem(sc, 1); 924 925 /* Clear the input ring, and unblock. */ 926 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 927 sc->sc_rbavail = com_rbuf_size; 928 com_iflush(sc); 929 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 930 com_hwiflow(sc); 931 932 #ifdef COM_DEBUG 933 if (com_debug) 934 comstatus(sc, "comopen "); 935 #endif 936 937 COM_UNLOCK(sc); 938 splx(s2); 939 } 940 941 splx(s); 942 943 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 944 if (error) 945 goto bad; 946 947 error = (*tp->t_linesw->l_open)(dev, tp); 948 if (error) 949 goto bad; 950 951 return (0); 952 953 bad: 954 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 955 /* 956 * We failed to open the device, and nobody else had it opened. 957 * Clean up the state as appropriate. 958 */ 959 com_shutdown(sc); 960 } 961 962 return (error); 963 } 964 965 int 966 comclose(dev_t dev, int flag, int mode, struct proc *p) 967 { 968 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 969 struct tty *tp = sc->sc_tty; 970 971 /* XXX This is for cons.c. */ 972 if (!ISSET(tp->t_state, TS_ISOPEN)) 973 return (0); 974 975 (*tp->t_linesw->l_close)(tp, flag); 976 ttyclose(tp); 977 978 if (COM_ISALIVE(sc) == 0) 979 return (0); 980 981 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 982 /* 983 * Although we got a last close, the device may still be in 984 * use; e.g. if this was the dialout node, and there are still 985 * processes waiting for carrier on the non-dialout node. 986 */ 987 com_shutdown(sc); 988 } 989 990 return (0); 991 } 992 993 int 994 comread(dev_t dev, struct uio *uio, int flag) 995 { 996 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 997 struct tty *tp = sc->sc_tty; 998 999 if (COM_ISALIVE(sc) == 0) 1000 return (EIO); 1001 1002 return ((*tp->t_linesw->l_read)(tp, uio, flag)); 1003 } 1004 1005 int 1006 comwrite(dev_t dev, struct uio *uio, int flag) 1007 { 1008 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1009 struct tty *tp = sc->sc_tty; 1010 1011 if (COM_ISALIVE(sc) == 0) 1012 return (EIO); 1013 1014 return ((*tp->t_linesw->l_write)(tp, uio, flag)); 1015 } 1016 1017 int 1018 compoll(dev_t dev, int events, struct proc *p) 1019 { 1020 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1021 struct tty *tp = sc->sc_tty; 1022 1023 if (COM_ISALIVE(sc) == 0) 1024 return (EIO); 1025 1026 return ((*tp->t_linesw->l_poll)(tp, events, p)); 1027 } 1028 1029 struct tty * 1030 comtty(dev_t dev) 1031 { 1032 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1033 struct tty *tp = sc->sc_tty; 1034 1035 return (tp); 1036 } 1037 1038 int 1039 comioctl(dev_t dev, u_long cmd, caddr_t data, int flag, struct proc *p) 1040 { 1041 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 1042 struct tty *tp = sc->sc_tty; 1043 int error; 1044 int s; 1045 1046 if (COM_ISALIVE(sc) == 0) 1047 return (EIO); 1048 1049 error = (*tp->t_linesw->l_ioctl)(tp, cmd, data, flag, p); 1050 if (error != EPASSTHROUGH) 1051 return (error); 1052 1053 error = ttioctl(tp, cmd, data, flag, p); 1054 if (error != EPASSTHROUGH) 1055 return (error); 1056 1057 error = 0; 1058 1059 s = splserial(); 1060 COM_LOCK(sc); 1061 1062 switch (cmd) { 1063 case TIOCSBRK: 1064 com_break(sc, 1); 1065 break; 1066 1067 case TIOCCBRK: 1068 com_break(sc, 0); 1069 break; 1070 1071 case TIOCSDTR: 1072 com_modem(sc, 1); 1073 break; 1074 1075 case TIOCCDTR: 1076 com_modem(sc, 0); 1077 break; 1078 1079 case TIOCGFLAGS: 1080 *(int *)data = sc->sc_swflags; 1081 break; 1082 1083 case TIOCSFLAGS: 1084 error = suser(p->p_ucred, &p->p_acflag); 1085 if (error) 1086 break; 1087 sc->sc_swflags = *(int *)data; 1088 break; 1089 1090 case TIOCMSET: 1091 case TIOCMBIS: 1092 case TIOCMBIC: 1093 tiocm_to_com(sc, cmd, *(int *)data); 1094 break; 1095 1096 case TIOCMGET: 1097 *(int *)data = com_to_tiocm(sc); 1098 break; 1099 1100 case PPS_IOC_CREATE: 1101 break; 1102 1103 case PPS_IOC_DESTROY: 1104 break; 1105 1106 case PPS_IOC_GETPARAMS: { 1107 pps_params_t *pp; 1108 pp = (pps_params_t *)data; 1109 *pp = sc->ppsparam; 1110 break; 1111 } 1112 1113 case PPS_IOC_SETPARAMS: { 1114 pps_params_t *pp; 1115 int mode; 1116 pp = (pps_params_t *)data; 1117 if (pp->mode & ~ppscap) { 1118 error = EINVAL; 1119 break; 1120 } 1121 sc->ppsparam = *pp; 1122 /* 1123 * Compute msr masks from user-specified timestamp state. 1124 */ 1125 mode = sc->ppsparam.mode; 1126 switch (mode & PPS_CAPTUREBOTH) { 1127 case 0: 1128 sc->sc_ppsmask = 0; 1129 break; 1130 1131 case PPS_CAPTUREASSERT: 1132 sc->sc_ppsmask = MSR_DCD; 1133 sc->sc_ppsassert = MSR_DCD; 1134 sc->sc_ppsclear = -1; 1135 break; 1136 1137 case PPS_CAPTURECLEAR: 1138 sc->sc_ppsmask = MSR_DCD; 1139 sc->sc_ppsassert = -1; 1140 sc->sc_ppsclear = 0; 1141 break; 1142 1143 case PPS_CAPTUREBOTH: 1144 sc->sc_ppsmask = MSR_DCD; 1145 sc->sc_ppsassert = MSR_DCD; 1146 sc->sc_ppsclear = 0; 1147 break; 1148 1149 default: 1150 error = EINVAL; 1151 break; 1152 } 1153 break; 1154 } 1155 1156 case PPS_IOC_GETCAP: 1157 *(int*)data = ppscap; 1158 break; 1159 1160 case PPS_IOC_FETCH: { 1161 pps_info_t *pi; 1162 pi = (pps_info_t *)data; 1163 *pi = sc->ppsinfo; 1164 break; 1165 } 1166 1167 #ifdef PPS_SYNC 1168 case PPS_IOC_KCBIND: { 1169 int edge = (*(int *)data) & PPS_CAPTUREBOTH; 1170 1171 if (edge == 0) { 1172 /* 1173 * remove binding for this source; ignore 1174 * the request if this is not the current 1175 * hardpps source 1176 */ 1177 if (pps_kc_hardpps_source == sc) { 1178 pps_kc_hardpps_source = NULL; 1179 pps_kc_hardpps_mode = 0; 1180 } 1181 } else { 1182 /* 1183 * bind hardpps to this source, replacing any 1184 * previously specified source or edges 1185 */ 1186 pps_kc_hardpps_source = sc; 1187 pps_kc_hardpps_mode = edge; 1188 } 1189 break; 1190 } 1191 #endif /* PPS_SYNC */ 1192 1193 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1194 /* 1195 * Some GPS clocks models use the falling rather than 1196 * rising edge as the on-the-second signal. 1197 * The old API has no way to specify PPS polarity. 1198 */ 1199 sc->sc_ppsmask = MSR_DCD; 1200 #ifndef PPS_TRAILING_EDGE 1201 sc->sc_ppsassert = MSR_DCD; 1202 sc->sc_ppsclear = -1; 1203 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1204 &sc->ppsinfo.assert_timestamp); 1205 #else 1206 sc->sc_ppsassert = -1; 1207 sc->sc_ppsclear = 0; 1208 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1209 &sc->ppsinfo.clear_timestamp); 1210 #endif 1211 break; 1212 1213 default: 1214 error = EPASSTHROUGH; 1215 break; 1216 } 1217 1218 COM_UNLOCK(sc); 1219 splx(s); 1220 1221 #ifdef COM_DEBUG 1222 if (com_debug) 1223 comstatus(sc, "comioctl "); 1224 #endif 1225 1226 return (error); 1227 } 1228 1229 integrate void 1230 com_schedrx(struct com_softc *sc) 1231 { 1232 1233 sc->sc_rx_ready = 1; 1234 1235 /* Wake up the poller. */ 1236 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1237 softintr_schedule(sc->sc_si); 1238 #else 1239 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1240 setsoftserial(); 1241 #else 1242 if (!com_softintr_scheduled) { 1243 com_softintr_scheduled = 1; 1244 callout_reset(&comsoft_callout, 1, comsoft, NULL); 1245 } 1246 #endif 1247 #endif 1248 } 1249 1250 void 1251 com_break(struct com_softc *sc, int onoff) 1252 { 1253 1254 if (onoff) 1255 SET(sc->sc_lcr, LCR_SBREAK); 1256 else 1257 CLR(sc->sc_lcr, LCR_SBREAK); 1258 1259 if (!sc->sc_heldchange) { 1260 if (sc->sc_tx_busy) { 1261 sc->sc_heldtbc = sc->sc_tbc; 1262 sc->sc_tbc = 0; 1263 sc->sc_heldchange = 1; 1264 } else 1265 com_loadchannelregs(sc); 1266 } 1267 } 1268 1269 void 1270 com_modem(struct com_softc *sc, int onoff) 1271 { 1272 1273 if (sc->sc_mcr_dtr == 0) 1274 return; 1275 1276 if (onoff) 1277 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1278 else 1279 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1280 1281 if (!sc->sc_heldchange) { 1282 if (sc->sc_tx_busy) { 1283 sc->sc_heldtbc = sc->sc_tbc; 1284 sc->sc_tbc = 0; 1285 sc->sc_heldchange = 1; 1286 } else 1287 com_loadchannelregs(sc); 1288 } 1289 } 1290 1291 void 1292 tiocm_to_com(struct com_softc *sc, u_long how, int ttybits) 1293 { 1294 u_char combits; 1295 1296 combits = 0; 1297 if (ISSET(ttybits, TIOCM_DTR)) 1298 SET(combits, MCR_DTR); 1299 if (ISSET(ttybits, TIOCM_RTS)) 1300 SET(combits, MCR_RTS); 1301 1302 switch (how) { 1303 case TIOCMBIC: 1304 CLR(sc->sc_mcr, combits); 1305 break; 1306 1307 case TIOCMBIS: 1308 SET(sc->sc_mcr, combits); 1309 break; 1310 1311 case TIOCMSET: 1312 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1313 SET(sc->sc_mcr, combits); 1314 break; 1315 } 1316 1317 if (!sc->sc_heldchange) { 1318 if (sc->sc_tx_busy) { 1319 sc->sc_heldtbc = sc->sc_tbc; 1320 sc->sc_tbc = 0; 1321 sc->sc_heldchange = 1; 1322 } else 1323 com_loadchannelregs(sc); 1324 } 1325 } 1326 1327 int 1328 com_to_tiocm(struct com_softc *sc) 1329 { 1330 u_char combits; 1331 int ttybits = 0; 1332 1333 combits = sc->sc_mcr; 1334 if (ISSET(combits, MCR_DTR)) 1335 SET(ttybits, TIOCM_DTR); 1336 if (ISSET(combits, MCR_RTS)) 1337 SET(ttybits, TIOCM_RTS); 1338 1339 combits = sc->sc_msr; 1340 if (ISSET(combits, MSR_DCD)) 1341 SET(ttybits, TIOCM_CD); 1342 if (ISSET(combits, MSR_CTS)) 1343 SET(ttybits, TIOCM_CTS); 1344 if (ISSET(combits, MSR_DSR)) 1345 SET(ttybits, TIOCM_DSR); 1346 if (ISSET(combits, MSR_RI | MSR_TERI)) 1347 SET(ttybits, TIOCM_RI); 1348 1349 #ifdef COM_PXA2X0 1350 if (sc->sc_type == COM_TYPE_PXA2x0) { 1351 if ((sc->sc_ier & 0x0f) != 0) 1352 SET(ttybits, TIOCM_LE); 1353 } else 1354 #endif 1355 if ((sc->sc_ier & 0xbf) != 0) 1356 SET(ttybits, TIOCM_LE); 1357 1358 return (ttybits); 1359 } 1360 1361 static u_char 1362 cflag2lcr(tcflag_t cflag) 1363 { 1364 u_char lcr = 0; 1365 1366 switch (ISSET(cflag, CSIZE)) { 1367 case CS5: 1368 SET(lcr, LCR_5BITS); 1369 break; 1370 case CS6: 1371 SET(lcr, LCR_6BITS); 1372 break; 1373 case CS7: 1374 SET(lcr, LCR_7BITS); 1375 break; 1376 case CS8: 1377 SET(lcr, LCR_8BITS); 1378 break; 1379 } 1380 if (ISSET(cflag, PARENB)) { 1381 SET(lcr, LCR_PENAB); 1382 if (!ISSET(cflag, PARODD)) 1383 SET(lcr, LCR_PEVEN); 1384 } 1385 if (ISSET(cflag, CSTOPB)) 1386 SET(lcr, LCR_STOPB); 1387 1388 return (lcr); 1389 } 1390 1391 int 1392 comparam(struct tty *tp, struct termios *t) 1393 { 1394 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1395 int ospeed; 1396 u_char lcr; 1397 int s; 1398 1399 if (COM_ISALIVE(sc) == 0) 1400 return (EIO); 1401 1402 #ifdef COM_HAYESP 1403 if (sc->sc_type == COM_TYPE_HAYESP) { 1404 int prescaler, speed; 1405 1406 /* 1407 * Calculate UART clock prescaler. It should be in 1408 * range of 0 .. 3. 1409 */ 1410 for (prescaler = 0, speed = t->c_ospeed; prescaler < 4; 1411 prescaler++, speed /= 2) 1412 if ((ospeed = comspeed(speed, sc->sc_frequency, 1413 sc->sc_type)) > 0) 1414 break; 1415 1416 if (prescaler == 4) 1417 return (EINVAL); 1418 sc->sc_prescaler = prescaler; 1419 } else 1420 #endif 1421 ospeed = comspeed(t->c_ospeed, sc->sc_frequency, sc->sc_type); 1422 1423 /* Check requested parameters. */ 1424 if (ospeed < 0) 1425 return (EINVAL); 1426 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1427 return (EINVAL); 1428 1429 /* 1430 * For the console, always force CLOCAL and !HUPCL, so that the port 1431 * is always active. 1432 */ 1433 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1434 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1435 SET(t->c_cflag, CLOCAL); 1436 CLR(t->c_cflag, HUPCL); 1437 } 1438 1439 /* 1440 * If there were no changes, don't do anything. This avoids dropping 1441 * input and improves performance when all we did was frob things like 1442 * VMIN and VTIME. 1443 */ 1444 if (tp->t_ospeed == t->c_ospeed && 1445 tp->t_cflag == t->c_cflag) 1446 return (0); 1447 1448 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1449 1450 s = splserial(); 1451 COM_LOCK(sc); 1452 1453 sc->sc_lcr = lcr; 1454 1455 /* 1456 * If we're not in a mode that assumes a connection is present, then 1457 * ignore carrier changes. 1458 */ 1459 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1460 sc->sc_msr_dcd = 0; 1461 else 1462 sc->sc_msr_dcd = MSR_DCD; 1463 /* 1464 * Set the flow control pins depending on the current flow control 1465 * mode. 1466 */ 1467 if (ISSET(t->c_cflag, CRTSCTS)) { 1468 sc->sc_mcr_dtr = MCR_DTR; 1469 sc->sc_mcr_rts = MCR_RTS; 1470 sc->sc_msr_cts = MSR_CTS; 1471 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1472 } else if (ISSET(t->c_cflag, MDMBUF)) { 1473 /* 1474 * For DTR/DCD flow control, make sure we don't toggle DTR for 1475 * carrier detection. 1476 */ 1477 sc->sc_mcr_dtr = 0; 1478 sc->sc_mcr_rts = MCR_DTR; 1479 sc->sc_msr_cts = MSR_DCD; 1480 sc->sc_efr = 0; 1481 } else { 1482 /* 1483 * If no flow control, then always set RTS. This will make 1484 * the other side happy if it mistakenly thinks we're doing 1485 * RTS/CTS flow control. 1486 */ 1487 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1488 sc->sc_mcr_rts = 0; 1489 sc->sc_msr_cts = 0; 1490 sc->sc_efr = 0; 1491 if (ISSET(sc->sc_mcr, MCR_DTR)) 1492 SET(sc->sc_mcr, MCR_RTS); 1493 else 1494 CLR(sc->sc_mcr, MCR_RTS); 1495 } 1496 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1497 1498 #if 0 1499 if (ospeed == 0) 1500 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1501 else 1502 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1503 #endif 1504 1505 sc->sc_dlbl = ospeed; 1506 sc->sc_dlbh = ospeed >> 8; 1507 1508 /* 1509 * Set the FIFO threshold based on the receive speed. 1510 * 1511 * * If it's a low speed, it's probably a mouse or some other 1512 * interactive device, so set the threshold low. 1513 * * If it's a high speed, trim the trigger level down to prevent 1514 * overflows. 1515 * * Otherwise set it a bit higher. 1516 */ 1517 if (sc->sc_type == COM_TYPE_HAYESP) 1518 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1519 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1520 sc->sc_fifo = FIFO_ENABLE | 1521 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1522 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1523 else 1524 sc->sc_fifo = 0; 1525 1526 /* And copy to tty. */ 1527 tp->t_ispeed = 0; 1528 tp->t_ospeed = t->c_ospeed; 1529 tp->t_cflag = t->c_cflag; 1530 1531 if (!sc->sc_heldchange) { 1532 if (sc->sc_tx_busy) { 1533 sc->sc_heldtbc = sc->sc_tbc; 1534 sc->sc_tbc = 0; 1535 sc->sc_heldchange = 1; 1536 } else 1537 com_loadchannelregs(sc); 1538 } 1539 1540 if (!ISSET(t->c_cflag, CHWFLOW)) { 1541 /* Disable the high water mark. */ 1542 sc->sc_r_hiwat = 0; 1543 sc->sc_r_lowat = 0; 1544 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1545 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1546 com_schedrx(sc); 1547 } 1548 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1549 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1550 com_hwiflow(sc); 1551 } 1552 } else { 1553 sc->sc_r_hiwat = com_rbuf_hiwat; 1554 sc->sc_r_lowat = com_rbuf_lowat; 1555 } 1556 1557 COM_UNLOCK(sc); 1558 splx(s); 1559 1560 /* 1561 * Update the tty layer's idea of the carrier bit, in case we changed 1562 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1563 * explicit request. 1564 */ 1565 (void) (*tp->t_linesw->l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1566 1567 #ifdef COM_DEBUG 1568 if (com_debug) 1569 comstatus(sc, "comparam "); 1570 #endif 1571 1572 if (!ISSET(t->c_cflag, CHWFLOW)) { 1573 if (sc->sc_tx_stopped) { 1574 sc->sc_tx_stopped = 0; 1575 comstart(tp); 1576 } 1577 } 1578 1579 return (0); 1580 } 1581 1582 void 1583 com_iflush(struct com_softc *sc) 1584 { 1585 bus_space_tag_t iot = sc->sc_iot; 1586 bus_space_handle_t ioh = sc->sc_ioh; 1587 #ifdef DIAGNOSTIC 1588 int reg; 1589 #endif 1590 int timo; 1591 1592 #ifdef DIAGNOSTIC 1593 reg = 0xffff; 1594 #endif 1595 timo = 50000; 1596 /* flush any pending I/O */ 1597 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1598 && --timo) 1599 #ifdef DIAGNOSTIC 1600 reg = 1601 #else 1602 (void) 1603 #endif 1604 bus_space_read_1(iot, ioh, com_data); 1605 #ifdef DIAGNOSTIC 1606 if (!timo) 1607 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1608 reg); 1609 #endif 1610 } 1611 1612 void 1613 com_loadchannelregs(struct com_softc *sc) 1614 { 1615 bus_space_tag_t iot = sc->sc_iot; 1616 bus_space_handle_t ioh = sc->sc_ioh; 1617 1618 /* XXXXX necessary? */ 1619 com_iflush(sc); 1620 1621 #ifdef COM_PXA2X0 1622 if (sc->sc_type == COM_TYPE_PXA2x0) 1623 bus_space_write_1(iot, ioh, com_ier, IER_EUART); 1624 else 1625 #endif 1626 bus_space_write_1(iot, ioh, com_ier, 0); 1627 1628 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1629 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1630 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1631 } 1632 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1633 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1634 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1635 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1636 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1637 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1638 #ifdef COM_HAYESP 1639 if (sc->sc_type == COM_TYPE_HAYESP) { 1640 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 1641 HAYESP_SETPRESCALER); 1642 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 1643 sc->sc_prescaler); 1644 } 1645 #endif 1646 1647 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1648 } 1649 1650 int 1651 comhwiflow(struct tty *tp, int block) 1652 { 1653 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1654 int s; 1655 1656 if (COM_ISALIVE(sc) == 0) 1657 return (0); 1658 1659 if (sc->sc_mcr_rts == 0) 1660 return (0); 1661 1662 s = splserial(); 1663 COM_LOCK(sc); 1664 1665 if (block) { 1666 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1667 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1668 com_hwiflow(sc); 1669 } 1670 } else { 1671 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1672 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1673 com_schedrx(sc); 1674 } 1675 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1676 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1677 com_hwiflow(sc); 1678 } 1679 } 1680 1681 COM_UNLOCK(sc); 1682 splx(s); 1683 return (1); 1684 } 1685 1686 /* 1687 * (un)block input via hw flowcontrol 1688 */ 1689 void 1690 com_hwiflow(struct com_softc *sc) 1691 { 1692 bus_space_tag_t iot = sc->sc_iot; 1693 bus_space_handle_t ioh = sc->sc_ioh; 1694 1695 if (sc->sc_mcr_rts == 0) 1696 return; 1697 1698 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1699 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1700 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1701 } else { 1702 SET(sc->sc_mcr, sc->sc_mcr_rts); 1703 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1704 } 1705 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1706 } 1707 1708 1709 void 1710 comstart(struct tty *tp) 1711 { 1712 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1713 bus_space_tag_t iot = sc->sc_iot; 1714 bus_space_handle_t ioh = sc->sc_ioh; 1715 int s; 1716 1717 if (COM_ISALIVE(sc) == 0) 1718 return; 1719 1720 s = spltty(); 1721 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1722 goto out; 1723 if (sc->sc_tx_stopped) 1724 goto out; 1725 1726 if (tp->t_outq.c_cc <= tp->t_lowat) { 1727 if (ISSET(tp->t_state, TS_ASLEEP)) { 1728 CLR(tp->t_state, TS_ASLEEP); 1729 wakeup(&tp->t_outq); 1730 } 1731 selwakeup(&tp->t_wsel); 1732 if (tp->t_outq.c_cc == 0) 1733 goto out; 1734 } 1735 1736 /* Grab the first contiguous region of buffer space. */ 1737 { 1738 u_char *tba; 1739 int tbc; 1740 1741 tba = tp->t_outq.c_cf; 1742 tbc = ndqb(&tp->t_outq, 0); 1743 1744 (void)splserial(); 1745 COM_LOCK(sc); 1746 1747 sc->sc_tba = tba; 1748 sc->sc_tbc = tbc; 1749 } 1750 1751 SET(tp->t_state, TS_BUSY); 1752 sc->sc_tx_busy = 1; 1753 1754 /* Enable transmit completion interrupts if necessary. */ 1755 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1756 SET(sc->sc_ier, IER_ETXRDY); 1757 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1758 } 1759 1760 /* Output the first chunk of the contiguous buffer. */ 1761 if (!ISSET(sc->sc_hwflags, COM_HW_NO_TXPRELOAD)) { 1762 u_int n; 1763 1764 n = sc->sc_tbc; 1765 if (n > sc->sc_fifolen) 1766 n = sc->sc_fifolen; 1767 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1768 sc->sc_tbc -= n; 1769 sc->sc_tba += n; 1770 } 1771 COM_UNLOCK(sc); 1772 out: 1773 splx(s); 1774 return; 1775 } 1776 1777 /* 1778 * Stop output on a line. 1779 */ 1780 void 1781 comstop(struct tty *tp, int flag) 1782 { 1783 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1784 int s; 1785 1786 s = splserial(); 1787 COM_LOCK(sc); 1788 if (ISSET(tp->t_state, TS_BUSY)) { 1789 /* Stop transmitting at the next chunk. */ 1790 sc->sc_tbc = 0; 1791 sc->sc_heldtbc = 0; 1792 if (!ISSET(tp->t_state, TS_TTSTOP)) 1793 SET(tp->t_state, TS_FLUSH); 1794 } 1795 COM_UNLOCK(sc); 1796 splx(s); 1797 } 1798 1799 void 1800 comdiag(void *arg) 1801 { 1802 struct com_softc *sc = arg; 1803 int overflows, floods; 1804 int s; 1805 1806 s = splserial(); 1807 COM_LOCK(sc); 1808 overflows = sc->sc_overflows; 1809 sc->sc_overflows = 0; 1810 floods = sc->sc_floods; 1811 sc->sc_floods = 0; 1812 sc->sc_errors = 0; 1813 COM_UNLOCK(sc); 1814 splx(s); 1815 1816 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1817 sc->sc_dev.dv_xname, 1818 overflows, overflows == 1 ? "" : "s", 1819 floods, floods == 1 ? "" : "s"); 1820 } 1821 1822 integrate void 1823 com_rxsoft(struct com_softc *sc, struct tty *tp) 1824 { 1825 int (*rint)(int, struct tty *) = tp->t_linesw->l_rint; 1826 u_char *get, *end; 1827 u_int cc, scc; 1828 u_char lsr; 1829 int code; 1830 int s; 1831 1832 end = sc->sc_ebuf; 1833 get = sc->sc_rbget; 1834 scc = cc = com_rbuf_size - sc->sc_rbavail; 1835 1836 if (cc == com_rbuf_size) { 1837 sc->sc_floods++; 1838 if (sc->sc_errors++ == 0) 1839 callout_reset(&sc->sc_diag_callout, 60 * hz, 1840 comdiag, sc); 1841 } 1842 1843 /* If not yet open, drop the entire buffer content here */ 1844 if (!ISSET(tp->t_state, TS_ISOPEN)) { 1845 get += cc << 1; 1846 if (get >= end) 1847 get -= com_rbuf_size << 1; 1848 cc = 0; 1849 } 1850 while (cc) { 1851 code = get[0]; 1852 lsr = get[1]; 1853 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1854 if (ISSET(lsr, LSR_OE)) { 1855 sc->sc_overflows++; 1856 if (sc->sc_errors++ == 0) 1857 callout_reset(&sc->sc_diag_callout, 1858 60 * hz, comdiag, sc); 1859 } 1860 if (ISSET(lsr, LSR_BI | LSR_FE)) 1861 SET(code, TTY_FE); 1862 if (ISSET(lsr, LSR_PE)) 1863 SET(code, TTY_PE); 1864 } 1865 if ((*rint)(code, tp) == -1) { 1866 /* 1867 * The line discipline's buffer is out of space. 1868 */ 1869 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1870 /* 1871 * We're either not using flow control, or the 1872 * line discipline didn't tell us to block for 1873 * some reason. Either way, we have no way to 1874 * know when there's more space available, so 1875 * just drop the rest of the data. 1876 */ 1877 get += cc << 1; 1878 if (get >= end) 1879 get -= com_rbuf_size << 1; 1880 cc = 0; 1881 } else { 1882 /* 1883 * Don't schedule any more receive processing 1884 * until the line discipline tells us there's 1885 * space available (through comhwiflow()). 1886 * Leave the rest of the data in the input 1887 * buffer. 1888 */ 1889 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1890 } 1891 break; 1892 } 1893 get += 2; 1894 if (get >= end) 1895 get = sc->sc_rbuf; 1896 cc--; 1897 } 1898 1899 if (cc != scc) { 1900 sc->sc_rbget = get; 1901 s = splserial(); 1902 COM_LOCK(sc); 1903 1904 cc = sc->sc_rbavail += scc - cc; 1905 /* Buffers should be ok again, release possible block. */ 1906 if (cc >= sc->sc_r_lowat) { 1907 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1908 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1909 SET(sc->sc_ier, IER_ERXRDY); 1910 #ifdef COM_PXA2X0 1911 if (sc->sc_type == COM_TYPE_PXA2x0) 1912 SET(sc->sc_ier, IER_ERXTOUT); 1913 #endif 1914 bus_space_write_1(sc->sc_iot, sc->sc_ioh, 1915 com_ier, sc->sc_ier); 1916 } 1917 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1918 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1919 com_hwiflow(sc); 1920 } 1921 } 1922 COM_UNLOCK(sc); 1923 splx(s); 1924 } 1925 } 1926 1927 integrate void 1928 com_txsoft(struct com_softc *sc, struct tty *tp) 1929 { 1930 1931 CLR(tp->t_state, TS_BUSY); 1932 if (ISSET(tp->t_state, TS_FLUSH)) 1933 CLR(tp->t_state, TS_FLUSH); 1934 else 1935 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1936 (*tp->t_linesw->l_start)(tp); 1937 } 1938 1939 integrate void 1940 com_stsoft(struct com_softc *sc, struct tty *tp) 1941 { 1942 u_char msr, delta; 1943 int s; 1944 1945 s = splserial(); 1946 COM_LOCK(sc); 1947 msr = sc->sc_msr; 1948 delta = sc->sc_msr_delta; 1949 sc->sc_msr_delta = 0; 1950 COM_UNLOCK(sc); 1951 splx(s); 1952 1953 if (ISSET(delta, sc->sc_msr_dcd)) { 1954 /* 1955 * Inform the tty layer that carrier detect changed. 1956 */ 1957 (void) (*tp->t_linesw->l_modem)(tp, ISSET(msr, MSR_DCD)); 1958 } 1959 1960 if (ISSET(delta, sc->sc_msr_cts)) { 1961 /* Block or unblock output according to flow control. */ 1962 if (ISSET(msr, sc->sc_msr_cts)) { 1963 sc->sc_tx_stopped = 0; 1964 (*tp->t_linesw->l_start)(tp); 1965 } else { 1966 sc->sc_tx_stopped = 1; 1967 } 1968 } 1969 1970 #ifdef COM_DEBUG 1971 if (com_debug) 1972 comstatus(sc, "com_stsoft"); 1973 #endif 1974 } 1975 1976 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 1977 void 1978 comsoft(void *arg) 1979 { 1980 struct com_softc *sc = arg; 1981 struct tty *tp; 1982 1983 if (COM_ISALIVE(sc) == 0) 1984 return; 1985 1986 { 1987 #else 1988 void 1989 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1990 comsoft(void) 1991 #else 1992 comsoft(void *arg) 1993 #endif 1994 { 1995 struct com_softc *sc; 1996 struct tty *tp; 1997 int unit; 1998 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1999 int s; 2000 2001 s = splsoftserial(); 2002 com_softintr_scheduled = 0; 2003 #endif 2004 2005 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 2006 sc = device_lookup(&com_cd, unit); 2007 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 2008 continue; 2009 2010 if (COM_ISALIVE(sc) == 0) 2011 continue; 2012 2013 tp = sc->sc_tty; 2014 if (tp == NULL) 2015 continue; 2016 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 2017 continue; 2018 #endif 2019 tp = sc->sc_tty; 2020 2021 if (sc->sc_rx_ready) { 2022 sc->sc_rx_ready = 0; 2023 com_rxsoft(sc, tp); 2024 } 2025 2026 if (sc->sc_st_check) { 2027 sc->sc_st_check = 0; 2028 com_stsoft(sc, tp); 2029 } 2030 2031 if (sc->sc_tx_done) { 2032 sc->sc_tx_done = 0; 2033 com_txsoft(sc, tp); 2034 } 2035 } 2036 2037 #ifndef __HAVE_GENERIC_SOFT_INTERRUPTS 2038 #ifdef __NO_SOFT_SERIAL_INTERRUPT 2039 splx(s); 2040 #endif 2041 #endif 2042 } 2043 2044 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 2045 /* there has got to be a better way to do comsoft() */ 2046 }} 2047 #endif 2048 2049 int 2050 comintr(void *arg) 2051 { 2052 struct com_softc *sc = arg; 2053 bus_space_tag_t iot = sc->sc_iot; 2054 bus_space_handle_t ioh = sc->sc_ioh; 2055 u_char *put, *end; 2056 u_int cc; 2057 u_char lsr, iir; 2058 2059 if (COM_ISALIVE(sc) == 0) 2060 return (0); 2061 2062 COM_LOCK(sc); 2063 iir = bus_space_read_1(iot, ioh, com_iir); 2064 if (ISSET(iir, IIR_NOPEND)) { 2065 COM_UNLOCK(sc); 2066 return (0); 2067 } 2068 2069 end = sc->sc_ebuf; 2070 put = sc->sc_rbput; 2071 cc = sc->sc_rbavail; 2072 2073 again: do { 2074 u_char msr, delta; 2075 2076 lsr = bus_space_read_1(iot, ioh, com_lsr); 2077 if (ISSET(lsr, LSR_BI)) { 2078 int cn_trapped = 0; 2079 2080 cn_check_magic(sc->sc_tty->t_dev, 2081 CNC_BREAK, com_cnm_state); 2082 if (cn_trapped) 2083 continue; 2084 #if defined(KGDB) && !defined(DDB) 2085 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 2086 kgdb_connect(1); 2087 continue; 2088 } 2089 #endif 2090 } 2091 2092 if (ISSET(lsr, LSR_RCV_MASK) && 2093 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 2094 while (cc > 0) { 2095 int cn_trapped = 0; 2096 put[0] = bus_space_read_1(iot, ioh, com_data); 2097 put[1] = lsr; 2098 cn_check_magic(sc->sc_tty->t_dev, 2099 put[0], com_cnm_state); 2100 if (cn_trapped) { 2101 lsr = bus_space_read_1(iot, ioh, com_lsr); 2102 if (!ISSET(lsr, LSR_RCV_MASK)) 2103 break; 2104 2105 continue; 2106 } 2107 put += 2; 2108 if (put >= end) 2109 put = sc->sc_rbuf; 2110 cc--; 2111 2112 lsr = bus_space_read_1(iot, ioh, com_lsr); 2113 if (!ISSET(lsr, LSR_RCV_MASK)) 2114 break; 2115 } 2116 2117 /* 2118 * Current string of incoming characters ended because 2119 * no more data was available or we ran out of space. 2120 * Schedule a receive event if any data was received. 2121 * If we're out of space, turn off receive interrupts. 2122 */ 2123 sc->sc_rbput = put; 2124 sc->sc_rbavail = cc; 2125 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 2126 sc->sc_rx_ready = 1; 2127 2128 /* 2129 * See if we are in danger of overflowing a buffer. If 2130 * so, use hardware flow control to ease the pressure. 2131 */ 2132 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 2133 cc < sc->sc_r_hiwat) { 2134 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 2135 com_hwiflow(sc); 2136 } 2137 2138 /* 2139 * If we're out of space, disable receive interrupts 2140 * until the queue has drained a bit. 2141 */ 2142 if (!cc) { 2143 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2144 CLR(sc->sc_ier, IER_ERXRDY); 2145 #ifdef COM_PXA2X0 2146 if (sc->sc_type == COM_TYPE_PXA2x0) 2147 CLR(sc->sc_ier, IER_ERXTOUT); 2148 #endif 2149 bus_space_write_1(iot, ioh, com_ier, 2150 sc->sc_ier); 2151 } 2152 } else { 2153 if ((iir & IIR_IMASK) == IIR_RXRDY) { 2154 #ifdef COM_PXA2X0 2155 if (sc->sc_type == COM_TYPE_PXA2x0) 2156 bus_space_write_1(iot, ioh, com_ier, 2157 IER_EUART); 2158 else 2159 #endif 2160 bus_space_write_1(iot, ioh, com_ier, 0); 2161 delay(10); 2162 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 2163 continue; 2164 } 2165 } 2166 2167 msr = bus_space_read_1(iot, ioh, com_msr); 2168 delta = msr ^ sc->sc_msr; 2169 sc->sc_msr = msr; 2170 /* 2171 * Pulse-per-second (PSS) signals on edge of DCD? 2172 * Process these even if line discipline is ignoring DCD. 2173 */ 2174 if (delta & sc->sc_ppsmask) { 2175 struct timeval tv; 2176 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2177 /* XXX nanotime() */ 2178 microtime(&tv); 2179 TIMEVAL_TO_TIMESPEC(&tv, 2180 &sc->ppsinfo.assert_timestamp); 2181 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2182 timespecadd(&sc->ppsinfo.assert_timestamp, 2183 &sc->ppsparam.assert_offset, 2184 &sc->ppsinfo.assert_timestamp); 2185 } 2186 2187 #ifdef PPS_SYNC 2188 if (pps_kc_hardpps_source == sc && 2189 pps_kc_hardpps_mode & PPS_CAPTUREASSERT) { 2190 hardpps(&tv, tv.tv_usec); 2191 } 2192 #endif 2193 sc->ppsinfo.assert_sequence++; 2194 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2195 2196 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2197 /* XXX nanotime() */ 2198 microtime(&tv); 2199 TIMEVAL_TO_TIMESPEC(&tv, 2200 &sc->ppsinfo.clear_timestamp); 2201 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2202 timespecadd(&sc->ppsinfo.clear_timestamp, 2203 &sc->ppsparam.clear_offset, 2204 &sc->ppsinfo.clear_timestamp); 2205 } 2206 2207 #ifdef PPS_SYNC 2208 if (pps_kc_hardpps_source == sc && 2209 pps_kc_hardpps_mode & PPS_CAPTURECLEAR) { 2210 hardpps(&tv, tv.tv_usec); 2211 } 2212 #endif 2213 sc->ppsinfo.clear_sequence++; 2214 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2215 } 2216 } 2217 2218 /* 2219 * Process normal status changes 2220 */ 2221 if (ISSET(delta, sc->sc_msr_mask)) { 2222 SET(sc->sc_msr_delta, delta); 2223 2224 /* 2225 * Stop output immediately if we lose the output 2226 * flow control signal or carrier detect. 2227 */ 2228 if (ISSET(~msr, sc->sc_msr_mask)) { 2229 sc->sc_tbc = 0; 2230 sc->sc_heldtbc = 0; 2231 #ifdef COM_DEBUG 2232 if (com_debug) 2233 comstatus(sc, "comintr "); 2234 #endif 2235 } 2236 2237 sc->sc_st_check = 1; 2238 } 2239 } while (!ISSET((iir = 2240 bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND) && 2241 /* 2242 * Since some device (e.g., ST16C1550) doesn't clear IIR_TXRDY 2243 * by IIR read, so we can't do this way: `process all interrupts, 2244 * then do TX if possble'. 2245 */ 2246 (iir & IIR_IMASK) != IIR_TXRDY); 2247 2248 /* 2249 * Read LSR again, since there may be an interrupt between 2250 * the last LSR read and IIR read above. 2251 */ 2252 lsr = bus_space_read_1(iot, ioh, com_lsr); 2253 2254 /* 2255 * See if data can be transmitted as well. 2256 * Schedule tx done event if no data left 2257 * and tty was marked busy. 2258 */ 2259 if (ISSET(lsr, LSR_TXRDY)) { 2260 /* 2261 * If we've delayed a parameter change, do it now, and restart 2262 * output. 2263 */ 2264 if (sc->sc_heldchange) { 2265 com_loadchannelregs(sc); 2266 sc->sc_heldchange = 0; 2267 sc->sc_tbc = sc->sc_heldtbc; 2268 sc->sc_heldtbc = 0; 2269 } 2270 2271 /* Output the next chunk of the contiguous buffer, if any. */ 2272 if (sc->sc_tbc > 0) { 2273 u_int n; 2274 2275 n = sc->sc_tbc; 2276 if (n > sc->sc_fifolen) 2277 n = sc->sc_fifolen; 2278 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2279 sc->sc_tbc -= n; 2280 sc->sc_tba += n; 2281 } else { 2282 /* Disable transmit completion interrupts if necessary. */ 2283 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2284 CLR(sc->sc_ier, IER_ETXRDY); 2285 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2286 } 2287 if (sc->sc_tx_busy) { 2288 sc->sc_tx_busy = 0; 2289 sc->sc_tx_done = 1; 2290 } 2291 } 2292 } 2293 2294 if (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)) 2295 goto again; 2296 2297 COM_UNLOCK(sc); 2298 2299 /* Wake up the poller. */ 2300 #ifdef __HAVE_GENERIC_SOFT_INTERRUPTS 2301 softintr_schedule(sc->sc_si); 2302 #else 2303 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2304 setsoftserial(); 2305 #else 2306 if (!com_softintr_scheduled) { 2307 com_softintr_scheduled = 1; 2308 callout_reset(&comsoft_callout, 1, comsoft, NULL); 2309 } 2310 #endif 2311 #endif 2312 2313 #if NRND > 0 && defined(RND_COM) 2314 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2315 #endif 2316 2317 return (1); 2318 } 2319 2320 /* 2321 * The following functions are polled getc and putc routines, shared 2322 * by the console and kgdb glue. 2323 * 2324 * The read-ahead code is so that you can detect pending in-band 2325 * cn_magic in polled mode while doing output rather than having to 2326 * wait until the kernel decides it needs input. 2327 */ 2328 2329 #define MAX_READAHEAD 20 2330 static int com_readahead[MAX_READAHEAD]; 2331 static int com_readaheadcount = 0; 2332 2333 int 2334 com_common_getc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh) 2335 { 2336 int s = splserial(); 2337 u_char stat, c; 2338 2339 /* got a character from reading things earlier */ 2340 if (com_readaheadcount > 0) { 2341 int i; 2342 2343 c = com_readahead[0]; 2344 for (i = 1; i < com_readaheadcount; i++) { 2345 com_readahead[i-1] = com_readahead[i]; 2346 } 2347 com_readaheadcount--; 2348 splx(s); 2349 return (c); 2350 } 2351 2352 /* block until a character becomes available */ 2353 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2354 ; 2355 2356 c = bus_space_read_1(iot, ioh, com_data); 2357 stat = bus_space_read_1(iot, ioh, com_iir); 2358 { 2359 int cn_trapped = 0; /* unused */ 2360 #ifdef DDB 2361 extern int db_active; 2362 if (!db_active) 2363 #endif 2364 cn_check_magic(dev, c, com_cnm_state); 2365 } 2366 splx(s); 2367 return (c); 2368 } 2369 2370 void 2371 com_common_putc(dev_t dev, bus_space_tag_t iot, bus_space_handle_t ioh, int c) 2372 { 2373 int s = splserial(); 2374 int cin, stat, timo; 2375 2376 if (com_readaheadcount < MAX_READAHEAD 2377 && ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) { 2378 int cn_trapped = 0; 2379 cin = bus_space_read_1(iot, ioh, com_data); 2380 stat = bus_space_read_1(iot, ioh, com_iir); 2381 cn_check_magic(dev, cin, com_cnm_state); 2382 com_readahead[com_readaheadcount++] = cin; 2383 } 2384 2385 /* wait for any pending transmission to finish */ 2386 timo = 150000; 2387 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2388 continue; 2389 2390 bus_space_write_1(iot, ioh, com_data, c); 2391 COM_BARRIER(iot, ioh, BR | BW); 2392 2393 /* wait for this transmission to complete */ 2394 timo = 1500000; 2395 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2396 continue; 2397 2398 splx(s); 2399 } 2400 2401 /* 2402 * Initialize UART for use as console or KGDB line. 2403 */ 2404 int 2405 cominit(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2406 int type, tcflag_t cflag, bus_space_handle_t *iohp) 2407 { 2408 bus_space_handle_t ioh; 2409 2410 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2411 return (ENOMEM); /* ??? */ 2412 2413 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2414 bus_space_write_1(iot, ioh, com_efr, 0); 2415 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2416 rate = comspeed(rate, frequency, type); 2417 bus_space_write_1(iot, ioh, com_dlbl, rate); 2418 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2419 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2420 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2421 bus_space_write_1(iot, ioh, com_fifo, 2422 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2423 #ifdef COM_PXA2X0 2424 if (type == COM_TYPE_PXA2x0) 2425 bus_space_write_1(iot, ioh, com_ier, IER_EUART); 2426 else 2427 #endif 2428 bus_space_write_1(iot, ioh, com_ier, 0); 2429 2430 *iohp = ioh; 2431 return (0); 2432 } 2433 2434 /* 2435 * Following are all routines needed for COM to act as console 2436 */ 2437 struct consdev comcons = { 2438 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, NULL, NULL, 2439 NODEV, CN_NORMAL 2440 }; 2441 2442 2443 int 2444 comcnattach(bus_space_tag_t iot, bus_addr_t iobase, int rate, int frequency, 2445 int type, tcflag_t cflag) 2446 { 2447 int res; 2448 2449 res = cominit(iot, iobase, rate, frequency, type, cflag, &comconsioh); 2450 if (res) 2451 return (res); 2452 2453 cn_tab = &comcons; 2454 cn_init_magic(&com_cnm_state); 2455 cn_set_magic("\047\001"); /* default magic is BREAK */ 2456 2457 comconstag = iot; 2458 comconsaddr = iobase; 2459 comconsrate = rate; 2460 comconscflag = cflag; 2461 2462 return (0); 2463 } 2464 2465 int 2466 comcngetc(dev_t dev) 2467 { 2468 2469 return (com_common_getc(dev, comconstag, comconsioh)); 2470 } 2471 2472 /* 2473 * Console kernel output character routine. 2474 */ 2475 void 2476 comcnputc(dev_t dev, int c) 2477 { 2478 2479 com_common_putc(dev, comconstag, comconsioh, c); 2480 } 2481 2482 void 2483 comcnpollc(dev_t dev, int on) 2484 { 2485 2486 } 2487 2488 #ifdef KGDB 2489 int 2490 com_kgdb_attach(bus_space_tag_t iot, bus_addr_t iobase, int rate, 2491 int frequency, int type, tcflag_t cflag) 2492 { 2493 int res; 2494 2495 if (iot == comconstag && iobase == comconsaddr) { 2496 #if !defined(DDB) 2497 return (EBUSY); /* cannot share with console */ 2498 #else 2499 com_kgdb_ioh = comconsioh; 2500 #endif 2501 } else { 2502 res = cominit(iot, iobase, rate, frequency, type, cflag, 2503 &com_kgdb_ioh); 2504 if (res) 2505 return (res); 2506 2507 /* 2508 * XXXfvdl this shouldn't be needed, but the cn_magic goo 2509 * expects this to be initialized 2510 */ 2511 cn_init_magic(&com_cnm_state); 2512 cn_set_magic("\047\001"); 2513 } 2514 2515 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2516 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2517 2518 com_kgdb_iot = iot; 2519 com_kgdb_addr = iobase; 2520 2521 return (0); 2522 } 2523 2524 /* ARGSUSED */ 2525 int 2526 com_kgdb_getc(void *arg) 2527 { 2528 2529 return (com_common_getc(NODEV, com_kgdb_iot, com_kgdb_ioh)); 2530 } 2531 2532 /* ARGSUSED */ 2533 void 2534 com_kgdb_putc(void *arg, int c) 2535 { 2536 2537 com_common_putc(NODEV, com_kgdb_iot, com_kgdb_ioh, c); 2538 } 2539 #endif /* KGDB */ 2540 2541 /* helper function to identify the com ports used by 2542 console or KGDB (and not yet autoconf attached) */ 2543 int 2544 com_is_console(bus_space_tag_t iot, bus_addr_t iobase, bus_space_handle_t *ioh) 2545 { 2546 bus_space_handle_t help; 2547 2548 if (!comconsattached && 2549 iot == comconstag && iobase == comconsaddr) 2550 help = comconsioh; 2551 #ifdef KGDB 2552 else if (!com_kgdb_attached && 2553 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2554 help = com_kgdb_ioh; 2555 #endif 2556 else 2557 return (0); 2558 2559 if (ioh) 2560 *ioh = help; 2561 return (1); 2562 } 2563