1 /* $NetBSD: com.c,v 1.173 2000/07/06 01:47:36 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Charles M. Hannum. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * Copyright (c) 1991 The Regents of the University of California. 41 * All rights reserved. 42 * 43 * Redistribution and use in source and binary forms, with or without 44 * modification, are permitted provided that the following conditions 45 * are met: 46 * 1. Redistributions of source code must retain the above copyright 47 * notice, this list of conditions and the following disclaimer. 48 * 2. Redistributions in binary form must reproduce the above copyright 49 * notice, this list of conditions and the following disclaimer in the 50 * documentation and/or other materials provided with the distribution. 51 * 3. All advertising materials mentioning features or use of this software 52 * must display the following acknowledgement: 53 * This product includes software developed by the University of 54 * California, Berkeley and its contributors. 55 * 4. Neither the name of the University nor the names of its contributors 56 * may be used to endorse or promote products derived from this software 57 * without specific prior written permission. 58 * 59 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 60 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 61 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 62 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 63 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 64 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 65 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 66 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 67 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 68 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 69 * SUCH DAMAGE. 70 * 71 * @(#)com.c 7.5 (Berkeley) 5/16/91 72 */ 73 74 /* 75 * COM driver, uses National Semiconductor NS16450/NS16550AF UART 76 * Supports automatic hardware flow control on StarTech ST16C650A UART 77 */ 78 79 #include "opt_ddb.h" 80 #include "opt_com.h" 81 82 #include "rnd.h" 83 #if NRND > 0 && defined(RND_COM) 84 #include <sys/rnd.h> 85 #endif 86 87 #include <sys/param.h> 88 #include <sys/systm.h> 89 #include <sys/ioctl.h> 90 #include <sys/select.h> 91 #include <sys/tty.h> 92 #include <sys/proc.h> 93 #include <sys/user.h> 94 #include <sys/conf.h> 95 #include <sys/file.h> 96 #include <sys/uio.h> 97 #include <sys/kernel.h> 98 #include <sys/syslog.h> 99 #include <sys/types.h> 100 #include <sys/device.h> 101 #include <sys/malloc.h> 102 #include <sys/timepps.h> 103 #include <sys/vnode.h> 104 105 #include <machine/intr.h> 106 #include <machine/bus.h> 107 108 #include <dev/ic/comreg.h> 109 #include <dev/ic/comvar.h> 110 #include <dev/ic/ns16550reg.h> 111 #include <dev/ic/st16650reg.h> 112 #ifdef COM_HAYESP 113 #include <dev/ic/hayespreg.h> 114 #endif 115 #define com_lcr com_cfcr 116 #include <dev/cons.h> 117 118 #include "com.h" 119 120 #ifdef COM_HAYESP 121 int comprobeHAYESP __P((bus_space_handle_t hayespioh, struct com_softc *sc)); 122 #endif 123 124 #if defined(DDB) || defined(KGDB) 125 static void com_enable_debugport __P((struct com_softc *)); 126 #endif 127 void com_config __P((struct com_softc *)); 128 void com_shutdown __P((struct com_softc *)); 129 int comspeed __P((long, long)); 130 static u_char cflag2lcr __P((tcflag_t)); 131 int comparam __P((struct tty *, struct termios *)); 132 void comstart __P((struct tty *)); 133 void comstop __P((struct tty *, int)); 134 int comhwiflow __P((struct tty *, int)); 135 136 void com_loadchannelregs __P((struct com_softc *)); 137 void com_hwiflow __P((struct com_softc *)); 138 void com_break __P((struct com_softc *, int)); 139 void com_modem __P((struct com_softc *, int)); 140 void tiocm_to_com __P((struct com_softc *, int, int)); 141 int com_to_tiocm __P((struct com_softc *)); 142 void com_iflush __P((struct com_softc *)); 143 144 int com_common_getc __P((bus_space_tag_t, bus_space_handle_t)); 145 void com_common_putc __P((bus_space_tag_t, bus_space_handle_t, int)); 146 147 /* XXX: These belong elsewhere */ 148 cdev_decl(com); 149 bdev_decl(com); 150 151 int comcngetc __P((dev_t)); 152 void comcnputc __P((dev_t, int)); 153 void comcnpollc __P((dev_t, int)); 154 155 #define integrate static inline 156 #ifdef __GENERIC_SOFT_INTERRUPTS 157 void comsoft __P((void *)); 158 #else 159 #ifndef __NO_SOFT_SERIAL_INTERRUPT 160 void comsoft __P((void)); 161 #else 162 void comsoft __P((void *)); 163 struct callout comsoft_callout = CALLOUT_INITIALIZER; 164 #endif 165 #endif 166 integrate void com_rxsoft __P((struct com_softc *, struct tty *)); 167 integrate void com_txsoft __P((struct com_softc *, struct tty *)); 168 integrate void com_stsoft __P((struct com_softc *, struct tty *)); 169 integrate void com_schedrx __P((struct com_softc *)); 170 void comdiag __P((void *)); 171 172 extern struct cfdriver com_cd; 173 174 /* 175 * Make this an option variable one can patch. 176 * But be warned: this must be a power of 2! 177 */ 178 u_int com_rbuf_size = COM_RING_SIZE; 179 180 /* Stop input when 3/4 of the ring is full; restart when only 1/4 is full. */ 181 u_int com_rbuf_hiwat = (COM_RING_SIZE * 1) / 4; 182 u_int com_rbuf_lowat = (COM_RING_SIZE * 3) / 4; 183 184 static int comconsaddr; 185 static bus_space_tag_t comconstag; 186 static bus_space_handle_t comconsioh; 187 static int comconsattached; 188 static int comconsrate; 189 static tcflag_t comconscflag; 190 191 static int ppscap = 192 PPS_TSFMT_TSPEC | 193 PPS_CAPTUREASSERT | 194 PPS_CAPTURECLEAR | 195 #ifdef PPS_SYNC 196 PPS_HARDPPSONASSERT | PPS_HARDPPSONCLEAR | 197 #endif /* PPS_SYNC */ 198 PPS_OFFSETASSERT | PPS_OFFSETCLEAR; 199 200 #ifndef __GENERIC_SOFT_INTERRUPTS 201 #ifdef __NO_SOFT_SERIAL_INTERRUPT 202 volatile int com_softintr_scheduled; 203 #endif 204 #endif 205 206 #ifdef KGDB 207 #include <sys/kgdb.h> 208 209 static int com_kgdb_addr; 210 static bus_space_tag_t com_kgdb_iot; 211 static bus_space_handle_t com_kgdb_ioh; 212 static int com_kgdb_attached; 213 214 int com_kgdb_getc __P((void *)); 215 void com_kgdb_putc __P((void *, int)); 216 #endif /* KGDB */ 217 218 #define COMUNIT_MASK 0x7ffff 219 #define COMDIALOUT_MASK 0x80000 220 221 #define COMUNIT(x) (minor(x) & COMUNIT_MASK) 222 #define COMDIALOUT(x) (minor(x) & COMDIALOUT_MASK) 223 224 #define COM_ISALIVE(sc) ((sc)->enabled != 0 && \ 225 ISSET((sc)->sc_dev.dv_flags, DVF_ACTIVE)) 226 227 #define BR BUS_SPACE_BARRIER_READ 228 #define BW BUS_SPACE_BARRIER_WRITE 229 #define COM_BARRIER(t, h, f) bus_space_barrier((t), (h), 0, COM_NPORTS, (f)) 230 231 int 232 comspeed(speed, frequency) 233 long speed, frequency; 234 { 235 #define divrnd(n, q) (((n)*2/(q)+1)/2) /* divide and round off */ 236 237 int x, err; 238 239 #if 0 240 if (speed == 0) 241 return (0); 242 #endif 243 if (speed <= 0) 244 return (-1); 245 x = divrnd(frequency / 16, speed); 246 if (x <= 0) 247 return (-1); 248 err = divrnd(((quad_t)frequency) * 1000 / 16, speed * x) - 1000; 249 if (err < 0) 250 err = -err; 251 if (err > COM_TOLERANCE) 252 return (-1); 253 return (x); 254 255 #undef divrnd 256 } 257 258 #ifdef COM_DEBUG 259 int com_debug = 0; 260 261 void comstatus __P((struct com_softc *, char *)); 262 void 263 comstatus(sc, str) 264 struct com_softc *sc; 265 char *str; 266 { 267 struct tty *tp = sc->sc_tty; 268 269 printf("%s: %s %sclocal %sdcd %sts_carr_on %sdtr %stx_stopped\n", 270 sc->sc_dev.dv_xname, str, 271 ISSET(tp->t_cflag, CLOCAL) ? "+" : "-", 272 ISSET(sc->sc_msr, MSR_DCD) ? "+" : "-", 273 ISSET(tp->t_state, TS_CARR_ON) ? "+" : "-", 274 ISSET(sc->sc_mcr, MCR_DTR) ? "+" : "-", 275 sc->sc_tx_stopped ? "+" : "-"); 276 277 printf("%s: %s %scrtscts %scts %sts_ttstop %srts %xrx_flags\n", 278 sc->sc_dev.dv_xname, str, 279 ISSET(tp->t_cflag, CRTSCTS) ? "+" : "-", 280 ISSET(sc->sc_msr, MSR_CTS) ? "+" : "-", 281 ISSET(tp->t_state, TS_TTSTOP) ? "+" : "-", 282 ISSET(sc->sc_mcr, MCR_RTS) ? "+" : "-", 283 sc->sc_rx_flags); 284 } 285 #endif 286 287 int 288 comprobe1(iot, ioh) 289 bus_space_tag_t iot; 290 bus_space_handle_t ioh; 291 { 292 293 /* force access to id reg */ 294 bus_space_write_1(iot, ioh, com_lcr, LCR_8BITS); 295 bus_space_write_1(iot, ioh, com_iir, 0); 296 if ((bus_space_read_1(iot, ioh, com_lcr) != LCR_8BITS) || 297 (bus_space_read_1(iot, ioh, com_iir) & 0x38)) 298 return (0); 299 300 return (1); 301 } 302 303 #ifdef COM_HAYESP 304 int 305 comprobeHAYESP(hayespioh, sc) 306 bus_space_handle_t hayespioh; 307 struct com_softc *sc; 308 { 309 char val, dips; 310 int combaselist[] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; 311 bus_space_tag_t iot = sc->sc_iot; 312 313 /* 314 * Hayes ESP cards have two iobases. One is for compatibility with 315 * 16550 serial chips, and at the same ISA PC base addresses. The 316 * other is for ESP-specific enhanced features, and lies at a 317 * different addressing range entirely (0x140, 0x180, 0x280, or 0x300). 318 */ 319 320 /* Test for ESP signature */ 321 if ((bus_space_read_1(iot, hayespioh, 0) & 0xf3) == 0) 322 return (0); 323 324 /* 325 * ESP is present at ESP enhanced base address; unknown com port 326 */ 327 328 /* Get the dip-switch configurations */ 329 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETDIPS); 330 dips = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); 331 332 /* Determine which com port this ESP card services: bits 0,1 of */ 333 /* dips is the port # (0-3); combaselist[val] is the com_iobase */ 334 if (sc->sc_iobase != combaselist[dips & 0x03]) 335 return (0); 336 337 printf(": ESP"); 338 339 /* Check ESP Self Test bits. */ 340 /* Check for ESP version 2.0: bits 4,5,6 == 010 */ 341 bus_space_write_1(iot, hayespioh, HAYESP_CMD1, HAYESP_GETTEST); 342 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS1); /* Clear reg1 */ 343 val = bus_space_read_1(iot, hayespioh, HAYESP_STATUS2); 344 if ((val & 0x70) < 0x20) { 345 printf("-old (%o)", val & 0x70); 346 /* we do not support the necessary features */ 347 return (0); 348 } 349 350 /* Check for ability to emulate 16550: bit 8 == 1 */ 351 if ((dips & 0x80) == 0) { 352 printf(" slave"); 353 /* XXX Does slave really mean no 16550 support?? */ 354 return (0); 355 } 356 357 /* 358 * If we made it this far, we are a full-featured ESP v2.0 (or 359 * better), at the correct com port address. 360 */ 361 362 SET(sc->sc_hwflags, COM_HW_HAYESP); 363 printf(", 1024 byte fifo\n"); 364 return (1); 365 } 366 #endif 367 368 #if defined(DDB) || defined(KGDB) 369 static void 370 com_enable_debugport(sc) 371 struct com_softc *sc; 372 { 373 int s; 374 375 /* Turn on line break interrupt, set carrier. */ 376 s = splserial(); 377 sc->sc_ier = IER_ERXRDY; 378 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 379 SET(sc->sc_mcr, MCR_DTR | MCR_RTS); 380 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_mcr, sc->sc_mcr); 381 splx(s); 382 } 383 #endif 384 385 void 386 com_attach_subr(sc) 387 struct com_softc *sc; 388 { 389 int iobase = sc->sc_iobase; 390 bus_space_tag_t iot = sc->sc_iot; 391 bus_space_handle_t ioh = sc->sc_ioh; 392 struct tty *tp; 393 #ifdef COM16650 394 u_int8_t lcr; 395 #endif 396 #ifdef COM_HAYESP 397 int hayesp_ports[] = { 0x140, 0x180, 0x280, 0x300, 0 }; 398 int *hayespp; 399 #endif 400 401 callout_init(&sc->sc_diag_callout); 402 403 /* Disable interrupts before configuring the device. */ 404 sc->sc_ier = 0; 405 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 406 407 if (iot == comconstag && iobase == comconsaddr) { 408 comconsattached = 1; 409 410 /* Make sure the console is always "hardwired". */ 411 delay(1000); /* wait for output to finish */ 412 SET(sc->sc_hwflags, COM_HW_CONSOLE); 413 SET(sc->sc_swflags, TIOCFLAG_SOFTCAR); 414 } 415 416 #ifdef COM_HAYESP 417 /* Look for a Hayes ESP board. */ 418 for (hayespp = hayesp_ports; *hayespp != 0; hayespp++) { 419 bus_space_handle_t hayespioh; 420 421 #define HAYESP_NPORTS 8 /* XXX XXX XXX ??? ??? ??? */ 422 if (bus_space_map(iot, *hayespp, HAYESP_NPORTS, 0, &hayespioh)) 423 continue; 424 if (comprobeHAYESP(hayespioh, sc)) { 425 sc->sc_hayespioh = hayespioh; 426 sc->sc_fifolen = 1024; 427 428 break; 429 } 430 bus_space_unmap(iot, hayespioh, HAYESP_NPORTS); 431 } 432 /* No ESP; look for other things. */ 433 if (!ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 434 #endif 435 sc->sc_fifolen = 1; 436 /* look for a NS 16550AF UART with FIFOs */ 437 bus_space_write_1(iot, ioh, com_fifo, 438 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_14); 439 delay(100); 440 if (ISSET(bus_space_read_1(iot, ioh, com_iir), IIR_FIFO_MASK) 441 == IIR_FIFO_MASK) 442 if (ISSET(bus_space_read_1(iot, ioh, com_fifo), FIFO_TRIGGER_14) 443 == FIFO_TRIGGER_14) { 444 SET(sc->sc_hwflags, COM_HW_FIFO); 445 446 #ifdef COM16650 447 /* 448 * IIR changes into the EFR if LCR is set to LCR_EERS 449 * on 16650s. We also know IIR != 0 at this point. 450 * Write 0 into the EFR, and read it. If the result 451 * is 0, we have a 16650. 452 * 453 * Older 16650s were broken; the test to detect them 454 * is taken from the Linux driver. Apparently 455 * setting DLAB enable gives access to the EFR on 456 * these chips. 457 */ 458 lcr = bus_space_read_1(iot, ioh, com_lcr); 459 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 460 bus_space_write_1(iot, ioh, com_efr, 0); 461 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 462 bus_space_write_1(iot, ioh, com_lcr, 463 lcr | LCR_DLAB); 464 if (bus_space_read_1(iot, ioh, com_efr) == 0) { 465 CLR(sc->sc_hwflags, COM_HW_FIFO); 466 sc->sc_fifolen = 0; 467 } else { 468 SET(sc->sc_hwflags, COM_HW_FLOW); 469 sc->sc_fifolen = 32; 470 } 471 } else 472 #endif 473 sc->sc_fifolen = 16; 474 475 #ifdef COM16650 476 bus_space_write_1(iot, ioh, com_lcr, lcr); 477 if (sc->sc_fifolen == 0) 478 printf(": st16650, broken fifo\n"); 479 else if (sc->sc_fifolen == 32) 480 printf(": st16650a, working fifo\n"); 481 else 482 #endif 483 printf(": ns16550a, working fifo\n"); 484 } else 485 printf(": ns16550, broken fifo\n"); 486 else 487 printf(": ns8250 or ns16450, no fifo\n"); 488 bus_space_write_1(iot, ioh, com_fifo, 0); 489 if (ISSET(sc->sc_hwflags, COM_HW_TXFIFO_DISABLE)) { 490 sc->sc_fifolen = 1; 491 printf("%s: txfifo disabled\n", sc->sc_dev.dv_xname); 492 } 493 #ifdef COM_HAYESP 494 } 495 #endif 496 497 tp = ttymalloc(); 498 tp->t_oproc = comstart; 499 tp->t_param = comparam; 500 tp->t_hwiflow = comhwiflow; 501 502 sc->sc_tty = tp; 503 sc->sc_rbuf = malloc(com_rbuf_size << 1, M_DEVBUF, M_NOWAIT); 504 if (sc->sc_rbuf == NULL) { 505 printf("%s: unable to allocate ring buffer\n", 506 sc->sc_dev.dv_xname); 507 return; 508 } 509 sc->sc_ebuf = sc->sc_rbuf + (com_rbuf_size << 1); 510 511 tty_attach(tp); 512 513 if (!ISSET(sc->sc_hwflags, COM_HW_NOIEN)) 514 SET(sc->sc_mcr, MCR_IENABLE); 515 516 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 517 int maj; 518 519 /* locate the major number */ 520 for (maj = 0; maj < nchrdev; maj++) 521 if (cdevsw[maj].d_open == comopen) 522 break; 523 524 cn_tab->cn_dev = makedev(maj, sc->sc_dev.dv_unit); 525 526 printf("%s: console\n", sc->sc_dev.dv_xname); 527 } 528 529 #ifdef KGDB 530 /* 531 * Allow kgdb to "take over" this port. If this is 532 * the kgdb device, it has exclusive use. 533 */ 534 if (iot == com_kgdb_iot && iobase == com_kgdb_addr) { 535 com_kgdb_attached = 1; 536 537 SET(sc->sc_hwflags, COM_HW_KGDB); 538 printf("%s: kgdb\n", sc->sc_dev.dv_xname); 539 } 540 #endif 541 542 #ifdef __GENERIC_SOFT_INTERRUPTS 543 sc->sc_si = softintr_establish(IPL_SOFTSERIAL, comsoft, sc); 544 #endif 545 546 #if NRND > 0 && defined(RND_COM) 547 rnd_attach_source(&sc->rnd_source, sc->sc_dev.dv_xname, 548 RND_TYPE_TTY, 0); 549 #endif 550 551 /* if there are no enable/disable functions, assume the device 552 is always enabled */ 553 if (!sc->enable) 554 sc->enabled = 1; 555 556 com_config(sc); 557 558 SET(sc->sc_hwflags, COM_HW_DEV_OK); 559 } 560 561 void 562 com_config(sc) 563 struct com_softc *sc; 564 { 565 bus_space_tag_t iot = sc->sc_iot; 566 bus_space_handle_t ioh = sc->sc_ioh; 567 568 /* Disable interrupts before configuring the device. */ 569 sc->sc_ier = 0; 570 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 571 572 #ifdef COM_HAYESP 573 /* Look for a Hayes ESP board. */ 574 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) { 575 sc->sc_fifolen = 1024; 576 577 /* Set 16550 compatibility mode */ 578 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 579 HAYESP_SETMODE); 580 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 581 HAYESP_MODE_FIFO|HAYESP_MODE_RTS| 582 HAYESP_MODE_SCALE); 583 584 /* Set RTS/CTS flow control */ 585 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 586 HAYESP_SETFLOWTYPE); 587 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 588 HAYESP_FLOW_RTS); 589 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 590 HAYESP_FLOW_CTS); 591 592 /* Set flow control levels */ 593 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD1, 594 HAYESP_SETRXFLOW); 595 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 596 HAYESP_HIBYTE(HAYESP_RXHIWMARK)); 597 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 598 HAYESP_LOBYTE(HAYESP_RXHIWMARK)); 599 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 600 HAYESP_HIBYTE(HAYESP_RXLOWMARK)); 601 bus_space_write_1(iot, sc->sc_hayespioh, HAYESP_CMD2, 602 HAYESP_LOBYTE(HAYESP_RXLOWMARK)); 603 } 604 #endif 605 606 #ifdef DDB 607 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 608 com_enable_debugport(sc); 609 #endif 610 611 #ifdef KGDB 612 /* 613 * Allow kgdb to "take over" this port. If this is 614 * the kgdb device, it has exclusive use. 615 */ 616 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 617 com_enable_debugport(sc); 618 #endif 619 } 620 621 int 622 com_detach(self, flags) 623 struct device *self; 624 int flags; 625 { 626 struct com_softc *sc = (struct com_softc *)self; 627 int maj, mn; 628 629 /* locate the major number */ 630 for (maj = 0; maj < nchrdev; maj++) 631 if (cdevsw[maj].d_open == comopen) 632 break; 633 634 /* Nuke the vnodes for any open instances. */ 635 mn = self->dv_unit; 636 vdevgone(maj, mn, mn, VCHR); 637 638 mn |= COMDIALOUT_MASK; 639 vdevgone(maj, mn, mn, VCHR); 640 641 /* Free the receive buffer. */ 642 free(sc->sc_rbuf, M_DEVBUF); 643 644 /* Detach and free the tty. */ 645 tty_detach(sc->sc_tty); 646 ttyfree(sc->sc_tty); 647 648 #ifdef __GENERIC_SOFT_INTERRUPTS 649 /* Unhook the soft interrupt handler. */ 650 softintr_disestablish(sc->sc_si); 651 #endif 652 653 #if NRND > 0 && defined(RND_COM) 654 /* Unhook the entropy source. */ 655 rnd_detach_source(&sc->rnd_source); 656 #endif 657 658 return (0); 659 } 660 661 int 662 com_activate(self, act) 663 struct device *self; 664 enum devact act; 665 { 666 struct com_softc *sc = (struct com_softc *)self; 667 int s, rv = 0; 668 669 s = splserial(); 670 switch (act) { 671 case DVACT_ACTIVATE: 672 rv = EOPNOTSUPP; 673 break; 674 675 case DVACT_DEACTIVATE: 676 if (sc->sc_hwflags & (COM_HW_CONSOLE|COM_HW_KGDB)) { 677 rv = EBUSY; 678 break; 679 } 680 681 if (sc->disable != NULL && sc->enabled != 0) { 682 (*sc->disable)(sc); 683 sc->enabled = 0; 684 } 685 break; 686 } 687 splx(s); 688 return (rv); 689 } 690 691 void 692 com_shutdown(sc) 693 struct com_softc *sc; 694 { 695 struct tty *tp = sc->sc_tty; 696 int s; 697 698 s = splserial(); 699 700 /* If we were asserting flow control, then deassert it. */ 701 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 702 com_hwiflow(sc); 703 704 /* Clear any break condition set with TIOCSBRK. */ 705 com_break(sc, 0); 706 707 /* Turn off PPS capture on last close. */ 708 sc->sc_ppsmask = 0; 709 sc->ppsparam.mode = 0; 710 711 /* 712 * Hang up if necessary. Wait a bit, so the other side has time to 713 * notice even if we immediately open the port again. 714 */ 715 if (ISSET(tp->t_cflag, HUPCL)) { 716 com_modem(sc, 0); 717 (void) tsleep(sc, TTIPRI, ttclos, hz); 718 } 719 720 /* Turn off interrupts. */ 721 #ifdef DDB 722 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) 723 sc->sc_ier = IER_ERXRDY; /* interrupt on break */ 724 else 725 #endif 726 sc->sc_ier = 0; 727 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 728 729 if (sc->disable) { 730 #ifdef DIAGNOSTIC 731 if (!sc->enabled) 732 panic("com_shutdown: not enabled?"); 733 #endif 734 (*sc->disable)(sc); 735 sc->enabled = 0; 736 } 737 738 splx(s); 739 } 740 741 int 742 comopen(dev, flag, mode, p) 743 dev_t dev; 744 int flag, mode; 745 struct proc *p; 746 { 747 struct com_softc *sc; 748 struct tty *tp; 749 int s, s2; 750 int error; 751 752 sc = device_lookup(&com_cd, COMUNIT(dev)); 753 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK) || 754 sc->sc_rbuf == NULL) 755 return (ENXIO); 756 757 if (ISSET(sc->sc_dev.dv_flags, DVF_ACTIVE) == 0) 758 return (ENXIO); 759 760 #ifdef KGDB 761 /* 762 * If this is the kgdb port, no other use is permitted. 763 */ 764 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) 765 return (EBUSY); 766 #endif 767 768 tp = sc->sc_tty; 769 770 if (ISSET(tp->t_state, TS_ISOPEN) && 771 ISSET(tp->t_state, TS_XCLUDE) && 772 p->p_ucred->cr_uid != 0) 773 return (EBUSY); 774 775 s = spltty(); 776 777 /* 778 * Do the following iff this is a first open. 779 */ 780 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 781 struct termios t; 782 783 tp->t_dev = dev; 784 785 s2 = splserial(); 786 787 if (sc->enable) { 788 if ((*sc->enable)(sc)) { 789 splx(s2); 790 splx(s); 791 printf("%s: device enable failed\n", 792 sc->sc_dev.dv_xname); 793 return (EIO); 794 } 795 sc->enabled = 1; 796 com_config(sc); 797 } 798 799 /* Turn on interrupts. */ 800 sc->sc_ier = IER_ERXRDY | IER_ERLS | IER_EMSC; 801 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 802 803 /* Fetch the current modem control status, needed later. */ 804 sc->sc_msr = bus_space_read_1(sc->sc_iot, sc->sc_ioh, com_msr); 805 806 /* Clear PPS capture state on first open. */ 807 sc->sc_ppsmask = 0; 808 sc->ppsparam.mode = 0; 809 810 splx(s2); 811 812 /* 813 * Initialize the termios status to the defaults. Add in the 814 * sticky bits from TIOCSFLAGS. 815 */ 816 t.c_ispeed = 0; 817 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 818 t.c_ospeed = comconsrate; 819 t.c_cflag = comconscflag; 820 } else { 821 t.c_ospeed = TTYDEF_SPEED; 822 t.c_cflag = TTYDEF_CFLAG; 823 } 824 if (ISSET(sc->sc_swflags, TIOCFLAG_CLOCAL)) 825 SET(t.c_cflag, CLOCAL); 826 if (ISSET(sc->sc_swflags, TIOCFLAG_CRTSCTS)) 827 SET(t.c_cflag, CRTSCTS); 828 if (ISSET(sc->sc_swflags, TIOCFLAG_MDMBUF)) 829 SET(t.c_cflag, MDMBUF); 830 /* Make sure comparam() will do something. */ 831 tp->t_ospeed = 0; 832 (void) comparam(tp, &t); 833 tp->t_iflag = TTYDEF_IFLAG; 834 tp->t_oflag = TTYDEF_OFLAG; 835 tp->t_lflag = TTYDEF_LFLAG; 836 ttychars(tp); 837 ttsetwater(tp); 838 839 s2 = splserial(); 840 841 /* 842 * Turn on DTR. We must always do this, even if carrier is not 843 * present, because otherwise we'd have to use TIOCSDTR 844 * immediately after setting CLOCAL, which applications do not 845 * expect. We always assert DTR while the device is open 846 * unless explicitly requested to deassert it. 847 */ 848 com_modem(sc, 1); 849 850 /* Clear the input ring, and unblock. */ 851 sc->sc_rbput = sc->sc_rbget = sc->sc_rbuf; 852 sc->sc_rbavail = com_rbuf_size; 853 com_iflush(sc); 854 CLR(sc->sc_rx_flags, RX_ANY_BLOCK); 855 com_hwiflow(sc); 856 857 #ifdef COM_DEBUG 858 if (com_debug) 859 comstatus(sc, "comopen "); 860 #endif 861 862 splx(s2); 863 } 864 865 splx(s); 866 867 error = ttyopen(tp, COMDIALOUT(dev), ISSET(flag, O_NONBLOCK)); 868 if (error) 869 goto bad; 870 871 error = (*linesw[tp->t_line].l_open)(dev, tp); 872 if (error) 873 goto bad; 874 875 return (0); 876 877 bad: 878 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 879 /* 880 * We failed to open the device, and nobody else had it opened. 881 * Clean up the state as appropriate. 882 */ 883 com_shutdown(sc); 884 } 885 886 return (error); 887 } 888 889 int 890 comclose(dev, flag, mode, p) 891 dev_t dev; 892 int flag, mode; 893 struct proc *p; 894 { 895 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 896 struct tty *tp = sc->sc_tty; 897 898 /* XXX This is for cons.c. */ 899 if (!ISSET(tp->t_state, TS_ISOPEN)) 900 return (0); 901 902 (*linesw[tp->t_line].l_close)(tp, flag); 903 ttyclose(tp); 904 905 if (COM_ISALIVE(sc) == 0) 906 return (0); 907 908 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) { 909 /* 910 * Although we got a last close, the device may still be in 911 * use; e.g. if this was the dialout node, and there are still 912 * processes waiting for carrier on the non-dialout node. 913 */ 914 com_shutdown(sc); 915 } 916 917 return (0); 918 } 919 920 int 921 comread(dev, uio, flag) 922 dev_t dev; 923 struct uio *uio; 924 int flag; 925 { 926 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 927 struct tty *tp = sc->sc_tty; 928 929 if (COM_ISALIVE(sc) == 0) 930 return (EIO); 931 932 return ((*linesw[tp->t_line].l_read)(tp, uio, flag)); 933 } 934 935 int 936 comwrite(dev, uio, flag) 937 dev_t dev; 938 struct uio *uio; 939 int flag; 940 { 941 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 942 struct tty *tp = sc->sc_tty; 943 944 if (COM_ISALIVE(sc) == 0) 945 return (EIO); 946 947 return ((*linesw[tp->t_line].l_write)(tp, uio, flag)); 948 } 949 950 struct tty * 951 comtty(dev) 952 dev_t dev; 953 { 954 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 955 struct tty *tp = sc->sc_tty; 956 957 return (tp); 958 } 959 960 int 961 comioctl(dev, cmd, data, flag, p) 962 dev_t dev; 963 u_long cmd; 964 caddr_t data; 965 int flag; 966 struct proc *p; 967 { 968 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(dev)); 969 struct tty *tp = sc->sc_tty; 970 int error; 971 int s; 972 973 if (COM_ISALIVE(sc) == 0) 974 return (EIO); 975 976 error = (*linesw[tp->t_line].l_ioctl)(tp, cmd, data, flag, p); 977 if (error >= 0) 978 return (error); 979 980 error = ttioctl(tp, cmd, data, flag, p); 981 if (error >= 0) 982 return (error); 983 984 error = 0; 985 986 s = splserial(); 987 988 switch (cmd) { 989 case TIOCSBRK: 990 com_break(sc, 1); 991 break; 992 993 case TIOCCBRK: 994 com_break(sc, 0); 995 break; 996 997 case TIOCSDTR: 998 com_modem(sc, 1); 999 break; 1000 1001 case TIOCCDTR: 1002 com_modem(sc, 0); 1003 break; 1004 1005 case TIOCGFLAGS: 1006 *(int *)data = sc->sc_swflags; 1007 break; 1008 1009 case TIOCSFLAGS: 1010 error = suser(p->p_ucred, &p->p_acflag); 1011 if (error) 1012 break; 1013 sc->sc_swflags = *(int *)data; 1014 break; 1015 1016 case TIOCMSET: 1017 case TIOCMBIS: 1018 case TIOCMBIC: 1019 tiocm_to_com(sc, cmd, *(int *)data); 1020 break; 1021 1022 case TIOCMGET: 1023 *(int *)data = com_to_tiocm(sc); 1024 break; 1025 1026 case PPS_IOC_CREATE: 1027 break; 1028 1029 case PPS_IOC_DESTROY: 1030 break; 1031 1032 case PPS_IOC_GETPARAMS: { 1033 pps_params_t *pp; 1034 pp = (pps_params_t *)data; 1035 *pp = sc->ppsparam; 1036 break; 1037 } 1038 1039 case PPS_IOC_SETPARAMS: { 1040 pps_params_t *pp; 1041 int mode; 1042 pp = (pps_params_t *)data; 1043 if (pp->mode & ~ppscap) { 1044 error = EINVAL; 1045 break; 1046 } 1047 sc->ppsparam = *pp; 1048 /* 1049 * Compute msr masks from user-specified timestamp state. 1050 */ 1051 mode = sc->ppsparam.mode; 1052 #ifdef PPS_SYNC 1053 if (mode & PPS_HARDPPSONASSERT) { 1054 mode |= PPS_CAPTUREASSERT; 1055 /* XXX revoke any previous HARDPPS source */ 1056 } 1057 if (mode & PPS_HARDPPSONCLEAR) { 1058 mode |= PPS_CAPTURECLEAR; 1059 /* XXX revoke any previous HARDPPS source */ 1060 } 1061 #endif /* PPS_SYNC */ 1062 switch (mode & PPS_CAPTUREBOTH) { 1063 case 0: 1064 sc->sc_ppsmask = 0; 1065 break; 1066 1067 case PPS_CAPTUREASSERT: 1068 sc->sc_ppsmask = MSR_DCD; 1069 sc->sc_ppsassert = MSR_DCD; 1070 sc->sc_ppsclear = -1; 1071 break; 1072 1073 case PPS_CAPTURECLEAR: 1074 sc->sc_ppsmask = MSR_DCD; 1075 sc->sc_ppsassert = -1; 1076 sc->sc_ppsclear = 0; 1077 break; 1078 1079 case PPS_CAPTUREBOTH: 1080 sc->sc_ppsmask = MSR_DCD; 1081 sc->sc_ppsassert = MSR_DCD; 1082 sc->sc_ppsclear = 0; 1083 break; 1084 1085 default: 1086 error = EINVAL; 1087 break; 1088 } 1089 break; 1090 } 1091 1092 case PPS_IOC_GETCAP: 1093 *(int*)data = ppscap; 1094 break; 1095 1096 case PPS_IOC_FETCH: { 1097 pps_info_t *pi; 1098 pi = (pps_info_t *)data; 1099 *pi = sc->ppsinfo; 1100 break; 1101 } 1102 1103 case TIOCDCDTIMESTAMP: /* XXX old, overloaded API used by xntpd v3 */ 1104 /* 1105 * Some GPS clocks models use the falling rather than 1106 * rising edge as the on-the-second signal. 1107 * The old API has no way to specify PPS polarity. 1108 */ 1109 sc->sc_ppsmask = MSR_DCD; 1110 #ifndef PPS_TRAILING_EDGE 1111 sc->sc_ppsassert = MSR_DCD; 1112 sc->sc_ppsclear = -1; 1113 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1114 &sc->ppsinfo.assert_timestamp); 1115 #else 1116 sc->sc_ppsassert = -1 1117 sc->sc_ppsclear = 0; 1118 TIMESPEC_TO_TIMEVAL((struct timeval *)data, 1119 &sc->ppsinfo.clear_timestamp); 1120 #endif 1121 break; 1122 1123 default: 1124 error = ENOTTY; 1125 break; 1126 } 1127 1128 splx(s); 1129 1130 #ifdef COM_DEBUG 1131 if (com_debug) 1132 comstatus(sc, "comioctl "); 1133 #endif 1134 1135 return (error); 1136 } 1137 1138 integrate void 1139 com_schedrx(sc) 1140 struct com_softc *sc; 1141 { 1142 1143 sc->sc_rx_ready = 1; 1144 1145 /* Wake up the poller. */ 1146 #ifdef __GENERIC_SOFT_INTERRUPTS 1147 softintr_schedule(sc->sc_si); 1148 #else 1149 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1150 setsoftserial(); 1151 #else 1152 if (!com_softintr_scheduled) { 1153 com_softintr_scheduled = 1; 1154 callout_reset(&comsoft_callout, 1, comsoft, NULL); 1155 } 1156 #endif 1157 #endif 1158 } 1159 1160 void 1161 com_break(sc, onoff) 1162 struct com_softc *sc; 1163 int onoff; 1164 { 1165 1166 if (onoff) 1167 SET(sc->sc_lcr, LCR_SBREAK); 1168 else 1169 CLR(sc->sc_lcr, LCR_SBREAK); 1170 1171 if (!sc->sc_heldchange) { 1172 if (sc->sc_tx_busy) { 1173 sc->sc_heldtbc = sc->sc_tbc; 1174 sc->sc_tbc = 0; 1175 sc->sc_heldchange = 1; 1176 } else 1177 com_loadchannelregs(sc); 1178 } 1179 } 1180 1181 void 1182 com_modem(sc, onoff) 1183 struct com_softc *sc; 1184 int onoff; 1185 { 1186 1187 if (sc->sc_mcr_dtr == 0) 1188 return; 1189 1190 if (onoff) 1191 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1192 else 1193 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1194 1195 if (!sc->sc_heldchange) { 1196 if (sc->sc_tx_busy) { 1197 sc->sc_heldtbc = sc->sc_tbc; 1198 sc->sc_tbc = 0; 1199 sc->sc_heldchange = 1; 1200 } else 1201 com_loadchannelregs(sc); 1202 } 1203 } 1204 1205 void 1206 tiocm_to_com(sc, how, ttybits) 1207 struct com_softc *sc; 1208 int how, ttybits; 1209 { 1210 u_char combits; 1211 1212 combits = 0; 1213 if (ISSET(ttybits, TIOCM_DTR)) 1214 SET(combits, MCR_DTR); 1215 if (ISSET(ttybits, TIOCM_RTS)) 1216 SET(combits, MCR_RTS); 1217 1218 switch (how) { 1219 case TIOCMBIC: 1220 CLR(sc->sc_mcr, combits); 1221 break; 1222 1223 case TIOCMBIS: 1224 SET(sc->sc_mcr, combits); 1225 break; 1226 1227 case TIOCMSET: 1228 CLR(sc->sc_mcr, MCR_DTR | MCR_RTS); 1229 SET(sc->sc_mcr, combits); 1230 break; 1231 } 1232 1233 if (!sc->sc_heldchange) { 1234 if (sc->sc_tx_busy) { 1235 sc->sc_heldtbc = sc->sc_tbc; 1236 sc->sc_tbc = 0; 1237 sc->sc_heldchange = 1; 1238 } else 1239 com_loadchannelregs(sc); 1240 } 1241 } 1242 1243 int 1244 com_to_tiocm(sc) 1245 struct com_softc *sc; 1246 { 1247 u_char combits; 1248 int ttybits = 0; 1249 1250 combits = sc->sc_mcr; 1251 if (ISSET(combits, MCR_DTR)) 1252 SET(ttybits, TIOCM_DTR); 1253 if (ISSET(combits, MCR_RTS)) 1254 SET(ttybits, TIOCM_RTS); 1255 1256 combits = sc->sc_msr; 1257 if (ISSET(combits, MSR_DCD)) 1258 SET(ttybits, TIOCM_CD); 1259 if (ISSET(combits, MSR_CTS)) 1260 SET(ttybits, TIOCM_CTS); 1261 if (ISSET(combits, MSR_DSR)) 1262 SET(ttybits, TIOCM_DSR); 1263 if (ISSET(combits, MSR_RI | MSR_TERI)) 1264 SET(ttybits, TIOCM_RI); 1265 1266 if (sc->sc_ier != 0) 1267 SET(ttybits, TIOCM_LE); 1268 1269 return (ttybits); 1270 } 1271 1272 static u_char 1273 cflag2lcr(cflag) 1274 tcflag_t cflag; 1275 { 1276 u_char lcr = 0; 1277 1278 switch (ISSET(cflag, CSIZE)) { 1279 case CS5: 1280 SET(lcr, LCR_5BITS); 1281 break; 1282 case CS6: 1283 SET(lcr, LCR_6BITS); 1284 break; 1285 case CS7: 1286 SET(lcr, LCR_7BITS); 1287 break; 1288 case CS8: 1289 SET(lcr, LCR_8BITS); 1290 break; 1291 } 1292 if (ISSET(cflag, PARENB)) { 1293 SET(lcr, LCR_PENAB); 1294 if (!ISSET(cflag, PARODD)) 1295 SET(lcr, LCR_PEVEN); 1296 } 1297 if (ISSET(cflag, CSTOPB)) 1298 SET(lcr, LCR_STOPB); 1299 1300 return (lcr); 1301 } 1302 1303 int 1304 comparam(tp, t) 1305 struct tty *tp; 1306 struct termios *t; 1307 { 1308 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1309 int ospeed = comspeed(t->c_ospeed, sc->sc_frequency); 1310 u_char lcr; 1311 int s; 1312 1313 if (COM_ISALIVE(sc) == 0) 1314 return (EIO); 1315 1316 /* Check requested parameters. */ 1317 if (ospeed < 0) 1318 return (EINVAL); 1319 if (t->c_ispeed && t->c_ispeed != t->c_ospeed) 1320 return (EINVAL); 1321 1322 /* 1323 * For the console, always force CLOCAL and !HUPCL, so that the port 1324 * is always active. 1325 */ 1326 if (ISSET(sc->sc_swflags, TIOCFLAG_SOFTCAR) || 1327 ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1328 SET(t->c_cflag, CLOCAL); 1329 CLR(t->c_cflag, HUPCL); 1330 } 1331 1332 /* 1333 * If there were no changes, don't do anything. This avoids dropping 1334 * input and improves performance when all we did was frob things like 1335 * VMIN and VTIME. 1336 */ 1337 if (tp->t_ospeed == t->c_ospeed && 1338 tp->t_cflag == t->c_cflag) 1339 return (0); 1340 1341 lcr = ISSET(sc->sc_lcr, LCR_SBREAK) | cflag2lcr(t->c_cflag); 1342 1343 s = splserial(); 1344 1345 sc->sc_lcr = lcr; 1346 1347 /* 1348 * If we're not in a mode that assumes a connection is present, then 1349 * ignore carrier changes. 1350 */ 1351 if (ISSET(t->c_cflag, CLOCAL | MDMBUF)) 1352 sc->sc_msr_dcd = 0; 1353 else 1354 sc->sc_msr_dcd = MSR_DCD; 1355 /* 1356 * Set the flow control pins depending on the current flow control 1357 * mode. 1358 */ 1359 if (ISSET(t->c_cflag, CRTSCTS)) { 1360 sc->sc_mcr_dtr = MCR_DTR; 1361 sc->sc_mcr_rts = MCR_RTS; 1362 sc->sc_msr_cts = MSR_CTS; 1363 sc->sc_efr = EFR_AUTORTS | EFR_AUTOCTS; 1364 } else if (ISSET(t->c_cflag, MDMBUF)) { 1365 /* 1366 * For DTR/DCD flow control, make sure we don't toggle DTR for 1367 * carrier detection. 1368 */ 1369 sc->sc_mcr_dtr = 0; 1370 sc->sc_mcr_rts = MCR_DTR; 1371 sc->sc_msr_cts = MSR_DCD; 1372 sc->sc_efr = 0; 1373 } else { 1374 /* 1375 * If no flow control, then always set RTS. This will make 1376 * the other side happy if it mistakenly thinks we're doing 1377 * RTS/CTS flow control. 1378 */ 1379 sc->sc_mcr_dtr = MCR_DTR | MCR_RTS; 1380 sc->sc_mcr_rts = 0; 1381 sc->sc_msr_cts = 0; 1382 sc->sc_efr = 0; 1383 if (ISSET(sc->sc_mcr, MCR_DTR)) 1384 SET(sc->sc_mcr, MCR_RTS); 1385 else 1386 CLR(sc->sc_mcr, MCR_RTS); 1387 } 1388 sc->sc_msr_mask = sc->sc_msr_cts | sc->sc_msr_dcd; 1389 1390 #if 0 1391 if (ospeed == 0) 1392 CLR(sc->sc_mcr, sc->sc_mcr_dtr); 1393 else 1394 SET(sc->sc_mcr, sc->sc_mcr_dtr); 1395 #endif 1396 1397 sc->sc_dlbl = ospeed; 1398 sc->sc_dlbh = ospeed >> 8; 1399 1400 /* 1401 * Set the FIFO threshold based on the receive speed. 1402 * 1403 * * If it's a low speed, it's probably a mouse or some other 1404 * interactive device, so set the threshold low. 1405 * * If it's a high speed, trim the trigger level down to prevent 1406 * overflows. 1407 * * Otherwise set it a bit higher. 1408 */ 1409 if (ISSET(sc->sc_hwflags, COM_HW_HAYESP)) 1410 sc->sc_fifo = FIFO_DMA_MODE | FIFO_ENABLE | FIFO_TRIGGER_8; 1411 else if (ISSET(sc->sc_hwflags, COM_HW_FIFO)) 1412 sc->sc_fifo = FIFO_ENABLE | 1413 (t->c_ospeed <= 1200 ? FIFO_TRIGGER_1 : 1414 t->c_ospeed <= 38400 ? FIFO_TRIGGER_8 : FIFO_TRIGGER_4); 1415 else 1416 sc->sc_fifo = 0; 1417 1418 /* And copy to tty. */ 1419 tp->t_ispeed = 0; 1420 tp->t_ospeed = t->c_ospeed; 1421 tp->t_cflag = t->c_cflag; 1422 1423 if (!sc->sc_heldchange) { 1424 if (sc->sc_tx_busy) { 1425 sc->sc_heldtbc = sc->sc_tbc; 1426 sc->sc_tbc = 0; 1427 sc->sc_heldchange = 1; 1428 } else 1429 com_loadchannelregs(sc); 1430 } 1431 1432 if (!ISSET(t->c_cflag, CHWFLOW)) { 1433 /* Disable the high water mark. */ 1434 sc->sc_r_hiwat = 0; 1435 sc->sc_r_lowat = 0; 1436 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1437 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1438 com_schedrx(sc); 1439 } 1440 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED)) { 1441 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED|RX_IBUF_BLOCKED); 1442 com_hwiflow(sc); 1443 } 1444 } else { 1445 sc->sc_r_hiwat = com_rbuf_hiwat; 1446 sc->sc_r_lowat = com_rbuf_lowat; 1447 } 1448 1449 splx(s); 1450 1451 /* 1452 * Update the tty layer's idea of the carrier bit, in case we changed 1453 * CLOCAL or MDMBUF. We don't hang up here; we only do that by 1454 * explicit request. 1455 */ 1456 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(sc->sc_msr, MSR_DCD)); 1457 1458 #ifdef COM_DEBUG 1459 if (com_debug) 1460 comstatus(sc, "comparam "); 1461 #endif 1462 1463 if (!ISSET(t->c_cflag, CHWFLOW)) { 1464 if (sc->sc_tx_stopped) { 1465 sc->sc_tx_stopped = 0; 1466 comstart(tp); 1467 } 1468 } 1469 1470 return (0); 1471 } 1472 1473 void 1474 com_iflush(sc) 1475 struct com_softc *sc; 1476 { 1477 bus_space_tag_t iot = sc->sc_iot; 1478 bus_space_handle_t ioh = sc->sc_ioh; 1479 #ifdef DIAGNOSTIC 1480 int reg; 1481 #endif 1482 int timo; 1483 1484 #ifdef DIAGNOSTIC 1485 reg = 0xffff; 1486 #endif 1487 timo = 50000; 1488 /* flush any pending I/O */ 1489 while (ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY) 1490 && --timo) 1491 #ifdef DIAGNOSTIC 1492 reg = 1493 #else 1494 (void) 1495 #endif 1496 bus_space_read_1(iot, ioh, com_data); 1497 #ifdef DIAGNOSTIC 1498 if (!timo) 1499 printf("%s: com_iflush timeout %02x\n", sc->sc_dev.dv_xname, 1500 reg); 1501 #endif 1502 } 1503 1504 void 1505 com_loadchannelregs(sc) 1506 struct com_softc *sc; 1507 { 1508 bus_space_tag_t iot = sc->sc_iot; 1509 bus_space_handle_t ioh = sc->sc_ioh; 1510 1511 /* XXXXX necessary? */ 1512 com_iflush(sc); 1513 1514 bus_space_write_1(iot, ioh, com_ier, 0); 1515 1516 if (ISSET(sc->sc_hwflags, COM_HW_FLOW)) { 1517 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 1518 bus_space_write_1(iot, ioh, com_efr, sc->sc_efr); 1519 } 1520 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr | LCR_DLAB); 1521 bus_space_write_1(iot, ioh, com_dlbl, sc->sc_dlbl); 1522 bus_space_write_1(iot, ioh, com_dlbh, sc->sc_dlbh); 1523 bus_space_write_1(iot, ioh, com_lcr, sc->sc_lcr); 1524 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active = sc->sc_mcr); 1525 bus_space_write_1(iot, ioh, com_fifo, sc->sc_fifo); 1526 1527 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1528 } 1529 1530 int 1531 comhwiflow(tp, block) 1532 struct tty *tp; 1533 int block; 1534 { 1535 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1536 int s; 1537 1538 if (COM_ISALIVE(sc) == 0) 1539 return (0); 1540 1541 if (sc->sc_mcr_rts == 0) 1542 return (0); 1543 1544 s = splserial(); 1545 if (block) { 1546 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1547 SET(sc->sc_rx_flags, RX_TTY_BLOCKED); 1548 com_hwiflow(sc); 1549 } 1550 } else { 1551 if (ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) { 1552 CLR(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1553 com_schedrx(sc); 1554 } 1555 if (ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1556 CLR(sc->sc_rx_flags, RX_TTY_BLOCKED); 1557 com_hwiflow(sc); 1558 } 1559 } 1560 splx(s); 1561 return (1); 1562 } 1563 1564 /* 1565 * (un)block input via hw flowcontrol 1566 */ 1567 void 1568 com_hwiflow(sc) 1569 struct com_softc *sc; 1570 { 1571 bus_space_tag_t iot = sc->sc_iot; 1572 bus_space_handle_t ioh = sc->sc_ioh; 1573 1574 if (sc->sc_mcr_rts == 0) 1575 return; 1576 1577 if (ISSET(sc->sc_rx_flags, RX_ANY_BLOCK)) { 1578 CLR(sc->sc_mcr, sc->sc_mcr_rts); 1579 CLR(sc->sc_mcr_active, sc->sc_mcr_rts); 1580 } else { 1581 SET(sc->sc_mcr, sc->sc_mcr_rts); 1582 SET(sc->sc_mcr_active, sc->sc_mcr_rts); 1583 } 1584 bus_space_write_1(iot, ioh, com_mcr, sc->sc_mcr_active); 1585 } 1586 1587 1588 void 1589 comstart(tp) 1590 struct tty *tp; 1591 { 1592 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1593 bus_space_tag_t iot = sc->sc_iot; 1594 bus_space_handle_t ioh = sc->sc_ioh; 1595 int s; 1596 1597 if (COM_ISALIVE(sc) == 0) 1598 return; 1599 1600 s = spltty(); 1601 if (ISSET(tp->t_state, TS_BUSY | TS_TIMEOUT | TS_TTSTOP)) 1602 goto out; 1603 if (sc->sc_tx_stopped) 1604 goto out; 1605 1606 if (tp->t_outq.c_cc <= tp->t_lowat) { 1607 if (ISSET(tp->t_state, TS_ASLEEP)) { 1608 CLR(tp->t_state, TS_ASLEEP); 1609 wakeup(&tp->t_outq); 1610 } 1611 selwakeup(&tp->t_wsel); 1612 if (tp->t_outq.c_cc == 0) 1613 goto out; 1614 } 1615 1616 /* Grab the first contiguous region of buffer space. */ 1617 { 1618 u_char *tba; 1619 int tbc; 1620 1621 tba = tp->t_outq.c_cf; 1622 tbc = ndqb(&tp->t_outq, 0); 1623 1624 (void)splserial(); 1625 1626 sc->sc_tba = tba; 1627 sc->sc_tbc = tbc; 1628 } 1629 1630 SET(tp->t_state, TS_BUSY); 1631 sc->sc_tx_busy = 1; 1632 1633 /* Enable transmit completion interrupts if necessary. */ 1634 if (!ISSET(sc->sc_ier, IER_ETXRDY)) { 1635 SET(sc->sc_ier, IER_ETXRDY); 1636 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 1637 } 1638 1639 /* Output the first chunk of the contiguous buffer. */ 1640 { 1641 int n; 1642 1643 n = sc->sc_tbc; 1644 if (n > sc->sc_fifolen) 1645 n = sc->sc_fifolen; 1646 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 1647 sc->sc_tbc -= n; 1648 sc->sc_tba += n; 1649 } 1650 out: 1651 splx(s); 1652 return; 1653 } 1654 1655 /* 1656 * Stop output on a line. 1657 */ 1658 void 1659 comstop(tp, flag) 1660 struct tty *tp; 1661 int flag; 1662 { 1663 struct com_softc *sc = device_lookup(&com_cd, COMUNIT(tp->t_dev)); 1664 int s; 1665 1666 s = splserial(); 1667 if (ISSET(tp->t_state, TS_BUSY)) { 1668 /* Stop transmitting at the next chunk. */ 1669 sc->sc_tbc = 0; 1670 sc->sc_heldtbc = 0; 1671 if (!ISSET(tp->t_state, TS_TTSTOP)) 1672 SET(tp->t_state, TS_FLUSH); 1673 } 1674 splx(s); 1675 } 1676 1677 void 1678 comdiag(arg) 1679 void *arg; 1680 { 1681 struct com_softc *sc = arg; 1682 int overflows, floods; 1683 int s; 1684 1685 s = splserial(); 1686 overflows = sc->sc_overflows; 1687 sc->sc_overflows = 0; 1688 floods = sc->sc_floods; 1689 sc->sc_floods = 0; 1690 sc->sc_errors = 0; 1691 splx(s); 1692 1693 log(LOG_WARNING, "%s: %d silo overflow%s, %d ibuf flood%s\n", 1694 sc->sc_dev.dv_xname, 1695 overflows, overflows == 1 ? "" : "s", 1696 floods, floods == 1 ? "" : "s"); 1697 } 1698 1699 integrate void 1700 com_rxsoft(sc, tp) 1701 struct com_softc *sc; 1702 struct tty *tp; 1703 { 1704 int (*rint) __P((int c, struct tty *tp)) = linesw[tp->t_line].l_rint; 1705 u_char *get, *end; 1706 u_int cc, scc; 1707 u_char lsr; 1708 int code; 1709 int s; 1710 1711 end = sc->sc_ebuf; 1712 get = sc->sc_rbget; 1713 scc = cc = com_rbuf_size - sc->sc_rbavail; 1714 1715 if (cc == com_rbuf_size) { 1716 sc->sc_floods++; 1717 if (sc->sc_errors++ == 0) 1718 callout_reset(&sc->sc_diag_callout, 60 * hz, 1719 comdiag, sc); 1720 } 1721 1722 while (cc) { 1723 code = get[0]; 1724 lsr = get[1]; 1725 if (ISSET(lsr, LSR_OE | LSR_BI | LSR_FE | LSR_PE)) { 1726 if (ISSET(lsr, LSR_OE)) { 1727 sc->sc_overflows++; 1728 if (sc->sc_errors++ == 0) 1729 callout_reset(&sc->sc_diag_callout, 1730 60 * hz, comdiag, sc); 1731 } 1732 if (ISSET(lsr, LSR_BI | LSR_FE)) 1733 SET(code, TTY_FE); 1734 if (ISSET(lsr, LSR_PE)) 1735 SET(code, TTY_PE); 1736 } 1737 if ((*rint)(code, tp) == -1) { 1738 /* 1739 * The line discipline's buffer is out of space. 1740 */ 1741 if (!ISSET(sc->sc_rx_flags, RX_TTY_BLOCKED)) { 1742 /* 1743 * We're either not using flow control, or the 1744 * line discipline didn't tell us to block for 1745 * some reason. Either way, we have no way to 1746 * know when there's more space available, so 1747 * just drop the rest of the data. 1748 */ 1749 get += cc << 1; 1750 if (get >= end) 1751 get -= com_rbuf_size << 1; 1752 cc = 0; 1753 } else { 1754 /* 1755 * Don't schedule any more receive processing 1756 * until the line discipline tells us there's 1757 * space available (through comhwiflow()). 1758 * Leave the rest of the data in the input 1759 * buffer. 1760 */ 1761 SET(sc->sc_rx_flags, RX_TTY_OVERFLOWED); 1762 } 1763 break; 1764 } 1765 get += 2; 1766 if (get >= end) 1767 get = sc->sc_rbuf; 1768 cc--; 1769 } 1770 1771 if (cc != scc) { 1772 sc->sc_rbget = get; 1773 s = splserial(); 1774 cc = sc->sc_rbavail += scc - cc; 1775 /* Buffers should be ok again, release possible block. */ 1776 if (cc >= sc->sc_r_lowat) { 1777 if (ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1778 CLR(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 1779 SET(sc->sc_ier, IER_ERXRDY); 1780 bus_space_write_1(sc->sc_iot, sc->sc_ioh, com_ier, sc->sc_ier); 1781 } 1782 if (ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED)) { 1783 CLR(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1784 com_hwiflow(sc); 1785 } 1786 } 1787 splx(s); 1788 } 1789 } 1790 1791 integrate void 1792 com_txsoft(sc, tp) 1793 struct com_softc *sc; 1794 struct tty *tp; 1795 { 1796 1797 CLR(tp->t_state, TS_BUSY); 1798 if (ISSET(tp->t_state, TS_FLUSH)) 1799 CLR(tp->t_state, TS_FLUSH); 1800 else 1801 ndflush(&tp->t_outq, (int)(sc->sc_tba - tp->t_outq.c_cf)); 1802 (*linesw[tp->t_line].l_start)(tp); 1803 } 1804 1805 integrate void 1806 com_stsoft(sc, tp) 1807 struct com_softc *sc; 1808 struct tty *tp; 1809 { 1810 u_char msr, delta; 1811 int s; 1812 1813 s = splserial(); 1814 msr = sc->sc_msr; 1815 delta = sc->sc_msr_delta; 1816 sc->sc_msr_delta = 0; 1817 splx(s); 1818 1819 if (ISSET(delta, sc->sc_msr_dcd)) { 1820 /* 1821 * Inform the tty layer that carrier detect changed. 1822 */ 1823 (void) (*linesw[tp->t_line].l_modem)(tp, ISSET(msr, MSR_DCD)); 1824 } 1825 1826 if (ISSET(delta, sc->sc_msr_cts)) { 1827 /* Block or unblock output according to flow control. */ 1828 if (ISSET(msr, sc->sc_msr_cts)) { 1829 sc->sc_tx_stopped = 0; 1830 (*linesw[tp->t_line].l_start)(tp); 1831 } else { 1832 sc->sc_tx_stopped = 1; 1833 } 1834 } 1835 1836 #ifdef COM_DEBUG 1837 if (com_debug) 1838 comstatus(sc, "com_stsoft"); 1839 #endif 1840 } 1841 1842 #ifdef __GENERIC_SOFT_INTERRUPTS 1843 void 1844 comsoft(arg) 1845 void *arg; 1846 { 1847 struct com_softc *sc = arg; 1848 struct tty *tp; 1849 1850 if (COM_ISALIVE(sc) == 0) 1851 return; 1852 1853 { 1854 #else 1855 void 1856 #ifndef __NO_SOFT_SERIAL_INTERRUPT 1857 comsoft() 1858 #else 1859 comsoft(arg) 1860 void *arg; 1861 #endif 1862 { 1863 struct com_softc *sc; 1864 struct tty *tp; 1865 int unit; 1866 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1867 int s; 1868 1869 s = splsoftserial(); 1870 com_softintr_scheduled = 0; 1871 #endif 1872 1873 for (unit = 0; unit < com_cd.cd_ndevs; unit++) { 1874 sc = device_lookup(&com_cd, unit); 1875 if (sc == NULL || !ISSET(sc->sc_hwflags, COM_HW_DEV_OK)) 1876 continue; 1877 1878 if (COM_ISALIVE(sc) == 0) 1879 continue; 1880 1881 tp = sc->sc_tty; 1882 if (tp == NULL) 1883 continue; 1884 if (!ISSET(tp->t_state, TS_ISOPEN) && tp->t_wopen == 0) 1885 continue; 1886 #endif 1887 tp = sc->sc_tty; 1888 1889 if (sc->sc_rx_ready) { 1890 sc->sc_rx_ready = 0; 1891 com_rxsoft(sc, tp); 1892 } 1893 1894 if (sc->sc_st_check) { 1895 sc->sc_st_check = 0; 1896 com_stsoft(sc, tp); 1897 } 1898 1899 if (sc->sc_tx_done) { 1900 sc->sc_tx_done = 0; 1901 com_txsoft(sc, tp); 1902 } 1903 } 1904 1905 #ifndef __GENERIC_SOFT_INTERRUPTS 1906 #ifdef __NO_SOFT_SERIAL_INTERRUPT 1907 splx(s); 1908 #endif 1909 #endif 1910 } 1911 1912 #ifdef __ALIGN_BRACKET_LEVEL_FOR_CTAGS 1913 /* there has got to be a better way to do comsoft() */ 1914 }} 1915 #endif 1916 1917 int 1918 comintr(arg) 1919 void *arg; 1920 { 1921 struct com_softc *sc = arg; 1922 bus_space_tag_t iot = sc->sc_iot; 1923 bus_space_handle_t ioh = sc->sc_ioh; 1924 u_char *put, *end; 1925 u_int cc; 1926 u_char lsr, iir; 1927 1928 if (COM_ISALIVE(sc) == 0) 1929 return (0); 1930 1931 iir = bus_space_read_1(iot, ioh, com_iir); 1932 if (ISSET(iir, IIR_NOPEND)) 1933 return (0); 1934 1935 end = sc->sc_ebuf; 1936 put = sc->sc_rbput; 1937 cc = sc->sc_rbavail; 1938 1939 do { 1940 u_char msr, delta; 1941 1942 lsr = bus_space_read_1(iot, ioh, com_lsr); 1943 #if defined(DDB) || defined(KGDB) 1944 if (ISSET(lsr, LSR_BI)) { 1945 #ifdef DDB 1946 if (ISSET(sc->sc_hwflags, COM_HW_CONSOLE)) { 1947 console_debugger(); 1948 continue; 1949 } 1950 #endif 1951 #ifdef KGDB 1952 if (ISSET(sc->sc_hwflags, COM_HW_KGDB)) { 1953 kgdb_connect(1); 1954 continue; 1955 } 1956 #endif 1957 } 1958 #endif /* DDB || KGDB */ 1959 1960 if (ISSET(lsr, LSR_RCV_MASK) && 1961 !ISSET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED)) { 1962 while (cc > 0) { 1963 put[0] = bus_space_read_1(iot, ioh, com_data); 1964 put[1] = lsr; 1965 put += 2; 1966 if (put >= end) 1967 put = sc->sc_rbuf; 1968 cc--; 1969 1970 lsr = bus_space_read_1(iot, ioh, com_lsr); 1971 if (!ISSET(lsr, LSR_RCV_MASK)) 1972 break; 1973 } 1974 1975 /* 1976 * Current string of incoming characters ended because 1977 * no more data was available or we ran out of space. 1978 * Schedule a receive event if any data was received. 1979 * If we're out of space, turn off receive interrupts. 1980 */ 1981 sc->sc_rbput = put; 1982 sc->sc_rbavail = cc; 1983 if (!ISSET(sc->sc_rx_flags, RX_TTY_OVERFLOWED)) 1984 sc->sc_rx_ready = 1; 1985 1986 /* 1987 * See if we are in danger of overflowing a buffer. If 1988 * so, use hardware flow control to ease the pressure. 1989 */ 1990 if (!ISSET(sc->sc_rx_flags, RX_IBUF_BLOCKED) && 1991 cc < sc->sc_r_hiwat) { 1992 SET(sc->sc_rx_flags, RX_IBUF_BLOCKED); 1993 com_hwiflow(sc); 1994 } 1995 1996 /* 1997 * If we're out of space, disable receive interrupts 1998 * until the queue has drained a bit. 1999 */ 2000 if (!cc) { 2001 SET(sc->sc_rx_flags, RX_IBUF_OVERFLOWED); 2002 CLR(sc->sc_ier, IER_ERXRDY); 2003 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2004 } 2005 } else { 2006 if ((iir & IIR_IMASK) == IIR_RXRDY) { 2007 bus_space_write_1(iot, ioh, com_ier, 0); 2008 delay(10); 2009 bus_space_write_1(iot, ioh, com_ier,sc->sc_ier); 2010 iir = IIR_NOPEND; 2011 continue; 2012 } 2013 } 2014 2015 msr = bus_space_read_1(iot, ioh, com_msr); 2016 delta = msr ^ sc->sc_msr; 2017 sc->sc_msr = msr; 2018 /* 2019 * Pulse-per-second (PSS) signals on edge of DCD? 2020 * Process these even if line discipline is ignoring DCD. 2021 */ 2022 if (delta & sc->sc_ppsmask) { 2023 struct timeval tv; 2024 if ((msr & sc->sc_ppsmask) == sc->sc_ppsassert) { 2025 /* XXX nanotime() */ 2026 microtime(&tv); 2027 TIMEVAL_TO_TIMESPEC(&tv, 2028 &sc->ppsinfo.assert_timestamp); 2029 if (sc->ppsparam.mode & PPS_OFFSETASSERT) { 2030 timespecadd(&sc->ppsinfo.assert_timestamp, 2031 &sc->ppsparam.assert_offset, 2032 &sc->ppsinfo.assert_timestamp); 2033 } 2034 2035 #ifdef PPS_SYNC 2036 if (sc->ppsparam.mode & PPS_HARDPPSONASSERT) 2037 hardpps(&tv, tv.tv_usec); 2038 #endif 2039 sc->ppsinfo.assert_sequence++; 2040 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2041 2042 } else if ((msr & sc->sc_ppsmask) == sc->sc_ppsclear) { 2043 /* XXX nanotime() */ 2044 microtime(&tv); 2045 TIMEVAL_TO_TIMESPEC(&tv, 2046 &sc->ppsinfo.clear_timestamp); 2047 if (sc->ppsparam.mode & PPS_OFFSETCLEAR) { 2048 timespecadd(&sc->ppsinfo.clear_timestamp, 2049 &sc->ppsparam.clear_offset, 2050 &sc->ppsinfo.clear_timestamp); 2051 } 2052 2053 #ifdef PPS_SYNC 2054 if (sc->ppsparam.mode & PPS_HARDPPSONCLEAR) 2055 hardpps(&tv, tv.tv_usec); 2056 #endif 2057 sc->ppsinfo.clear_sequence++; 2058 sc->ppsinfo.current_mode = sc->ppsparam.mode; 2059 } 2060 } 2061 2062 /* 2063 * Process normal status changes 2064 */ 2065 if (ISSET(delta, sc->sc_msr_mask)) { 2066 SET(sc->sc_msr_delta, delta); 2067 2068 /* 2069 * Stop output immediately if we lose the output 2070 * flow control signal or carrier detect. 2071 */ 2072 if (ISSET(~msr, sc->sc_msr_mask)) { 2073 sc->sc_tbc = 0; 2074 sc->sc_heldtbc = 0; 2075 #ifdef COM_DEBUG 2076 if (com_debug) 2077 comstatus(sc, "comintr "); 2078 #endif 2079 } 2080 2081 sc->sc_st_check = 1; 2082 } 2083 } while (!ISSET((iir = bus_space_read_1(iot, ioh, com_iir)), IIR_NOPEND)); 2084 2085 /* 2086 * Done handling any receive interrupts. See if data can be 2087 * transmitted as well. Schedule tx done event if no data left 2088 * and tty was marked busy. 2089 */ 2090 if (ISSET(lsr, LSR_TXRDY)) { 2091 /* 2092 * If we've delayed a parameter change, do it now, and restart 2093 * output. 2094 */ 2095 if (sc->sc_heldchange) { 2096 com_loadchannelregs(sc); 2097 sc->sc_heldchange = 0; 2098 sc->sc_tbc = sc->sc_heldtbc; 2099 sc->sc_heldtbc = 0; 2100 } 2101 2102 /* Output the next chunk of the contiguous buffer, if any. */ 2103 if (sc->sc_tbc > 0) { 2104 int n; 2105 2106 n = sc->sc_tbc; 2107 if (n > sc->sc_fifolen) 2108 n = sc->sc_fifolen; 2109 bus_space_write_multi_1(iot, ioh, com_data, sc->sc_tba, n); 2110 sc->sc_tbc -= n; 2111 sc->sc_tba += n; 2112 } else { 2113 /* Disable transmit completion interrupts if necessary. */ 2114 if (ISSET(sc->sc_ier, IER_ETXRDY)) { 2115 CLR(sc->sc_ier, IER_ETXRDY); 2116 bus_space_write_1(iot, ioh, com_ier, sc->sc_ier); 2117 } 2118 if (sc->sc_tx_busy) { 2119 sc->sc_tx_busy = 0; 2120 sc->sc_tx_done = 1; 2121 } 2122 } 2123 } 2124 2125 /* Wake up the poller. */ 2126 #ifdef __GENERIC_SOFT_INTERRUPTS 2127 softintr_schedule(sc->sc_si); 2128 #else 2129 #ifndef __NO_SOFT_SERIAL_INTERRUPT 2130 setsoftserial(); 2131 #else 2132 if (!com_softintr_scheduled) { 2133 com_softintr_scheduled = 1; 2134 callout_reset(&comsoft_callout, 1, comsoft, NULL); 2135 } 2136 #endif 2137 #endif 2138 2139 #if NRND > 0 && defined(RND_COM) 2140 rnd_add_uint32(&sc->rnd_source, iir | lsr); 2141 #endif 2142 2143 return (1); 2144 } 2145 2146 /* 2147 * The following functions are polled getc and putc routines, shared 2148 * by the console and kgdb glue. 2149 */ 2150 2151 int 2152 com_common_getc(iot, ioh) 2153 bus_space_tag_t iot; 2154 bus_space_handle_t ioh; 2155 { 2156 int s = splserial(); 2157 u_char stat, c; 2158 2159 /* block until a character becomes available */ 2160 while (!ISSET(stat = bus_space_read_1(iot, ioh, com_lsr), LSR_RXRDY)) 2161 ; 2162 2163 c = bus_space_read_1(iot, ioh, com_data); 2164 stat = bus_space_read_1(iot, ioh, com_iir); 2165 splx(s); 2166 return (c); 2167 } 2168 2169 void 2170 com_common_putc(iot, ioh, c) 2171 bus_space_tag_t iot; 2172 bus_space_handle_t ioh; 2173 int c; 2174 { 2175 int s = splserial(); 2176 int timo; 2177 2178 /* wait for any pending transmission to finish */ 2179 timo = 150000; 2180 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2181 continue; 2182 2183 bus_space_write_1(iot, ioh, com_data, c); 2184 COM_BARRIER(iot, ioh, BR | BW); 2185 2186 /* wait for this transmission to complete */ 2187 timo = 1500000; 2188 while (!ISSET(bus_space_read_1(iot, ioh, com_lsr), LSR_TXRDY) && --timo) 2189 continue; 2190 2191 splx(s); 2192 } 2193 2194 /* 2195 * Initialize UART for use as console or KGDB line. 2196 */ 2197 int 2198 cominit(iot, iobase, rate, frequency, cflag, iohp) 2199 bus_space_tag_t iot; 2200 int iobase; 2201 int rate, frequency; 2202 tcflag_t cflag; 2203 bus_space_handle_t *iohp; 2204 { 2205 bus_space_handle_t ioh; 2206 2207 if (bus_space_map(iot, iobase, COM_NPORTS, 0, &ioh)) 2208 return (ENOMEM); /* ??? */ 2209 2210 bus_space_write_1(iot, ioh, com_lcr, LCR_EERS); 2211 bus_space_write_1(iot, ioh, com_efr, 0); 2212 bus_space_write_1(iot, ioh, com_lcr, LCR_DLAB); 2213 rate = comspeed(rate, frequency); 2214 bus_space_write_1(iot, ioh, com_dlbl, rate); 2215 bus_space_write_1(iot, ioh, com_dlbh, rate >> 8); 2216 bus_space_write_1(iot, ioh, com_lcr, cflag2lcr(cflag)); 2217 bus_space_write_1(iot, ioh, com_mcr, MCR_DTR | MCR_RTS); 2218 bus_space_write_1(iot, ioh, com_fifo, 2219 FIFO_ENABLE | FIFO_RCV_RST | FIFO_XMT_RST | FIFO_TRIGGER_1); 2220 bus_space_write_1(iot, ioh, com_ier, 0); 2221 2222 *iohp = ioh; 2223 return (0); 2224 } 2225 2226 /* 2227 * Following are all routines needed for COM to act as console 2228 */ 2229 2230 int 2231 comcnattach(iot, iobase, rate, frequency, cflag) 2232 bus_space_tag_t iot; 2233 int iobase; 2234 int rate, frequency; 2235 tcflag_t cflag; 2236 { 2237 int res; 2238 static struct consdev comcons = { 2239 NULL, NULL, comcngetc, comcnputc, comcnpollc, NULL, 2240 NODEV, CN_NORMAL 2241 }; 2242 2243 res = cominit(iot, iobase, rate, frequency, cflag, &comconsioh); 2244 if (res) 2245 return (res); 2246 2247 cn_tab = &comcons; 2248 2249 comconstag = iot; 2250 comconsaddr = iobase; 2251 comconsrate = rate; 2252 comconscflag = cflag; 2253 2254 return (0); 2255 } 2256 2257 int 2258 comcngetc(dev) 2259 dev_t dev; 2260 { 2261 2262 return (com_common_getc(comconstag, comconsioh)); 2263 } 2264 2265 /* 2266 * Console kernel output character routine. 2267 */ 2268 void 2269 comcnputc(dev, c) 2270 dev_t dev; 2271 int c; 2272 { 2273 2274 com_common_putc(comconstag, comconsioh, c); 2275 } 2276 2277 void 2278 comcnpollc(dev, on) 2279 dev_t dev; 2280 int on; 2281 { 2282 2283 } 2284 2285 #ifdef KGDB 2286 int 2287 com_kgdb_attach(iot, iobase, rate, frequency, cflag) 2288 bus_space_tag_t iot; 2289 int iobase; 2290 int rate, frequency; 2291 tcflag_t cflag; 2292 { 2293 int res; 2294 2295 if (iot == comconstag && iobase == comconsaddr) 2296 return (EBUSY); /* cannot share with console */ 2297 2298 res = cominit(iot, iobase, rate, frequency, cflag, &com_kgdb_ioh); 2299 if (res) 2300 return (res); 2301 2302 kgdb_attach(com_kgdb_getc, com_kgdb_putc, NULL); 2303 kgdb_dev = 123; /* unneeded, only to satisfy some tests */ 2304 2305 com_kgdb_iot = iot; 2306 com_kgdb_addr = iobase; 2307 2308 return (0); 2309 } 2310 2311 /* ARGSUSED */ 2312 int 2313 com_kgdb_getc(arg) 2314 void *arg; 2315 { 2316 2317 return (com_common_getc(com_kgdb_iot, com_kgdb_ioh)); 2318 } 2319 2320 /* ARGSUSED */ 2321 void 2322 com_kgdb_putc(arg, c) 2323 void *arg; 2324 int c; 2325 { 2326 2327 return (com_common_putc(com_kgdb_iot, com_kgdb_ioh, c)); 2328 } 2329 #endif /* KGDB */ 2330 2331 /* helper function to identify the com ports used by 2332 console or KGDB (and not yet autoconf attached) */ 2333 int 2334 com_is_console(iot, iobase, ioh) 2335 bus_space_tag_t iot; 2336 int iobase; 2337 bus_space_handle_t *ioh; 2338 { 2339 bus_space_handle_t help; 2340 2341 if (!comconsattached && 2342 iot == comconstag && iobase == comconsaddr) 2343 help = comconsioh; 2344 #ifdef KGDB 2345 else if (!com_kgdb_attached && 2346 iot == com_kgdb_iot && iobase == com_kgdb_addr) 2347 help = com_kgdb_ioh; 2348 #endif 2349 else 2350 return (0); 2351 2352 if (ioh) 2353 *ioh = help; 2354 return (1); 2355 } 2356