xref: /netbsd-src/sys/dev/ic/cissreg.h (revision 11a6dbe72840351315e0652b2fc6663628c84cad)
1 /*	$NetBSD: cissreg.h,v 1.1 2006/03/21 20:42:14 he Exp $	*/
2 /*	$OpenBSD: cissreg.h,v 1.4 2005/12/13 15:55:59 brad Exp $	*/
3 
4 /*
5  * Copyright (c) 2005 Michael Shalayeff
6  * All rights reserved.
7  *
8  * Permission to use, copy, modify, and distribute this software for any
9  * purpose with or without fee is hereby granted, provided that the above
10  * copyright notice and this permission notice appear in all copies.
11  *
12  * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
13  * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
14  * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
15  * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
16  * WHATSOEVER RESULTING FROM LOSS OF MIND, USE, DATA OR PROFITS, WHETHER IN
17  * AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
18  * OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
19  */
20 
21 #define	CISS_IDB	0x20
22 #define	CISS_IDB_CFG	0x01
23 #define	CISS_ISR	0x30
24 #define	CISS_IMR	0x34
25 #define	CISS_READYENAB	4
26 #define	CISS_READYENA	8
27 #define	CISS_INQ	0x40
28 #define	CISS_OUTQ	0x44
29 #define	CISS_CFG_BAR	0xb4
30 #define	CISS_CFG_OFF	0xb8
31 
32 #define	CISS_DRVMAP_SIZE	(128 / 8)
33 
34 #define	CISS_CMD_CTRL_GET	0x26
35 #define	CISS_CMD_CTRL_SET	0x27
36 /* sub-commands for GET/SET */
37 #define	CISS_CMS_CTRL_LDID	0x10
38 #define	CISS_CMS_CTRL_CTRL	0x11
39 #define	CISS_CMS_CTRL_LDSTAT	0x12
40 #define	CISS_CMS_CTRL_PDID	0x15
41 #define	CISS_CMS_CTRL_PDBLINK	0x16
42 #define	CISS_CMS_CTRL_PDBLSENS	0x17
43 #define	CISS_CMS_CTRL_FLUSH	0xc2
44 #define	CISS_CMS_CTRL_ACCEPT	0xe0
45 
46 #define	CISS_CMD_LDMAP	0xc2
47 #define	CISS_CMD_PDMAP	0xc3
48 
49 struct ciss_softc;
50 
51 struct ciss_config {
52 	u_int32_t	signature;
53 #define	CISS_SIGNATURE	(*(const u_int32_t *)"CISS")
54 	u_int32_t	version;
55 	u_int32_t	methods;
56 #define	CISS_METH_READY	0x0001
57 #define	CISS_METH_SIMPL	0x0002
58 #define	CISS_METH_PERF	0x0004
59 #define	CISS_METH_EMQ	0x0008
60 	u_int32_t	amethod;
61 	u_int32_t	rmethod;
62 	u_int32_t	paddr_lim;
63 	u_int32_t	int_delay;
64 	u_int32_t	int_count;
65 	u_int32_t	maxcmd;
66 	u_int32_t	scsibus;
67 #define	CISS_BUS_U2	0x0001
68 #define	CISS_BUS_U3	0x0002
69 #define	CISS_BUS_FC1	0x0100
70 #define	CISS_BUS_FC2	0x0200
71 	u_int32_t	troff;
72 	u_int8_t	hostname[16];
73 	u_int32_t	heartbeat;
74 	u_int32_t	driverf;
75 #define	CISS_DRV_UATT	0x0001
76 #define	CISS_DRV_QINI	0x0002
77 #define	CISS_DRV_LCKINT	0x0004
78 #define	CISS_DRV_QTAGS	0x0008
79 #define	CISS_DRV_ALPHA	0x0010
80 #define	CISS_DRV_LUNS	0x0020
81 #define	CISS_DRV_MSGRQ	0x0080
82 #define	CISS_DRV_DBRD	0x0100
83 #define	CISS_DRV_PRF	0x0200
84 	u_int32_t	maxsg;
85 } __packed;
86 
87 struct ciss_inquiry {
88 	u_int8_t	numld;
89 	u_int8_t	sign[4];
90 	u_int8_t	fw_running[4];
91 	u_int8_t	fw_stored[4];
92 	u_int8_t	hw_rev;
93 	u_int8_t	resv0[12];
94 	u_int16_t	pci_vendor;
95 	u_int16_t	pci_product;
96 	u_int8_t	resv1[10];
97 	u_int8_t	market_rev;
98 	u_int8_t	flags;
99 #define	CISS_INQ_WIDE	0x08
100 #define	CISS_INQ_BIGMAP	0x80
101 #define	CISS_INQ_BITS	"\020\04WIDE\010BIGMAP"
102 	u_int8_t	resv2[2];
103 	u_int8_t	nscsi_bus;
104 	u_int8_t	resv3[4];
105 	u_int8_t	clk[4];		/* unaligned dumbness */
106 	u_int8_t	buswidth;
107 	u_int8_t	disks[CISS_DRVMAP_SIZE];
108 	u_int8_t	extdisks[CISS_DRVMAP_SIZE];
109 	u_int8_t	nondisks[CISS_DRVMAP_SIZE];
110 } __packed;
111 
112 struct ciss_ldmap {
113 	u_int32_t	size;
114 	u_int32_t	resv;
115 	struct {
116 		u_int32_t tgt;
117 		u_int32_t tgt2;
118 	} map[1];
119 } __packed;
120 
121 struct ciss_flush {
122 	u_int16_t	flush;
123 #define	CISS_FLUSH_ENABLE	0
124 #define	CISS_FLUSH_DISABLE	1
125 	u_int16_t	resv[255];
126 } __packed;
127 
128 struct ciss_cmd {
129 	u_int8_t	resv0;	/* 00 */
130 	u_int8_t	sgin;	/* 01: #sg in the cmd */
131 	u_int16_t	sglen;	/* 02: #sg total */
132 	u_int32_t	id;	/* 04: cmd id << 2 and status bits */
133 #define	CISS_CMD_ERR	0x02
134 	u_int32_t	id_hi;	/* 08: not used */
135 	u_int32_t	tgt;	/* 0c: tgt:bus:mode or lun:mode */
136 #define	CISS_CMD_MODE_PERIPH	0x00000000
137 #define	CISS_CMD_MODE_LD	0x40000000
138 #define	CISS_CMD_TGT_MASK	0x40ffffff
139 #define	CISS_CMD_BUS_MASK	0x3f000000
140 #define	CISS_CMD_BUS_SHIFT	24
141 	u_int32_t	tgt2;	/* 10: scsi-3 address bytes */
142 
143 	u_int8_t	cdblen;	/* 14: valid length of cdb */
144 	u_int8_t	flags;	/* 15 */
145 #define	CISS_CDB_CMD	0x00
146 #define	CISS_CDB_MSG	0x01
147 #define	CISS_CDB_NOTAG	0x00
148 #define	CISS_CDB_SIMPL	0x20
149 #define	CISS_CDB_QHEAD	0x28
150 #define	CISS_CDB_ORDR	0x30
151 #define	CISS_CDB_AUTO	0x38
152 #define	CISS_CDB_IN	0x80
153 #define	CISS_CDB_OUT	0x40
154 	u_int16_t	tmo;	/* 16: timeout in seconds */
155 #define	CISS_MAX_CDB	12
156 	u_int8_t	cdb[16];/* 18 */
157 
158 	u_int64_t	err_pa;	/* 28: pa(struct ciss_error *) */
159 	u_int32_t	err_len;/* 30 */
160 
161 	struct {		/* 34 */
162 		u_int32_t	addr_lo;
163 		u_int32_t	addr_hi;
164 		u_int32_t	len;
165 		u_int32_t	flags;
166 #define	CISS_SG_EXT	0x0001
167 	} sgl[1];
168 } __packed;
169 
170 struct ciss_error {
171 	u_int8_t	scsi_stat;	/* SCSI_OK etc */
172 	u_int8_t	senselen;
173 	u_int16_t	cmd_stat;
174 #define	CISS_ERR_OK	0
175 #define	CISS_ERR_TGTST	1	/* target status */
176 #define	CISS_ERR_UNRUN	2
177 #define	CISS_ERR_OVRUN	3
178 #define	CISS_ERR_INVCMD	4
179 #define	CISS_ERR_PROTE	5
180 #define	CISS_ERR_HWERR	6
181 #define	CISS_ERR_CLOSS	7
182 #define	CISS_ERR_ABRT	8
183 #define	CISS_ERR_FABRT	9
184 #define	CISS_ERR_UABRT	10
185 #define	CISS_ERR_TMO	11
186 #define	CISS_ERR_NABRT	12
187 	u_int32_t	resid;
188 	u_int8_t	err_type[4];
189 	u_int32_t	err_info;
190 	u_int8_t	sense[32];
191 } __packed;
192 
193 struct ciss_ccb {
194 	TAILQ_ENTRY(ciss_ccb)	ccb_link;
195 	struct ciss_softc	*ccb_sc;
196 	paddr_t			ccb_cmdpa;
197 	enum {
198 		CISS_CCB_FREE	= 0x01,
199 		CISS_CCB_READY	= 0x02,
200 		CISS_CCB_ONQ	= 0x04,
201 		CISS_CCB_PREQ	= 0x08,
202 		CISS_CCB_POLL	= 0x10,
203 		CISS_CCB_FAIL	= 0x80
204 #define	CISS_CCB_BITS	"\020\01FREE\02READY\03ONQ\04PREQ\05POLL\010FAIL"
205 	} ccb_state;
206 
207 	struct scsipi_xfer	*ccb_xs;
208 	size_t			ccb_len;
209 	void			*ccb_data;
210 	bus_dmamap_t		ccb_dmamap;
211 
212 	struct ciss_error	ccb_err;
213 	struct ciss_cmd		ccb_cmd;	/* followed by sgl */
214 };
215 
216 typedef TAILQ_HEAD(ciss_queue_head, ciss_ccb)     ciss_queue_head;
217 
218