xref: /netbsd-src/sys/dev/ic/cd18xxvar.h (revision 6ca6d5d66564ae1350121f292122ba51b1fcfffc)
1*6ca6d5d6Schristos /*	$NetBSD: cd18xxvar.h,v 1.5 2014/11/15 19:18:18 christos Exp $	*/
25d4f3fa9Smrg 
35d4f3fa9Smrg /*
45d4f3fa9Smrg  * Copyright (c) 1998, 2001 Matthew R. Green
55d4f3fa9Smrg  * All rights reserved.
65d4f3fa9Smrg  *
75d4f3fa9Smrg  * Redistribution and use in source and binary forms, with or without
85d4f3fa9Smrg  * modification, are permitted provided that the following conditions
95d4f3fa9Smrg  * are met:
105d4f3fa9Smrg  * 1. Redistributions of source code must retain the above copyright
115d4f3fa9Smrg  *    notice, this list of conditions and the following disclaimer.
125d4f3fa9Smrg  * 2. Redistributions in binary form must reproduce the above copyright
135d4f3fa9Smrg  *    notice, this list of conditions and the following disclaimer in the
145d4f3fa9Smrg  *    documentation and/or other materials provided with the distribution.
155d4f3fa9Smrg  *
165d4f3fa9Smrg  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
175d4f3fa9Smrg  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
185d4f3fa9Smrg  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
195d4f3fa9Smrg  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
205d4f3fa9Smrg  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
215d4f3fa9Smrg  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
225d4f3fa9Smrg  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
235d4f3fa9Smrg  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
245d4f3fa9Smrg  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
255d4f3fa9Smrg  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
265d4f3fa9Smrg  * SUCH DAMAGE.
275d4f3fa9Smrg  */
285d4f3fa9Smrg 
295d4f3fa9Smrg /*
305d4f3fa9Smrg  * cd18xxvar.h:  header file for cirrus-logic CL-CD180/CD1864/CD1865 8
315d4f3fa9Smrg  * port serial chip.
325d4f3fa9Smrg  */
335d4f3fa9Smrg 
345d4f3fa9Smrg #include <sys/tty.h>
355d4f3fa9Smrg 
365d4f3fa9Smrg /* allocated per-serial port */
375d4f3fa9Smrg struct cdtty_port {
385d4f3fa9Smrg 	struct	tty		*p_tty;
395d4f3fa9Smrg 
405d4f3fa9Smrg 	int			p_swflags;	/* TIOCFLAG_SOFTCAR, etc. */
415d4f3fa9Smrg 	int			p_defspeed;	/* default speed */
425d4f3fa9Smrg 	int			p_defcflag;	/* default termios cflag */
435d4f3fa9Smrg 
445d4f3fa9Smrg 	u_int			p_r_hiwat;	/* high water mark */
455d4f3fa9Smrg 	u_int			p_r_lowat;	/* low water mark */
465d4f3fa9Smrg 	u_char *volatile	p_rbget;	/* ring buffer get ptr */
475d4f3fa9Smrg 	u_char *volatile	p_rbput;	/* ring buffer put ptr */
485d4f3fa9Smrg 	volatile u_int		p_rbavail;	/* size available */
495d4f3fa9Smrg 	u_char			*p_rbuf;	/* ring buffer */
505d4f3fa9Smrg 	u_char			*p_ebuf;	/* end of ring buffer */
515d4f3fa9Smrg 
525d4f3fa9Smrg 	u_char *		p_tba;		/* transmit buffer address */
535d4f3fa9Smrg 	u_int			p_tbc,		/* transmit byte count */
545d4f3fa9Smrg 				p_heldtbc;	/* held tbc; waiting for tx */
555d4f3fa9Smrg #define CDTTY_RING_SIZE	2048
565d4f3fa9Smrg 
575d4f3fa9Smrg 	u_int			p_parityerr,	/* number of parity errors */
585d4f3fa9Smrg 				p_frameerr,	/* number of framing errors */
595d4f3fa9Smrg 				p_overflows,	/* number of overruns */
605d4f3fa9Smrg 				p_floods;	/* number of rbuf floods */
615d4f3fa9Smrg 
625d4f3fa9Smrg 	volatile u_char		p_break,	/* current break status */
635d4f3fa9Smrg 				p_needbreak,	/* need to generate a break */
645d4f3fa9Smrg 				p_rx_flags,	/* software state */
655d4f3fa9Smrg #define	RX_TTY_BLOCKED		0x01
665d4f3fa9Smrg #define	RX_TTY_OVERFLOWED	0x02
675d4f3fa9Smrg #define	RX_IBUF_BLOCKED		0x04
685d4f3fa9Smrg #define	RX_IBUF_OVERFLOWED	0x08
695d4f3fa9Smrg #define	RX_ANY_BLOCK		0x0f
705d4f3fa9Smrg 				p_rx_ready,	/* soft rx interrupt ready */
715d4f3fa9Smrg 				p_rx_busy,
725d4f3fa9Smrg 				p_tx_done,	/* soft tx interrupt ready */
735d4f3fa9Smrg 				p_tx_busy,
745d4f3fa9Smrg 				p_tx_stopped,
755d4f3fa9Smrg 				p_st_check,	/* soft modem interrupt ready */
765d4f3fa9Smrg 				p_heldchange;	/* waiting to update regs */
775d4f3fa9Smrg 
785d4f3fa9Smrg 	/*
795d4f3fa9Smrg 	 * cd18xx channel registers we keep a copy of, for writing in
805d4f3fa9Smrg 	 * loadchannelregs().
815d4f3fa9Smrg 	 */
825d4f3fa9Smrg 	u_char			p_srer,		/* service request enable */
835d4f3fa9Smrg 				p_msvr,		/* modem signal value */
845d4f3fa9Smrg 				p_msvr_cts, p_msvr_rts, p_msvr_dcd,
855d4f3fa9Smrg 				p_msvr_mask, p_msvr_active, p_msvr_delta,
865d4f3fa9Smrg 				p_cor1,		/* channel option reg 1 */
875d4f3fa9Smrg 				p_cor2,		/* channel option reg 2 */
885d4f3fa9Smrg 				p_cor3,		/* channel option reg 3 */
895d4f3fa9Smrg 				p_mcor1,	/* modem option reg 1 */
905d4f3fa9Smrg 				p_mcor1_dtr,
915d4f3fa9Smrg 				p_rbprh,	/* recv bps high */
925d4f3fa9Smrg 				p_rbprl,	/* recv bps low */
935d4f3fa9Smrg 				p_tbprh,	/* xmit bps high */
945d4f3fa9Smrg 				p_tbprl,	/* xmit bps low */
955d4f3fa9Smrg 				p_chanctl;	/* chanctl command */
965d4f3fa9Smrg };
975d4f3fa9Smrg 
985d4f3fa9Smrg /* softc allocated per-cd18xx */
995d4f3fa9Smrg struct cd18xx_softc {
100cbab9cadSchs 	device_t		sc_dev;
101cbab9cadSchs 
1025d4f3fa9Smrg 	/* tag and handle for our registers (128 bytes) */
1035d4f3fa9Smrg 	bus_space_tag_t		sc_tag;
1045d4f3fa9Smrg 	bus_space_handle_t	sc_handle;
1055d4f3fa9Smrg 
1065d4f3fa9Smrg 	/*
1075d4f3fa9Smrg 	 * cd18xx has weird interrupt acknowledgement and configuration,
1085d4f3fa9Smrg 	 * so we have to defer this to our parent.  this function must
1095d4f3fa9Smrg 	 * do whatever is required to genereate *iack signals that are
1105d4f3fa9Smrg 	 * required for the cd180.  this probably also depends on the
1115d4f3fa9Smrg 	 * values of the sc_rsmr, sc_tsmr and sc_msmr variables.  the
1125d4f3fa9Smrg 	 * function is called with the provided argument, and with any
1135d4f3fa9Smrg 	 * of the 4 #defines below, depending on the ack needing to be
1145d4f3fa9Smrg 	 * generated.
1155d4f3fa9Smrg 	 */
1165d4f3fa9Smrg 	u_char			(*sc_ackfunc)(void *, int);
1175d4f3fa9Smrg #define CD18xx_INTRACK_MxINT	0x01		/* modem interrupt */
1185d4f3fa9Smrg #define CD18xx_INTRACK_TxINT	0x02		/* tx interrupt */
1195d4f3fa9Smrg #define CD18xx_INTRACK_RxINT	0x04		/* rx (good data) interrupt */
1205d4f3fa9Smrg #define CD18xx_INTRACK_REINT	0x08		/* rx (exception) interrupt */
1215d4f3fa9Smrg 	void			*sc_ackfunc_arg;
1225d4f3fa9Smrg 
1235d4f3fa9Smrg 	u_char			sc_rsmr;
1245d4f3fa9Smrg 	u_char			sc_tsmr;
1255d4f3fa9Smrg 	u_char			sc_msmr;
1265d4f3fa9Smrg 
1275d4f3fa9Smrg 	u_int			sc_osc;
1285d4f3fa9Smrg 
1295d4f3fa9Smrg 	/*
1305d4f3fa9Smrg 	 * everything above here needs to be setup by our caller, and
1315d4f3fa9Smrg 	 * everything below here is setup by the generic cd18xx code.
1325d4f3fa9Smrg 	 */
1335d4f3fa9Smrg 	u_int			sc_chip_id;	/* unique per-cd18xx value */
1345d4f3fa9Smrg 	void			*sc_si;		/* softintr(9) cookie */
1355d4f3fa9Smrg 
1365d4f3fa9Smrg 	struct cdtty_port	sc_ports[8];
1375d4f3fa9Smrg 
1385d4f3fa9Smrg 	u_char			sc_pprh;
1395d4f3fa9Smrg 	u_char			sc_pprl;
1405d4f3fa9Smrg };
1415d4f3fa9Smrg 
1425d4f3fa9Smrg /* hard interrupt, to be configured by our caller */
1435d4f3fa9Smrg int cd18xx_hardintr(void *);
1445d4f3fa9Smrg 
1455d4f3fa9Smrg /* main attach routine called by the high level driver */
1465d4f3fa9Smrg void cd18xx_attach(struct cd18xx_softc *);
1475d4f3fa9Smrg 
1485d4f3fa9Smrg /*
1495d4f3fa9Smrg  * device minor layout has bit 19 for dialout and bits 0..18 for the unit.
1505d4f3fa9Smrg  * the first 3 bits of the unit are the channel number inside a single
1515d4f3fa9Smrg  * cd18xx instance, and the remaining bits indicate the instance number.
1525d4f3fa9Smrg  */
153*6ca6d5d6Schristos #define CD18XX_TTY(x)		TTUNIT(x)
154*6ca6d5d6Schristos #define CD18XX_CHANNEL(x)	(TTUNIT(x) & 7)
155*6ca6d5d6Schristos #define CD18XX_INSTANCE(x)	(TTUNIT(x) >> 3)
156*6ca6d5d6Schristos #define CD18XX_DIALOUT(x)	TTDIALOUT(x)
1575d4f3fa9Smrg 
1585d4f3fa9Smrg /* short helpers for read/write */
1595d4f3fa9Smrg #define cd18xx_read(sc, o)		\
1605d4f3fa9Smrg 	bus_space_read_1((sc)->sc_tag, (sc)->sc_handle, o)
1615d4f3fa9Smrg #define cd18xx_read_multi(sc, o, b, c)	\
1625d4f3fa9Smrg 	bus_space_read_multi_1((sc)->sc_tag, (sc)->sc_handle, o, b, c)
1635d4f3fa9Smrg 
1645d4f3fa9Smrg #define cd18xx_write(sc, o, v)		\
1655d4f3fa9Smrg 	bus_space_write_1((sc)->sc_tag, (sc)->sc_handle, o, v)
1665d4f3fa9Smrg #define cd18xx_write_multi(sc, o, b, c)	\
1675d4f3fa9Smrg 	bus_space_write_multi_1((sc)->sc_tag, (sc)->sc_handle, o, b, c)
1685d4f3fa9Smrg 
1695d4f3fa9Smrg /* set the current channel */
1705d4f3fa9Smrg #define cd18xx_set_car(sc, c)		\
1715d4f3fa9Smrg do { \
1725d4f3fa9Smrg 	bus_space_write_1((sc)->sc_tag, (sc)->sc_handle, CD18xx_CAR, c); \
1735d4f3fa9Smrg 	delay(1); \
1745d4f3fa9Smrg } while (0)
1755d4f3fa9Smrg 
1765d4f3fa9Smrg /* get the current channel */
1775d4f3fa9Smrg #define cd18xx_get_gscr1_channel(sc)	\
1785d4f3fa9Smrg 	((bus_space_read_1((sc)->sc_tag, (sc)->sc_handle, CD18xx_GSCR1) >> 2)&7)
179