1 /* $NetBSD: apcdmareg.h,v 1.2 2000/06/16 11:47:34 pk Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Paul Kranenburg. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 /* 40 * APC DMA hardware; from SunOS header 41 * Thanks to Derrick J. Brashear for additional info on the 42 * meaning of some of these bits. 43 */ 44 struct apc_dma { 45 volatile u_int32_t dmacsr; /* APC CSR */ 46 volatile u_int32_t lpad[3]; /* */ 47 volatile u_int32_t dmacva; /* Capture Virtual Address */ 48 volatile u_int32_t dmacc; /* Capture Count */ 49 volatile u_int32_t dmacnva; /* Capture Next Virtual Address */ 50 volatile u_int32_t dmacnc; /* Capture next count */ 51 volatile u_int32_t dmapva; /* Playback Virtual Address */ 52 volatile u_int32_t dmapc; /* Playback Count */ 53 volatile u_int32_t dmapnva; /* Playback Next VAddress */ 54 volatile u_int32_t dmapnc; /* Playback Next Count */ 55 }; 56 57 /* 58 * APC CSR Register bit definitions 59 */ 60 #define APC_IP 0x00800000 /* Interrupt Pending */ 61 #define APC_PI 0x00400000 /* Playback interrupt */ 62 #define APC_CI 0x00200000 /* Capture interrupt */ 63 #define APC_EI 0x00100000 /* General interrupt */ 64 #define APC_IE 0x00080000 /* General ext int. enable */ 65 #define APC_PIE 0x00040000 /* Playback ext intr */ 66 #define APC_CIE 0x00020000 /* Capture ext intr */ 67 #define APC_EIE 0x00010000 /* Error ext intr */ 68 #define APC_PMI 0x00008000 /* Pipe empty interrupt */ 69 #define APC_PM 0x00004000 /* Play pipe empty */ 70 #define APC_PD 0x00002000 /* Playback NVA dirty */ 71 #define APC_PMIE 0x00001000 /* play pipe empty Int enable */ 72 #define APC_CM 0x00000800 /* Cap data dropped on floor */ 73 #define APC_CD 0x00000400 /* Capture NVA dirty */ 74 #define APC_CMI 0x00000200 /* Capture pipe empty interrupt */ 75 #define APC_CMIE 0x00000100 /* Cap. pipe empty int enable */ 76 #define APC_PPAUSE 0x00000080 /* Pause the play DMA */ 77 #define APC_CPAUSE 0x00000040 /* Pause the capture DMA */ 78 #define APC_CODEC_PDN 0x00000020 /* CODEC RESET */ 79 #define PDMA_GO 0x00000008 80 #define CDMA_GO 0x00000004 /* bit 2 of the csr */ 81 #define APC_RESET 0x00000001 /* Reset the chip */ 82 83 #define APC_BITS \ 84 "\20\30IP\27PI\26CI\25EI\24IE" \ 85 "\23PIE\22CIE\21EIE\20PMI\17PM\16PD\15PMIE" \ 86 "\14CM\13CD\12CMI\11CMIE\10PPAUSE\7CPAUSE\6PDN\4PGO\3CGO" 87 88 /* 89 * To start DMA, you write to dma[cp]nva and dma[cp]nc and set [CP]DMA_GO 90 * in dmacsr. dma[cp]va and dma[cp]c, when read, appear to be the live 91 * counter as the DMA operation progresses. 92 * Supposedly, you get an interrupt with the "dirty" bits (APC_PD,APC_CD) 93 * set, when the next DMA buffer can be programmed, while the current one 94 * is still in progress. We don't currently use this feature, since I 95 * haven't been able to make it work.. instead the next buffer goes in 96 * as soon as we see a "pipe empty" (APC_PM) interrupt. 97 */ 98 99 /* It's not clear if there's a maximum DMA size.. */ 100 #define APC_MAX (sc->sc_blksz)/*(16*1024)*/ 101 102 /* 103 * List of device memory allocations (see cs4231_malloc/cs4231_free). 104 */ 105 struct cs_dma { 106 struct cs_dma *next; 107 caddr_t addr; 108 bus_dmamap_t dmamap; 109 bus_dma_segment_t segs[1]; 110 int nsegs; 111 size_t size; 112 }; 113