xref: /netbsd-src/sys/dev/ic/ahcisatavar.h (revision 8b0f9554ff8762542c4defc4f70e1eb76fb508fa)
1 /*	$NetBSD: ahcisatavar.h,v 1.2 2007/11/12 20:10:32 joerg Exp $	*/
2 
3 /*
4  * Copyright (c) 2006 Manuel Bouyer.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. All advertising materials mentioning features or use of this software
15  *    must display the following acknowledgement:
16  *	This product includes software developed by Manuel Bouyer.
17  * 4. The name of the author may not be used to endorse or promote products
18  *    derived from this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
29  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30  *
31  */
32 
33 #include <dev/ic/ahcisatareg.h>
34 
35 #define AHCI_DEBUG
36 
37 #define DEBUG_INTR   0x01
38 #define DEBUG_XFERS  0x02
39 #define DEBUG_FUNCS  0x08
40 #define DEBUG_PROBE  0x10
41 #define DEBUG_DETACH 0x20
42 #ifdef AHCI_DEBUG
43 extern int ahcidebug_mask;
44 #define AHCIDEBUG_PRINT(args, level) \
45         if (ahcidebug_mask & (level)) \
46 		printf args
47 #else
48 #define AHCIDEBUG_PRINT(args, level)
49 #endif
50 
51 struct ahci_softc {
52 	struct atac_softc sc_atac;
53 	bus_space_tag_t sc_ahcit; /* ahci registers mapping */
54 	bus_space_handle_t sc_ahcih;
55 	bus_dma_tag_t sc_dmat; /* DMA memory mappings: */
56 	void *sc_cmd_hdr; /* command tables and received FIS */
57 	bus_dmamap_t sc_cmd_hdrd;
58 
59 	int sc_ncmds; /* number of command slots */
60 	struct ata_channel *sc_chanarray[AHCI_MAX_PORTS];
61 	struct ahci_channel {
62 		struct ata_channel ata_channel; /* generic part */
63 		bus_space_handle_t ahcic_scontrol;
64 		bus_space_handle_t ahcic_sstatus;
65 		bus_space_handle_t ahcic_serror;
66 		/* pointers allocated from sc_cmd_hdrd */
67 		struct ahci_r_fis *ahcic_rfis; /* received FIS */
68 		bus_addr_t ahcic_bus_rfis;
69 		struct ahci_cmd_header *ahcic_cmdh; /* command headers */
70 		bus_addr_t ahcic_bus_cmdh;
71 		/* command tables (allocated per-channel) */
72 		bus_dmamap_t ahcic_cmd_tbld;
73 		struct ahci_cmd_tbl *ahcic_cmd_tbl[AHCI_MAX_CMDS];
74 		bus_addr_t ahcic_bus_cmd_tbl[AHCI_MAX_CMDS];
75 		bus_dmamap_t ahcic_datad[AHCI_MAX_CMDS];
76 		u_int32_t  ahcic_cmds_active; /* active commands */
77 	} sc_channels[AHCI_MAX_PORTS];
78 };
79 
80 #define AHCINAME(sc) ((sc)->sc_atac.atac_dev.dv_xname)
81 
82 #define AHCI_CMDH_SYNC(sc, achp, cmd, op) bus_dmamap_sync((sc)->sc_dmat, \
83     (sc)->sc_cmd_hdrd, \
84     (char *)(&(achp)->ahcic_cmdh[(cmd)]) - (char *)(sc)->sc_cmd_hdr, \
85     sizeof(struct ahci_cmd_header), (op))
86 #define AHCI_RFIS_SYNC(sc, achp, op) bus_dmamap_sync((sc)->sc_dmat, \
87     (sc)->sc_cmd_hdrd, (void *)(achp)->ahcic_rfis - (sc)->sc_cmd_hdr, \
88     AHCI_RFIS_SIZE, (op))
89 #define AHCI_CMDTBL_SYNC(sc, achp, cmd, op) bus_dmamap_sync((sc)->sc_dmat, \
90     (achp)->ahcic_cmd_tbld, AHCI_CMDTBL_SIZE * (cmd), \
91     AHCI_CMDTBL_SIZE, (op))
92 
93 #define AHCI_READ(sc, reg) bus_space_read_4((sc)->sc_ahcit, \
94     (sc)->sc_ahcih, (reg))
95 #define AHCI_WRITE(sc, reg, val) bus_space_write_4((sc)->sc_ahcit, \
96     (sc)->sc_ahcih, (reg), (val))
97 
98 
99 void ahci_attach(struct ahci_softc *);
100 void ahci_enable_intrs(struct ahci_softc *);
101 int  ahci_reset(struct ahci_softc *);
102 void ahci_setup_ports(struct ahci_softc *);
103 void ahci_reprobe_drives(struct ahci_softc *);
104 
105 int  ahci_intr(void *);
106 
107