1 /* $NetBSD: spdmem_i2c.c,v 1.14 2018/03/01 05:47:22 pgoyette Exp $ */ 2 3 /* 4 * Copyright (c) 2007 Nicolas Joly 5 * Copyright (c) 2007 Paul Goyette 6 * Copyright (c) 2007 Tobias Nygren 7 * Copyright (c) 2015 Michael van Elst 8 * All rights reserved. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 23 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 24 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 25 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 26 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 27 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 28 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 29 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 30 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 31 * POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 /* 35 * Serial Presence Detect (SPD) memory identification 36 * 37 * JEDEC standard No. 21-C 38 * JEDEC document 4_01_06R24 39 * - Definitions of the EE1004-v 4 Kbit Serial Presence Detect EEPROM [...] 40 */ 41 42 #include <sys/cdefs.h> 43 __KERNEL_RCSID(0, "$NetBSD: spdmem_i2c.c,v 1.14 2018/03/01 05:47:22 pgoyette Exp $"); 44 45 #include <sys/param.h> 46 #include <sys/device.h> 47 #include <sys/endian.h> 48 #include <sys/module.h> 49 #include <sys/sysctl.h> 50 #include <machine/bswap.h> 51 52 #include <dev/i2c/i2cvar.h> 53 #include <dev/ic/spdmemreg.h> 54 #include <dev/ic/spdmemvar.h> 55 56 /* Constants for matching i2c bus address */ 57 #define SPDMEM_I2C_ADDRMASK 0xfff8 58 #define SPDMEM_I2C_ADDR 0x50 59 #define SPDCTL_I2C_ADDR 0x30 60 61 /* set write protection */ 62 #define SPDCTL_SWP0 (SPDCTL_I2C_ADDR + 1) 63 #define SPDCTL_SWP1 (SPDCTL_I2C_ADDR + 4) 64 #define SPDCTL_SWP2 (SPDCTL_I2C_ADDR + 5) 65 #define SPDCTL_SWP3 (SPDCTL_I2C_ADDR + 0) 66 67 /* clear write protections */ 68 #define SPDCTL_CWP (SPDCTL_I2C_ADDR + 3) 69 70 /* read protection status */ 71 #define SPDCTL_RPS0 (SPDCTL_I2C_ADDR + 1) 72 #define SPDCTL_RPS1 (SPDCTL_I2C_ADDR + 4) 73 #define SPDCTL_RPS2 (SPDCTL_I2C_ADDR + 5) 74 #define SPDCTL_RPS3 (SPDCTL_I2C_ADDR + 0) 75 76 /* select page address */ 77 #define SPDCTL_SPA0 (SPDCTL_I2C_ADDR + 6) 78 #define SPDCTL_SPA1 (SPDCTL_I2C_ADDR + 7) 79 80 /* read page address */ 81 #define SPDCTL_RPA (SPDCTL_I2C_ADDR + 6) 82 83 struct spdmem_i2c_softc { 84 struct spdmem_softc sc_base; 85 i2c_tag_t sc_tag; 86 i2c_addr_t sc_addr; /* EEPROM */ 87 i2c_addr_t sc_page0; 88 i2c_addr_t sc_page1; 89 }; 90 91 static int spdmem_reset_page(struct spdmem_i2c_softc *); 92 static int spdmem_i2c_match(device_t, cfdata_t, void *); 93 static void spdmem_i2c_attach(device_t, device_t, void *); 94 static int spdmem_i2c_detach(device_t, int); 95 96 CFATTACH_DECL_NEW(spdmem_iic, sizeof(struct spdmem_i2c_softc), 97 spdmem_i2c_match, spdmem_i2c_attach, spdmem_i2c_detach, NULL); 98 99 static int spdmem_i2c_read(struct spdmem_softc *, uint16_t, uint8_t *); 100 101 static int 102 spdmem_reset_page(struct spdmem_i2c_softc *sc) 103 { 104 uint8_t reg, byte0, byte2; 105 static uint8_t dummy = 0; 106 int rv; 107 108 reg = 0; 109 110 iic_acquire_bus(sc->sc_tag, 0); 111 112 /* 113 * Try to read byte 0 and 2. If it failed, it's not spdmem or a device 114 * doesn't exist at the address. 115 */ 116 rv = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr, ®, 1, 117 &byte0, 1, I2C_F_POLL); 118 rv |= iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr, ®, 1, 119 &byte2, 1, I2C_F_POLL); 120 if (rv != 0) 121 goto error; 122 123 /* 124 * Quirk for BIOSes that leave page 1 of a 4kbit EEPROM selected. 125 * 126 * byte0 is the length, byte2 is the memory type. Both of them should 127 * not be zero. If zero, the current page might be 1 (DDR4 and newer). 128 * If page 1 is selected, offset 0 can be 0 (Module Characteristics 129 * (Energy backup is not available)) and also offset 2 can be 0 130 * (Megabytes, and a part of Capacity digits). 131 * 132 * Note: The encoding of byte0 is vary in memory type, so we check 133 * just with zero to be simple. 134 * 135 * Try to see if we are not at page 0. If it's not, select page 0. 136 */ 137 if ((byte0 == 0) || (byte2 == 0)) { 138 /* 139 * Note that SDCTL_RPA is the same as sc->sc_page0(SPDCTL_SPA0) 140 * Write is SPA0, read is RPA. 141 * 142 * This call returns 0 on page 0 and returns -1 on page 1. 143 * I don't know whether our icc_exec()'s API is good or not. 144 */ 145 rv = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_page0, 146 ®, 1, &dummy, 1, I2C_F_POLL); 147 if (rv != 0) { 148 /* 149 * The possibilities are: 150 * a) page 1 is selected. 151 * b) The device doesn't support page select and 152 * it's not a SPD ROM. 153 * Is there no way to distinguish them now? 154 */ 155 rv = iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, 156 sc->sc_page0, ®, 1, &dummy, 1, I2C_F_POLL); 157 if (rv == 0) { 158 aprint_debug("Page 1 was selected. Page 0 is " 159 "selected now.\n"); 160 } else { 161 aprint_debug("Failed to select page 0. This " 162 "device isn't SPD ROM\n"); 163 } 164 } else { 165 /* This device isn't SPD ROM */ 166 rv = -1; 167 } 168 } 169 error: 170 iic_release_bus(sc->sc_tag, 0); 171 172 return rv; 173 } 174 175 static int 176 spdmem_i2c_match(device_t parent, cfdata_t match, void *aux) 177 { 178 struct i2c_attach_args *ia = aux; 179 struct spdmem_i2c_softc sc; 180 181 if (ia->ia_name) { 182 /* add other names as we find more firmware variations */ 183 if (strcmp(ia->ia_name, "dimm-spd") && 184 strcmp(ia->ia_name, "dimm")) 185 return 0; 186 } 187 188 /* only do this lame test when not using direct config */ 189 if (ia->ia_name == NULL) { 190 if ((ia->ia_addr & SPDMEM_I2C_ADDRMASK) != SPDMEM_I2C_ADDR) 191 return 0; 192 } 193 194 sc.sc_tag = ia->ia_tag; 195 sc.sc_addr = ia->ia_addr; 196 sc.sc_page0 = SPDCTL_SPA0; 197 sc.sc_page1 = SPDCTL_SPA1; 198 sc.sc_base.sc_read = spdmem_i2c_read; 199 200 /* Check the bank and reset to the page 0 */ 201 if (spdmem_reset_page(&sc) != 0) 202 return 0; 203 204 return spdmem_common_probe(&sc.sc_base); 205 } 206 207 static void 208 spdmem_i2c_attach(device_t parent, device_t self, void *aux) 209 { 210 struct spdmem_i2c_softc *sc = device_private(self); 211 struct i2c_attach_args *ia = aux; 212 213 sc->sc_tag = ia->ia_tag; 214 sc->sc_addr = ia->ia_addr; 215 sc->sc_page0 = SPDCTL_SPA0; 216 sc->sc_page1 = SPDCTL_SPA1; 217 sc->sc_base.sc_read = spdmem_i2c_read; 218 219 if (!pmf_device_register(self, NULL, NULL)) 220 aprint_error_dev(self, "couldn't establish power handler\n"); 221 222 spdmem_common_attach(&sc->sc_base, self); 223 } 224 225 static int 226 spdmem_i2c_detach(device_t self, int flags) 227 { 228 struct spdmem_i2c_softc *sc = device_private(self); 229 230 pmf_device_deregister(self); 231 232 return spdmem_common_detach(&sc->sc_base, self); 233 } 234 235 static int 236 spdmem_i2c_read(struct spdmem_softc *softc, uint16_t addr, uint8_t *val) 237 { 238 uint8_t reg; 239 struct spdmem_i2c_softc *sc = (struct spdmem_i2c_softc *)softc; 240 static uint8_t dummy = 0; 241 int rv; 242 243 reg = addr & 0xff; 244 245 iic_acquire_bus(sc->sc_tag, 0); 246 247 if (addr & 0x100) { 248 rv = iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_page1, 249 &dummy, 1, &dummy, 1, I2C_F_POLL); 250 rv |= iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr, 251 ®, 1, val, 1, I2C_F_POLL); 252 rv |= iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, 253 sc->sc_page0, &dummy, 1, &dummy, 1, I2C_F_POLL); 254 } else { 255 rv = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_addr, 256 ®, 1, val, 1, I2C_F_POLL); 257 } 258 259 iic_release_bus(sc->sc_tag, 0); 260 261 return rv; 262 } 263 264 MODULE(MODULE_CLASS_DRIVER, spdmem, "i2cexec"); 265 266 #ifdef _MODULE 267 #include "ioconf.c" 268 #endif 269 270 static int 271 spdmem_modcmd(modcmd_t cmd, void *opaque) 272 { 273 int error = 0; 274 #ifdef _MODULE 275 static struct sysctllog *spdmem_sysctl_clog; 276 #endif 277 278 switch (cmd) { 279 case MODULE_CMD_INIT: 280 #ifdef _MODULE 281 error = config_init_component(cfdriver_ioconf_spdmem, 282 cfattach_ioconf_spdmem, cfdata_ioconf_spdmem); 283 #endif 284 return error; 285 case MODULE_CMD_FINI: 286 #ifdef _MODULE 287 error = config_fini_component(cfdriver_ioconf_spdmem, 288 cfattach_ioconf_spdmem, cfdata_ioconf_spdmem); 289 sysctl_teardown(&spdmem_sysctl_clog); 290 #endif 291 return error; 292 default: 293 return ENOTTY; 294 } 295 } 296