xref: /netbsd-src/sys/dev/i2c/sdtemp_reg.h (revision 10ad5ffa714ce1a679dcc9dd8159648df2d67b5a)
1 /*	$NetBSD: sdtemp_reg.h,v 1.2 2009/06/13 19:02:33 pgoyette Exp $	*/
2 
3 /*
4  * Copyright (c) 2009 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Paul Goyette.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #ifndef _DEV_I2C_SDTEMPREG_H
33 #define _DEV_I2C_SDTEMPREG_H
34 
35 /*
36  * Following definitions derived from JEDEC Standard 21-C section 4.7
37  * available at http://www.jedec.org/download/search/4_07R15.pdf
38  */
39 #define	SDTEMP_ADDRMASK			0x78
40 #define	SDTEMP_ADDR			0x18	/* I2C address 001 1xxx */
41 
42 #define	SDTEMP_REG_CAPABILITY		0x00
43 #define	SDTEMP_REG_CONFIG		0x01
44 #define	SDTEMP_REG_UPPER_LIM		0x02
45 #define	SDTEMP_REG_LOWER_LIM		0x03
46 #define	SDTEMP_REG_CRIT_LIM		0x04
47 #define	SDTEMP_REG_AMBIENT_TEMP		0x05
48 #define	SDTEMP_REG_MFG_ID		0x06
49 #define	SDTEMP_REG_DEV_REV		0x07
50 #define	SDTEMP_REG_RESOLUTION		0x08
51 
52 #define	SDTEMP_CAP_HAS_ALARM		0x0001
53 #define	SDTEMP_CAP_ACCURACY_1C		0x0002
54 #define	SDTEMP_CAP_WIDER_RANGE		0x0004
55 #define	SDTEMP_CAP_RESOLUTION		0x0018
56 #define	SDTEMP_CAP_RES_SHIFT		3
57 
58 #define	SDTEMP_CONFIG_EVENT_MODE	0x0001
59 #define	SDTEMP_CONFIG_EVENT_POL_AH	0x0002
60 #define	SDTEMP_CONFIG_EVENT_CRIT_ONLY	0x0004
61 #define	SDTEMP_CONFIG_EVENT_ENABLED	0x0008
62 #define	SDTEMP_CONFIG_EVENT_STATUS	0x0010
63 #define	SDTEMP_CONFIG_INT_CLEAR		0x0020
64 #define	SDTEMP_CONFIG_WINDOW_LOCKED	0x0040
65 #define	SDTEMP_CONFIG_CRITICAL_LOCKED	0x0080
66 #define	SDTEMP_CONFIG_SHUTDOWN_MODE	0x0100
67 #define	SDTEMP_CONFIG_HYSTERESIS	0x0600
68 
69 #define	SDTEMP_HYSTERESIS_NONE		0x0000
70 #define	SDTEMP_HYSTERESIS_15		0x0200
71 #define	SDTEMP_HYSTERESIS_30		0x0400
72 #define	SDTEMP_HYSTERESIS_60		0x0600
73 
74 /*
75  * Temperature is a 13-bit value in the range of -256 <= x < +256 degrees.
76  * Maximum resolution is 0.0625C (1/16th degree, 4 bits), but some devices
77  * may have only 0.2500C or 0.1250C (1 or 2 bits), and some devices may not
78  * be able to represent negative values (not that we'd expect them, anyway).
79  */
80 #define	SDTEMP_TEMP_MASK		0x0FFF
81 #define	SDTEMP_TEMP_NEGATIVE		0x1000
82 #define	SDTEMP_TEMP_SIGN_EXT		0xF000
83 
84 /*
85  * Status bits set in SDTEMP_REG_AMBIENT_TEMP only
86  */
87 #define	SDTEMP_ABOVE_CRIT		0x8000
88 #define	SDTEMP_ABOVE_UPPER		0x4000
89 #define	SDTEMP_BELOW_LOWER		0x2000
90 
91 /*
92  * Devices known to conform to JEDEC JC42.4
93  */
94 #define	MAXIM_MANUFACTURER_ID		0x004D
95 #define	MAX_6604_DEVICE_ID		0x3E
96 
97 #define	MCP_MANUFACTURER_ID		0x0054
98 #define	MCP_9805_DEVICE_ID		0x00
99 #define	MCP_98242_DEVICE_ID		0x20
100 
101 /* According to datasheets, SE97 and SE98 have same ID */
102 
103 #define	NXP_MANUFACTURER_ID		0x1131
104 #define	NXP_SE97_DEVICE_ID		0xA1
105 
106 #define	ADT_MANUFACTURER_ID		0x11D4
107 #define	ADT_7408_DEVICE_ID		0x80
108 
109 #define	STTS_MANUFACTURER_ID		0x104A
110 #define	STTS_424E02_DEVICE_ID		0x00
111 
112 /* According to datasheets, both the CAT6095 and CAT34TS02 have the same ID */
113 
114 #define	CAT_MANUFACTURER_ID		0x1B09
115 #define	CAT_34TS02_DEVICE_ID		0x08
116 
117 #endif	/* _DEV_I2C_SDTEMPREG_H */
118