xref: /netbsd-src/sys/dev/i2c/rs5c372.c (revision aaf4ece63a859a04e37cf3a7229b5fab0157cc06)
1 /*	$NetBSD: rs5c372.c,v 1.4 2005/12/11 12:21:23 christos Exp $	*/
2 
3 /*
4  * Copyright (c) 2005 Kimihiro Nonaka
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
18  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
19  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
20  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
21  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
22  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
23  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
24  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
25  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
26  * POSSIBILITY OF SUCH DAMAGE.
27  */
28 
29 #include <sys/param.h>
30 #include <sys/systm.h>
31 #include <sys/device.h>
32 #include <sys/kernel.h>
33 #include <sys/fcntl.h>
34 #include <sys/uio.h>
35 #include <sys/conf.h>
36 #include <sys/event.h>
37 
38 #include <dev/clock_subr.h>
39 
40 #include <dev/i2c/i2cvar.h>
41 #include <dev/i2c/rs5c372reg.h>
42 
43 struct rs5c372rtc_softc {
44 	struct device sc_dev;
45 	i2c_tag_t sc_tag;
46 	int sc_address;
47 	struct todr_chip_handle sc_todr;
48 };
49 
50 static int rs5c372rtc_match(struct device *, struct cfdata *, void *);
51 static void rs5c372rtc_attach(struct device *, struct device *, void *);
52 
53 CFATTACH_DECL(rs5c372rtc, sizeof(struct rs5c372rtc_softc),
54     rs5c372rtc_match, rs5c372rtc_attach, NULL, NULL);
55 
56 static void rs5c372rtc_reg_write(struct rs5c372rtc_softc *, int, uint8_t);
57 static int rs5c372rtc_clock_read(struct rs5c372rtc_softc *, struct clock_ymdhms *);
58 static int rs5c372rtc_clock_write(struct rs5c372rtc_softc *, struct clock_ymdhms *);
59 static int rs5c372rtc_gettime(struct todr_chip_handle *, volatile struct timeval *);
60 static int rs5c372rtc_settime(struct todr_chip_handle *, volatile struct timeval *);
61 static int rs5c372rtc_getcal(struct todr_chip_handle *, int *);
62 static int rs5c372rtc_setcal(struct todr_chip_handle *, int);
63 
64 static int
65 rs5c372rtc_match(struct device *parent, struct cfdata *cf, void *arg)
66 {
67 	struct i2c_attach_args *ia = arg;
68 
69 	if (ia->ia_addr == RS5C372_ADDR)
70 		return (1);
71 	return (0);
72 }
73 
74 static void
75 rs5c372rtc_attach(struct device *parent, struct device *self, void *arg)
76 {
77 	struct rs5c372rtc_softc *sc = (struct rs5c372rtc_softc *)self;
78 	struct i2c_attach_args *ia = arg;
79 
80 	aprint_naive(": Real-time Clock\n");
81 	aprint_normal(": RICOH RS5C372[AB] Real-time Clock\n");
82 
83 	sc->sc_tag = ia->ia_tag;
84 	sc->sc_address = ia->ia_addr;
85 	sc->sc_todr.cookie = sc;
86 	sc->sc_todr.todr_gettime = rs5c372rtc_gettime;
87 	sc->sc_todr.todr_settime = rs5c372rtc_settime;
88 	sc->sc_todr.todr_getcal = rs5c372rtc_getcal;
89 	sc->sc_todr.todr_setcal = rs5c372rtc_setcal;
90 	sc->sc_todr.todr_setwen = NULL;
91 
92 	todr_attach(&sc->sc_todr);
93 
94 	/* Initialize RTC */
95 	rs5c372rtc_reg_write(sc, RS5C372_CONTROL2, RS5C372_CONTROL2_24HRS);
96 	rs5c372rtc_reg_write(sc, RS5C372_CONTROL1, 0);
97 }
98 
99 static int
100 rs5c372rtc_gettime(struct todr_chip_handle *ch, volatile struct timeval *tv)
101 {
102 	struct rs5c372rtc_softc *sc = ch->cookie;
103 	struct clock_ymdhms dt;
104 
105 	memset(&dt, 0, sizeof(dt));
106 
107 	if (rs5c372rtc_clock_read(sc, &dt) == 0)
108 		return (-1);
109 
110 	tv->tv_sec = clock_ymdhms_to_secs(&dt);
111 	tv->tv_usec = 0;
112 
113 	return (0);
114 }
115 
116 static int
117 rs5c372rtc_settime(struct todr_chip_handle *ch, volatile struct timeval *tv)
118 {
119 	struct rs5c372rtc_softc *sc = ch->cookie;
120 	struct clock_ymdhms dt;
121 
122 	clock_secs_to_ymdhms(tv->tv_sec, &dt);
123 
124 	if (rs5c372rtc_clock_write(sc, &dt) == 0)
125 		return (-1);
126 
127 	return (0);
128 }
129 
130 static int
131 rs5c372rtc_setcal(struct todr_chip_handle *ch, int cal)
132 {
133 
134 	return (EOPNOTSUPP);
135 }
136 
137 static int
138 rs5c372rtc_getcal(struct todr_chip_handle *ch, int *cal)
139 {
140 
141 	return (EOPNOTSUPP);
142 }
143 
144 static void
145 rs5c372rtc_reg_write(struct rs5c372rtc_softc *sc, int reg, uint8_t val)
146 {
147 	uint8_t cmdbuf[2];
148 
149 	if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
150 		printf("%s: rs5c372rtc_reg_write: failed to acquire I2C bus\n",
151 		    sc->sc_dev.dv_xname);
152 		return;
153 	}
154 
155 	reg &= 0xf;
156 	cmdbuf[0] = (reg << 4);
157 	cmdbuf[1] = val;
158 	if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_address,
159 	             cmdbuf, 1, &cmdbuf[1], 1, I2C_F_POLL)) {
160 		iic_release_bus(sc->sc_tag, I2C_F_POLL);
161 		printf("%s: rs5c372rtc_reg_write: failed to write reg%d\n",
162 		    sc->sc_dev.dv_xname, reg);
163 		return;
164 	}
165 
166 	iic_release_bus(sc->sc_tag, I2C_F_POLL);
167 }
168 
169 static int
170 rs5c372rtc_clock_read(struct rs5c372rtc_softc *sc, struct clock_ymdhms *dt)
171 {
172 	uint8_t bcd[RS5C372_NRTC_REGS];
173 	uint8_t cmdbuf[1];
174 
175 	if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
176 		printf("%s: rs5c372rtc_clock_read: failed to acquire I2C bus\n",
177 		    sc->sc_dev.dv_xname);
178 		return (0);
179 	}
180 
181 	cmdbuf[0] = (RS5C372_SECONDS << 4);
182 	if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_address,
183 	             cmdbuf, 1, bcd, RS5C372_NRTC_REGS, I2C_F_POLL)) {
184 		iic_release_bus(sc->sc_tag, I2C_F_POLL);
185 		printf("%s: rs5c372rtc_clock_read: failed to read rtc\n",
186 		    sc->sc_dev.dv_xname);
187 		return (0);
188 	}
189 
190 	iic_release_bus(sc->sc_tag, I2C_F_POLL);
191 
192 	/*
193 	 * Convert the RS5C372's register values into something useable
194 	 */
195 	dt->dt_sec = FROMBCD(bcd[RS5C372_SECONDS] & RS5C372_SECONDS_MASK);
196 	dt->dt_min = FROMBCD(bcd[RS5C372_MINUTES] & RS5C372_MINUTES_MASK);
197 	dt->dt_hour = FROMBCD(bcd[RS5C372_HOURS] & RS5C372_HOURS_24MASK);
198 	dt->dt_day = FROMBCD(bcd[RS5C372_DATE] & RS5C372_DATE_MASK);
199 	dt->dt_mon = FROMBCD(bcd[RS5C372_MONTH] & RS5C372_MONTH_MASK);
200 	dt->dt_year = FROMBCD(bcd[RS5C372_YEAR]) + 2000;
201 
202 	return (1);
203 }
204 
205 static int
206 rs5c372rtc_clock_write(struct rs5c372rtc_softc *sc, struct clock_ymdhms *dt)
207 {
208 	uint8_t bcd[RS5C372_NRTC_REGS];
209 	uint8_t cmdbuf[1];
210 
211 	/*
212 	 * Convert our time representation into something the RS5C372
213 	 * can understand.
214 	 */
215 	bcd[RS5C372_SECONDS] = TOBCD(dt->dt_sec);
216 	bcd[RS5C372_MINUTES] = TOBCD(dt->dt_min);
217 	bcd[RS5C372_HOURS] = TOBCD(dt->dt_hour);
218 	bcd[RS5C372_DATE] = TOBCD(dt->dt_day);
219 	bcd[RS5C372_DAY] = TOBCD(dt->dt_wday);
220 	bcd[RS5C372_MONTH] = TOBCD(dt->dt_mon);
221 	bcd[RS5C372_YEAR] = TOBCD(dt->dt_year % 100);
222 
223 	if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
224 		printf("%s: rs5c372rtc_clock_write: failed to "
225 		    "acquire I2C bus\n", sc->sc_dev.dv_xname);
226 		return (0);
227 	}
228 
229 	cmdbuf[0] = (RS5C372_SECONDS << 4);
230 	if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_address,
231 	             cmdbuf, 1, bcd, RS5C372_NRTC_REGS, I2C_F_POLL)) {
232 		iic_release_bus(sc->sc_tag, I2C_F_POLL);
233 		printf("%s: rs5c372rtc_clock_write: failed to write rtc\n",
234 		    sc->sc_dev.dv_xname);
235 		return (0);
236 	}
237 
238 	iic_release_bus(sc->sc_tag, I2C_F_POLL);
239 
240 	return (1);
241 }
242