xref: /netbsd-src/sys/dev/i2c/rs5c372.c (revision 946379e7b37692fc43f68eb0d1c10daa0a7f3b6c)
1 /*	$NetBSD: rs5c372.c,v 1.14 2014/11/20 16:34:26 christos Exp $	*/
2 
3 /*-
4  * Copyright (C) 2005 NONAKA Kimihiro <nonaka@netbsd.org>
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
21  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
22  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
23  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
25  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26  */
27 
28 #include <sys/cdefs.h>
29 __KERNEL_RCSID(0, "$NetBSD: rs5c372.c,v 1.14 2014/11/20 16:34:26 christos Exp $");
30 
31 #include <sys/param.h>
32 #include <sys/systm.h>
33 #include <sys/device.h>
34 #include <sys/kernel.h>
35 #include <sys/fcntl.h>
36 #include <sys/uio.h>
37 #include <sys/conf.h>
38 #include <sys/event.h>
39 
40 #include <dev/clock_subr.h>
41 
42 #include <dev/i2c/i2cvar.h>
43 #include <dev/i2c/rs5c372reg.h>
44 
45 struct rs5c372rtc_softc {
46 	device_t sc_dev;
47 	i2c_tag_t sc_tag;
48 	int sc_address;
49 	struct todr_chip_handle sc_todr;
50 };
51 
52 static int rs5c372rtc_match(device_t, cfdata_t, void *);
53 static void rs5c372rtc_attach(device_t, device_t, void *);
54 
55 CFATTACH_DECL_NEW(rs5c372rtc, sizeof(struct rs5c372rtc_softc),
56     rs5c372rtc_match, rs5c372rtc_attach, NULL, NULL);
57 
58 static void rs5c372rtc_reg_write(struct rs5c372rtc_softc *, int, uint8_t);
59 static int rs5c372rtc_clock_read(struct rs5c372rtc_softc *, struct clock_ymdhms *);
60 static int rs5c372rtc_clock_write(struct rs5c372rtc_softc *, struct clock_ymdhms *);
61 static int rs5c372rtc_gettime_ymdhms(todr_chip_handle_t, struct clock_ymdhms *);
62 static int rs5c372rtc_settime_ymdhms(todr_chip_handle_t, struct clock_ymdhms *);
63 
64 static int
65 rs5c372rtc_match(device_t parent, cfdata_t cf, void *arg)
66 {
67 	struct i2c_attach_args *ia = arg;
68 
69 	if (ia->ia_name) {
70 		/* direct config - check name */
71 		if (strcmp(ia->ia_name, "rs5c372rtc") == 0)
72 			return 1;
73 	} else {
74 		/* indirect config - check typical address */
75 		if (ia->ia_addr == RS5C372_ADDR)
76 			return 1;
77 	}
78 	return 0;
79 }
80 
81 static void
82 rs5c372rtc_attach(device_t parent, device_t self, void *arg)
83 {
84 	struct rs5c372rtc_softc *sc = device_private(self);
85 	struct i2c_attach_args *ia = arg;
86 
87 	aprint_naive(": Real-time Clock\n");
88 	aprint_normal(": RICOH RS5C372[AB] Real-time Clock\n");
89 
90 	sc->sc_tag = ia->ia_tag;
91 	sc->sc_address = ia->ia_addr;
92 	sc->sc_dev = self;
93 	sc->sc_todr.cookie = sc;
94 	sc->sc_todr.todr_gettime_ymdhms = rs5c372rtc_gettime_ymdhms;
95 	sc->sc_todr.todr_settime_ymdhms = rs5c372rtc_settime_ymdhms;
96 	sc->sc_todr.todr_setwen = NULL;
97 
98 	todr_attach(&sc->sc_todr);
99 
100 	/* Initialize RTC */
101 	rs5c372rtc_reg_write(sc, RS5C372_CONTROL2, RS5C372_CONTROL2_24HRS);
102 	rs5c372rtc_reg_write(sc, RS5C372_CONTROL1, 0);
103 }
104 
105 static int
106 rs5c372rtc_gettime_ymdhms(todr_chip_handle_t ch, struct clock_ymdhms *dt)
107 {
108 	struct rs5c372rtc_softc *sc = ch->cookie;
109 
110 	if (rs5c372rtc_clock_read(sc, dt) == 0)
111 		return (-1);
112 
113 	return (0);
114 }
115 
116 static int
117 rs5c372rtc_settime_ymdhms(todr_chip_handle_t ch, struct clock_ymdhms *dt)
118 {
119 	struct rs5c372rtc_softc *sc = ch->cookie;
120 
121 	if (rs5c372rtc_clock_write(sc, dt) == 0)
122 		return (-1);
123 
124 	return (0);
125 }
126 
127 static void
128 rs5c372rtc_reg_write(struct rs5c372rtc_softc *sc, int reg, uint8_t val)
129 {
130 	uint8_t cmdbuf[2];
131 
132 	if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
133 		aprint_error_dev(sc->sc_dev,
134 		    "rs5c372rtc_reg_write: failed to acquire I2C bus\n");
135 		return;
136 	}
137 
138 	reg &= 0xf;
139 	cmdbuf[0] = (reg << 4);
140 	cmdbuf[1] = val;
141 	if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_address,
142 	             cmdbuf, 1, &cmdbuf[1], 1, I2C_F_POLL)) {
143 		iic_release_bus(sc->sc_tag, I2C_F_POLL);
144 		aprint_error_dev(sc->sc_dev,
145 		    "rs5c372rtc_reg_write: failed to write reg%d\n", reg);
146 		return;
147 	}
148 
149 	iic_release_bus(sc->sc_tag, I2C_F_POLL);
150 }
151 
152 static int
153 rs5c372rtc_clock_read(struct rs5c372rtc_softc *sc, struct clock_ymdhms *dt)
154 {
155 	uint8_t bcd[RS5C372_NRTC_REGS];
156 	uint8_t cmdbuf[1];
157 
158 	if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
159 		aprint_error_dev(sc->sc_dev,
160 		    "rs5c372rtc_clock_read: failed to acquire I2C bus\n");
161 		return (0);
162 	}
163 
164 	cmdbuf[0] = (RS5C372_SECONDS << 4);
165 	if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_address,
166 	             cmdbuf, 1, bcd, RS5C372_NRTC_REGS, I2C_F_POLL)) {
167 		iic_release_bus(sc->sc_tag, I2C_F_POLL);
168 		aprint_error_dev(sc->sc_dev,
169 		    "rs5c372rtc_clock_read: failed to read rtc\n");
170 		return (0);
171 	}
172 
173 	iic_release_bus(sc->sc_tag, I2C_F_POLL);
174 
175 	/*
176 	 * Convert the RS5C372's register values into something useable
177 	 */
178 	dt->dt_sec = bcdtobin(bcd[RS5C372_SECONDS] & RS5C372_SECONDS_MASK);
179 	dt->dt_min = bcdtobin(bcd[RS5C372_MINUTES] & RS5C372_MINUTES_MASK);
180 	dt->dt_hour = bcdtobin(bcd[RS5C372_HOURS] & RS5C372_HOURS_24MASK);
181 	dt->dt_day = bcdtobin(bcd[RS5C372_DATE] & RS5C372_DATE_MASK);
182 	dt->dt_mon = bcdtobin(bcd[RS5C372_MONTH] & RS5C372_MONTH_MASK);
183 	dt->dt_year = bcdtobin(bcd[RS5C372_YEAR]) + 2000;
184 
185 	return (1);
186 }
187 
188 static int
189 rs5c372rtc_clock_write(struct rs5c372rtc_softc *sc, struct clock_ymdhms *dt)
190 {
191 	uint8_t bcd[RS5C372_NRTC_REGS];
192 	uint8_t cmdbuf[1];
193 
194 	/*
195 	 * Convert our time representation into something the RS5C372
196 	 * can understand.
197 	 */
198 	bcd[RS5C372_SECONDS] = bintobcd(dt->dt_sec);
199 	bcd[RS5C372_MINUTES] = bintobcd(dt->dt_min);
200 	bcd[RS5C372_HOURS] = bintobcd(dt->dt_hour);
201 	bcd[RS5C372_DATE] = bintobcd(dt->dt_day);
202 	bcd[RS5C372_DAY] = bintobcd(dt->dt_wday);
203 	bcd[RS5C372_MONTH] = bintobcd(dt->dt_mon);
204 	bcd[RS5C372_YEAR] = bintobcd(dt->dt_year % 100);
205 
206 	if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) {
207 		aprint_error_dev(sc->sc_dev, "rs5c372rtc_clock_write: failed to "
208 		    "acquire I2C bus\n");
209 		return (0);
210 	}
211 
212 	cmdbuf[0] = (RS5C372_SECONDS << 4);
213 	if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_address,
214 	             cmdbuf, 1, bcd, RS5C372_NRTC_REGS, I2C_F_POLL)) {
215 		iic_release_bus(sc->sc_tag, I2C_F_POLL);
216 		aprint_error_dev(sc->sc_dev,
217 		    "rs5c372rtc_clock_write: failed to write rtc\n");
218 		return (0);
219 	}
220 
221 	iic_release_bus(sc->sc_tag, I2C_F_POLL);
222 
223 	return (1);
224 }
225