1 /* $NetBSD: rs5c372.c,v 1.12 2012/01/21 19:44:30 nonaka Exp $ */ 2 3 /*- 4 * Copyright (C) 2005 NONAKA Kimihiro <nonaka@netbsd.org> 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __KERNEL_RCSID(0, "$NetBSD: rs5c372.c,v 1.12 2012/01/21 19:44:30 nonaka Exp $"); 30 31 #include <sys/param.h> 32 #include <sys/systm.h> 33 #include <sys/device.h> 34 #include <sys/kernel.h> 35 #include <sys/fcntl.h> 36 #include <sys/uio.h> 37 #include <sys/conf.h> 38 #include <sys/event.h> 39 40 #include <dev/clock_subr.h> 41 42 #include <dev/i2c/i2cvar.h> 43 #include <dev/i2c/rs5c372reg.h> 44 45 struct rs5c372rtc_softc { 46 device_t sc_dev; 47 i2c_tag_t sc_tag; 48 int sc_address; 49 struct todr_chip_handle sc_todr; 50 }; 51 52 static int rs5c372rtc_match(device_t, cfdata_t, void *); 53 static void rs5c372rtc_attach(device_t, device_t, void *); 54 55 CFATTACH_DECL_NEW(rs5c372rtc, sizeof(struct rs5c372rtc_softc), 56 rs5c372rtc_match, rs5c372rtc_attach, NULL, NULL); 57 58 static void rs5c372rtc_reg_write(struct rs5c372rtc_softc *, int, uint8_t); 59 static int rs5c372rtc_clock_read(struct rs5c372rtc_softc *, struct clock_ymdhms *); 60 static int rs5c372rtc_clock_write(struct rs5c372rtc_softc *, struct clock_ymdhms *); 61 static int rs5c372rtc_gettime(struct todr_chip_handle *, struct timeval *); 62 static int rs5c372rtc_settime(struct todr_chip_handle *, struct timeval *); 63 64 static int 65 rs5c372rtc_match(device_t parent, cfdata_t cf, void *arg) 66 { 67 struct i2c_attach_args *ia = arg; 68 69 if (ia->ia_name) { 70 /* direct config - check name */ 71 if (strcmp(ia->ia_name, "rs5c372rtc") == 0) 72 return 1; 73 } else { 74 /* indirect config - check typical address */ 75 if (ia->ia_addr == RS5C372_ADDR) 76 return 1; 77 } 78 return 0; 79 } 80 81 static void 82 rs5c372rtc_attach(device_t parent, device_t self, void *arg) 83 { 84 struct rs5c372rtc_softc *sc = device_private(self); 85 struct i2c_attach_args *ia = arg; 86 87 aprint_naive(": Real-time Clock\n"); 88 aprint_normal(": RICOH RS5C372[AB] Real-time Clock\n"); 89 90 sc->sc_tag = ia->ia_tag; 91 sc->sc_address = ia->ia_addr; 92 sc->sc_dev = self; 93 sc->sc_todr.cookie = sc; 94 sc->sc_todr.todr_gettime = rs5c372rtc_gettime; 95 sc->sc_todr.todr_settime = rs5c372rtc_settime; 96 sc->sc_todr.todr_setwen = NULL; 97 98 todr_attach(&sc->sc_todr); 99 100 /* Initialize RTC */ 101 rs5c372rtc_reg_write(sc, RS5C372_CONTROL2, RS5C372_CONTROL2_24HRS); 102 rs5c372rtc_reg_write(sc, RS5C372_CONTROL1, 0); 103 } 104 105 static int 106 rs5c372rtc_gettime(struct todr_chip_handle *ch, struct timeval *tv) 107 { 108 struct rs5c372rtc_softc *sc = ch->cookie; 109 struct clock_ymdhms dt; 110 111 memset(&dt, 0, sizeof(dt)); 112 113 if (rs5c372rtc_clock_read(sc, &dt) == 0) 114 return (-1); 115 116 tv->tv_sec = clock_ymdhms_to_secs(&dt); 117 tv->tv_usec = 0; 118 119 return (0); 120 } 121 122 static int 123 rs5c372rtc_settime(struct todr_chip_handle *ch, struct timeval *tv) 124 { 125 struct rs5c372rtc_softc *sc = ch->cookie; 126 struct clock_ymdhms dt; 127 128 clock_secs_to_ymdhms(tv->tv_sec, &dt); 129 130 if (rs5c372rtc_clock_write(sc, &dt) == 0) 131 return (-1); 132 133 return (0); 134 } 135 136 static void 137 rs5c372rtc_reg_write(struct rs5c372rtc_softc *sc, int reg, uint8_t val) 138 { 139 uint8_t cmdbuf[2]; 140 141 if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) { 142 aprint_error_dev(sc->sc_dev, 143 "rs5c372rtc_reg_write: failed to acquire I2C bus\n"); 144 return; 145 } 146 147 reg &= 0xf; 148 cmdbuf[0] = (reg << 4); 149 cmdbuf[1] = val; 150 if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_address, 151 cmdbuf, 1, &cmdbuf[1], 1, I2C_F_POLL)) { 152 iic_release_bus(sc->sc_tag, I2C_F_POLL); 153 aprint_error_dev(sc->sc_dev, 154 "rs5c372rtc_reg_write: failed to write reg%d\n", reg); 155 return; 156 } 157 158 iic_release_bus(sc->sc_tag, I2C_F_POLL); 159 } 160 161 static int 162 rs5c372rtc_clock_read(struct rs5c372rtc_softc *sc, struct clock_ymdhms *dt) 163 { 164 uint8_t bcd[RS5C372_NRTC_REGS]; 165 uint8_t cmdbuf[1]; 166 167 if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) { 168 aprint_error_dev(sc->sc_dev, 169 "rs5c372rtc_clock_read: failed to acquire I2C bus\n"); 170 return (0); 171 } 172 173 cmdbuf[0] = (RS5C372_SECONDS << 4); 174 if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_address, 175 cmdbuf, 1, bcd, RS5C372_NRTC_REGS, I2C_F_POLL)) { 176 iic_release_bus(sc->sc_tag, I2C_F_POLL); 177 aprint_error_dev(sc->sc_dev, 178 "rs5c372rtc_clock_read: failed to read rtc\n"); 179 return (0); 180 } 181 182 iic_release_bus(sc->sc_tag, I2C_F_POLL); 183 184 /* 185 * Convert the RS5C372's register values into something useable 186 */ 187 dt->dt_sec = FROMBCD(bcd[RS5C372_SECONDS] & RS5C372_SECONDS_MASK); 188 dt->dt_min = FROMBCD(bcd[RS5C372_MINUTES] & RS5C372_MINUTES_MASK); 189 dt->dt_hour = FROMBCD(bcd[RS5C372_HOURS] & RS5C372_HOURS_24MASK); 190 dt->dt_day = FROMBCD(bcd[RS5C372_DATE] & RS5C372_DATE_MASK); 191 dt->dt_mon = FROMBCD(bcd[RS5C372_MONTH] & RS5C372_MONTH_MASK); 192 dt->dt_year = FROMBCD(bcd[RS5C372_YEAR]) + 2000; 193 194 return (1); 195 } 196 197 static int 198 rs5c372rtc_clock_write(struct rs5c372rtc_softc *sc, struct clock_ymdhms *dt) 199 { 200 uint8_t bcd[RS5C372_NRTC_REGS]; 201 uint8_t cmdbuf[1]; 202 203 /* 204 * Convert our time representation into something the RS5C372 205 * can understand. 206 */ 207 bcd[RS5C372_SECONDS] = TOBCD(dt->dt_sec); 208 bcd[RS5C372_MINUTES] = TOBCD(dt->dt_min); 209 bcd[RS5C372_HOURS] = TOBCD(dt->dt_hour); 210 bcd[RS5C372_DATE] = TOBCD(dt->dt_day); 211 bcd[RS5C372_DAY] = TOBCD(dt->dt_wday); 212 bcd[RS5C372_MONTH] = TOBCD(dt->dt_mon); 213 bcd[RS5C372_YEAR] = TOBCD(dt->dt_year % 100); 214 215 if (iic_acquire_bus(sc->sc_tag, I2C_F_POLL)) { 216 aprint_error_dev(sc->sc_dev, "rs5c372rtc_clock_write: failed to " 217 "acquire I2C bus\n"); 218 return (0); 219 } 220 221 cmdbuf[0] = (RS5C372_SECONDS << 4); 222 if (iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, sc->sc_address, 223 cmdbuf, 1, bcd, RS5C372_NRTC_REGS, I2C_F_POLL)) { 224 iic_release_bus(sc->sc_tag, I2C_F_POLL); 225 aprint_error_dev(sc->sc_dev, 226 "rs5c372rtc_clock_write: failed to write rtc\n"); 227 return (0); 228 } 229 230 iic_release_bus(sc->sc_tag, I2C_F_POLL); 231 232 return (1); 233 } 234