xref: /netbsd-src/sys/dev/i2c/pcf8583.c (revision 8ac07aec990b9d2e483062509d0a9fa5b4f57cf2) 
1 /*	$NetBSD: pcf8583.c,v 1.9 2008/04/06 20:25:59 cegger Exp $	*/
2 
3 /*
4  * Copyright (c) 2003 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Written by Steve C. Woodford and Jason R. Thorpe for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *      This product includes software developed for the NetBSD Project by
20  *      Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 /*
39  * Driver for the Philips PCF8583 Real Time Clock.
40  *
41  * This driver is partially derived from Ben Harris's PCF8583 driver
42  * for NetBSD/acorn26.
43  */
44 
45 #include <sys/cdefs.h>
46 __KERNEL_RCSID(0, "$NetBSD: pcf8583.c,v 1.9 2008/04/06 20:25:59 cegger Exp $");
47 
48 #include <sys/param.h>
49 #include <sys/systm.h>
50 #include <sys/device.h>
51 #include <sys/kernel.h>
52 #include <sys/fcntl.h>
53 #include <sys/uio.h>
54 #include <sys/conf.h>
55 #include <sys/event.h>
56 
57 #include <dev/clock_subr.h>
58 
59 #include <dev/i2c/i2cvar.h>
60 #include <dev/i2c/pcf8583reg.h>
61 #include <dev/i2c/pcf8583var.h>
62 
63 struct pcfrtc_softc {
64 	struct device sc_dev;
65 	i2c_tag_t sc_tag;
66 	int sc_address;
67 	int sc_open;
68 	struct todr_chip_handle sc_todr;
69 };
70 
71 static int  pcfrtc_match(struct device *, struct cfdata *, void *);
72 static void pcfrtc_attach(struct device *, struct device *, void *);
73 
74 CFATTACH_DECL(pcfrtc, sizeof(struct pcfrtc_softc),
75 	pcfrtc_match, pcfrtc_attach, NULL, NULL);
76 extern struct cfdriver pcfrtc_cd;
77 
78 dev_type_open(pcfrtc_open);
79 dev_type_close(pcfrtc_close);
80 dev_type_read(pcfrtc_read);
81 dev_type_write(pcfrtc_write);
82 
83 const struct cdevsw pcfrtc_cdevsw = {
84 	pcfrtc_open, pcfrtc_close, pcfrtc_read, pcfrtc_write, noioctl,
85 	nostop, notty, nopoll, nommap, nokqfilter, D_OTHER
86 };
87 
88 static int pcfrtc_clock_read(struct pcfrtc_softc *, struct clock_ymdhms *,
89 			     uint8_t *);
90 static int pcfrtc_clock_write(struct pcfrtc_softc *, struct clock_ymdhms *,
91 			      uint8_t);
92 static int pcfrtc_gettime(struct todr_chip_handle *, volatile struct timeval *);
93 static int pcfrtc_settime(struct todr_chip_handle *, volatile struct timeval *);
94 
95 int
96 pcfrtc_match(struct device *parent, struct cfdata *cf, void *aux)
97 {
98 	struct i2c_attach_args *ia = aux;
99 
100 	if ((ia->ia_addr & PCF8583_ADDRMASK) == PCF8583_ADDR)
101 		return (1);
102 
103 	return (0);
104 }
105 
106 void
107 pcfrtc_attach(struct device *parent, struct device *self, void *aux)
108 {
109 	struct pcfrtc_softc *sc = device_private(self);
110 	struct i2c_attach_args *ia = aux;
111 	uint8_t cmdbuf[1], csr;
112 
113 	sc->sc_tag = ia->ia_tag;
114 	sc->sc_address = ia->ia_addr;
115 
116 	aprint_naive(": Real-time Clock/NVRAM\n");
117 	aprint_normal(": PCF8583 Real-time Clock/NVRAM\n");
118 
119 	cmdbuf[0] = PCF8583_REG_CSR;
120 	if (iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_address,
121 	    cmdbuf, 1, &csr, 1, 0) != 0) {
122 		aprint_error_dev(&sc->sc_dev, "unable to read CSR\n");
123 		return;
124 	}
125 	aprint_normal_dev(&sc->sc_dev, "");
126 	switch (csr & PCF8583_CSR_FN_MASK) {
127 	case PCF8583_CSR_FN_32768HZ:
128 		aprint_normal(" 32.768 kHz clock");
129 		break;
130 
131 	case PCF8583_CSR_FN_50HZ:
132 		aprint_normal(" 50 Hz clock");
133 		break;
134 
135 	case PCF8583_CSR_FN_EVENT:
136 		aprint_normal(" event counter");
137 		break;
138 
139 	case PCF8583_CSR_FN_TEST:
140 		aprint_normal(" test mode");
141 		break;
142 	}
143 	if (csr & PCF8583_CSR_STOP)
144 		aprint_normal(", stopped");
145 	if (csr & PCF8583_CSR_ALARMENABLE)
146 		aprint_normal(", alarm enabled");
147 	aprint_normal("\n");
148 
149 	sc->sc_open = 0;
150 
151 	sc->sc_todr.cookie = sc;
152 	sc->sc_todr.todr_gettime = pcfrtc_gettime;
153 	sc->sc_todr.todr_settime = pcfrtc_settime;
154 	sc->sc_todr.todr_setwen = NULL;
155 
156 	todr_attach(&sc->sc_todr);
157 }
158 
159 /*ARGSUSED*/
160 int
161 pcfrtc_open(dev_t dev, int flag, int fmt, struct lwp *l)
162 {
163 	struct pcfrtc_softc *sc;
164 
165 	if ((sc = device_lookup(&pcfrtc_cd, minor(dev))) == NULL)
166 		return (ENXIO);
167 
168 	/* XXX: Locking */
169 
170 	if (sc->sc_open)
171 		return (EBUSY);
172 
173 	sc->sc_open = 1;
174 	return (0);
175 }
176 
177 /*ARGSUSED*/
178 int
179 pcfrtc_close(dev_t dev, int flag, int fmt, struct lwp *l)
180 {
181 	struct pcfrtc_softc *sc;
182 
183 	if ((sc = device_lookup(&pcfrtc_cd, minor(dev))) == NULL)
184 		return (ENXIO);
185 
186 	sc->sc_open = 0;
187 	return (0);
188 }
189 
190 /*ARGSUSED*/
191 int
192 pcfrtc_read(dev_t dev, struct uio *uio, int flags)
193 {
194 	struct pcfrtc_softc *sc;
195 	u_int8_t ch, cmdbuf[1];
196 	int a, error;
197 
198 	if ((sc = device_lookup(&pcfrtc_cd, minor(dev))) == NULL)
199 		return (ENXIO);
200 
201 	if (uio->uio_offset >= PCF8583_NVRAM_SIZE)
202 		return (EINVAL);
203 
204 	if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0)
205 		return (error);
206 
207 	while (uio->uio_resid && uio->uio_offset < PCF8583_NVRAM_SIZE) {
208 		a = (int)uio->uio_offset;
209 		cmdbuf[0] = a + PCF8583_NVRAM_START;
210 		if ((error = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
211 				      sc->sc_address, cmdbuf, 1,
212 				      &ch, 1, 0)) != 0) {
213 			iic_release_bus(sc->sc_tag, 0);
214 			aprint_error_dev(&sc->sc_dev, "pcfrtc_read: read failed at 0x%x\n", a);
215 			return (error);
216 		}
217 		if ((error = uiomove(&ch, 1, uio)) != 0) {
218 			iic_release_bus(sc->sc_tag, 0);
219 			return (error);
220 		}
221 	}
222 
223 	iic_release_bus(sc->sc_tag, 0);
224 
225 	return (0);
226 }
227 
228 /*ARGSUSED*/
229 int
230 pcfrtc_write(dev_t dev, struct uio *uio, int flags)
231 {
232 	struct pcfrtc_softc *sc;
233 	u_int8_t cmdbuf[2];
234 	int a, error;
235 
236 	if ((sc = device_lookup(&pcfrtc_cd, minor(dev))) == NULL)
237 		return (ENXIO);
238 
239 	if (uio->uio_offset >= PCF8583_NVRAM_SIZE)
240 		return (EINVAL);
241 
242 	if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0)
243 		return (error);
244 
245 	while (uio->uio_resid && uio->uio_offset < PCF8583_NVRAM_SIZE) {
246 		a = (int)uio->uio_offset;
247 		cmdbuf[0] = a + PCF8583_NVRAM_START;
248 		if ((error = uiomove(&cmdbuf[1], 1, uio)) != 0)
249 			break;
250 
251 		if ((error = iic_exec(sc->sc_tag,
252 		    uio->uio_resid ? I2C_OP_WRITE : I2C_OP_WRITE_WITH_STOP,
253 		    sc->sc_address, cmdbuf, 1, &cmdbuf[1], 1, 0)) != 0) {
254 			aprint_error_dev(&sc->sc_dev, "pcfrtc_write: write failed at 0x%x\n", a);
255 			return (error);
256 		}
257 	}
258 
259 	iic_release_bus(sc->sc_tag, 0);
260 
261 	return (error);
262 }
263 
264 static int
265 pcfrtc_gettime(struct todr_chip_handle *ch, volatile struct timeval *tv)
266 {
267 	struct pcfrtc_softc *sc = ch->cookie;
268 	struct clock_ymdhms dt;
269 	int err;
270 	uint8_t centi;
271 
272 	if ((err = pcfrtc_clock_read(sc, &dt, &centi)))
273 		return err;
274 
275 	tv->tv_sec = clock_ymdhms_to_secs(&dt);
276 	tv->tv_usec = centi * 10000;
277 
278 	return (0);
279 }
280 
281 static int
282 pcfrtc_settime(struct todr_chip_handle *ch, volatile struct timeval *tv)
283 {
284 	struct pcfrtc_softc *sc = ch->cookie;
285 	struct clock_ymdhms dt;
286 	int err;
287 
288 	clock_secs_to_ymdhms(tv->tv_sec, &dt);
289 
290 	if ((err = pcfrtc_clock_write(sc, &dt, tv->tv_usec / 10000) == 0))
291 		return err;
292 
293 	return (0);
294 }
295 
296 static const int pcf8583_rtc_offset[] = {
297 	PCF8583_REG_CSR,
298 	PCF8583_REG_CENTI,
299 	PCF8583_REG_SEC,
300 	PCF8583_REG_MIN,
301 	PCF8583_REG_HOUR,
302 	PCF8583_REG_YEARDATE,
303 	PCF8583_REG_WKDYMON,
304 	PCF8583_REG_TIMER,
305 	0xc0,			/* NVRAM -- year stored here */
306 	0xc1,			/* NVRAM -- century stored here */
307 };
308 
309 static int
310 pcfrtc_clock_read(struct pcfrtc_softc *sc, struct clock_ymdhms *dt,
311     uint8_t *centi)
312 {
313 	u_int8_t bcd[10], cmdbuf[1];
314 	int i, err;
315 
316 	if ((err = iic_acquire_bus(sc->sc_tag, I2C_F_POLL))) {
317 		aprint_error_dev(&sc->sc_dev, "pcfrtc_clock_read: failed to acquire I2C bus\n");
318 		return err;
319 	}
320 
321 	/* Read each timekeeping register in order. */
322 	for (i = 0; i < 10; i++) {
323 		cmdbuf[0] = pcf8583_rtc_offset[i];
324 
325 		if ((err = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP,
326 			     sc->sc_address, cmdbuf, 1,
327 			     &bcd[i], 1, I2C_F_POLL))) {
328 			iic_release_bus(sc->sc_tag, I2C_F_POLL);
329 			aprint_error_dev(&sc->sc_dev, "pcfrtc_clock_read: failed to read rtc "
330 			    "at 0x%x\n",
331 			    pcf8583_rtc_offset[i]);
332 			return err;
333 		}
334 	}
335 
336 	/* Done with I2C */
337 	iic_release_bus(sc->sc_tag, I2C_F_POLL);
338 
339 	/*
340 	 * Convert the PCF8583's register values into something useable
341 	 */
342 	*centi      = FROMBCD(bcd[PCF8583_REG_CENTI]);
343 	dt->dt_sec  = FROMBCD(bcd[PCF8583_REG_SEC]);
344 	dt->dt_min  = FROMBCD(bcd[PCF8583_REG_MIN]);
345 	dt->dt_hour = FROMBCD(bcd[PCF8583_REG_HOUR] & PCF8583_HOUR_MASK);
346 	if (bcd[PCF8583_REG_HOUR] & PCF8583_HOUR_12H) {
347 		dt->dt_hour %= 12;	/* 12AM -> 0, 12PM -> 12 */
348 		if (bcd[PCF8583_REG_HOUR] & PCF8583_HOUR_PM)
349 			dt->dt_hour += 12;
350 	}
351 
352 	dt->dt_day = FROMBCD(bcd[PCF8583_REG_YEARDATE] & PCF8583_DATE_MASK);
353 	dt->dt_mon = FROMBCD(bcd[PCF8583_REG_WKDYMON] & PCF8583_MON_MASK);
354 
355 	dt->dt_year = bcd[8] + (bcd[9] * 100);
356 	/* Try to notice if the year's rolled over. */
357 	if (bcd[PCF8583_REG_CSR] & PCF8583_CSR_MASK)
358 		aprint_error_dev(&sc->sc_dev, "cannot check year in mask mode\n");
359 	else {
360 		while (dt->dt_year % 4 !=
361 		       (bcd[PCF8583_REG_YEARDATE] &
362 			PCF8583_YEAR_MASK) >> PCF8583_YEAR_SHIFT)
363 			dt->dt_year++;
364 	}
365 
366 	return 0;
367 }
368 
369 static int
370 pcfrtc_clock_write(struct pcfrtc_softc *sc, struct clock_ymdhms *dt,
371     uint8_t centi)
372 {
373 	uint8_t bcd[10], cmdbuf[2];
374 	int i, err;
375 
376 	/*
377 	 * Convert our time representation into something the PCF8583
378 	 * can understand.
379 	 */
380 	bcd[PCF8583_REG_CENTI]    = centi;
381 	bcd[PCF8583_REG_SEC]      = TOBCD(dt->dt_sec);
382 	bcd[PCF8583_REG_MIN]      = TOBCD(dt->dt_min);
383 	bcd[PCF8583_REG_HOUR]     = TOBCD(dt->dt_hour) & PCF8583_HOUR_MASK;
384 	bcd[PCF8583_REG_YEARDATE] = TOBCD(dt->dt_day) |
385 	    ((dt->dt_year % 4) << PCF8583_YEAR_SHIFT);
386 	bcd[PCF8583_REG_WKDYMON]  = TOBCD(dt->dt_mon) |
387 	    ((dt->dt_wday % 4) << PCF8583_WKDY_SHIFT);
388 	bcd[8]                    = dt->dt_year % 100;
389 	bcd[9]                    = dt->dt_year / 100;
390 
391 	if ((err = iic_acquire_bus(sc->sc_tag, I2C_F_POLL))) {
392 		aprint_error_dev(&sc->sc_dev, "pcfrtc_clock_write: failed to acquire I2C bus\n");
393 		return err;
394 	}
395 
396 	for (i = 1; i < 10; i++) {
397 		cmdbuf[0] = pcf8583_rtc_offset[i];
398 		if ((err = iic_exec(sc->sc_tag,
399 			     i != 9 ? I2C_OP_WRITE : I2C_OP_WRITE_WITH_STOP,
400 			     sc->sc_address, cmdbuf, 1,
401 			     &bcd[i], 1, I2C_F_POLL))) {
402 			iic_release_bus(sc->sc_tag, I2C_F_POLL);
403 			aprint_error_dev(&sc->sc_dev, "pcfrtc_clock_write: failed to write rtc "
404 			    " at 0x%x\n",
405 			    pcf8583_rtc_offset[i]);
406 			return err;
407 		}
408 	}
409 
410 	iic_release_bus(sc->sc_tag, I2C_F_POLL);
411 
412 	return 0;
413 }
414 
415 int
416 pcfrtc_bootstrap_read(i2c_tag_t tag, int i2caddr, int offset,
417     u_int8_t *rvp, size_t len)
418 {
419 	u_int8_t cmdbuf[1];
420 
421 	/*
422 	 * NOTE: "offset" is an absolute offset into the PCF8583
423 	 * address space, not relative to the NVRAM.
424 	 */
425 
426 	if (len == 0)
427 		return (0);
428 
429 	if (iic_acquire_bus(tag, I2C_F_POLL) != 0)
430 		return (-1);
431 
432 	while (len) {
433 		/* Read a single byte. */
434 		cmdbuf[0] = offset;
435 		if (iic_exec(tag, I2C_OP_READ_WITH_STOP, i2caddr,
436 			     cmdbuf, 1, rvp, 1, I2C_F_POLL)) {
437 			iic_release_bus(tag, I2C_F_POLL);
438 			return (-1);
439 		}
440 
441 		len--;
442 		rvp++;
443 		offset++;
444 	}
445 
446 	iic_release_bus(tag, I2C_F_POLL);
447 	return (0);
448 }
449 
450 int
451 pcfrtc_bootstrap_write(i2c_tag_t tag, int i2caddr, int offset,
452     u_int8_t *rvp, size_t len)
453 {
454 	u_int8_t cmdbuf[1];
455 
456 	/*
457 	 * NOTE: "offset" is an absolute offset into the PCF8583
458 	 * address space, not relative to the NVRAM.
459 	 */
460 
461 	if (len == 0)
462 		return (0);
463 
464 	if (iic_acquire_bus(tag, I2C_F_POLL) != 0)
465 		return (-1);
466 
467 	while (len) {
468 		/* Write a single byte. */
469 		cmdbuf[0] = offset;
470 		if (iic_exec(tag, I2C_OP_WRITE_WITH_STOP, i2caddr,
471 			     cmdbuf, 1, rvp, 1, I2C_F_POLL)) {
472 			iic_release_bus(tag, I2C_F_POLL);
473 			return (-1);
474 		}
475 
476 		len--;
477 		rvp++;
478 		offset++;
479 	}
480 
481 	iic_release_bus(tag, I2C_F_POLL);
482 	return (0);
483 }
484