xref: /netbsd-src/sys/dev/i2c/motoi2c.c (revision 6a493d6bc668897c91594964a732d38505b70cbb)
1 /* $NetBSD: motoi2c.c,v 1.4 2011/04/17 15:14:59 phx Exp $ */
2 
3 /*-
4  * Copyright (c) 2007, 2010 The NetBSD Foundation, Inc.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to The NetBSD Foundation
8  * by Matt Thomas.
9  *
10  * Redistribution and use in source and binary forms, with or without
11  * modification, are permitted provided that the following conditions
12  * are met:
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in the
17  *    documentation and/or other materials provided with the distribution.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
29  * POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 #include <sys/cdefs.h>
33 __KERNEL_RCSID(0, "$NetBSD: motoi2c.c,v 1.4 2011/04/17 15:14:59 phx Exp $");
34 
35 #include <sys/param.h>
36 #include <sys/device.h>
37 #include <sys/systm.h>
38 #include <sys/mutex.h>
39 #include <sys/bus.h>
40 #include <sys/intr.h>
41 
42 #include <dev/i2c/i2cvar.h>
43 #include <dev/i2c/motoi2creg.h>
44 #include <dev/i2c/motoi2cvar.h>
45 
46 #ifdef DEBUG
47 int motoi2c_debug = 0;
48 #define	DPRINTF(x)	if (motoi2c_debug) printf x
49 #else
50 #define	DPRINTF(x)
51 #endif
52 
53 static int  motoi2c_acquire_bus(void *, int);
54 static void motoi2c_release_bus(void *, int);
55 static int  motoi2c_exec(void *, i2c_op_t, i2c_addr_t, const void *, size_t,
56 		void *, size_t, int);
57 static int  motoi2c_busy_wait(struct motoi2c_softc *, uint8_t);
58 
59 static const struct i2c_controller motoi2c = {
60 	.ic_acquire_bus = motoi2c_acquire_bus,
61 	.ic_release_bus = motoi2c_release_bus,
62 	.ic_exec	= motoi2c_exec,
63 };
64 
65 static const struct motoi2c_settings motoi2c_default_settings = {
66 	.i2c_adr	= MOTOI2C_ADR_DEFAULT,
67 	.i2c_fdr	= MOTOI2C_FDR_DEFAULT,
68 	.i2c_dfsrr	= MOTOI2C_DFSRR_DEFAULT,
69 };
70 
71 #define	I2C_READ(r)	((*sc->sc_iord)(sc, (r)))
72 #define	I2C_WRITE(r,v)	((*sc->sc_iowr)(sc, (r), (v)))
73 #define I2C_SETCLR(r, s, c) \
74 	((*sc->sc_iowr)(sc, (r), ((*sc->sc_iord)(sc, (r)) | (s)) & ~(c)))
75 
76 static uint8_t
77 motoi2c_iord1(struct motoi2c_softc *sc, bus_size_t off)
78 {
79 	return bus_space_read_1(sc->sc_iot, sc->sc_ioh, off);
80 }
81 
82 static void
83 motoi2c_iowr1(struct motoi2c_softc *sc, bus_size_t off, uint8_t data)
84 {
85 	bus_space_write_1(sc->sc_iot, sc->sc_ioh, off, data);
86 }
87 
88 void
89 motoi2c_attach_common(device_t self, struct motoi2c_softc *sc,
90 	const struct motoi2c_settings *i2c)
91 {
92 	struct i2cbus_attach_args iba;
93 
94 	mutex_init(&sc->sc_buslock, MUTEX_DEFAULT, IPL_NONE);
95 
96 	if (i2c == NULL)
97 		i2c = &motoi2c_default_settings;
98 
99 	sc->sc_i2c = motoi2c;
100 	sc->sc_i2c.ic_cookie = sc;
101 	if (sc->sc_iord == NULL)
102 		sc->sc_iord = motoi2c_iord1;
103 	if (sc->sc_iowr == NULL)
104 		sc->sc_iowr = motoi2c_iowr1;
105 	memset(&iba, 0, sizeof(iba));
106 	iba.iba_tag = &sc->sc_i2c;
107 
108 	I2C_WRITE(I2CCR, 0);		/* reset before changing anything */
109 	I2C_WRITE(I2CDFSRR, i2c->i2c_dfsrr);	/* sampling units */
110 	I2C_WRITE(I2CFDR, i2c->i2c_fdr);	/* divider 3072 (0x31) */
111 	I2C_WRITE(I2CADR, i2c->i2c_adr);	/* our slave address is 0x7f */
112 	I2C_WRITE(I2CSR, 0);		/* clear status flags */
113 
114 	config_found_ia(self, "i2cbus", &iba, iicbus_print);
115 }
116 
117 static int
118 motoi2c_acquire_bus(void *v, int flags)
119 {
120 	struct motoi2c_softc * const sc = v;
121 
122 	mutex_enter(&sc->sc_buslock);
123 	I2C_WRITE(I2CCR, CR_MEN);	/* enable the I2C module */
124 
125 	return 0;
126 }
127 
128 static void
129 motoi2c_release_bus(void *v, int flags)
130 {
131 	struct motoi2c_softc * const sc = v;
132 
133 	I2C_WRITE(I2CCR, 0);		/* reset before changing anything */
134 	mutex_exit(&sc->sc_buslock);
135 }
136 
137 /* busy waiting for byte data transfer completion */
138 static int
139 motoi2c_busy_wait(struct motoi2c_softc *sc, uint8_t cr)
140 {
141 	uint8_t sr;
142 	u_int timo;
143 	int error = 0;
144 
145 	timo = 1000;
146 	while (((sr = I2C_READ(I2CSR)) & SR_MIF) == 0 && --timo)
147 		DELAY(10);
148 
149 	if (timo == 0) {
150 		DPRINTF(("%s: timeout (sr=%#x, cr=%#x)\n",
151 		    __func__, sr, I2C_READ(I2CCR)));
152 		error = ETIMEDOUT;
153 	}
154 	/*
155 	 * RXAK is only valid when transmitting.
156 	 */
157 	if ((cr & CR_MTX) && (sr & SR_RXAK)) {
158 		DPRINTF(("%s: missing rx ack (%#x): spin=%u\n",
159 		    __func__, sr, 1000 - timo));
160 		error = EIO;
161 	}
162 	I2C_WRITE(I2CSR, 0);
163 	return error;
164 }
165 
166 int
167 motoi2c_intr(void *v)
168 {
169 	struct motoi2c_softc * const sc = v;
170 
171 	panic("%s(%p)", __func__, sc);
172 
173 	return 0;
174 }
175 
176 int
177 motoi2c_exec(void *v, i2c_op_t op, i2c_addr_t addr,
178 	const void *cmdbuf, size_t cmdlen,
179 	void *databuf, size_t datalen,
180 	int flags)
181 {
182 	struct motoi2c_softc * const sc = v;
183 	uint8_t sr;
184 	uint8_t cr;
185 	int error;
186 
187 	sr = I2C_READ(I2CSR);
188 	cr = I2C_READ(I2CCR);
189 
190 #if 0
191 	DPRINTF(("%s(%#x,%#x,%p,%zu,%p,%zu,%#x): sr=%#x cr=%#x\n",
192 	    __func__, op, addr, cmdbuf, cmdlen, databuf, datalen, flags,
193 	    sr, cr));
194 #endif
195 
196 	if ((cr & CR_MSTA) == 0 && (sr & SR_MBB) != 0) {
197 		/* wait for bus becoming available */
198 		u_int timo = 100;
199 		do {
200 			DELAY(10);
201 		} while (--timo > 0 && ((sr = I2C_READ(I2CSR)) & SR_MBB) != 0);
202 
203 		if (timo == 0) {
204 			DPRINTF(("%s: bus is busy (%#x)\n", __func__, sr));
205 			return ETIMEDOUT;
206 		}
207 	}
208 
209 	/* reset interrupt and arbitration-lost flags (all others are RO) */
210 	I2C_WRITE(I2CSR, 0);
211 	sr = I2C_READ(I2CSR);
212 
213 	/*
214 	 * Generate start (or restart) condition
215 	 */
216 	/* CR_RTSA is write-only and transitory */
217 	uint8_t rsta = (cr & CR_MSTA ? CR_RSTA : 0);
218 	cr = CR_MEN | CR_MTX | CR_MSTA;
219 	I2C_WRITE(I2CCR, cr | rsta);
220 
221 	DPRINTF(("%s: started: sr=%#x cr=%#x/%#x\n",
222 	    __func__, I2C_READ(I2CSR), cr, I2C_READ(I2CCR)));
223 
224 	sr = I2C_READ(I2CSR);
225 	if (sr & SR_MAL) {
226 		DPRINTF(("%s: lost bus: sr=%#x cr=%#x/%#x\n",
227 		    __func__, I2C_READ(I2CSR), cr, I2C_READ(I2CCR)));
228 		I2C_WRITE(I2CCR, 0);
229 		DELAY(10);
230 		I2C_WRITE(I2CCR, CR_MEN | CR_MTX | CR_MSTA);
231 		DELAY(10);
232 		sr = I2C_READ(I2CSR);
233 		if (sr & SR_MAL) {
234 			error = EBUSY;
235 			goto out;
236 		}
237 		DPRINTF(("%s: reacquired bus: sr=%#x cr=%#x/%#x\n",
238 		    __func__, I2C_READ(I2CSR), cr, I2C_READ(I2CCR)));
239 	}
240 
241 	/* send target address and transfer direction */
242 	uint8_t addr_byte = (addr << 1)
243 	    | (cmdlen == 0 && I2C_OP_READ_P(op) ? 1 : 0);
244 	I2C_WRITE(I2CDR, addr_byte);
245 
246 	error = motoi2c_busy_wait(sc, cr);
247 	if (error) {
248 		DPRINTF(("%s: error sending address: %d\n", __func__, error));
249 		if (error == EIO)
250 			error = ENXIO;
251 		goto out;
252 	}
253 
254 	const uint8_t *cmdptr = cmdbuf;
255 	for (size_t i = 0; i < cmdlen; i++) {
256 		I2C_WRITE(I2CDR, *cmdptr++);
257 
258 		error = motoi2c_busy_wait(sc, cr);
259 		if (error) {
260 			DPRINTF(("%s: error sending cmd byte %zu (cr=%#x/%#x):"
261 			    " %d\n", __func__, i, I2C_READ(I2CCR), cr, error));
262 			goto out;
263 		}
264 	}
265 
266 	if (cmdlen > 0 && I2C_OP_READ_P(op)) {
267 		KASSERT(cr & CR_MTX);
268 		KASSERT((cr & CR_TXAK) == 0);
269 		I2C_WRITE(I2CCR, cr | CR_RSTA);
270 #if 0
271 		DPRINTF(("%s: restarted(read): sr=%#x cr=%#x(%#x)\n",
272 		    __func__, I2C_READ(I2CSR), cr | CR_RSTA, I2C_READ(I2CCR)));
273 #endif
274 
275 		/* send target address and read transfer direction */
276 		addr_byte |= 1;
277 		I2C_WRITE(I2CDR, addr_byte);
278 
279 		error = motoi2c_busy_wait(sc, cr);
280 		if (error) {
281 			if (error == EIO)
282 				error = ENXIO;
283 			goto out;
284 		}
285 	}
286 
287 	if (I2C_OP_READ_P(op)) {
288 		uint8_t *dataptr = databuf;
289 		cr &= ~CR_MTX;		/* clear transmit flags */
290 		if (datalen <= 1)
291 			cr |= CR_TXAK;
292 		I2C_WRITE(I2CCR, cr);
293 		DELAY(10);
294 		(void)I2C_READ(I2CDR);		/* dummy read */
295 		for (size_t i = 0; i < datalen; i++) {
296 			/*
297 			 * If a master receiver wants to terminate a data
298 			 * transfer, it must inform the slave transmitter by
299 			 * not acknowledging the last byte of data (by setting
300 			 * the transmit acknowledge bit (I2CCR[TXAK])) before
301 			 * reading the next-to-last byte of data.
302 			 */
303 			error = motoi2c_busy_wait(sc, cr);
304 			if (error) {
305 				DPRINTF(("%s: error reading byte %zu: %d\n",
306 				    __func__, i, error));
307 				goto out;
308 			}
309 			if (i == datalen - 2) {
310 				cr |= CR_TXAK;
311 				I2C_WRITE(I2CCR, cr);
312 			} else if (i == datalen - 1 && I2C_OP_STOP_P(op)) {
313 				cr = CR_MEN;
314 				I2C_WRITE(I2CCR, cr);
315 			}
316 			*dataptr++ = I2C_READ(I2CDR);
317 		}
318 		if (datalen == 0) {
319 			if (I2C_OP_STOP_P(op)) {
320 				cr = CR_MEN;
321 				I2C_WRITE(I2CCR, cr);
322 			}
323 			(void)I2C_READ(I2CDR);	/* dummy read */
324 			error = motoi2c_busy_wait(sc, cr);
325 			if (error) {
326 				DPRINTF(("%s: error reading dummy last byte:"
327 				    "%d\n", __func__, error));
328 				goto out;
329 			}
330 		}
331 	} else {
332 		const uint8_t *dataptr = databuf;
333 		for (size_t i = 0; i < datalen; i++) {
334 			I2C_WRITE(I2CDR, *dataptr++);
335 			error = motoi2c_busy_wait(sc, cr);
336 			if (error) {
337 				DPRINTF(("%s: error sending data byte %zu:"
338 				    " %d\n", __func__, i, error));
339 				goto out;
340 			}
341 		}
342 	}
343 
344  out:
345 	/*
346 	 * If we encountered an error condition or caller wants a STOP,
347 	 * send a STOP.
348 	 */
349 	if (error || (cr & CR_TXAK) || ((cr & CR_MSTA) && I2C_OP_STOP_P(op))) {
350 		cr = CR_MEN;
351 		I2C_WRITE(I2CCR, cr);
352 		DPRINTF(("%s: stopping: cr=%#x/%#x\n", __func__,
353 		    cr, I2C_READ(I2CCR)));
354 	}
355 
356 	DPRINTF(("%s: exit sr=%#x cr=%#x: %d\n", __func__,
357 	    I2C_READ(I2CSR), I2C_READ(I2CCR), error));
358 
359 	return error;
360 }
361