1 /* $NetBSD: m41t00.c,v 1.23 2020/01/02 19:11:12 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 2003 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Steve C. Woodford and Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: m41t00.c,v 1.23 2020/01/02 19:11:12 thorpej Exp $"); 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/device.h> 44 #include <sys/kernel.h> 45 #include <sys/fcntl.h> 46 #include <sys/uio.h> 47 #include <sys/conf.h> 48 #include <sys/proc.h> 49 #include <sys/event.h> 50 51 #include <sys/bus.h> 52 53 #include <dev/clock_subr.h> 54 55 #include <dev/i2c/i2cvar.h> 56 #include <dev/i2c/m41t00reg.h> 57 58 #include "ioconf.h" 59 60 struct m41t00_softc { 61 device_t sc_dev; 62 i2c_tag_t sc_tag; 63 int sc_address; 64 int sc_open; 65 struct todr_chip_handle sc_todr; 66 }; 67 68 static int m41t00_match(device_t, cfdata_t, void *); 69 static void m41t00_attach(device_t, device_t, void *); 70 71 CFATTACH_DECL_NEW(m41trtc, sizeof(struct m41t00_softc), 72 m41t00_match, m41t00_attach, NULL, NULL); 73 74 dev_type_open(m41t00_open); 75 dev_type_close(m41t00_close); 76 dev_type_read(m41t00_read); 77 dev_type_write(m41t00_write); 78 79 const struct cdevsw m41t00_cdevsw = { 80 .d_open = m41t00_open, 81 .d_close = m41t00_close, 82 .d_read = m41t00_read, 83 .d_write = m41t00_write, 84 .d_ioctl = noioctl, 85 .d_stop = nostop, 86 .d_tty = notty, 87 .d_poll = nopoll, 88 .d_mmap = nommap, 89 .d_kqfilter = nokqfilter, 90 .d_discard = nodiscard, 91 .d_flag = D_OTHER 92 }; 93 94 static int m41t00_gettime_ymdhms(struct todr_chip_handle *, 95 struct clock_ymdhms *); 96 static int m41t00_settime_ymdhms(struct todr_chip_handle *, 97 struct clock_ymdhms *); 98 99 int 100 m41t00_match(device_t parent, cfdata_t cf, void *aux) 101 { 102 struct i2c_attach_args *ia = aux; 103 104 if (ia->ia_addr == M41T00_ADDR) { 105 return I2C_MATCH_ADDRESS_ONLY; 106 } 107 108 return 0; 109 } 110 111 void 112 m41t00_attach(device_t parent, device_t self, void *aux) 113 { 114 struct m41t00_softc *sc = device_private(self); 115 struct i2c_attach_args *ia = aux; 116 117 sc->sc_tag = ia->ia_tag; 118 sc->sc_address = ia->ia_addr; 119 sc->sc_dev = self; 120 121 aprint_naive(": Real-time Clock\n"); 122 aprint_normal(": M41T00 Real-time Clock\n"); 123 124 sc->sc_open = 0; 125 sc->sc_todr.cookie = sc; 126 sc->sc_todr.todr_gettime = NULL; 127 sc->sc_todr.todr_settime = NULL; 128 sc->sc_todr.todr_gettime_ymdhms = m41t00_gettime_ymdhms; 129 sc->sc_todr.todr_settime_ymdhms = m41t00_settime_ymdhms; 130 sc->sc_todr.todr_setwen = NULL; 131 132 todr_attach(&sc->sc_todr); 133 } 134 135 /*ARGSUSED*/ 136 int 137 m41t00_open(dev_t dev, int flag, int fmt, struct lwp *l) 138 { 139 struct m41t00_softc *sc; 140 141 if ((sc = device_lookup_private(&m41trtc_cd, minor(dev))) == NULL) 142 return ENXIO; 143 144 /* XXX: Locking */ 145 146 if (sc->sc_open) 147 return EBUSY; 148 149 sc->sc_open = 1; 150 return 0; 151 } 152 153 /*ARGSUSED*/ 154 int 155 m41t00_close(dev_t dev, int flag, int fmt, struct lwp *l) 156 { 157 struct m41t00_softc *sc; 158 159 if ((sc = device_lookup_private(&m41trtc_cd, minor(dev))) == NULL) 160 return ENXIO; 161 162 sc->sc_open = 0; 163 return 0; 164 } 165 166 /*ARGSUSED*/ 167 int 168 m41t00_read(dev_t dev, struct uio *uio, int flags) 169 { 170 struct m41t00_softc *sc; 171 u_int8_t ch, cmdbuf[1]; 172 int a, error; 173 174 if ((sc = device_lookup_private(&m41trtc_cd, minor(dev))) == NULL) 175 return ENXIO; 176 177 if (uio->uio_offset >= M41T00_NBYTES) 178 return EINVAL; 179 180 if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0) 181 return error; 182 183 while (uio->uio_resid && uio->uio_offset < M41T00_NBYTES) { 184 a = (int)uio->uio_offset; 185 cmdbuf[0] = a; 186 if ((error = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, 187 sc->sc_address, cmdbuf, 1, 188 &ch, 1, 0)) != 0) { 189 iic_release_bus(sc->sc_tag, 0); 190 aprint_error_dev(sc->sc_dev, 191 "m41t00_read: read failed at 0x%x\n", a); 192 return error; 193 } 194 if ((error = uiomove(&ch, 1, uio)) != 0) { 195 iic_release_bus(sc->sc_tag, 0); 196 return error; 197 } 198 } 199 200 iic_release_bus(sc->sc_tag, 0); 201 202 return 0; 203 } 204 205 /*ARGSUSED*/ 206 int 207 m41t00_write(dev_t dev, struct uio *uio, int flags) 208 { 209 struct m41t00_softc *sc; 210 u_int8_t cmdbuf[2]; 211 int a, error; 212 213 if ((sc = device_lookup_private(&m41trtc_cd, minor(dev))) == NULL) 214 return ENXIO; 215 216 if (uio->uio_offset >= M41T00_NBYTES) 217 return EINVAL; 218 219 if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0) 220 return error; 221 222 while (uio->uio_resid && uio->uio_offset < M41T00_NBYTES) { 223 a = (int)uio->uio_offset; 224 225 cmdbuf[0] = a; 226 if ((error = uiomove(&cmdbuf[1], 1, uio)) != 0) 227 break; 228 229 if ((error = iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, 230 sc->sc_address, 231 cmdbuf, 1, &cmdbuf[1], 1, 0)) != 0) { 232 aprint_error_dev(sc->sc_dev, 233 "m41t00_write: write failed at 0x%x\n", a); 234 break; 235 } 236 } 237 238 iic_release_bus(sc->sc_tag, 0); 239 240 return error; 241 } 242 243 static int m41t00_rtc_offset[] = { 244 M41T00_SEC, 245 M41T00_MIN, 246 M41T00_CENHR, 247 M41T00_DAY, 248 M41T00_DATE, 249 M41T00_MONTH, 250 M41T00_YEAR, 251 }; 252 253 static int 254 m41t00_gettime_ymdhms(struct todr_chip_handle *ch, struct clock_ymdhms *dt) 255 { 256 struct m41t00_softc *sc = ch->cookie; 257 u_int8_t bcd[M41T00_NBYTES], cmdbuf[1]; 258 int i, n, error; 259 260 if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0) { 261 aprint_error_dev(sc->sc_dev, 262 "m41t00_clock_read: failed to acquire I2C bus\n"); 263 return error; 264 } 265 266 /* Read each timekeeping register in order. */ 267 n = sizeof(m41t00_rtc_offset) / sizeof(m41t00_rtc_offset[0]); 268 for (i = 0; i < n ; i++) { 269 cmdbuf[0] = m41t00_rtc_offset[i]; 270 271 if ((error = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, 272 sc->sc_address, cmdbuf, 1, 273 &bcd[i], 1, 0)) != 0) { 274 iic_release_bus(sc->sc_tag, 0); 275 aprint_error_dev(sc->sc_dev, 276 "m41t00_clock_read: failed to read rtc " 277 "at 0x%x\n", 278 m41t00_rtc_offset[i]); 279 return error; 280 } 281 } 282 283 /* Done with I2C */ 284 iic_release_bus(sc->sc_tag, 0); 285 286 /* 287 * Convert the M41T00's register values into something useable 288 */ 289 dt->dt_sec = bcdtobin(bcd[M41T00_SEC] & M41T00_SEC_MASK); 290 dt->dt_min = bcdtobin(bcd[M41T00_MIN] & M41T00_MIN_MASK); 291 dt->dt_hour = bcdtobin(bcd[M41T00_CENHR] & M41T00_HOUR_MASK); 292 dt->dt_day = bcdtobin(bcd[M41T00_DATE] & M41T00_DATE_MASK); 293 dt->dt_wday = bcdtobin(bcd[M41T00_DAY] & M41T00_DAY_MASK); 294 dt->dt_mon = bcdtobin(bcd[M41T00_MONTH] & M41T00_MONTH_MASK); 295 dt->dt_year = bcdtobin(bcd[M41T00_YEAR] & M41T00_YEAR_MASK); 296 297 /* 298 * Since the m41t00 just stores 00-99, and this is 2003 as I write 299 * this comment, use 2000 as a base year 300 */ 301 dt->dt_year += 2000; 302 303 return 0; 304 } 305 306 static int 307 m41t00_settime_ymdhms(struct todr_chip_handle *ch, struct clock_ymdhms *dt) 308 { 309 struct m41t00_softc *sc = ch->cookie; 310 uint8_t bcd[M41T00_DATE_BYTES], cmdbuf[2]; 311 uint8_t init_seconds, final_seconds; 312 int i, error; 313 314 /* 315 * Convert our time representation into something the MAX6900 316 * can understand. 317 */ 318 bcd[M41T00_SEC] = bintobcd(dt->dt_sec); 319 bcd[M41T00_MIN] = bintobcd(dt->dt_min); 320 bcd[M41T00_CENHR] = bintobcd(dt->dt_hour); 321 bcd[M41T00_DATE] = bintobcd(dt->dt_day); 322 bcd[M41T00_DAY] = bintobcd(dt->dt_wday); 323 bcd[M41T00_MONTH] = bintobcd(dt->dt_mon); 324 bcd[M41T00_YEAR] = bintobcd(dt->dt_year % 100); 325 326 if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0) { 327 aprint_error_dev(sc->sc_dev, 328 "m41t00_clock_write: failed to acquire I2C bus\n"); 329 return error; 330 } 331 332 /* 333 * The MAX6900 RTC manual recommends ensuring "atomicity" of 334 * a non-burst write by: 335 * 336 * - writing SECONDS 337 * - reading back SECONDS, remembering it as "initial seconds" 338 * - write the remaing RTC registers 339 * - read back SECONDS as "final seconds" 340 * - if "initial seconds" == 59, ensure "final seconds" == 59 341 * - else, ensure "final seconds" is no more than one second 342 * beyond "initial seconds". 343 * 344 * This sounds reasonable for the M41T00, too. 345 */ 346 again: 347 cmdbuf[0] = M41T00_SEC; 348 if ((error = iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, 349 sc->sc_address, cmdbuf, 1, &bcd[M41T00_SEC], 1, 350 0)) != 0) { 351 iic_release_bus(sc->sc_tag, 0); 352 aprint_error_dev(sc->sc_dev, 353 "m41t00_clock_write: failed to write SECONDS\n"); 354 return error; 355 } 356 357 cmdbuf[0] = M41T00_SEC; 358 if ((error = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_address, 359 cmdbuf, 1, &init_seconds, 1, 0)) != 0) { 360 iic_release_bus(sc->sc_tag, 0); 361 aprint_error_dev(sc->sc_dev, 362 "m41t00_clock_write: failed to read " 363 "INITIAL SECONDS\n"); 364 return error; 365 } 366 init_seconds = bcdtobin(init_seconds & M41T00_SEC_MASK); 367 368 for (i = 1; i < M41T00_DATE_BYTES; i++) { 369 cmdbuf[0] = m41t00_rtc_offset[i]; 370 if ((error = iic_exec(sc->sc_tag, 371 I2C_OP_WRITE_WITH_STOP, sc->sc_address, 372 cmdbuf, 1, &bcd[i], 1, 0)) != 0) { 373 iic_release_bus(sc->sc_tag, 0); 374 aprint_error_dev(sc->sc_dev, 375 "m41t00_clock_write: failed to write rtc " 376 " at 0x%x\n", 377 m41t00_rtc_offset[i]); 378 return error; 379 } 380 } 381 382 cmdbuf[0] = M41T00_SEC; 383 if ((error = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, sc->sc_address, 384 cmdbuf, 1, &final_seconds, 1, 0)) != 0) { 385 iic_release_bus(sc->sc_tag, 0); 386 aprint_error_dev(sc->sc_dev, 387 "m41t00_clock_write: failed to read " 388 "FINAL SECONDS\n"); 389 return error; 390 } 391 final_seconds = bcdtobin(final_seconds & M41T00_SEC_MASK); 392 393 if ((init_seconds != final_seconds) && 394 (((init_seconds + 1) % 60) != final_seconds)) { 395 #if 1 396 printf("%s: m41t00_clock_write: init %d, final %d, try again\n", 397 device_xname(sc->sc_dev), init_seconds, final_seconds); 398 #endif 399 goto again; 400 } 401 402 iic_release_bus(sc->sc_tag, 0); 403 404 return 0; 405 } 406