xref: /netbsd-src/sys/dev/i2c/gttwsi_core.c (revision 6a493d6bc668897c91594964a732d38505b70cbb)
1 /*	$NetBSD: gttwsi_core.c,v 1.1 2013/09/06 00:56:12 matt Exp $	*/
2 /*
3  * Copyright (c) 2008 Eiji Kawauchi.
4  * All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. All advertising materials mentioning features or use of this software
15  *    must display the following acknowledgement:
16  *      This product includes software developed for the NetBSD Project by
17  *      Eiji Kawauchi.
18  * 4. The name of the author may not be used to endorse or promote products
19  *    derived from this software without specific prior written permission
20  *
21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31  */
32 /*
33  * Copyright (c) 2005 Brocade Communcations, inc.
34  * All rights reserved.
35  *
36  * Written by Matt Thomas for Brocade Communcations, Inc.
37  *
38  * Redistribution and use in source and binary forms, with or without
39  * modification, are permitted provided that the following conditions
40  * are met:
41  * 1. Redistributions of source code must retain the above copyright
42  *    notice, this list of conditions and the following disclaimer.
43  * 2. Redistributions in binary form must reproduce the above copyright
44  *    notice, this list of conditions and the following disclaimer in the
45  *    documentation and/or other materials provided with the distribution.
46  * 3. The name of Brocade Communications, Inc. may not be used to endorse
47  *    or promote products derived from this software without specific prior
48  *    written permission.
49  *
50  * THIS SOFTWARE IS PROVIDED BY BROCADE COMMUNICATIONS, INC. ``AS IS'' AND
51  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
52  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
53  * ARE DISCLAIMED.  IN NO EVENT SHALL EITHER BROCADE COMMUNICATIONS, INC. BE
54  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
55  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
56  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
57  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
58  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
59  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
60  * OF THE POSSIBILITY OF SUCH DAMAGE.
61  */
62 //#define TWSI_DEBUG
63 
64 /*
65  * Marvell Two-Wire Serial Interface (aka I2C) master driver
66  */
67 
68 #include <sys/cdefs.h>
69 __KERNEL_RCSID(0, "$NetBSD: gttwsi_core.c,v 1.1 2013/09/06 00:56:12 matt Exp $");
70 #include "locators.h"
71 
72 #include <sys/param.h>
73 #include <sys/bus.h>
74 #include <sys/condvar.h>
75 #include <sys/device.h>
76 #include <sys/errno.h>
77 #include <sys/kernel.h>
78 #include <sys/mutex.h>
79 #include <sys/systm.h>
80 
81 #include <dev/i2c/i2cvar.h>
82 
83 #include <dev/i2c/gttwsireg.h>
84 #include <dev/i2c/gttwsivar.h>
85 
86 static int	gttwsi_acquire_bus(void *, int);
87 static void	gttwsi_release_bus(void *, int);
88 static int	gttwsi_send_start(void *v, int flags);
89 static int	gttwsi_send_stop(void *v, int flags);
90 static int	gttwsi_initiate_xfer(void *v, i2c_addr_t addr, int flags);
91 static int	gttwsi_read_byte(void *v, uint8_t *valp, int flags);
92 static int	gttwsi_write_byte(void *v, uint8_t val, int flags);
93 
94 static int	gttwsi_wait(struct gttwsi_softc *, uint32_t, uint32_t, int);
95 
96 static inline uint32_t
97 gttwsi_read_4(struct gttwsi_softc *sc, uint32_t reg)
98 {
99 	uint32_t val = bus_space_read_4(sc->sc_bust, sc->sc_bush, reg);
100 #ifdef TWSI_DEBUG
101 	printf("I2C:R:%02x:%02x\n", reg, val);
102 #else
103 	DELAY(TWSI_READ_DELAY);
104 #endif
105 	return val;
106 }
107 
108 static inline void
109 gttwsi_write_4(struct gttwsi_softc *sc, uint32_t reg, uint32_t val)
110 {
111 	bus_space_write_4(sc->sc_bust, sc->sc_bush, reg, val);
112 #ifdef TWSI_DEBUG
113 	printf("I2C:W:%02x:%02x\n", reg, val);
114 #else
115 	DELAY(TWSI_WRITE_DELAY);
116 #endif
117 	return;
118 }
119 
120 
121 
122 /* ARGSUSED */
123 void
124 gttwsi_attach_subr(device_t self, bus_space_tag_t iot, bus_space_handle_t ioh)
125 {
126 	struct gttwsi_softc * const sc = device_private(self);
127 
128 	aprint_naive("\n");
129 	aprint_normal(": Marvell TWSI controller\n");
130 
131 	sc->sc_dev = self;
132 	sc->sc_bust = iot;
133 	sc->sc_bush = ioh;
134 
135 	mutex_init(&sc->sc_buslock, MUTEX_DEFAULT, IPL_NONE);
136 	mutex_init(&sc->sc_mtx, MUTEX_DEFAULT, IPL_BIO);
137 	cv_init(&sc->sc_cv, device_xname(self));
138 
139 	sc->sc_started = false;
140 	sc->sc_i2c.ic_cookie = sc;
141 	sc->sc_i2c.ic_acquire_bus = gttwsi_acquire_bus;
142 	sc->sc_i2c.ic_release_bus = gttwsi_release_bus;
143 	sc->sc_i2c.ic_exec = NULL;
144 	sc->sc_i2c.ic_send_start = gttwsi_send_start;
145 	sc->sc_i2c.ic_send_stop = gttwsi_send_stop;
146 	sc->sc_i2c.ic_initiate_xfer = gttwsi_initiate_xfer;
147 	sc->sc_i2c.ic_read_byte = gttwsi_read_byte;
148 	sc->sc_i2c.ic_write_byte = gttwsi_write_byte;
149 
150 	/*
151 	 * Put the controller into Soft Reset.
152 	 */
153 	/* reset */
154 	gttwsi_write_4(sc, TWSI_SOFTRESET, SOFTRESET_VAL);
155 
156 }
157 
158 void
159 gttwsi_config_children(device_t self)
160 {
161 	struct gttwsi_softc * const sc = device_private(self);
162 	struct i2cbus_attach_args iba;
163 
164 	memset(&iba, 0, sizeof(iba));
165 	iba.iba_tag = &sc->sc_i2c;
166 
167 	(void) config_found_ia(sc->sc_dev, "i2cbus", &iba, iicbus_print);
168 }
169 
170 int
171 gttwsi_intr(void *arg)
172 {
173 	struct gttwsi_softc *sc = arg;
174 	uint32_t val;
175 
176 	val = gttwsi_read_4(sc, TWSI_CONTROL);
177 	if (val & CONTROL_IFLG) {
178 		gttwsi_write_4(sc, TWSI_CONTROL, val & ~CONTROL_INTEN);
179 		mutex_enter(&sc->sc_mtx);
180 		cv_signal(&sc->sc_cv);
181 		mutex_exit(&sc->sc_mtx);
182 
183 		return 1;	/* handled */
184 	}
185 	return 0;
186 }
187 
188 /* ARGSUSED */
189 static int
190 gttwsi_acquire_bus(void *arg, int flags)
191 {
192 	struct gttwsi_softc *sc = arg;
193 
194 	mutex_enter(&sc->sc_buslock);
195 	return 0;
196 }
197 
198 /* ARGSUSED */
199 static void
200 gttwsi_release_bus(void *arg, int flags)
201 {
202 	struct gttwsi_softc *sc = arg;
203 
204 	mutex_exit(&sc->sc_buslock);
205 }
206 
207 static int
208 gttwsi_send_start(void *v, int flags)
209 {
210 	struct gttwsi_softc *sc = v;
211 	int expect;
212 
213 	if (sc->sc_started)
214 		expect = STAT_RSCT;
215 	else
216 		expect = STAT_SCT;
217 	sc->sc_started = true;
218 	return gttwsi_wait(sc, CONTROL_START, expect, flags);
219 }
220 
221 static int
222 gttwsi_send_stop(void *v, int flags)
223 {
224 	struct gttwsi_softc *sc = v;
225 	int retry = TWSI_RETRY_COUNT;
226 
227 	sc->sc_started = false;
228 
229 	/* Interrupt is not generated for STAT_NRS. */
230 	gttwsi_write_4(sc, TWSI_CONTROL, CONTROL_STOP | CONTROL_TWSIEN);
231 	while (retry > 0) {
232 		if (gttwsi_read_4(sc, TWSI_STATUS) == STAT_NRS)
233 			return 0;
234 		retry--;
235 		DELAY(TWSI_STAT_DELAY);
236 	}
237 
238 	aprint_error_dev(sc->sc_dev, "send STOP failed\n");
239 	return -1;
240 }
241 
242 static int
243 gttwsi_initiate_xfer(void *v, i2c_addr_t addr, int flags)
244 {
245 	struct gttwsi_softc *sc = v;
246 	uint32_t data, expect;
247 	int error, read;
248 
249 	gttwsi_send_start(v, flags);
250 
251 	read = (flags & I2C_F_READ) != 0;
252 	if (read)
253 		expect = STAT_ARBT_AR;
254 	else
255 		expect = STAT_AWBT_AR;
256 
257 	/*
258 	 * First byte contains whether this xfer is a read or write.
259 	 */
260 	data = read;
261 	if (addr > 0x7f) {
262 		/*
263 		 * If this is a 10bit request, the first address byte is
264 		 * 0b11110<b9><b8><r/w>.
265 		 */
266 		data |= 0xf0 | ((addr & 0x300) >> 7);
267 		gttwsi_write_4(sc, TWSI_DATA, data);
268 		error = gttwsi_wait(sc, 0, expect, flags);
269 		if (error)
270 			return error;
271 		/*
272 		 * The first address byte has been sent, now to send
273 		 * the second one.
274 		 */
275 		if (read)
276 			expect = STAT_SARBT_AR;
277 		else
278 			expect = STAT_SAWBT_AR;
279 		data = (uint8_t)addr;
280 	} else
281 		data |= (addr << 1);
282 
283 	gttwsi_write_4(sc, TWSI_DATA, data);
284 	return gttwsi_wait(sc, 0, expect, flags);
285 }
286 
287 static int
288 gttwsi_read_byte(void *v, uint8_t *valp, int flags)
289 {
290 	struct gttwsi_softc *sc = v;
291 	int error;
292 
293 	if (flags & I2C_F_LAST)
294 		error = gttwsi_wait(sc, 0, STAT_MRRD_ANT, flags);
295 	else
296 		error = gttwsi_wait(sc, CONTROL_ACK, STAT_MRRD_AT, flags);
297 	if (!error)
298 		*valp = gttwsi_read_4(sc, TWSI_DATA);
299 	if ((flags & (I2C_F_LAST | I2C_F_STOP)) == (I2C_F_LAST | I2C_F_STOP))
300 		error = gttwsi_send_stop(sc, flags);
301 	return error;
302 }
303 
304 static int
305 gttwsi_write_byte(void *v, uint8_t val, int flags)
306 {
307 	struct gttwsi_softc *sc = v;
308 	int error;
309 
310 	gttwsi_write_4(sc, TWSI_DATA, val);
311 	error = gttwsi_wait(sc, 0, STAT_MTDB_AR, flags);
312 	if (flags & I2C_F_STOP)
313 		gttwsi_send_stop(sc, flags);
314 	return error;
315 }
316 
317 static int
318 gttwsi_wait(struct gttwsi_softc *sc, uint32_t control, uint32_t expect,
319 	    int flags)
320 {
321 	uint32_t status;
322 	int timo, error = 0;
323 
324 	DELAY(5);
325 	if (!(flags & I2C_F_POLL))
326 		control |= CONTROL_INTEN;
327 	gttwsi_write_4(sc, TWSI_CONTROL, control | CONTROL_TWSIEN);
328 
329 	timo = 0;
330 	for (;;) {
331 		control = gttwsi_read_4(sc, TWSI_CONTROL);
332 		if (control & CONTROL_IFLG)
333 			break;
334 		if (!(flags & I2C_F_POLL)) {
335 			mutex_enter(&sc->sc_mtx);
336 			error = cv_timedwait_sig(&sc->sc_cv, &sc->sc_mtx, hz);
337 			mutex_exit(&sc->sc_mtx);
338 			if (error)
339 				return error;
340 		}
341 		DELAY(TWSI_RETRY_DELAY);
342 		if (timo++ > 1000000)	/* 1sec */
343 			break;
344 	}
345 
346 	status = gttwsi_read_4(sc, TWSI_STATUS);
347 	if (status != expect) {
348 		aprint_error_dev(sc->sc_dev,
349 		    "unexpected status 0x%x: expect 0x%x\n", status, expect);
350 		return EIO;
351 	}
352 	return error;
353 }
354