xref: /netbsd-src/sys/dev/i2c/ds1307reg.h (revision 8b0f9554ff8762542c4defc4f70e1eb76fb508fa)
1 /*	$NetBSD: ds1307reg.h,v 1.2 2005/12/11 12:21:22 christos Exp $	*/
2 
3 /*
4  * Copyright (c) 2003 Wasabi Systems, Inc.
5  * All rights reserved.
6  *
7  * Written by Steve C. Woodford for Wasabi Systems, Inc.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *      This product includes software developed for the NetBSD Project by
20  *      Wasabi Systems, Inc.
21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22  *    or promote products derived from this software without specific prior
23  *    written permission.
24  *
25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35  * POSSIBILITY OF SUCH DAMAGE.
36  */
37 
38 #ifndef _DEV_I2C_DS1307REG_H_
39 #define _DEV_I2C_DS1307REG_H_
40 
41 /*
42  * DS1307 64x8 Serial Real-Time Clock
43  */
44 
45 #define	DS1307_ADDR		0x68	/* Fixed I2C Slave Address */
46 
47 #define DS1307_SECONDS		0x00
48 #define DS1307_MINUTES		0x01
49 #define DS1307_HOURS		0x02
50 #define DS1307_DAY		0x03
51 #define DS1307_DATE		0x04
52 #define DS1307_MONTH		0x05
53 #define DS1307_YEAR		0x06
54 #define DS1307_CONTROL		0x07
55 #define	DS1307_NVRAM_START	0x08
56 #define	DS1307_NVRAM_END	0x3f
57 
58 #define	DS1307_NRTC_REGS	8
59 #define	DS1307_NVRAM_SIZE	((DS1307_NVRAM_END - DS1307_NVRAM_START) + 1)
60 
61 /*
62  * Bit definitions.
63  */
64 #define	DS1307_SECONDS_CH	(1u << 7)	/* Clock Hold */
65 #define	DS1307_SECONDS_MASK	0x7f
66 #define	DS1307_MINUTES_MASK	0x7f
67 #define	DS1307_HOURS_24HRS	(1u << 6)	/* Set for 24 hour mode */
68 #define	DS1307_HOURS_12HRS_PM	(1u << 5)	/* If 12 hr mode, set = PM */
69 #define	DS1307_HOURS_12MASK	0x1f
70 #define	DS1307_HOURS_24MASK	0x3f
71 #define	DS1307_DAY_MASK		0x07
72 #define	DS1307_DATE_MASK	0x3f
73 #define	DS1307_MONTH_MASK	0x1f
74 #define	DS1307_CONTROL_OUT	(1u << 7)	/* OSC/OUT pin value */
75 #define	DS1307_CONTROL_SQWE	(1u << 4)	/* Enable square wave output */
76 #define	DS1307_CONTROL_1HZ	0
77 #define	DS1307_CONTROL_4096HZ	1
78 #define	DS1307_CONTROL_8192HZ	2
79 #define	DS1307_CONTROL_32768HZ	3
80 
81 #endif /* _DEV_I2C_DS1307REG_H_ */
82