1 /* $NetBSD: at24cxx.c,v 1.31 2019/03/26 09:22:17 mlelstv Exp $ */ 2 3 /* 4 * Copyright (c) 2003 Wasabi Systems, Inc. 5 * All rights reserved. 6 * 7 * Written by Steve C. Woodford and Jason R. Thorpe for Wasabi Systems, Inc. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed for the NetBSD Project by 20 * Wasabi Systems, Inc. 21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 * or promote products derived from this software without specific prior 23 * written permission. 24 * 25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 * POSSIBILITY OF SUCH DAMAGE. 36 */ 37 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: at24cxx.c,v 1.31 2019/03/26 09:22:17 mlelstv Exp $"); 40 41 #include <sys/param.h> 42 #include <sys/systm.h> 43 #include <sys/device.h> 44 #include <sys/kernel.h> 45 #include <sys/fcntl.h> 46 #include <sys/uio.h> 47 #include <sys/conf.h> 48 #include <sys/proc.h> 49 #include <sys/event.h> 50 51 #include <sys/bus.h> 52 53 #include <dev/i2c/i2cvar.h> 54 #include <dev/i2c/at24cxxvar.h> 55 56 #include "ioconf.h" 57 58 /* 59 * AT24Cxx EEPROM I2C address: 60 * 101 0xxx 61 * (and others depending on the exact model) The bigger 8-bit parts 62 * decode multiple addresses. The bigger 16-bit parts do too (those 63 * larger than 512kb). Be sure to check the datasheet of your EEPROM 64 * because there's much variation between models. 65 */ 66 #define AT24CXX_ADDRMASK 0x3f8 67 #define AT24CXX_ADDR 0x50 68 69 #define AT24CXX_WRITE_CYCLE_MS 10 70 #define AT24CXX_ADDR_HI(a) (((a) >> 8) & 0x1f) 71 #define AT24CXX_ADDR_LO(a) ((a) & 0xff) 72 73 #include "seeprom.h" 74 75 #if NSEEPROM > 0 76 77 struct seeprom_softc { 78 device_t sc_dev; 79 i2c_tag_t sc_tag; 80 int sc_address; 81 int sc_size; 82 int sc_cmdlen; 83 int sc_open; 84 }; 85 86 static int seeprom_match(device_t, cfdata_t, void *); 87 static void seeprom_attach(device_t, device_t, void *); 88 89 CFATTACH_DECL_NEW(seeprom, sizeof(struct seeprom_softc), 90 seeprom_match, seeprom_attach, NULL, NULL); 91 92 dev_type_open(seeprom_open); 93 dev_type_close(seeprom_close); 94 dev_type_read(seeprom_read); 95 dev_type_write(seeprom_write); 96 97 const struct cdevsw seeprom_cdevsw = { 98 .d_open = seeprom_open, 99 .d_close = seeprom_close, 100 .d_read = seeprom_read, 101 .d_write = seeprom_write, 102 .d_ioctl = noioctl, 103 .d_stop = nostop, 104 .d_tty = notty, 105 .d_poll = nopoll, 106 .d_mmap = nommap, 107 .d_kqfilter = nokqfilter, 108 .d_discard = nodiscard, 109 .d_flag = D_OTHER 110 }; 111 112 static int seeprom_wait_idle(struct seeprom_softc *); 113 114 static const struct device_compatible_entry compat_data[] = { 115 { "i2c-at24c01", 128 }, 116 { "i2c-at24c02", 256 }, 117 { "i2c-at24c04", 512 }, 118 { "i2c-at24c08", 1024 }, 119 { "i2c-at24c16", 2048 }, 120 { "i2c-at24c32", 4096 }, 121 { "i2c-at24c64", 8192 }, 122 { "i2c-at24c128", 16384 }, 123 { "i2c-at24c256", 32768 }, 124 { "i2c-at24c512", 65536 }, 125 { "i2c-at34c02", 256 }, 126 { "atmel,24c02", 256 }, 127 { "atmel,24c16", 2048 }, 128 { NULL, 0 } 129 }; 130 131 static int 132 seeprom_match(device_t parent, cfdata_t cf, void *aux) 133 { 134 struct i2c_attach_args *ia = aux; 135 int match_result; 136 137 if (iic_use_direct_match(ia, cf, compat_data, &match_result)) 138 return match_result; 139 140 if ((ia->ia_addr & AT24CXX_ADDRMASK) == AT24CXX_ADDR) 141 return I2C_MATCH_ADDRESS_ONLY; 142 143 return 0; 144 } 145 146 static void 147 seeprom_attach(device_t parent, device_t self, void *aux) 148 { 149 struct seeprom_softc *sc = device_private(self); 150 struct i2c_attach_args *ia = aux; 151 const struct device_compatible_entry *dce; 152 153 sc->sc_tag = ia->ia_tag; 154 sc->sc_address = ia->ia_addr; 155 sc->sc_dev = self; 156 157 if (ia->ia_name != NULL) { 158 aprint_naive(": %s", ia->ia_name); 159 aprint_normal(": %s", ia->ia_name); 160 } else { 161 aprint_naive(": EEPROM"); 162 aprint_normal(": AT24Cxx or compatible EEPROM"); 163 } 164 165 /* 166 * The AT24C01A/02/04/08/16 EEPROMs use a 1 byte command 167 * word to select the offset into the EEPROM page. The 168 * AT24C04/08/16 decode fewer of the i2c address bits, 169 * using the bottom 1, 2, or 3 to select the 256-byte 170 * super-page. 171 * 172 * The AT24C32/64/128/256/512 EEPROMs use a 2 byte command 173 * word and decode all of the i2c address bits. 174 * 175 * The AT24C1024 EEPROMs use a 2 byte command and also do bank 176 * switching to select the proper super-page. This isn't 177 * supported by this driver. 178 */ 179 if (device_cfdata(self)->cf_flags) 180 sc->sc_size = (device_cfdata(self)->cf_flags << 7); 181 182 if (sc->sc_size <= 0 && ia->ia_ncompat > 0) { 183 if (iic_compatible_match(ia, compat_data, &dce)) 184 sc->sc_size = dce->data; 185 } 186 187 switch (sc->sc_size) { 188 case 128: /* 1Kbit */ 189 case 256: /* 2Kbit */ 190 case 512: /* 4Kbit */ 191 case 1024: /* 8Kbit */ 192 case 2048: /* 16Kbit */ 193 sc->sc_cmdlen = 1; 194 aprint_normal(": size %d\n", sc->sc_size); 195 break; 196 197 case 4096: /* 32Kbit */ 198 case 8192: /* 64Kbit */ 199 case 16384: /* 128Kbit */ 200 case 32768: /* 256Kbit */ 201 case 65536: /* 512Kbit */ 202 sc->sc_cmdlen = 2; 203 aprint_normal(": size %d\n", sc->sc_size); 204 break; 205 206 default: 207 /* 208 * Default to 2KB. If we happen to have a 2KB 209 * EEPROM this will allow us to access it. If we 210 * have a smaller one, the worst that can happen 211 * is that we end up trying to read a different 212 * EEPROM on the bus when accessing it. 213 * 214 * Obviously this will not work for 4KB or 8KB 215 * EEPROMs, but them's the breaks. 216 */ 217 aprint_normal("\n"); 218 aprint_error_dev(self, "invalid size specified; " 219 "assuming 2KB (16Kb)\n"); 220 sc->sc_size = 2048; 221 sc->sc_cmdlen = 1; 222 } 223 224 sc->sc_open = 0; 225 } 226 227 /*ARGSUSED*/ 228 int 229 seeprom_open(dev_t dev, int flag, int fmt, struct lwp *l) 230 { 231 struct seeprom_softc *sc; 232 233 if ((sc = device_lookup_private(&seeprom_cd, minor(dev))) == NULL) 234 return (ENXIO); 235 236 /* XXX: Locking */ 237 238 if (sc->sc_open) 239 return (EBUSY); 240 241 sc->sc_open = 1; 242 return (0); 243 } 244 245 /*ARGSUSED*/ 246 int 247 seeprom_close(dev_t dev, int flag, int fmt, struct lwp *l) 248 { 249 struct seeprom_softc *sc; 250 251 if ((sc = device_lookup_private(&seeprom_cd, minor(dev))) == NULL) 252 return (ENXIO); 253 254 sc->sc_open = 0; 255 return (0); 256 } 257 258 /*ARGSUSED*/ 259 int 260 seeprom_read(dev_t dev, struct uio *uio, int flags) 261 { 262 struct seeprom_softc *sc; 263 i2c_addr_t addr; 264 u_int8_t ch, cmdbuf[2]; 265 int a, error; 266 267 if ((sc = device_lookup_private(&seeprom_cd, minor(dev))) == NULL) 268 return (ENXIO); 269 270 if (uio->uio_offset >= sc->sc_size) 271 return (EINVAL); 272 273 /* 274 * Even though the AT24Cxx EEPROMs support sequential 275 * reads within a page, some I2C controllers do not 276 * support anything other than single-byte transfers, 277 * so we're stuck with this lowest-common-denominator. 278 */ 279 280 while (uio->uio_resid > 0 && uio->uio_offset < sc->sc_size) { 281 a = (int)uio->uio_offset; 282 if (sc->sc_cmdlen == 1) { 283 addr = sc->sc_address + (a >> 8); 284 cmdbuf[0] = a & 0xff; 285 } else { 286 addr = sc->sc_address; 287 cmdbuf[0] = AT24CXX_ADDR_HI(a); 288 cmdbuf[1] = AT24CXX_ADDR_LO(a); 289 } 290 291 if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0) 292 return (error); 293 if ((error = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, 294 addr, cmdbuf, sc->sc_cmdlen, 295 &ch, 1, 0)) != 0) { 296 iic_release_bus(sc->sc_tag, 0); 297 aprint_error_dev(sc->sc_dev, 298 "seeprom_read: byte read failed at 0x%x\n", a); 299 return (error); 300 } 301 iic_release_bus(sc->sc_tag, 0); 302 303 if ((error = uiomove(&ch, 1, uio)) != 0) { 304 return (error); 305 } 306 } 307 308 return (0); 309 } 310 311 /*ARGSUSED*/ 312 int 313 seeprom_write(dev_t dev, struct uio *uio, int flags) 314 { 315 struct seeprom_softc *sc; 316 i2c_addr_t addr; 317 u_int8_t ch, cmdbuf[2]; 318 int a, error; 319 320 if ((sc = device_lookup_private(&seeprom_cd, minor(dev))) == NULL) 321 return (ENXIO); 322 323 if (uio->uio_offset >= sc->sc_size) 324 return (EINVAL); 325 326 /* 327 * See seeprom_read() for why we don't use sequential 328 * writes within a page. 329 */ 330 331 while (uio->uio_resid > 0 && uio->uio_offset < sc->sc_size) { 332 a = (int)uio->uio_offset; 333 if (sc->sc_cmdlen == 1) { 334 addr = sc->sc_address + (a >> 8); 335 cmdbuf[0] = a & 0xff; 336 } else { 337 addr = sc->sc_address; 338 cmdbuf[0] = AT24CXX_ADDR_HI(a); 339 cmdbuf[1] = AT24CXX_ADDR_LO(a); 340 } 341 if ((error = uiomove(&ch, 1, uio)) != 0) { 342 iic_release_bus(sc->sc_tag, 0); 343 return (error); 344 } 345 346 if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0) 347 return (error); 348 if ((error = iic_exec(sc->sc_tag, I2C_OP_WRITE_WITH_STOP, 349 addr, cmdbuf, sc->sc_cmdlen, 350 &ch, 1, 0)) != 0) { 351 iic_release_bus(sc->sc_tag, 0); 352 aprint_error_dev(sc->sc_dev, 353 "seeprom_write: byte write failed at 0x%x\n", a); 354 return (error); 355 } 356 iic_release_bus(sc->sc_tag, 0); 357 358 /* Wait until the device commits the byte. */ 359 if ((error = seeprom_wait_idle(sc)) != 0) { 360 return (error); 361 } 362 } 363 364 return (0); 365 } 366 367 static int 368 seeprom_wait_idle(struct seeprom_softc *sc) 369 { 370 uint8_t cmdbuf[2] = { 0, 0 }; 371 int rv, timeout; 372 u_int8_t dummy; 373 int error; 374 375 timeout = (1000 / hz) / AT24CXX_WRITE_CYCLE_MS; 376 if (timeout == 0) 377 timeout = 1; 378 379 delay(10); 380 381 /* 382 * Read the byte at address 0. This is just a dummy 383 * read to wait for the EEPROM's write cycle to complete. 384 */ 385 for (;;) { 386 if ((error = iic_acquire_bus(sc->sc_tag, 0)) != 0) 387 return error; 388 error = iic_exec(sc->sc_tag, I2C_OP_READ_WITH_STOP, 389 sc->sc_address, cmdbuf, sc->sc_cmdlen, &dummy, 1, 0); 390 iic_release_bus(sc->sc_tag, 0); 391 if (error == 0) 392 break; 393 394 rv = tsleep(sc, PRIBIO | PCATCH, "seepromwr", timeout); 395 if (rv != EWOULDBLOCK) 396 return (rv); 397 } 398 399 return (0); 400 } 401 402 #endif /* NSEEPROM > 0 */ 403 404 int 405 seeprom_bootstrap_read(i2c_tag_t tag, int i2caddr, int offset, int devsize, 406 u_int8_t *rvp, size_t len) 407 { 408 i2c_addr_t addr; 409 int cmdlen; 410 uint8_t cmdbuf[2]; 411 412 if (len == 0) 413 return (0); 414 415 /* We are very forgiving about devsize during bootstrap. */ 416 cmdlen = (devsize >= 4096) ? 2 : 1; 417 418 if (iic_acquire_bus(tag, I2C_F_POLL) != 0) 419 return (-1); 420 421 while (len) { 422 if (cmdlen == 1) { 423 addr = i2caddr + (offset >> 8); 424 cmdbuf[0] = offset & 0xff; 425 } else { 426 addr = i2caddr; 427 cmdbuf[0] = AT24CXX_ADDR_HI(offset); 428 cmdbuf[1] = AT24CXX_ADDR_LO(offset); 429 } 430 431 /* Read a single byte. */ 432 if (iic_exec(tag, I2C_OP_READ_WITH_STOP, addr, 433 cmdbuf, cmdlen, rvp, 1, I2C_F_POLL)) { 434 iic_release_bus(tag, I2C_F_POLL); 435 return (-1); 436 } 437 438 len--; 439 rvp++; 440 offset++; 441 } 442 443 iic_release_bus(tag, I2C_F_POLL); 444 return (0); 445 } 446